![]() |
MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
|
Peripheral Clock Disable.
#define MXC_F_GCR_PCLKDIS0_DMA ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_DMA_POS)) |
PCLKDIS0_DMA Mask
#define MXC_F_GCR_PCLKDIS0_DMA_POS 5 |
PCLKDIS0_DMA Position
#define MXC_F_GCR_PCLKDIS0_GPIO0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO0_POS)) |
PCLKDIS0_GPIO0 Mask
#define MXC_F_GCR_PCLKDIS0_GPIO0_POS 0 |
PCLKDIS0_GPIO0 Position
#define MXC_F_GCR_PCLKDIS0_GPIO1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO1_POS)) |
PCLKDIS0_GPIO1 Mask
#define MXC_F_GCR_PCLKDIS0_GPIO1_POS 1 |
PCLKDIS0_GPIO1 Position
#define MXC_F_GCR_PCLKDIS0_I2C0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C0_POS)) |
PCLKDIS0_I2C0 Mask
#define MXC_F_GCR_PCLKDIS0_I2C0_POS 13 |
PCLKDIS0_I2C0 Position
#define MXC_F_GCR_PCLKDIS0_I2C1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C1_POS)) |
PCLKDIS0_I2C1 Mask
#define MXC_F_GCR_PCLKDIS0_I2C1_POS 28 |
PCLKDIS0_I2C1 Position
#define MXC_F_GCR_PCLKDIS0_SPI0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_SPI0_POS)) |
PCLKDIS0_SPI0 Mask
#define MXC_F_GCR_PCLKDIS0_SPI0_POS 6 |
PCLKDIS0_SPI0 Position
#define MXC_F_GCR_PCLKDIS0_SPI1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_SPI1_POS)) |
PCLKDIS0_SPI1 Mask
#define MXC_F_GCR_PCLKDIS0_SPI1_POS 7 |
PCLKDIS0_SPI1 Position
#define MXC_F_GCR_PCLKDIS0_SPI2 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_SPI2_POS)) |
PCLKDIS0_SPI2 Mask
#define MXC_F_GCR_PCLKDIS0_SPI2_POS 8 |
PCLKDIS0_SPI2 Position
#define MXC_F_GCR_PCLKDIS0_TMR0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR0_POS)) |
PCLKDIS0_TMR0 Mask
#define MXC_F_GCR_PCLKDIS0_TMR0_POS 15 |
PCLKDIS0_TMR0 Position
#define MXC_F_GCR_PCLKDIS0_TMR1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR1_POS)) |
PCLKDIS0_TMR1 Mask
#define MXC_F_GCR_PCLKDIS0_TMR1_POS 16 |
PCLKDIS0_TMR1 Position
#define MXC_F_GCR_PCLKDIS0_TMR2 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR2_POS)) |
PCLKDIS0_TMR2 Mask
#define MXC_F_GCR_PCLKDIS0_TMR2_POS 17 |
PCLKDIS0_TMR2 Position
#define MXC_F_GCR_PCLKDIS0_TMR3 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR3_POS)) |
PCLKDIS0_TMR3 Mask
#define MXC_F_GCR_PCLKDIS0_TMR3_POS 18 |
PCLKDIS0_TMR3 Position
#define MXC_F_GCR_PCLKDIS0_UART0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART0_POS)) |
PCLKDIS0_UART0 Mask
#define MXC_F_GCR_PCLKDIS0_UART0_POS 9 |
PCLKDIS0_UART0 Position
#define MXC_F_GCR_PCLKDIS0_UART1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART1_POS)) |
PCLKDIS0_UART1 Mask
#define MXC_F_GCR_PCLKDIS0_UART1_POS 10 |
PCLKDIS0_UART1 Position