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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Select clock source, data format, ref inputs and ref buffers.
#define MXC_F_AFE_ADC_ONE_CTRL_EXTCLK ((uint8_t)(0x1UL << MXC_F_AFE_ADC_ONE_CTRL_EXTCLK_POS)) |
CTRL_EXTCLK Mask
#define MXC_F_AFE_ADC_ONE_CTRL_EXTCLK_POS 7 |
CTRL_EXTCLK Position
#define MXC_F_AFE_ADC_ONE_CTRL_FORMAT ((uint8_t)(0x1UL << MXC_F_AFE_ADC_ONE_CTRL_FORMAT_POS)) |
CTRL_FORMAT Mask
#define MXC_F_AFE_ADC_ONE_CTRL_FORMAT_POS 5 |
CTRL_FORMAT Position
#define MXC_F_AFE_ADC_ONE_CTRL_REF_SEL ((uint8_t)(0x7UL << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS)) |
CTRL_REF_SEL Mask
#define MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS 0 |
CTRL_REF_SEL Position
#define MXC_F_AFE_ADC_ONE_CTRL_REFBUFN_EN ((uint8_t)(0x1UL << MXC_F_AFE_ADC_ONE_CTRL_REFBUFN_EN_POS)) |
CTRL_REFBUFN_EN Mask
#define MXC_F_AFE_ADC_ONE_CTRL_REFBUFN_EN_POS 3 |
CTRL_REFBUFN_EN Position
#define MXC_F_AFE_ADC_ONE_CTRL_REFBUFP_EN ((uint8_t)(0x1UL << MXC_F_AFE_ADC_ONE_CTRL_REFBUFP_EN_POS)) |
CTRL_REFBUFP_EN Mask
#define MXC_F_AFE_ADC_ONE_CTRL_REFBUFP_EN_POS 4 |
CTRL_REFBUFP_EN Position
#define MXC_F_AFE_ADC_ONE_CTRL_U_BN ((uint8_t)(0x1UL << MXC_F_AFE_ADC_ONE_CTRL_U_BN_POS)) |
CTRL_U_BN Mask
#define MXC_F_AFE_ADC_ONE_CTRL_U_BN_POS 6 |
CTRL_U_BN Position
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_AVDD_AND_AGND (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_AVDD_AND_AGND << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_AVDD_AND_AGND Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_AGND (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_AGND << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF0P_AND_AGND Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_REF0N (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_REF0N << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF0P_AND_REF0N Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_AGND (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_AGND << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF1P_AND_AGND Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_REF1N (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_REF1N << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF1P_AND_REF1N Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_AGND (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_AGND << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF2P_AND_AGND Setting
#define MXC_S_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_REF2N (MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_REF2N << MXC_F_AFE_ADC_ONE_CTRL_REF_SEL_POS) |
CTRL_REF_SEL_REF2P_AND_REF2N Setting
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_AVDD_AND_AGND ((uint8_t)0x3UL) |
CTRL_REF_SEL_AVDD_AND_AGND Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_AGND ((uint8_t)0x4UL) |
CTRL_REF_SEL_REF0P_AND_AGND Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF0P_AND_REF0N ((uint8_t)0x0UL) |
CTRL_REF_SEL_REF0P_AND_REF0N Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_AGND ((uint8_t)0x5UL) |
CTRL_REF_SEL_REF1P_AND_AGND Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF1P_AND_REF1N ((uint8_t)0x1UL) |
CTRL_REF_SEL_REF1P_AND_REF1N Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_AGND ((uint8_t)0x6UL) |
CTRL_REF_SEL_REF2P_AND_AGND Value
#define MXC_V_AFE_ADC_ONE_CTRL_REF_SEL_REF2P_AND_REF2N ((uint8_t)0x2UL) |
CTRL_REF_SEL_REF2P_AND_REF2N Value