MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
aes_regs.h
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/* ****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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*
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*************************************************************************** */
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#ifndef _AES_REGS_H_
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#define _AES_REGS_H_
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/* **** Includes **** */
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined (__ICCARM__)
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#pragma system_include
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#endif
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#if defined (__CC_ARM)
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#pragma anon_unions
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#endif
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/* **** Definitions **** */
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typedef
struct
{
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__IO uint32_t
ctrl
;
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__IO uint32_t
status
;
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__IO uint32_t
intfl
;
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__IO uint32_t
inten
;
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__IO uint32_t
fifo
;
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}
mxc_aes_regs_t
;
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/* Register offsets for module AES */
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#define MXC_R_AES_CTRL ((uint32_t)0x00000000UL)
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#define MXC_R_AES_STATUS ((uint32_t)0x00000004UL)
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#define MXC_R_AES_INTFL ((uint32_t)0x00000008UL)
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#define MXC_R_AES_INTEN ((uint32_t)0x0000000CUL)
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#define MXC_R_AES_FIFO ((uint32_t)0x00000010UL)
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#define MXC_F_AES_CTRL_EN_POS 0
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#define MXC_F_AES_CTRL_EN ((uint32_t)(0x1UL << MXC_F_AES_CTRL_EN_POS))
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#define MXC_F_AES_CTRL_DMA_RX_EN_POS 1
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#define MXC_F_AES_CTRL_DMA_RX_EN ((uint32_t)(0x1UL << MXC_F_AES_CTRL_DMA_RX_EN_POS))
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#define MXC_F_AES_CTRL_DMA_TX_EN_POS 2
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#define MXC_F_AES_CTRL_DMA_TX_EN ((uint32_t)(0x1UL << MXC_F_AES_CTRL_DMA_TX_EN_POS))
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#define MXC_F_AES_CTRL_START_POS 3
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#define MXC_F_AES_CTRL_START ((uint32_t)(0x1UL << MXC_F_AES_CTRL_START_POS))
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#define MXC_F_AES_CTRL_INPUT_FLUSH_POS 4
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#define MXC_F_AES_CTRL_INPUT_FLUSH ((uint32_t)(0x1UL << MXC_F_AES_CTRL_INPUT_FLUSH_POS))
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#define MXC_F_AES_CTRL_OUTPUT_FLUSH_POS 5
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#define MXC_F_AES_CTRL_OUTPUT_FLUSH ((uint32_t)(0x1UL << MXC_F_AES_CTRL_OUTPUT_FLUSH_POS))
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#define MXC_F_AES_CTRL_KEY_SIZE_POS 6
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#define MXC_F_AES_CTRL_KEY_SIZE ((uint32_t)(0x3UL << MXC_F_AES_CTRL_KEY_SIZE_POS))
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#define MXC_V_AES_CTRL_KEY_SIZE_AES128 ((uint32_t)0x0UL)
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#define MXC_S_AES_CTRL_KEY_SIZE_AES128 (MXC_V_AES_CTRL_KEY_SIZE_AES128 << MXC_F_AES_CTRL_KEY_SIZE_POS)
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#define MXC_V_AES_CTRL_KEY_SIZE_AES192 ((uint32_t)0x1UL)
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#define MXC_S_AES_CTRL_KEY_SIZE_AES192 (MXC_V_AES_CTRL_KEY_SIZE_AES192 << MXC_F_AES_CTRL_KEY_SIZE_POS)
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#define MXC_V_AES_CTRL_KEY_SIZE_AES256 ((uint32_t)0x2UL)
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#define MXC_S_AES_CTRL_KEY_SIZE_AES256 (MXC_V_AES_CTRL_KEY_SIZE_AES256 << MXC_F_AES_CTRL_KEY_SIZE_POS)
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#define MXC_F_AES_CTRL_TYPE_POS 8
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#define MXC_F_AES_CTRL_TYPE ((uint32_t)(0x3UL << MXC_F_AES_CTRL_TYPE_POS))
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#define MXC_F_AES_STATUS_BUSY_POS 0
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#define MXC_F_AES_STATUS_BUSY ((uint32_t)(0x1UL << MXC_F_AES_STATUS_BUSY_POS))
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#define MXC_F_AES_STATUS_INPUT_EM_POS 1
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#define MXC_F_AES_STATUS_INPUT_EM ((uint32_t)(0x1UL << MXC_F_AES_STATUS_INPUT_EM_POS))
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#define MXC_F_AES_STATUS_INPUT_FULL_POS 2
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#define MXC_F_AES_STATUS_INPUT_FULL ((uint32_t)(0x1UL << MXC_F_AES_STATUS_INPUT_FULL_POS))
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#define MXC_F_AES_STATUS_OUTPUT_EM_POS 3
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#define MXC_F_AES_STATUS_OUTPUT_EM ((uint32_t)(0x1UL << MXC_F_AES_STATUS_OUTPUT_EM_POS))
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#define MXC_F_AES_STATUS_OUTPUT_FULL_POS 4
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#define MXC_F_AES_STATUS_OUTPUT_FULL ((uint32_t)(0x1UL << MXC_F_AES_STATUS_OUTPUT_FULL_POS))
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#define MXC_F_AES_INTFL_DONE_POS 0
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#define MXC_F_AES_INTFL_DONE ((uint32_t)(0x1UL << MXC_F_AES_INTFL_DONE_POS))
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#define MXC_F_AES_INTFL_KEY_CHANGE_POS 1
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#define MXC_F_AES_INTFL_KEY_CHANGE ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_CHANGE_POS))
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#define MXC_F_AES_INTFL_KEY_ZERO_POS 2
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#define MXC_F_AES_INTFL_KEY_ZERO ((uint32_t)(0x1UL << MXC_F_AES_INTFL_KEY_ZERO_POS))
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#define MXC_F_AES_INTFL_OV_POS 3
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#define MXC_F_AES_INTFL_OV ((uint32_t)(0x1UL << MXC_F_AES_INTFL_OV_POS))
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#define MXC_F_AES_INTEN_DONE_POS 0
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#define MXC_F_AES_INTEN_DONE ((uint32_t)(0x1UL << MXC_F_AES_INTEN_DONE_POS))
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#define MXC_F_AES_INTEN_KEY_CHANGE_POS 1
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#define MXC_F_AES_INTEN_KEY_CHANGE ((uint32_t)(0x1UL << MXC_F_AES_INTEN_KEY_CHANGE_POS))
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#define MXC_F_AES_INTEN_KEY_ZERO_POS 2
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#define MXC_F_AES_INTEN_KEY_ZERO ((uint32_t)(0x1UL << MXC_F_AES_INTEN_KEY_ZERO_POS))
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#define MXC_F_AES_INTEN_OV_POS 3
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#define MXC_F_AES_INTEN_OV ((uint32_t)(0x1UL << MXC_F_AES_INTEN_OV_POS))
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#define MXC_F_AES_FIFO_DATA_POS 0
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#define MXC_F_AES_FIFO_DATA ((uint32_t)(0x1UL << MXC_F_AES_FIFO_DATA_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _AES_REGS_H_ */
mxc_aes_regs_t::fifo
__IO uint32_t fifo
Definition:
aes_regs.h:93
mxc_aes_regs_t::intfl
__IO uint32_t intfl
Definition:
aes_regs.h:91
mxc_aes_regs_t::status
__IO uint32_t status
Definition:
aes_regs.h:90
mxc_aes_regs_t::ctrl
__IO uint32_t ctrl
Definition:
aes_regs.h:89
mxc_aes_regs_t
Definition:
aes_regs.h:88
mxc_aes_regs_t::inten
__IO uint32_t inten
Definition:
aes_regs.h:92
CMSIS
Device
Maxim
MAX32675
Include
aes_regs.h
Generated on Mon Feb 8 2021 11:38:48 for MAX32675 Peripheral Driver API by
1.8.17