MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
afe_hart_regs.h
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/*******************************************************************************
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* Copyright (C) Maxim Integrated Products, Inc., All rights Reserved.
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*
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* This software is protected by copyright laws of the United States and
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* of foreign countries. This material may also be protected by patent laws
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* and technology transfer regulations of the United States and of foreign
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* countries. This software is furnished under a license agreement and/or a
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* nondisclosure agreement and may only be used or reproduced in accordance
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* with the terms of those agreements. Dissemination of this information to
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* any party or parties not specified in the license agreement and/or
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* nondisclosure agreement is expressly prohibited.
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*******************************************************************************
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*/
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#ifndef _AFE_HART_REGS_H_
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#define _AFE_HART_REGS_H_
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/* **** Includes **** */
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined (__ICCARM__)
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#pragma system_include
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#endif
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#if defined (__CC_ARM)
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#pragma anon_unions
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#endif
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/* **** Definitions **** */
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/* Register offsets for module AFE_HART */
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#define MXC_R_AFE_HART_CTRL ((uint32_t)0x01800003UL)
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#define MXC_R_AFE_HART_RX_TX_CTL ((uint32_t)0x01810003UL)
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#define MXC_R_AFE_HART_RX_CTL_EXT1 ((uint32_t)0x01820003UL)
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#define MXC_R_AFE_HART_RX_CTL_EXT2 ((uint32_t)0x01830003UL)
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#define MXC_R_AFE_HART_RX_DB_THRSHLD ((uint32_t)0x01840003UL)
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#define MXC_R_AFE_HART_RX_CRD_UP_THRSHLD ((uint32_t)0x01850003UL)
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#define MXC_R_AFE_HART_RX_CRD_DN_THRSHLD ((uint32_t)0x01860003UL)
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#define MXC_R_AFE_HART_RX_CRD_DOUT_THRSHLD ((uint32_t)0x01870003UL)
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#define MXC_R_AFE_HART_TX_MARKSPACE_CNT ((uint32_t)0x01880003UL)
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#define MXC_R_AFE_HART_STAT ((uint32_t)0x01890003UL)
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#define MXC_R_AFE_HART_TRIM ((uint32_t)0x018A0003UL)
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#define MXC_R_AFE_HART_TM ((uint32_t)0x018B0003UL)
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#define MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS 0
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#define MXC_F_AFE_HART_CTRL_ADM_TM_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS 0
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS 1
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS 2
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS 3
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS 4
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS 8
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT ((uint32_t)(0xFFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS 16
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#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS 20
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS 21
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS 22
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS))
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS 23
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#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS))
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#define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS 0
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#define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS))
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS 0
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL ((uint32_t)(0x7FFFUL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS))
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS 16
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL ((uint32_t)(0x3UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS))
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS 20
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS))
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS 21
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#define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS))
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#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS 0
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#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS))
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#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS 12
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#define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS))
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#define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS 0
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#define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS))
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#define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS 0
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#define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS))
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#define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS 0
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#define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS))
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#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS 0
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#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS))
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#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS 12
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#define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS))
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#define MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS 0
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#define MXC_F_AFE_HART_TRIM_TRIM_BIAS ((uint32_t)(0x1FUL << MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS))
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#define MXC_F_AFE_HART_TRIM_TRIM_BG_POS 8
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#define MXC_F_AFE_HART_TRIM_TRIM_BG ((uint32_t)(0x3FUL << MXC_F_AFE_HART_TRIM_TRIM_BG_POS))
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#define MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS 16
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#define MXC_F_AFE_HART_TRIM_TRIM_TX_SR ((uint32_t)(0xFUL << MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS))
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#define MXC_F_AFE_HART_TM_TM_EN_POS 0
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#define MXC_F_AFE_HART_TM_TM_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_EN_POS))
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#define MXC_F_AFE_HART_TM_TM_BIAS_EN_POS 1
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#define MXC_F_AFE_HART_TM_TM_BIAS_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BIAS_EN_POS))
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#define MXC_F_AFE_HART_TM_TM_BG_EN_POS 3
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#define MXC_F_AFE_HART_TM_TM_BG_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BG_EN_POS))
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#define MXC_F_AFE_HART_TM_TM_VREF_EN_POS 3
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#define MXC_F_AFE_HART_TM_TM_VREF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_VREF_EN_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _AFE_HART_REGS_H_ */
CMSIS
Device
Maxim
MAX32675
Include
afe_hart_regs.h
Generated on Mon Feb 8 2021 11:38:48 for MAX32675 Peripheral Driver API by
1.8.17