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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Peripheral Clock Divider.
#define MXC_F_GCR_PCLKDIV_AON_CLKDIV ((uint32_t)(0x3UL << MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS)) |
PCLKDIV_AON_CLKDIV Mask
#define MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS 0 |
PCLKDIV_AON_CLKDIV Position
#define MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_CTRL ((uint32_t)(0x3UL << MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_CTRL_POS)) |
PCLKDIV_DIV_CLK_OUT_CTRL Mask
#define MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_CTRL_POS 14 |
PCLKDIV_DIV_CLK_OUT_CTRL Position
#define MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_EN ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_EN_POS)) |
PCLKDIV_DIV_CLK_OUT_EN Mask
#define MXC_F_GCR_PCLKDIV_DIV_CLK_OUT_EN_POS 16 |
PCLKDIV_DIV_CLK_OUT_EN Position
#define MXC_S_GCR_PCLKDIV_AON_CLKDIV_DIV16 (MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV16 << MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS) |
PCLKDIV_AON_CLKDIV_DIV16 Setting
#define MXC_S_GCR_PCLKDIV_AON_CLKDIV_DIV32 (MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV32 << MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS) |
PCLKDIV_AON_CLKDIV_DIV32 Setting
#define MXC_S_GCR_PCLKDIV_AON_CLKDIV_DIV4 (MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV4 << MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS) |
PCLKDIV_AON_CLKDIV_DIV4 Setting
#define MXC_S_GCR_PCLKDIV_AON_CLKDIV_DIV8 (MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV8 << MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS) |
PCLKDIV_AON_CLKDIV_DIV8 Setting
#define MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV16 ((uint32_t)0x2UL) |
PCLKDIV_AON_CLKDIV_DIV16 Value
#define MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV32 ((uint32_t)0x3UL) |
PCLKDIV_AON_CLKDIV_DIV32 Value
#define MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV4 ((uint32_t)0x0UL) |
PCLKDIV_AON_CLKDIV_DIV4 Value
#define MXC_V_GCR_PCLKDIV_AON_CLKDIV_DIV8 ((uint32_t)0x1UL) |
PCLKDIV_AON_CLKDIV_DIV8 Value