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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Device Status, INTB source etc.
#define MXC_F_AFE_ADC_ONE_STATUS_CAL_RDY ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_CAL_RDY_POS)) |
STATUS_CAL_RDY Mask
#define MXC_F_AFE_ADC_ONE_STATUS_CAL_RDY_POS 2 |
STATUS_CAL_RDY Position
#define MXC_F_AFE_ADC_ONE_STATUS_CONV_RDY ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_CONV_RDY_POS)) |
STATUS_CONV_RDY Mask
#define MXC_F_AFE_ADC_ONE_STATUS_CONV_RDY_POS 0 |
STATUS_CONV_RDY Position
#define MXC_F_AFE_ADC_ONE_STATUS_DATA_RDY ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_DATA_RDY_POS)) |
STATUS_DATA_RDY Mask
#define MXC_F_AFE_ADC_ONE_STATUS_DATA_RDY_POS 4 |
STATUS_DATA_RDY Position
#define MXC_F_AFE_ADC_ONE_STATUS_SEQ_RDY ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_SEQ_RDY_POS)) |
STATUS_SEQ_RDY Mask
#define MXC_F_AFE_ADC_ONE_STATUS_SEQ_RDY_POS 1 |
STATUS_SEQ_RDY Position
#define MXC_F_AFE_ADC_ONE_STATUS_SYSGOR ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_SYSGOR_POS)) |
STATUS_SYSGOR Mask
#define MXC_F_AFE_ADC_ONE_STATUS_SYSGOR_POS 7 |
STATUS_SYSGOR Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_0 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_0_POS)) |
STATUS_TOR_0 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_0_POS 16 |
STATUS_TOR_0 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_1 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_1_POS)) |
STATUS_TOR_1 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_1_POS 17 |
STATUS_TOR_1 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_2 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_2_POS)) |
STATUS_TOR_2 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_2_POS 18 |
STATUS_TOR_2 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_3 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_3_POS)) |
STATUS_TOR_3 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_3_POS 19 |
STATUS_TOR_3 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_4 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_4_POS)) |
STATUS_TOR_4 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_4_POS 20 |
STATUS_TOR_4 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_5 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_5_POS)) |
STATUS_TOR_5 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_5_POS 21 |
STATUS_TOR_5 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_6 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_6_POS)) |
STATUS_TOR_6 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_6_POS 22 |
STATUS_TOR_6 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_7 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TOR_7_POS)) |
STATUS_TOR_7 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TOR_7_POS 23 |
STATUS_TOR_7 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_0 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_0_POS)) |
STATUS_TUR_0 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_0_POS 8 |
STATUS_TUR_0 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_1 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_1_POS)) |
STATUS_TUR_1 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_1_POS 9 |
STATUS_TUR_1 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_2 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_2_POS)) |
STATUS_TUR_2 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_2_POS 10 |
STATUS_TUR_2 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_3 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_3_POS)) |
STATUS_TUR_3 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_3_POS 11 |
STATUS_TUR_3 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_4 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_4_POS)) |
STATUS_TUR_4 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_4_POS 12 |
STATUS_TUR_4 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_5 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_5_POS)) |
STATUS_TUR_5 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_5_POS 13 |
STATUS_TUR_5 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_6 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_6_POS)) |
STATUS_TUR_6 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_6_POS 14 |
STATUS_TUR_6 Position
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_7 ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_TUR_7_POS)) |
STATUS_TUR_7 Mask
#define MXC_F_AFE_ADC_ONE_STATUS_TUR_7_POS 15 |
STATUS_TUR_7 Position
#define MXC_F_AFE_ADC_ONE_STATUS_WAIT_DONE ((uint32_t)(0x1UL << MXC_F_AFE_ADC_ONE_STATUS_WAIT_DONE_POS)) |
STATUS_WAIT_DONE Mask
#define MXC_F_AFE_ADC_ONE_STATUS_WAIT_DONE_POS 3 |
STATUS_WAIT_DONE Position