MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
afe_hart_regs.h
1 
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40 
41 #ifndef _AFE_HART_REGS_H_
42 #define _AFE_HART_REGS_H_
43 
44 /* **** Includes **** */
45 #include <stdint.h>
46 
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50 
51 #if defined (__ICCARM__)
52  #pragma system_include
53 #endif
54 
55 #if defined (__CC_ARM)
56  #pragma anon_unions
57 #endif
58 /*
60  If types are not defined elsewhere (CMSIS) define them here
61 */
62 #ifndef __IO
63 #define __IO volatile
64 #endif
65 #ifndef __I
66 #define __I volatile const
67 #endif
68 #ifndef __O
69 #define __O volatile
70 #endif
71 #ifndef __R
72 #define __R volatile const
73 #endif
74 
76 /* **** Definitions **** */
77 
86 /* Register offsets for module AFE_HART */
93  #define MXC_R_AFE_HART_CTRL ((uint32_t)0x01800003UL)
94  #define MXC_R_AFE_HART_RX_TX_CTL ((uint32_t)0x01810003UL)
95  #define MXC_R_AFE_HART_RX_CTL_EXT1 ((uint32_t)0x01820003UL)
96  #define MXC_R_AFE_HART_RX_CTL_EXT2 ((uint32_t)0x01830003UL)
97  #define MXC_R_AFE_HART_RX_DB_THRSHLD ((uint32_t)0x01840003UL)
98  #define MXC_R_AFE_HART_RX_CRD_UP_THRSHLD ((uint32_t)0x01850003UL)
99  #define MXC_R_AFE_HART_RX_CRD_DN_THRSHLD ((uint32_t)0x01860003UL)
100  #define MXC_R_AFE_HART_RX_CRD_DOUT_THRSHLD ((uint32_t)0x01870003UL)
101  #define MXC_R_AFE_HART_TX_MARKSPACE_CNT ((uint32_t)0x01880003UL)
102  #define MXC_R_AFE_HART_STAT ((uint32_t)0x01890003UL)
103  #define MXC_R_AFE_HART_TRIM ((uint32_t)0x018A0003UL)
104  #define MXC_R_AFE_HART_TM ((uint32_t)0x018B0003UL)
113  #define MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS 0
114  #define MXC_F_AFE_HART_CTRL_ADM_TM_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_CTRL_ADM_TM_EN_POS))
124  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS 0
125  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS))
127  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS 1
128  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS))
130  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS 2
131  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS))
133  #define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS 3
134  #define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS))
136  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS 4
137  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS))
139  #define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS 8
140  #define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT ((uint32_t)(0xFFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS))
142  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS 16
143  #define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS))
145  #define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS 20
146  #define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS))
148  #define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS 21
149  #define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS))
151  #define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS 22
152  #define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS))
154  #define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS 23
155  #define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS))
165  #define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS 0
166  #define MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CTL_EXT1_RX_AN_INIT_VAL_POS))
176  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS 0
177  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL ((uint32_t)(0x7FFFUL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ARN_INIT_VAL_POS))
179  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS 16
180  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL ((uint32_t)(0x3UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_ZC_IGN_VAL_POS))
182  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS 20
183  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_SYN_ALWS_EN_POS))
185  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS 21
186  #define MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_CTL_EXT2_RX_UART_TIMER_FAST_CNT_EN_POS))
196  #define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS 0
197  #define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_DN_THRSHLD_POS))
199  #define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS 12
200  #define MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD ((uint32_t)(0x1FFUL << MXC_F_AFE_HART_RX_DB_THRSHLD_RX_BITDTCT_UP_THRSHLD_POS))
210  #define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS 0
211  #define MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_UP_THRSHLD_RX_CRD_UP_THRSHLD_POS))
221  #define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS 0
222  #define MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DN_THRSHLD_RX_CRD_DN_THRSHLD_POS))
232  #define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS 0
233  #define MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD ((uint32_t)(0x7FFFFUL << MXC_F_AFE_HART_RX_CRD_DOUT_THRSHLD_RX_CRD_DOUT_THRSHLD_POS))
243  #define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS 0
244  #define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_SPACE_CNT_POS))
246  #define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS 12
247  #define MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT ((uint32_t)(0x3FFUL << MXC_F_AFE_HART_TX_MARKSPACE_CNT_TX_MARK_CNT_POS))
257  #define MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS 0
258  #define MXC_F_AFE_HART_TRIM_TRIM_BIAS ((uint32_t)(0x1FUL << MXC_F_AFE_HART_TRIM_TRIM_BIAS_POS))
260  #define MXC_F_AFE_HART_TRIM_TRIM_BG_POS 8
261  #define MXC_F_AFE_HART_TRIM_TRIM_BG ((uint32_t)(0x3FUL << MXC_F_AFE_HART_TRIM_TRIM_BG_POS))
263  #define MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS 16
264  #define MXC_F_AFE_HART_TRIM_TRIM_TX_SR ((uint32_t)(0xFUL << MXC_F_AFE_HART_TRIM_TRIM_TX_SR_POS))
274  #define MXC_F_AFE_HART_TM_TM_EN_POS 0
275  #define MXC_F_AFE_HART_TM_TM_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_EN_POS))
277  #define MXC_F_AFE_HART_TM_TM_BIAS_EN_POS 1
278  #define MXC_F_AFE_HART_TM_TM_BIAS_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BIAS_EN_POS))
280  #define MXC_F_AFE_HART_TM_TM_BG_EN_POS 3
281  #define MXC_F_AFE_HART_TM_TM_BG_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_BG_EN_POS))
283  #define MXC_F_AFE_HART_TM_TM_VREF_EN_POS 3
284  #define MXC_F_AFE_HART_TM_TM_VREF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_TM_TM_VREF_EN_POS))
288 #ifdef __cplusplus
289 }
290 #endif
291 
292 #endif /* _AFE_HART_REGS_H_ */