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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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40 #ifndef _PWRSEQ_REGS_H_
41 #define _PWRSEQ_REGS_H_
50 #if defined (__ICCARM__)
51 #pragma system_include
54 #if defined (__CC_ARM)
65 #define __I volatile const
71 #define __R volatile const
94 __R uint32_t rsv_0x14_0x2f[7];
97 __R uint32_t rsv_0x38_0x3f[2];
108 #define MXC_R_PWRSEQ_LPCN ((uint32_t)0x00000000UL)
109 #define MXC_R_PWRSEQ_LPWKST0 ((uint32_t)0x00000004UL)
110 #define MXC_R_PWRSEQ_LPWKEN0 ((uint32_t)0x00000008UL)
111 #define MXC_R_PWRSEQ_LPWKST1 ((uint32_t)0x0000000CUL)
112 #define MXC_R_PWRSEQ_LPWKEN1 ((uint32_t)0x00000010UL)
113 #define MXC_R_PWRSEQ_LPPWKST ((uint32_t)0x00000030UL)
114 #define MXC_R_PWRSEQ_LPPWKEN ((uint32_t)0x00000034UL)
115 #define MXC_R_PWRSEQ_LPMEMSD ((uint32_t)0x00000040UL)
124 #define MXC_F_PWRSEQ_LPCN_RAM0RET_EN_POS 0
125 #define MXC_F_PWRSEQ_LPCN_RAM0RET_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_RAM0RET_EN_POS))
127 #define MXC_F_PWRSEQ_LPCN_RAM1RET_EN_POS 1
128 #define MXC_F_PWRSEQ_LPCN_RAM1RET_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_RAM1RET_EN_POS))
130 #define MXC_F_PWRSEQ_LPCN_RAM2RET_EN_POS 2
131 #define MXC_F_PWRSEQ_LPCN_RAM2RET_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_RAM2RET_EN_POS))
133 #define MXC_F_PWRSEQ_LPCN_RAM3RET_EN_POS 3
134 #define MXC_F_PWRSEQ_LPCN_RAM3RET_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_RAM3RET_EN_POS))
136 #define MXC_F_PWRSEQ_LPCN_OVR_POS 4
137 #define MXC_F_PWRSEQ_LPCN_OVR ((uint32_t)(0x3UL << MXC_F_PWRSEQ_LPCN_OVR_POS))
138 #define MXC_V_PWRSEQ_LPCN_OVR_0_9V ((uint32_t)0x0UL)
139 #define MXC_S_PWRSEQ_LPCN_OVR_0_9V (MXC_V_PWRSEQ_LPCN_OVR_0_9V << MXC_F_PWRSEQ_LPCN_OVR_POS)
140 #define MXC_V_PWRSEQ_LPCN_OVR_1_0V ((uint32_t)0x1UL)
141 #define MXC_S_PWRSEQ_LPCN_OVR_1_0V (MXC_V_PWRSEQ_LPCN_OVR_1_0V << MXC_F_PWRSEQ_LPCN_OVR_POS)
142 #define MXC_V_PWRSEQ_LPCN_OVR_1_1V ((uint32_t)0x2UL)
143 #define MXC_S_PWRSEQ_LPCN_OVR_1_1V (MXC_V_PWRSEQ_LPCN_OVR_1_1V << MXC_F_PWRSEQ_LPCN_OVR_POS)
145 #define MXC_F_PWRSEQ_LPCN_VCORE_DET_BYPASS_POS 6
146 #define MXC_F_PWRSEQ_LPCN_VCORE_DET_BYPASS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_VCORE_DET_BYPASS_POS))
148 #define MXC_F_PWRSEQ_LPCN_RETREG_EN_POS 8
149 #define MXC_F_PWRSEQ_LPCN_RETREG_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_RETREG_EN_POS))
151 #define MXC_F_PWRSEQ_LPCN_STORAGE_EN_POS 9
152 #define MXC_F_PWRSEQ_LPCN_STORAGE_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_STORAGE_EN_POS))
154 #define MXC_F_PWRSEQ_LPCN_FASTWK_EN_POS 10
155 #define MXC_F_PWRSEQ_LPCN_FASTWK_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_FASTWK_EN_POS))
157 #define MXC_F_PWRSEQ_LPCN_BG_DIS_POS 11
158 #define MXC_F_PWRSEQ_LPCN_BG_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_BG_DIS_POS))
160 #define MXC_F_PWRSEQ_LPCN_VCOREPOR_DIS_POS 12
161 #define MXC_F_PWRSEQ_LPCN_VCOREPOR_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_VCOREPOR_DIS_POS))
163 #define MXC_F_PWRSEQ_LPCN_LDO_DIS_POS 16
164 #define MXC_F_PWRSEQ_LPCN_LDO_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_LDO_DIS_POS))
166 #define MXC_F_PWRSEQ_LPCN_VCORE_EXT_POS 17
167 #define MXC_F_PWRSEQ_LPCN_VCORE_EXT ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_VCORE_EXT_POS))
169 #define MXC_F_PWRSEQ_LPCN_VCOREMON_DIS_POS 20
170 #define MXC_F_PWRSEQ_LPCN_VCOREMON_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_VCOREMON_DIS_POS))
172 #define MXC_F_PWRSEQ_LPCN_VDDAMON_DIS_POS 22
173 #define MXC_F_PWRSEQ_LPCN_VDDAMON_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_VDDAMON_DIS_POS))
175 #define MXC_F_PWRSEQ_LPCN_PORVDDMON_DIS_POS 25
176 #define MXC_F_PWRSEQ_LPCN_PORVDDMON_DIS ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_PORVDDMON_DIS_POS))
178 #define MXC_F_PWRSEQ_LPCN_INRO_EN_POS 28
179 #define MXC_F_PWRSEQ_LPCN_INRO_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_INRO_EN_POS))
181 #define MXC_F_PWRSEQ_LPCN_ERTCO_EN_POS 29
182 #define MXC_F_PWRSEQ_LPCN_ERTCO_EN ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_ERTCO_EN_POS))
184 #define MXC_F_PWRSEQ_LPCN_TM_LPMODE_POS 30
185 #define MXC_F_PWRSEQ_LPCN_TM_LPMODE ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_TM_LPMODE_POS))
187 #define MXC_F_PWRSEQ_LPCN_TM_PWRSEQ_POS 31
188 #define MXC_F_PWRSEQ_LPCN_TM_PWRSEQ ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPCN_TM_PWRSEQ_POS))
199 #define MXC_F_PWRSEQ_LPWKST0_ST_POS 0
200 #define MXC_F_PWRSEQ_LPWKST0_ST ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPWKST0_ST_POS))
211 #define MXC_F_PWRSEQ_LPWKEN0_EN_POS 0
212 #define MXC_F_PWRSEQ_LPWKEN0_EN ((uint32_t)(0x7FFFFFFFUL << MXC_F_PWRSEQ_LPWKEN0_EN_POS))
222 #define MXC_F_PWRSEQ_LPPWKST_LPTMR0_POS 0
223 #define MXC_F_PWRSEQ_LPPWKST_LPTMR0 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKST_LPTMR0_POS))
225 #define MXC_F_PWRSEQ_LPPWKST_LPTMR1_POS 1
226 #define MXC_F_PWRSEQ_LPPWKST_LPTMR1 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKST_LPTMR1_POS))
228 #define MXC_F_PWRSEQ_LPPWKST_LPUART0_POS 2
229 #define MXC_F_PWRSEQ_LPPWKST_LPUART0 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKST_LPUART0_POS))
239 #define MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS 0
240 #define MXC_F_PWRSEQ_LPPWKEN_LPTMR0 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS))
242 #define MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS 1
243 #define MXC_F_PWRSEQ_LPPWKEN_LPTMR1 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS))
245 #define MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS 2
246 #define MXC_F_PWRSEQ_LPPWKEN_LPUART0 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS))
256 #define MXC_F_PWRSEQ_LPMEMSD_RAM0_POS 0
257 #define MXC_F_PWRSEQ_LPMEMSD_RAM0 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPMEMSD_RAM0_POS))
259 #define MXC_F_PWRSEQ_LPMEMSD_RAM1_POS 1
260 #define MXC_F_PWRSEQ_LPMEMSD_RAM1 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPMEMSD_RAM1_POS))
262 #define MXC_F_PWRSEQ_LPMEMSD_RAM2_POS 2
263 #define MXC_F_PWRSEQ_LPMEMSD_RAM2 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPMEMSD_RAM2_POS))
265 #define MXC_F_PWRSEQ_LPMEMSD_RAM3_POS 3
266 #define MXC_F_PWRSEQ_LPMEMSD_RAM3 ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPMEMSD_RAM3_POS))
__IO uint32_t lpmemsd
Definition: pwrseq_regs.h:98
__IO uint32_t lpwken1
Definition: pwrseq_regs.h:93
__IO uint32_t lpcn
Definition: pwrseq_regs.h:89
Definition: pwrseq_regs.h:88
__IO uint32_t lppwken
Definition: pwrseq_regs.h:96
__IO uint32_t lppwkst
Definition: pwrseq_regs.h:95
__IO uint32_t lpwkst0
Definition: pwrseq_regs.h:90
__IO uint32_t lpwken0
Definition: pwrseq_regs.h:91
__IO uint32_t lpwkst1
Definition: pwrseq_regs.h:92