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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Control HART Transmit and Receive Functions.
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS)) |
RX_TX_CTL_RX_ADC_OFFSET_SEL Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_OFFSET_SEL_POS 2 |
RX_TX_CTL_RX_ADC_OFFSET_SEL Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS)) |
RX_TX_CTL_RX_ADC_PWR_DLY_CNT Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_DLY_CNT_POS 16 |
RX_TX_CTL_RX_ADC_PWR_DLY_CNT Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR ((uint32_t)(0xFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS)) |
RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR_POS 4 |
RX_TX_CTL_RX_ADC_PWR_UP_SMP_IGNR Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS)) |
RX_TX_CTL_RX_ADC_REF_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REF_EN_POS 0 |
RX_TX_CTL_RX_ADC_REF_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS)) |
RX_TX_CTL_RX_ADC_REFBUF_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_ADC_REFBUF_EN_POS 1 |
RX_TX_CTL_RX_ADC_REFBUF_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT ((uint32_t)(0xFFUL << MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS)) |
RX_TX_CTL_RX_BP_SETTLE_CNT Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_BP_SETTLE_CNT_POS 8 |
RX_TX_CTL_RX_BP_SETTLE_CNT Position
#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS)) |
RX_TX_CTL_RX_DOUT_UART_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_RX_DOUT_UART_EN_POS 3 |
RX_TX_CTL_RX_DOUT_UART_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS)) |
RX_TX_CTL_TX_4MHZ_CLK_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_TX_4MHZ_CLK_EN_POS 23 |
RX_TX_CTL_TX_4MHZ_CLK_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS)) |
RX_TX_CTL_TX_BUF_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUF_EN_POS 20 |
RX_TX_CTL_TX_BUF_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS)) |
RX_TX_CTL_TX_BUS_DCL_EN Mask
#define MXC_F_AFE_HART_RX_TX_CTL_TX_BUS_DCL_EN_POS 21 |
RX_TX_CTL_TX_BUS_DCL_EN Position
#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS ((uint32_t)(0x1UL << MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS)) |
RX_TX_CTL_TX_WS_DIS_RS Mask
#define MXC_F_AFE_HART_RX_TX_CTL_TX_WS_DIS_RS_POS 22 |
RX_TX_CTL_TX_WS_DIS_RS Position