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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Macros | |
#define | MXC_F_UART_INT_EN_RX_FERR_POS 0 |
#define | MXC_F_UART_INT_EN_RX_FERR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FERR_POS)) |
#define | MXC_F_UART_INT_EN_RX_PAR_POS 1 |
#define | MXC_F_UART_INT_EN_RX_PAR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_PAR_POS)) |
#define | MXC_F_UART_INT_EN_CTS_EV_POS 2 |
#define | MXC_F_UART_INT_EN_CTS_EV ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_CTS_EV_POS)) |
#define | MXC_F_UART_INT_EN_RX_OV_POS 3 |
#define | MXC_F_UART_INT_EN_RX_OV ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_OV_POS)) |
#define | MXC_F_UART_INT_EN_RX_THD_POS 4 |
#define | MXC_F_UART_INT_EN_RX_THD ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_THD_POS)) |
#define | MXC_F_UART_INT_EN_TX_HE_POS 6 |
#define | MXC_F_UART_INT_EN_TX_HE ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_HE_POS)) |
Interrupt Enable control register.
#define MXC_F_UART_INT_EN_CTS_EV ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_CTS_EV_POS)) |
INT_EN_CTS_EV Mask
#define MXC_F_UART_INT_EN_CTS_EV_POS 2 |
INT_EN_CTS_EV Position
#define MXC_F_UART_INT_EN_RX_FERR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_FERR_POS)) |
INT_EN_RX_FERR Mask
#define MXC_F_UART_INT_EN_RX_FERR_POS 0 |
INT_EN_RX_FERR Position
#define MXC_F_UART_INT_EN_RX_OV ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_OV_POS)) |
INT_EN_RX_OV Mask
#define MXC_F_UART_INT_EN_RX_OV_POS 3 |
INT_EN_RX_OV Position
#define MXC_F_UART_INT_EN_RX_PAR ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_PAR_POS)) |
INT_EN_RX_PAR Mask
#define MXC_F_UART_INT_EN_RX_PAR_POS 1 |
INT_EN_RX_PAR Position
#define MXC_F_UART_INT_EN_RX_THD ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_RX_THD_POS)) |
INT_EN_RX_THD Mask
#define MXC_F_UART_INT_EN_RX_THD_POS 4 |
INT_EN_RX_THD Position
#define MXC_F_UART_INT_EN_TX_HE ((uint32_t)(0x1UL << MXC_F_UART_INT_EN_TX_HE_POS)) |
INT_EN_TX_HE Mask
#define MXC_F_UART_INT_EN_TX_HE_POS 6 |
INT_EN_TX_HE Position