MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
SIR_ERRADDR

Macros

#define MXC_F_SIR_ERRADDR_ERRADDR_POS   0
 
#define MXC_F_SIR_ERRADDR_ERRADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ERRADDR_ERRADDR_POS))
 
#define MXC_F_SIR_ERRADDR_ERRADDR_POS   0
 
#define MXC_F_SIR_ERRADDR_ERRADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ERRADDR_ERRADDR_POS))
 

Detailed Description

Read-only field set by the SIB block if a CRC error occurs during the read of the OTP memory. Contains the failing address in OTP memory (when CRCERR equals 1).

Macro Definition Documentation

◆ MXC_F_SIR_ERRADDR_ERRADDR [1/2]

#define MXC_F_SIR_ERRADDR_ERRADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ERRADDR_ERRADDR_POS))

ERRADDR_ERRADDR Mask

◆ MXC_F_SIR_ERRADDR_ERRADDR [2/2]

#define MXC_F_SIR_ERRADDR_ERRADDR   ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_ERRADDR_ERRADDR_POS))

ERRADDR_ERRADDR Mask

◆ MXC_F_SIR_ERRADDR_ERRADDR_POS [1/2]

#define MXC_F_SIR_ERRADDR_ERRADDR_POS   0

ERRADDR_ERRADDR Position

◆ MXC_F_SIR_ERRADDR_ERRADDR_POS [2/2]

#define MXC_F_SIR_ERRADDR_ERRADDR_POS   0

ERRADDR_ERRADDR Position