MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
SDMA_INT_MUX_CTRL3

Macros

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28_POS   0
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29_POS   8
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30_POS   16
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31_POS   24
 
#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31_POS))
 

Detailed Description

Interrupt Mux Control 3.

Macro Definition Documentation

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28_POS))

INT_MUX_CTRL3_INTSEL28 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28_POS

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL28_POS   0

INT_MUX_CTRL3_INTSEL28 Position

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29_POS))

INT_MUX_CTRL3_INTSEL29 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29_POS

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL29_POS   8

INT_MUX_CTRL3_INTSEL29 Position

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30_POS))

INT_MUX_CTRL3_INTSEL30 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30_POS

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL30_POS   16

INT_MUX_CTRL3_INTSEL30 Position

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31_POS))

INT_MUX_CTRL3_INTSEL31 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31_POS

#define MXC_F_SDMA_INT_MUX_CTRL3_INTSEL31_POS   24

INT_MUX_CTRL3_INTSEL31 Position