MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
adc_regs.h
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/* ****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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*
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*************************************************************************** */
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#ifndef _ADC_REGS_H_
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#define _ADC_REGS_H_
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/* **** Includes **** */
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined (__ICCARM__)
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#pragma system_include
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#endif
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#if defined (__CC_ARM)
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#pragma anon_unions
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#endif
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/* **** Definitions **** */
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typedef
struct
{
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__IO uint32_t
ctrl
;
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__IO uint32_t
status
;
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__IO uint32_t
data
;
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__IO uint32_t
intr
;
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__IO uint32_t limit[4];
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}
mxc_adc_regs_t
;
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/* Register offsets for module ADC */
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#define MXC_R_ADC_CTRL ((uint32_t)0x00000000UL)
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#define MXC_R_ADC_STATUS ((uint32_t)0x00000004UL)
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#define MXC_R_ADC_DATA ((uint32_t)0x00000008UL)
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#define MXC_R_ADC_INTR ((uint32_t)0x0000000CUL)
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#define MXC_R_ADC_LIMIT ((uint32_t)0x00000010UL)
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#define MXC_F_ADC_CTRL_START_POS 0
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#define MXC_F_ADC_CTRL_START ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_START_POS))
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#define MXC_F_ADC_CTRL_PWR_POS 1
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#define MXC_F_ADC_CTRL_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_PWR_POS))
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#define MXC_F_ADC_CTRL_REFBUF_PWR_POS 3
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#define MXC_F_ADC_CTRL_REFBUF_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REFBUF_PWR_POS))
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#define MXC_F_ADC_CTRL_CHGPUMP_PWR_POS 4
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#define MXC_F_ADC_CTRL_CHGPUMP_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CHGPUMP_PWR_POS))
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#define MXC_F_ADC_CTRL_REF_SCALE_POS 8
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#define MXC_F_ADC_CTRL_REF_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SCALE_POS))
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#define MXC_F_ADC_CTRL_INPUT_SCALE_POS 9
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#define MXC_F_ADC_CTRL_INPUT_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_INPUT_SCALE_POS))
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#define MXC_F_ADC_CTRL_REF_SEL_POS 10
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#define MXC_F_ADC_CTRL_REF_SEL ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SEL_POS))
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#define MXC_F_ADC_CTRL_CLK_EN_POS 11
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#define MXC_F_ADC_CTRL_CLK_EN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CLK_EN_POS))
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#define MXC_F_ADC_CTRL_ADC_CH_SEL_POS 12
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#define MXC_F_ADC_CTRL_ADC_CH_SEL ((uint32_t)(0x1FUL << MXC_F_ADC_CTRL_ADC_CH_SEL_POS))
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN0 ((uint32_t)0x0UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN0 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN0 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN1 ((uint32_t)0x1UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN1 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN1 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN2 ((uint32_t)0x2UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN2 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN2 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN3 ((uint32_t)0x3UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN3 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN3 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN4 ((uint32_t)0x4UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN4 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN4 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN5 ((uint32_t)0x5UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN5 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN5 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN6 ((uint32_t)0x6UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN6 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN6 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN7 ((uint32_t)0x7UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN7 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN7 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREA ((uint32_t)0x8UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VCOREA (MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREA << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREB ((uint32_t)0x9UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VCOREB (MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREB << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VRXOUT ((uint32_t)0xAUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VRXOUT (MXC_V_ADC_CTRL_ADC_CH_SEL_VRXOUT << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VTXOUT ((uint32_t)0xBUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VTXOUT (MXC_V_ADC_CTRL_ADC_CH_SEL_VTXOUT << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDA ((uint32_t)0xCUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDA (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDA << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDB ((uint32_t)0xDUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDB (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDB << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIO ((uint32_t)0xEUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDIO (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIO << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIOH ((uint32_t)0xFUL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDIOH (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIOH << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_V_ADC_CTRL_ADC_CH_SEL_VREGI ((uint32_t)0x10UL)
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#define MXC_S_ADC_CTRL_ADC_CH_SEL_VREGI (MXC_V_ADC_CTRL_ADC_CH_SEL_VREGI << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
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#define MXC_F_ADC_CTRL_ADC_DIVSEL_POS 17
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#define MXC_F_ADC_CTRL_ADC_DIVSEL ((uint32_t)(0x3UL << MXC_F_ADC_CTRL_ADC_DIVSEL_POS))
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#define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 ((uint32_t)0x0UL)
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#define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV1 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
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#define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 ((uint32_t)0x1UL)
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#define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV2 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
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#define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 ((uint32_t)0x2UL)
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#define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV3 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
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#define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 ((uint32_t)0x3UL)
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#define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV4 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
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#define MXC_F_ADC_CTRL_DATA_ALIGN_POS 20
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#define MXC_F_ADC_CTRL_DATA_ALIGN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_DATA_ALIGN_POS))
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#define MXC_F_ADC_STATUS_ACTIVE_POS 0
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#define MXC_F_ADC_STATUS_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_ACTIVE_POS))
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#define MXC_F_ADC_STATUS_PWR_UP_ACTIVE_POS 2
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#define MXC_F_ADC_STATUS_PWR_UP_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_PWR_UP_ACTIVE_POS))
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#define MXC_F_ADC_STATUS_OVERFLOW_POS 3
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#define MXC_F_ADC_STATUS_OVERFLOW ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_OVERFLOW_POS))
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#define MXC_F_ADC_DATA_DATA_POS 0
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#define MXC_F_ADC_DATA_DATA ((uint32_t)(0xFFFFUL << MXC_F_ADC_DATA_DATA_POS))
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#define MXC_F_ADC_INTR_DONE_IE_POS 0
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#define MXC_F_ADC_INTR_DONE_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IE_POS))
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#define MXC_F_ADC_INTR_REF_READY_IE_POS 1
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#define MXC_F_ADC_INTR_REF_READY_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IE_POS))
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#define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS 2
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#define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS))
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#define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS 3
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#define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS))
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#define MXC_F_ADC_INTR_OVERFLOW_IE_POS 4
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#define MXC_F_ADC_INTR_OVERFLOW_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IE_POS))
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#define MXC_F_ADC_INTR_DONE_IF_POS 16
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#define MXC_F_ADC_INTR_DONE_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IF_POS))
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#define MXC_F_ADC_INTR_REF_READY_IF_POS 17
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#define MXC_F_ADC_INTR_REF_READY_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IF_POS))
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#define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS 18
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#define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS))
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#define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS 19
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#define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS))
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#define MXC_F_ADC_INTR_OVERFLOW_IF_POS 20
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#define MXC_F_ADC_INTR_OVERFLOW_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IF_POS))
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#define MXC_F_ADC_INTR_PENDING_POS 22
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#define MXC_F_ADC_INTR_PENDING ((uint32_t)(0x1UL << MXC_F_ADC_INTR_PENDING_POS))
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#define MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS 0
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#define MXC_F_ADC_LIMIT_CH_LO_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS))
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#define MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS 12
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#define MXC_F_ADC_LIMIT_CH_HI_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS))
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#define MXC_F_ADC_LIMIT_CH_SEL_POS 24
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#define MXC_F_ADC_LIMIT_CH_SEL ((uint32_t)(0xFUL << MXC_F_ADC_LIMIT_CH_SEL_POS))
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#define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS 28
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#define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS))
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#define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS 29
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#define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _ADC_REGS_H_ */
mxc_adc_regs_t
Definition:
adc_regs.h:88
mxc_adc_regs_t::intr
__IO uint32_t intr
Definition:
adc_regs.h:92
mxc_adc_regs_t::ctrl
__IO uint32_t ctrl
Definition:
adc_regs.h:89
mxc_adc_regs_t::data
__IO uint32_t data
Definition:
adc_regs.h:91
mxc_adc_regs_t::status
__IO uint32_t status
Definition:
adc_regs.h:90
CMSIS
Device
Maxim
MAX32665
Include
adc_regs.h
Generated on Fri Dec 4 2020 11:48:56 for MAX32665 Peripheral Driver API by
1.8.20