MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
dvs_regs.h
1 
6 /* ****************************************************************************
7  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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39 
40 #ifndef _DVS_REGS_H_
41 #define _DVS_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
87 typedef struct {
88  __IO uint32_t ctl;
89  __IO uint32_t stat;
90  __IO uint32_t direct;
91  __IO uint32_t mon;
92  __IO uint32_t adj_up;
93  __IO uint32_t adj_dwn;
94  __IO uint32_t thres_cmp;
95  __IO uint32_t tap_sel[5];
97 
98 /* Register offsets for module DVS */
105  #define MXC_R_DVS_CTL ((uint32_t)0x00000000UL)
106  #define MXC_R_DVS_STAT ((uint32_t)0x00000004UL)
107  #define MXC_R_DVS_DIRECT ((uint32_t)0x00000008UL)
108  #define MXC_R_DVS_MON ((uint32_t)0x0000000CUL)
109  #define MXC_R_DVS_ADJ_UP ((uint32_t)0x00000010UL)
110  #define MXC_R_DVS_ADJ_DWN ((uint32_t)0x00000014UL)
111  #define MXC_R_DVS_THRES_CMP ((uint32_t)0x00000018UL)
112  #define MXC_R_DVS_TAP_SEL ((uint32_t)0x0000001CUL)
121  #define MXC_F_DVS_CTL_MON_ENA_POS 0
122  #define MXC_F_DVS_CTL_MON_ENA ((uint32_t)(0x1UL << MXC_F_DVS_CTL_MON_ENA_POS))
124  #define MXC_F_DVS_CTL_ADJ_ENA_POS 1
125  #define MXC_F_DVS_CTL_ADJ_ENA ((uint32_t)(0x1UL << MXC_F_DVS_CTL_ADJ_ENA_POS))
127  #define MXC_F_DVS_CTL_PS_FB_DIS_POS 2
128  #define MXC_F_DVS_CTL_PS_FB_DIS ((uint32_t)(0x1UL << MXC_F_DVS_CTL_PS_FB_DIS_POS))
130  #define MXC_F_DVS_CTL_CTRL_TAP_ENA_POS 3
131  #define MXC_F_DVS_CTL_CTRL_TAP_ENA ((uint32_t)(0x1UL << MXC_F_DVS_CTL_CTRL_TAP_ENA_POS))
133  #define MXC_F_DVS_CTL_PROP_DLY_POS 4
134  #define MXC_F_DVS_CTL_PROP_DLY ((uint32_t)(0x3UL << MXC_F_DVS_CTL_PROP_DLY_POS))
136  #define MXC_F_DVS_CTL_MON_ONESHOT_POS 6
137  #define MXC_F_DVS_CTL_MON_ONESHOT ((uint32_t)(0x1UL << MXC_F_DVS_CTL_MON_ONESHOT_POS))
139  #define MXC_F_DVS_CTL_GO_DIRECT_POS 7
140  #define MXC_F_DVS_CTL_GO_DIRECT ((uint32_t)(0x1UL << MXC_F_DVS_CTL_GO_DIRECT_POS))
142  #define MXC_F_DVS_CTL_DIRECT_REG_POS 8
143  #define MXC_F_DVS_CTL_DIRECT_REG ((uint32_t)(0x1UL << MXC_F_DVS_CTL_DIRECT_REG_POS))
145  #define MXC_F_DVS_CTL_PRIME_ENA_POS 9
146  #define MXC_F_DVS_CTL_PRIME_ENA ((uint32_t)(0x1UL << MXC_F_DVS_CTL_PRIME_ENA_POS))
148  #define MXC_F_DVS_CTL_LIMIT_IE_POS 10
149  #define MXC_F_DVS_CTL_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_DVS_CTL_LIMIT_IE_POS))
151  #define MXC_F_DVS_CTL_RANGE_IE_POS 11
152  #define MXC_F_DVS_CTL_RANGE_IE ((uint32_t)(0x1UL << MXC_F_DVS_CTL_RANGE_IE_POS))
154  #define MXC_F_DVS_CTL_ADJ_IE_POS 12
155  #define MXC_F_DVS_CTL_ADJ_IE ((uint32_t)(0x1UL << MXC_F_DVS_CTL_ADJ_IE_POS))
157  #define MXC_F_DVS_CTL_REF_SEL_POS 13
158  #define MXC_F_DVS_CTL_REF_SEL ((uint32_t)(0xFUL << MXC_F_DVS_CTL_REF_SEL_POS))
160  #define MXC_F_DVS_CTL_INC_VAL_POS 17
161  #define MXC_F_DVS_CTL_INC_VAL ((uint32_t)(0x7UL << MXC_F_DVS_CTL_INC_VAL_POS))
163  #define MXC_F_DVS_CTL_DVS_PS_APB_DIS_POS 20
164  #define MXC_F_DVS_CTL_DVS_PS_APB_DIS ((uint32_t)(0x1UL << MXC_F_DVS_CTL_DVS_PS_APB_DIS_POS))
166  #define MXC_F_DVS_CTL_DVS_HI_RANGE_ANY_POS 21
167  #define MXC_F_DVS_CTL_DVS_HI_RANGE_ANY ((uint32_t)(0x1UL << MXC_F_DVS_CTL_DVS_HI_RANGE_ANY_POS))
169  #define MXC_F_DVS_CTL_FB_TO_IE_POS 22
170  #define MXC_F_DVS_CTL_FB_TO_IE ((uint32_t)(0x1UL << MXC_F_DVS_CTL_FB_TO_IE_POS))
172  #define MXC_F_DVS_CTL_FC_LV_IE_POS 23
173  #define MXC_F_DVS_CTL_FC_LV_IE ((uint32_t)(0x1UL << MXC_F_DVS_CTL_FC_LV_IE_POS))
175  #define MXC_F_DVS_CTL_PD_ACK_ENA_POS 24
176  #define MXC_F_DVS_CTL_PD_ACK_ENA ((uint32_t)(0x1UL << MXC_F_DVS_CTL_PD_ACK_ENA_POS))
178  #define MXC_F_DVS_CTL_ADJ_ABORT_POS 25
179  #define MXC_F_DVS_CTL_ADJ_ABORT ((uint32_t)(0x1UL << MXC_F_DVS_CTL_ADJ_ABORT_POS))
189  #define MXC_F_DVS_STAT_DVS_STATE_POS 0
190  #define MXC_F_DVS_STAT_DVS_STATE ((uint32_t)(0xFUL << MXC_F_DVS_STAT_DVS_STATE_POS))
192  #define MXC_F_DVS_STAT_ADJ_UP_ENA_POS 4
193  #define MXC_F_DVS_STAT_ADJ_UP_ENA ((uint32_t)(0x1UL << MXC_F_DVS_STAT_ADJ_UP_ENA_POS))
195  #define MXC_F_DVS_STAT_ADJ_DWN_ENA_POS 5
196  #define MXC_F_DVS_STAT_ADJ_DWN_ENA ((uint32_t)(0x1UL << MXC_F_DVS_STAT_ADJ_DWN_ENA_POS))
198  #define MXC_F_DVS_STAT_ADJ_ACTIVE_POS 6
199  #define MXC_F_DVS_STAT_ADJ_ACTIVE ((uint32_t)(0x1UL << MXC_F_DVS_STAT_ADJ_ACTIVE_POS))
201  #define MXC_F_DVS_STAT_CTR_TAP_OK_POS 7
202  #define MXC_F_DVS_STAT_CTR_TAP_OK ((uint32_t)(0x1UL << MXC_F_DVS_STAT_CTR_TAP_OK_POS))
204  #define MXC_F_DVS_STAT_CTR_TAP_SEL_POS 8
205  #define MXC_F_DVS_STAT_CTR_TAP_SEL ((uint32_t)(0x1UL << MXC_F_DVS_STAT_CTR_TAP_SEL_POS))
207  #define MXC_F_DVS_STAT_SLOW_TRIP_DET_POS 9
208  #define MXC_F_DVS_STAT_SLOW_TRIP_DET ((uint32_t)(0x1UL << MXC_F_DVS_STAT_SLOW_TRIP_DET_POS))
210  #define MXC_F_DVS_STAT_FAST_TRIP_DET_POS 10
211  #define MXC_F_DVS_STAT_FAST_TRIP_DET ((uint32_t)(0x1UL << MXC_F_DVS_STAT_FAST_TRIP_DET_POS))
213  #define MXC_F_DVS_STAT_PS_IN_RANGE_POS 11
214  #define MXC_F_DVS_STAT_PS_IN_RANGE ((uint32_t)(0x1UL << MXC_F_DVS_STAT_PS_IN_RANGE_POS))
216  #define MXC_F_DVS_STAT_PS_VCNTR_POS 12
217  #define MXC_F_DVS_STAT_PS_VCNTR ((uint32_t)(0x7FUL << MXC_F_DVS_STAT_PS_VCNTR_POS))
219  #define MXC_F_DVS_STAT_MON_DLY_OK_POS 19
220  #define MXC_F_DVS_STAT_MON_DLY_OK ((uint32_t)(0x1UL << MXC_F_DVS_STAT_MON_DLY_OK_POS))
222  #define MXC_F_DVS_STAT_ADJ_DLY_OK_POS 20
223  #define MXC_F_DVS_STAT_ADJ_DLY_OK ((uint32_t)(0x1UL << MXC_F_DVS_STAT_ADJ_DLY_OK_POS))
225  #define MXC_F_DVS_STAT_LO_LIMIT_DET_POS 21
226  #define MXC_F_DVS_STAT_LO_LIMIT_DET ((uint32_t)(0x1UL << MXC_F_DVS_STAT_LO_LIMIT_DET_POS))
228  #define MXC_F_DVS_STAT_HI_LIMIT_DET_POS 22
229  #define MXC_F_DVS_STAT_HI_LIMIT_DET ((uint32_t)(0x1UL << MXC_F_DVS_STAT_HI_LIMIT_DET_POS))
231  #define MXC_F_DVS_STAT_VALID_TAP_POS 23
232  #define MXC_F_DVS_STAT_VALID_TAP ((uint32_t)(0x1UL << MXC_F_DVS_STAT_VALID_TAP_POS))
234  #define MXC_F_DVS_STAT_LIMIT_ERR_POS 24
235  #define MXC_F_DVS_STAT_LIMIT_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_LIMIT_ERR_POS))
237  #define MXC_F_DVS_STAT_RANGE_ERR_POS 25
238  #define MXC_F_DVS_STAT_RANGE_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_RANGE_ERR_POS))
240  #define MXC_F_DVS_STAT_ADJ_ERR_POS 26
241  #define MXC_F_DVS_STAT_ADJ_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_ADJ_ERR_POS))
243  #define MXC_F_DVS_STAT_REF_SEL_ERR_POS 27
244  #define MXC_F_DVS_STAT_REF_SEL_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_REF_SEL_ERR_POS))
246  #define MXC_F_DVS_STAT_REF_SEL_ERR_POS 27
247  #define MXC_F_DVS_STAT_REF_SEL_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_REF_SEL_ERR_POS))
249  #define MXC_F_DVS_STAT_FB_TO_ERR_POS 28
250  #define MXC_F_DVS_STAT_FB_TO_ERR ((uint32_t)(0x1UL << MXC_F_DVS_STAT_FB_TO_ERR_POS))
252  #define MXC_F_DVS_STAT_FB_TO_ERR_S_POS 29
253  #define MXC_F_DVS_STAT_FB_TO_ERR_S ((uint32_t)(0x1UL << MXC_F_DVS_STAT_FB_TO_ERR_S_POS))
255  #define MXC_F_DVS_STAT_FC_LV_DET_INT_POS 30
256  #define MXC_F_DVS_STAT_FC_LV_DET_INT ((uint32_t)(0x1UL << MXC_F_DVS_STAT_FC_LV_DET_INT_POS))
258  #define MXC_F_DVS_STAT_FC_LV_DET_S_POS 31
259  #define MXC_F_DVS_STAT_FC_LV_DET_S ((uint32_t)(0x1UL << MXC_F_DVS_STAT_FC_LV_DET_S_POS))
269  #define MXC_F_DVS_DIRECT_VOLTAGE_POS 0
270  #define MXC_F_DVS_DIRECT_VOLTAGE ((uint32_t)(0x7FUL << MXC_F_DVS_DIRECT_VOLTAGE_POS))
280  #define MXC_F_DVS_MON_DLY_POS 0
281  #define MXC_F_DVS_MON_DLY ((uint32_t)(0xFFFFFFUL << MXC_F_DVS_MON_DLY_POS))
283  #define MXC_F_DVS_MON_PRE_POS 24
284  #define MXC_F_DVS_MON_PRE ((uint32_t)(0xFFUL << MXC_F_DVS_MON_PRE_POS))
294  #define MXC_F_DVS_ADJ_UP_DLY_POS 0
295  #define MXC_F_DVS_ADJ_UP_DLY ((uint32_t)(0xFFFFUL << MXC_F_DVS_ADJ_UP_DLY_POS))
297  #define MXC_F_DVS_ADJ_UP_PRE_POS 16
298  #define MXC_F_DVS_ADJ_UP_PRE ((uint32_t)(0xFFUL << MXC_F_DVS_ADJ_UP_PRE_POS))
308  #define MXC_F_DVS_ADJ_DWN_DLY_POS 0
309  #define MXC_F_DVS_ADJ_DWN_DLY ((uint32_t)(0xFFFFUL << MXC_F_DVS_ADJ_DWN_DLY_POS))
311  #define MXC_F_DVS_ADJ_DWN_PRE_POS 16
312  #define MXC_F_DVS_ADJ_DWN_PRE ((uint32_t)(0xFFUL << MXC_F_DVS_ADJ_DWN_PRE_POS))
322  #define MXC_F_DVS_THRES_CMP_VCNTR_THRES_CNT_POS 0
323  #define MXC_F_DVS_THRES_CMP_VCNTR_THRES_CNT ((uint32_t)(0x7FUL << MXC_F_DVS_THRES_CMP_VCNTR_THRES_CNT_POS))
325  #define MXC_F_DVS_THRES_CMP_VCNTR_THRES_MASK_POS 8
326  #define MXC_F_DVS_THRES_CMP_VCNTR_THRES_MASK ((uint32_t)(0x7FUL << MXC_F_DVS_THRES_CMP_VCNTR_THRES_MASK_POS))
336  #define MXC_F_DVS_TAP_SEL_LO_POS 0
337  #define MXC_F_DVS_TAP_SEL_LO ((uint32_t)(0x1FUL << MXC_F_DVS_TAP_SEL_LO_POS))
339  #define MXC_F_DVS_TAP_SEL_LO_TAP_STAT_POS 5
340  #define MXC_F_DVS_TAP_SEL_LO_TAP_STAT ((uint32_t)(0x1UL << MXC_F_DVS_TAP_SEL_LO_TAP_STAT_POS))
342  #define MXC_F_DVS_TAP_SEL_CTR_TAP_STAT_POS 6
343  #define MXC_F_DVS_TAP_SEL_CTR_TAP_STAT ((uint32_t)(0x1UL << MXC_F_DVS_TAP_SEL_CTR_TAP_STAT_POS))
345  #define MXC_F_DVS_TAP_SEL_HI_TAP_STAT_POS 7
346  #define MXC_F_DVS_TAP_SEL_HI_TAP_STAT ((uint32_t)(0x1UL << MXC_F_DVS_TAP_SEL_HI_TAP_STAT_POS))
348  #define MXC_F_DVS_TAP_SEL_HI_POS 8
349  #define MXC_F_DVS_TAP_SEL_HI ((uint32_t)(0x1FUL << MXC_F_DVS_TAP_SEL_HI_POS))
351  #define MXC_F_DVS_TAP_SEL_CTR_POS 16
352  #define MXC_F_DVS_TAP_SEL_CTR ((uint32_t)(0x1FUL << MXC_F_DVS_TAP_SEL_CTR_POS))
354  #define MXC_F_DVS_TAP_SEL_COARSE_POS 24
355  #define MXC_F_DVS_TAP_SEL_COARSE ((uint32_t)(0x7UL << MXC_F_DVS_TAP_SEL_COARSE_POS))
357  #define MXC_F_DVS_TAP_SEL_DET_DLY_POS 29
358  #define MXC_F_DVS_TAP_SEL_DET_DLY ((uint32_t)(0x3UL << MXC_F_DVS_TAP_SEL_DET_DLY_POS))
360  #define MXC_F_DVS_TAP_SEL_DELAY_ACT_POS 31
361  #define MXC_F_DVS_TAP_SEL_DELAY_ACT ((uint32_t)(0x1UL << MXC_F_DVS_TAP_SEL_DELAY_ACT_POS))
365 #ifdef __cplusplus
366 }
367 #endif
368 
369 #endif /* _DVS_REGS_H_ */
mxc_dvs_regs_t::stat
__IO uint32_t stat
Definition: dvs_regs.h:89
mxc_dvs_regs_t
Definition: dvs_regs.h:87
mxc_dvs_regs_t::thres_cmp
__IO uint32_t thres_cmp
Definition: dvs_regs.h:94
mxc_dvs_regs_t::direct
__IO uint32_t direct
Definition: dvs_regs.h:90
mxc_dvs_regs_t::mon
__IO uint32_t mon
Definition: dvs_regs.h:91
mxc_dvs_regs_t::adj_dwn
__IO uint32_t adj_dwn
Definition: dvs_regs.h:93
mxc_dvs_regs_t::ctl
__IO uint32_t ctl
Definition: dvs_regs.h:88
mxc_dvs_regs_t::adj_up
__IO uint32_t adj_up
Definition: dvs_regs.h:92