MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
SDMA_INT_MUX_CTRL0

Macros

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16_POS   0
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17_POS   8
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18_POS   16
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18_POS))
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19_POS   24
 
#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19_POS))
 

Detailed Description

Interrupt Mux Control 0.

Macro Definition Documentation

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16_POS))

INT_MUX_CTRL0_INTSEL16 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16_POS

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL16_POS   0

INT_MUX_CTRL0_INTSEL16 Position

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17_POS))

INT_MUX_CTRL0_INTSEL17 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17_POS

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL17_POS   8

INT_MUX_CTRL0_INTSEL17 Position

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18_POS))

INT_MUX_CTRL0_INTSEL18 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18_POS

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL18_POS   16

INT_MUX_CTRL0_INTSEL18 Position

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19   ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19_POS))

INT_MUX_CTRL0_INTSEL19 Mask

◆ MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19_POS

#define MXC_F_SDMA_INT_MUX_CTRL0_INTSEL19_POS   24

INT_MUX_CTRL0_INTSEL19 Position