![]() |
MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
|
Control status lower register for INx endpoint (x == INDEX).
#define MXC_F_USBHS_INCSRL_CLRDATATOG ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_CLRDATATOG_POS)) |
INCSRL_CLRDATATOG Mask
#define MXC_F_USBHS_INCSRL_CLRDATATOG_POS 6 |
INCSRL_CLRDATATOG Position
#define MXC_F_USBHS_INCSRL_FIFONOTEMPTY ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_FIFONOTEMPTY_POS)) |
INCSRL_FIFONOTEMPTY Mask
#define MXC_F_USBHS_INCSRL_FIFONOTEMPTY_POS 1 |
INCSRL_FIFONOTEMPTY Position
#define MXC_F_USBHS_INCSRL_FLUSHFIFO ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_FLUSHFIFO_POS)) |
INCSRL_FLUSHFIFO Mask
#define MXC_F_USBHS_INCSRL_FLUSHFIFO_POS 3 |
INCSRL_FLUSHFIFO Position
#define MXC_F_USBHS_INCSRL_INCOMPTX ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_INCOMPTX_POS)) |
INCSRL_INCOMPTX Mask
#define MXC_F_USBHS_INCSRL_INCOMPTX_POS 7 |
INCSRL_INCOMPTX Position
#define MXC_F_USBHS_INCSRL_INPKTRDY ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_INPKTRDY_POS)) |
INCSRL_INPKTRDY Mask
#define MXC_F_USBHS_INCSRL_INPKTRDY_POS 0 |
INCSRL_INPKTRDY Position
#define MXC_F_USBHS_INCSRL_SENDSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_SENDSTALL_POS)) |
INCSRL_SENDSTALL Mask
#define MXC_F_USBHS_INCSRL_SENDSTALL_POS 4 |
INCSRL_SENDSTALL Position
#define MXC_F_USBHS_INCSRL_SENTSTALL ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_SENTSTALL_POS)) |
INCSRL_SENTSTALL Mask
#define MXC_F_USBHS_INCSRL_SENTSTALL_POS 5 |
INCSRL_SENTSTALL Position
#define MXC_F_USBHS_INCSRL_UNDERRUN ((uint8_t)(0x1UL << MXC_F_USBHS_INCSRL_UNDERRUN_POS)) |
INCSRL_UNDERRUN Mask
#define MXC_F_USBHS_INCSRL_UNDERRUN_POS 2 |
INCSRL_UNDERRUN Position