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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Interrupt register for EP0 and IN EP1-15.
#define MXC_F_USBHS_INTRIN_EP0_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP0_IN_INT_POS)) |
INTRIN_EP0_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP0_IN_INT_POS 0 |
INTRIN_EP0_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP10_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP10_IN_INT_POS)) |
INTRIN_EP10_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP10_IN_INT_POS 10 |
INTRIN_EP10_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP11_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP11_IN_INT_POS)) |
INTRIN_EP11_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP11_IN_INT_POS 11 |
INTRIN_EP11_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP12_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP12_IN_INT_POS)) |
INTRIN_EP12_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP12_IN_INT_POS 12 |
INTRIN_EP12_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP13_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP13_IN_INT_POS)) |
INTRIN_EP13_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP13_IN_INT_POS 13 |
INTRIN_EP13_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP14_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP14_IN_INT_POS)) |
INTRIN_EP14_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP14_IN_INT_POS 14 |
INTRIN_EP14_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP15_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP15_IN_INT_POS)) |
INTRIN_EP15_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP15_IN_INT_POS 15 |
INTRIN_EP15_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP1_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP1_IN_INT_POS)) |
INTRIN_EP1_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP1_IN_INT_POS 1 |
INTRIN_EP1_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP2_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP2_IN_INT_POS)) |
INTRIN_EP2_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP2_IN_INT_POS 2 |
INTRIN_EP2_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP3_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP3_IN_INT_POS)) |
INTRIN_EP3_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP3_IN_INT_POS 3 |
INTRIN_EP3_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP4_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP4_IN_INT_POS)) |
INTRIN_EP4_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP4_IN_INT_POS 4 |
INTRIN_EP4_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP5_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP5_IN_INT_POS)) |
INTRIN_EP5_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP5_IN_INT_POS 5 |
INTRIN_EP5_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP6_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP6_IN_INT_POS)) |
INTRIN_EP6_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP6_IN_INT_POS 6 |
INTRIN_EP6_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP7_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP7_IN_INT_POS)) |
INTRIN_EP7_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP7_IN_INT_POS 7 |
INTRIN_EP7_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP8_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP8_IN_INT_POS)) |
INTRIN_EP8_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP8_IN_INT_POS 8 |
INTRIN_EP8_IN_INT Position
#define MXC_F_USBHS_INTRIN_EP9_IN_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTRIN_EP9_IN_INT_POS)) |
INTRIN_EP9_IN_INT Mask
#define MXC_F_USBHS_INTRIN_EP9_IN_INT_POS 9 |
INTRIN_EP9_IN_INT Position