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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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TMR4 Protection Register.
#define MXC_F_RPU_TMR4_CRYPTOACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_CRYPTOACN_POS)) |
TMR4_CRYPTOACN Mask
#define MXC_F_RPU_TMR4_CRYPTOACN_POS 7 |
TMR4_CRYPTOACN Position
#define MXC_F_RPU_TMR4_DMA0ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_DMA0ACN_POS)) |
TMR4_DMA0ACN Mask
#define MXC_F_RPU_TMR4_DMA0ACN_POS 0 |
TMR4_DMA0ACN Position
#define MXC_F_RPU_TMR4_DMA1ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_DMA1ACN_POS)) |
TMR4_DMA1ACN Mask
#define MXC_F_RPU_TMR4_DMA1ACN_POS 1 |
TMR4_DMA1ACN Position
#define MXC_F_RPU_TMR4_SDIOACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_SDIOACN_POS)) |
TMR4_SDIOACN Mask
#define MXC_F_RPU_TMR4_SDIOACN_POS 8 |
TMR4_SDIOACN Position
#define MXC_F_RPU_TMR4_SDMADACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_SDMADACN_POS)) |
TMR4_SDMADACN Mask
#define MXC_F_RPU_TMR4_SDMADACN_POS 5 |
TMR4_SDMADACN Position
#define MXC_F_RPU_TMR4_SDMAIACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_SDMAIACN_POS)) |
TMR4_SDMAIACN Mask
#define MXC_F_RPU_TMR4_SDMAIACN_POS 6 |
TMR4_SDMAIACN Position
#define MXC_F_RPU_TMR4_SYS0ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_SYS0ACN_POS)) |
TMR4_SYS0ACN Mask
#define MXC_F_RPU_TMR4_SYS0ACN_POS 3 |
TMR4_SYS0ACN Position
#define MXC_F_RPU_TMR4_SYS1ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_SYS1ACN_POS)) |
TMR4_SYS1ACN Mask
#define MXC_F_RPU_TMR4_SYS1ACN_POS 4 |
TMR4_SYS1ACN Position
#define MXC_F_RPU_TMR4_USBACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR4_USBACN_POS)) |
TMR4_USBACN Mask
#define MXC_F_RPU_TMR4_USBACN_POS 2 |
TMR4_USBACN Position