![]() |
MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
|
TMR3 Protection Register.
#define MXC_F_RPU_TMR3_CRYPTOACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_CRYPTOACN_POS)) |
TMR3_CRYPTOACN Mask
#define MXC_F_RPU_TMR3_CRYPTOACN_POS 7 |
TMR3_CRYPTOACN Position
#define MXC_F_RPU_TMR3_DMA0ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_DMA0ACN_POS)) |
TMR3_DMA0ACN Mask
#define MXC_F_RPU_TMR3_DMA0ACN_POS 0 |
TMR3_DMA0ACN Position
#define MXC_F_RPU_TMR3_DMA1ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_DMA1ACN_POS)) |
TMR3_DMA1ACN Mask
#define MXC_F_RPU_TMR3_DMA1ACN_POS 1 |
TMR3_DMA1ACN Position
#define MXC_F_RPU_TMR3_SDIOACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_SDIOACN_POS)) |
TMR3_SDIOACN Mask
#define MXC_F_RPU_TMR3_SDIOACN_POS 8 |
TMR3_SDIOACN Position
#define MXC_F_RPU_TMR3_SDMADACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_SDMADACN_POS)) |
TMR3_SDMADACN Mask
#define MXC_F_RPU_TMR3_SDMADACN_POS 5 |
TMR3_SDMADACN Position
#define MXC_F_RPU_TMR3_SDMAIACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_SDMAIACN_POS)) |
TMR3_SDMAIACN Mask
#define MXC_F_RPU_TMR3_SDMAIACN_POS 6 |
TMR3_SDMAIACN Position
#define MXC_F_RPU_TMR3_SYS0ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_SYS0ACN_POS)) |
TMR3_SYS0ACN Mask
#define MXC_F_RPU_TMR3_SYS0ACN_POS 3 |
TMR3_SYS0ACN Position
#define MXC_F_RPU_TMR3_SYS1ACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_SYS1ACN_POS)) |
TMR3_SYS1ACN Mask
#define MXC_F_RPU_TMR3_SYS1ACN_POS 4 |
TMR3_SYS1ACN Position
#define MXC_F_RPU_TMR3_USBACN ((uint32_t)(0x1UL << MXC_F_RPU_TMR3_USBACN_POS)) |
TMR3_USBACN Mask
#define MXC_F_RPU_TMR3_USBACN_POS 2 |
TMR3_USBACN Position