MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665

Macros

#define MXC_F_SRCC_CACHE_CTRL_CACHE_EN_POS   0
 
#define MXC_F_SRCC_CACHE_CTRL_CACHE_EN   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CACHE_EN_POS))
 
#define MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC_POS   1
 
#define MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC_POS))
 
#define MXC_F_SRCC_CACHE_CTRL_CWFST_DIS_POS   2
 
#define MXC_F_SRCC_CACHE_CTRL_CWFST_DIS   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CWFST_DIS_POS))
 
#define MXC_F_SRCC_CACHE_CTRL_CACHE_RDY_POS   16
 
#define MXC_F_SRCC_CACHE_CTRL_CACHE_RDY   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CACHE_RDY_POS))
 

Detailed Description

Cache Control and Status Register.

Macro Definition Documentation

◆ MXC_F_SRCC_CACHE_CTRL_CACHE_EN

#define MXC_F_SRCC_CACHE_CTRL_CACHE_EN   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CACHE_EN_POS))

CACHE_CTRL_CACHE_EN Mask

◆ MXC_F_SRCC_CACHE_CTRL_CACHE_EN_POS

#define MXC_F_SRCC_CACHE_CTRL_CACHE_EN_POS   0

CACHE_CTRL_CACHE_EN Position

◆ MXC_F_SRCC_CACHE_CTRL_CACHE_RDY

#define MXC_F_SRCC_CACHE_CTRL_CACHE_RDY   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CACHE_RDY_POS))

CACHE_CTRL_CACHE_RDY Mask

◆ MXC_F_SRCC_CACHE_CTRL_CACHE_RDY_POS

#define MXC_F_SRCC_CACHE_CTRL_CACHE_RDY_POS   16

CACHE_CTRL_CACHE_RDY Position

◆ MXC_F_SRCC_CACHE_CTRL_CWFST_DIS

#define MXC_F_SRCC_CACHE_CTRL_CWFST_DIS   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_CWFST_DIS_POS))

CACHE_CTRL_CWFST_DIS Mask

◆ MXC_F_SRCC_CACHE_CTRL_CWFST_DIS_POS

#define MXC_F_SRCC_CACHE_CTRL_CWFST_DIS_POS   2

CACHE_CTRL_CWFST_DIS Position

◆ MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC

#define MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC   ((uint32_t)(0x1UL << MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC_POS))

CACHE_CTRL_WRITE_ALLOC Mask

◆ MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC_POS

#define MXC_F_SRCC_CACHE_CTRL_WRITE_ALLOC_POS   1

CACHE_CTRL_WRITE_ALLOC Position