MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
i2c_regs.h
1 
6 /* ****************************************************************************
7  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
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13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included
17  * in all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
23  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
26  *
27  * Except as contained in this notice, the name of Maxim Integrated
28  * Products, Inc. shall not be used except as stated in the Maxim Integrated
29  * Products, Inc. Branding Policy.
30  *
31  * The mere transfer of this software does not imply any licenses
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39 
40 #ifndef _I2C_REGS_H_
41 #define _I2C_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
88 typedef struct {
89  __IO uint32_t ctrl0;
90  __IO uint32_t stat;
91  __IO uint32_t int_fl0;
92  __IO uint32_t int_en0;
93  __IO uint32_t int_fl1;
94  __IO uint32_t int_en1;
95  __IO uint32_t fifo_len;
96  __IO uint32_t rx_ctrl0;
97  __IO uint32_t rx_ctrl1;
98  __IO uint32_t tx_ctrl0;
99  __IO uint32_t tx_ctrl1;
100  __IO uint32_t fifo;
101  __IO uint32_t mstr_mode;
102  __IO uint32_t clk_lo;
103  __IO uint32_t clk_hi;
104  __IO uint32_t hs_clk;
105  __IO uint32_t timeout;
106  __R uint32_t rsv_0x44;
107  __IO uint32_t dma;
108  __IO uint32_t slv_addr;
110 
111 /* Register offsets for module I2C */
118  #define MXC_R_I2C_CTRL0 ((uint32_t)0x00000000UL)
119  #define MXC_R_I2C_STAT ((uint32_t)0x00000004UL)
120  #define MXC_R_I2C_INT_FL0 ((uint32_t)0x00000008UL)
121  #define MXC_R_I2C_INT_EN0 ((uint32_t)0x0000000CUL)
122  #define MXC_R_I2C_INT_FL1 ((uint32_t)0x00000010UL)
123  #define MXC_R_I2C_INT_EN1 ((uint32_t)0x00000014UL)
124  #define MXC_R_I2C_FIFO_LEN ((uint32_t)0x00000018UL)
125  #define MXC_R_I2C_RX_CTRL0 ((uint32_t)0x0000001CUL)
126  #define MXC_R_I2C_RX_CTRL1 ((uint32_t)0x00000020UL)
127  #define MXC_R_I2C_TX_CTRL0 ((uint32_t)0x00000024UL)
128  #define MXC_R_I2C_TX_CTRL1 ((uint32_t)0x00000028UL)
129  #define MXC_R_I2C_FIFO ((uint32_t)0x0000002CUL)
130  #define MXC_R_I2C_MSTR_MODE ((uint32_t)0x00000030UL)
131  #define MXC_R_I2C_CLK_LO ((uint32_t)0x00000034UL)
132  #define MXC_R_I2C_CLK_HI ((uint32_t)0x00000038UL)
133  #define MXC_R_I2C_HS_CLK ((uint32_t)0x0000003CUL)
134  #define MXC_R_I2C_TIMEOUT ((uint32_t)0x00000040UL)
135  #define MXC_R_I2C_DMA ((uint32_t)0x00000048UL)
136  #define MXC_R_I2C_SLV_ADDR ((uint32_t)0x0000004CUL)
145  #define MXC_F_I2C_CTRL0_I2CEN_POS 0
146  #define MXC_F_I2C_CTRL0_I2CEN ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_I2CEN_POS))
148  #define MXC_F_I2C_CTRL0_MST_POS 1
149  #define MXC_F_I2C_CTRL0_MST ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_MST_POS))
151  #define MXC_F_I2C_CTRL0_GCEN_POS 2
152  #define MXC_F_I2C_CTRL0_GCEN ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_GCEN_POS))
154  #define MXC_F_I2C_CTRL0_IRXM_POS 3
155  #define MXC_F_I2C_CTRL0_IRXM ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_IRXM_POS))
157  #define MXC_F_I2C_CTRL0_ACK_POS 4
158  #define MXC_F_I2C_CTRL0_ACK ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_ACK_POS))
160  #define MXC_F_I2C_CTRL0_SCLO_POS 6
161  #define MXC_F_I2C_CTRL0_SCLO ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCLO_POS))
163  #define MXC_F_I2C_CTRL0_SDAO_POS 7
164  #define MXC_F_I2C_CTRL0_SDAO ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDAO_POS))
166  #define MXC_F_I2C_CTRL0_SCL_POS 8
167  #define MXC_F_I2C_CTRL0_SCL ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_POS))
169  #define MXC_F_I2C_CTRL0_SDA_POS 9
170  #define MXC_F_I2C_CTRL0_SDA ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SDA_POS))
172  #define MXC_F_I2C_CTRL0_SWOE_POS 10
173  #define MXC_F_I2C_CTRL0_SWOE ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SWOE_POS))
175  #define MXC_F_I2C_CTRL0_READ_POS 11
176  #define MXC_F_I2C_CTRL0_READ ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_READ_POS))
178  #define MXC_F_I2C_CTRL0_SCL_STRD_POS 12
179  #define MXC_F_I2C_CTRL0_SCL_STRD ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_STRD_POS))
181  #define MXC_F_I2C_CTRL0_SCL_PPM_POS 13
182  #define MXC_F_I2C_CTRL0_SCL_PPM ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_SCL_PPM_POS))
184  #define MXC_F_I2C_CTRL0_HSMODE_POS 15
185  #define MXC_F_I2C_CTRL0_HSMODE ((uint32_t)(0x1UL << MXC_F_I2C_CTRL0_HSMODE_POS))
195  #define MXC_F_I2C_STAT_BUSY_POS 0
196  #define MXC_F_I2C_STAT_BUSY ((uint32_t)(0x1UL << MXC_F_I2C_STAT_BUSY_POS))
198  #define MXC_F_I2C_STAT_RX_EMPTY_POS 1
199  #define MXC_F_I2C_STAT_RX_EMPTY ((uint32_t)(0x1UL << MXC_F_I2C_STAT_RX_EMPTY_POS))
201  #define MXC_F_I2C_STAT_RXF_POS 2
202  #define MXC_F_I2C_STAT_RXF ((uint32_t)(0x1UL << MXC_F_I2C_STAT_RXF_POS))
204  #define MXC_F_I2C_STAT_TXE_POS 3
205  #define MXC_F_I2C_STAT_TXE ((uint32_t)(0x1UL << MXC_F_I2C_STAT_TXE_POS))
207  #define MXC_F_I2C_STAT_TXF_POS 4
208  #define MXC_F_I2C_STAT_TXF ((uint32_t)(0x1UL << MXC_F_I2C_STAT_TXF_POS))
210  #define MXC_F_I2C_STAT_CLKMD_POS 5
211  #define MXC_F_I2C_STAT_CLKMD ((uint32_t)(0x1UL << MXC_F_I2C_STAT_CLKMD_POS))
221  #define MXC_F_I2C_INT_FL0_DONEI_POS 0
222  #define MXC_F_I2C_INT_FL0_DONEI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DONEI_POS))
224  #define MXC_F_I2C_INT_FL0_IRXMI_POS 1
225  #define MXC_F_I2C_INT_FL0_IRXMI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_IRXMI_POS))
227  #define MXC_F_I2C_INT_FL0_GCI_POS 2
228  #define MXC_F_I2C_INT_FL0_GCI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_GCI_POS))
230  #define MXC_F_I2C_INT_FL0_AMI_POS 3
231  #define MXC_F_I2C_INT_FL0_AMI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_AMI_POS))
233  #define MXC_F_I2C_INT_FL0_RXTHI_POS 4
234  #define MXC_F_I2C_INT_FL0_RXTHI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RXTHI_POS))
236  #define MXC_F_I2C_INT_FL0_TXTHI_POS 5
237  #define MXC_F_I2C_INT_FL0_TXTHI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TXTHI_POS))
239  #define MXC_F_I2C_INT_FL0_STOPI_POS 6
240  #define MXC_F_I2C_INT_FL0_STOPI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOPI_POS))
242  #define MXC_F_I2C_INT_FL0_ADRACKI_POS 7
243  #define MXC_F_I2C_INT_FL0_ADRACKI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADRACKI_POS))
245  #define MXC_F_I2C_INT_FL0_ARBERI_POS 8
246  #define MXC_F_I2C_INT_FL0_ARBERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ARBERI_POS))
248  #define MXC_F_I2C_INT_FL0_TOERI_POS 9
249  #define MXC_F_I2C_INT_FL0_TOERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TOERI_POS))
251  #define MXC_F_I2C_INT_FL0_ADRERI_POS 10
252  #define MXC_F_I2C_INT_FL0_ADRERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_ADRERI_POS))
254  #define MXC_F_I2C_INT_FL0_DATERI_POS 11
255  #define MXC_F_I2C_INT_FL0_DATERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DATERI_POS))
257  #define MXC_F_I2C_INT_FL0_DNRERI_POS 12
258  #define MXC_F_I2C_INT_FL0_DNRERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_DNRERI_POS))
260  #define MXC_F_I2C_INT_FL0_STRTERI_POS 13
261  #define MXC_F_I2C_INT_FL0_STRTERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STRTERI_POS))
263  #define MXC_F_I2C_INT_FL0_STOPERI_POS 14
264  #define MXC_F_I2C_INT_FL0_STOPERI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_STOPERI_POS))
266  #define MXC_F_I2C_INT_FL0_TXLOI_POS 15
267  #define MXC_F_I2C_INT_FL0_TXLOI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_TXLOI_POS))
269  #define MXC_F_I2C_INT_FL0_RDAMI_POS 22
270  #define MXC_F_I2C_INT_FL0_RDAMI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_RDAMI_POS))
272  #define MXC_F_I2C_INT_FL0_WRAMI_POS 23
273  #define MXC_F_I2C_INT_FL0_WRAMI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL0_WRAMI_POS))
283  #define MXC_F_I2C_INT_EN0_DONEIE_POS 0
284  #define MXC_F_I2C_INT_EN0_DONEIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DONEIE_POS))
286  #define MXC_F_I2C_INT_EN0_IRXMIE_POS 1
287  #define MXC_F_I2C_INT_EN0_IRXMIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_IRXMIE_POS))
289  #define MXC_F_I2C_INT_EN0_GCIE_POS 2
290  #define MXC_F_I2C_INT_EN0_GCIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_GCIE_POS))
292  #define MXC_F_I2C_INT_EN0_AMIE_POS 3
293  #define MXC_F_I2C_INT_EN0_AMIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_AMIE_POS))
295  #define MXC_F_I2C_INT_EN0_RXTHIE_POS 4
296  #define MXC_F_I2C_INT_EN0_RXTHIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_RXTHIE_POS))
298  #define MXC_F_I2C_INT_EN0_TXTHIE_POS 5
299  #define MXC_F_I2C_INT_EN0_TXTHIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TXTHIE_POS))
301  #define MXC_F_I2C_INT_EN0_STOPIE_POS 6
302  #define MXC_F_I2C_INT_EN0_STOPIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_STOPIE_POS))
304  #define MXC_F_I2C_INT_EN0_ADRACKIE_POS 7
305  #define MXC_F_I2C_INT_EN0_ADRACKIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ADRACKIE_POS))
307  #define MXC_F_I2C_INT_EN0_ARBERIE_POS 8
308  #define MXC_F_I2C_INT_EN0_ARBERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ARBERIE_POS))
310  #define MXC_F_I2C_INT_EN0_TOERIE_POS 9
311  #define MXC_F_I2C_INT_EN0_TOERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TOERIE_POS))
313  #define MXC_F_I2C_INT_EN0_ADRERIE_POS 10
314  #define MXC_F_I2C_INT_EN0_ADRERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_ADRERIE_POS))
316  #define MXC_F_I2C_INT_EN0_DATERIE_POS 11
317  #define MXC_F_I2C_INT_EN0_DATERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DATERIE_POS))
319  #define MXC_F_I2C_INT_EN0_DNRERIE_POS 12
320  #define MXC_F_I2C_INT_EN0_DNRERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_DNRERIE_POS))
322  #define MXC_F_I2C_INT_EN0_STRTERIE_POS 13
323  #define MXC_F_I2C_INT_EN0_STRTERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_STRTERIE_POS))
325  #define MXC_F_I2C_INT_EN0_STOPERIE_POS 14
326  #define MXC_F_I2C_INT_EN0_STOPERIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_STOPERIE_POS))
328  #define MXC_F_I2C_INT_EN0_TXLOIE_POS 15
329  #define MXC_F_I2C_INT_EN0_TXLOIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_TXLOIE_POS))
331  #define MXC_F_I2C_INT_EN0_RDAMIE_POS 22
332  #define MXC_F_I2C_INT_EN0_RDAMIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_RDAMIE_POS))
334  #define MXC_F_I2C_INT_EN0_WRAMIE_POS 23
335  #define MXC_F_I2C_INT_EN0_WRAMIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN0_WRAMIE_POS))
345  #define MXC_F_I2C_INT_FL1_RXOFI_POS 0
346  #define MXC_F_I2C_INT_FL1_RXOFI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_RXOFI_POS))
348  #define MXC_F_I2C_INT_FL1_TXUFI_POS 1
349  #define MXC_F_I2C_INT_FL1_TXUFI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_TXUFI_POS))
351  #define MXC_F_I2C_INT_FL1_STARTI_POS 2
352  #define MXC_F_I2C_INT_FL1_STARTI ((uint32_t)(0x1UL << MXC_F_I2C_INT_FL1_STARTI_POS))
362  #define MXC_F_I2C_INT_EN1_RXOFIE_POS 0
363  #define MXC_F_I2C_INT_EN1_RXOFIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_RXOFIE_POS))
365  #define MXC_F_I2C_INT_EN1_TXUFIE_POS 1
366  #define MXC_F_I2C_INT_EN1_TXUFIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_TXUFIE_POS))
368  #define MXC_F_I2C_INT_EN1_STARTIE_POS 2
369  #define MXC_F_I2C_INT_EN1_STARTIE ((uint32_t)(0x1UL << MXC_F_I2C_INT_EN1_STARTIE_POS))
379  #define MXC_F_I2C_FIFO_LEN_RXLEN_POS 0
380  #define MXC_F_I2C_FIFO_LEN_RXLEN ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_LEN_RXLEN_POS))
382  #define MXC_F_I2C_FIFO_LEN_TXLEN_POS 8
383  #define MXC_F_I2C_FIFO_LEN_TXLEN ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_LEN_TXLEN_POS))
393  #define MXC_F_I2C_RX_CTRL0_DNR_POS 0
394  #define MXC_F_I2C_RX_CTRL0_DNR ((uint32_t)(0x1UL << MXC_F_I2C_RX_CTRL0_DNR_POS))
396  #define MXC_F_I2C_RX_CTRL0_RXFSH_POS 7
397  #define MXC_F_I2C_RX_CTRL0_RXFSH ((uint32_t)(0x1UL << MXC_F_I2C_RX_CTRL0_RXFSH_POS))
399  #define MXC_F_I2C_RX_CTRL0_RXTH_POS 8
400  #define MXC_F_I2C_RX_CTRL0_RXTH ((uint32_t)(0xFUL << MXC_F_I2C_RX_CTRL0_RXTH_POS))
410  #define MXC_F_I2C_RX_CTRL1_RXCNT_POS 0
411  #define MXC_F_I2C_RX_CTRL1_RXCNT ((uint32_t)(0xFFUL << MXC_F_I2C_RX_CTRL1_RXCNT_POS))
413  #define MXC_F_I2C_RX_CTRL1_RXFIFO_POS 8
414  #define MXC_F_I2C_RX_CTRL1_RXFIFO ((uint32_t)(0xFUL << MXC_F_I2C_RX_CTRL1_RXFIFO_POS))
424  #define MXC_F_I2C_TX_CTRL0_TXPRELD_POS 0
425  #define MXC_F_I2C_TX_CTRL0_TXPRELD ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXPRELD_POS))
427  #define MXC_F_I2C_TX_CTRL0_TXFIFORDY_POS 1
428  #define MXC_F_I2C_TX_CTRL0_TXFIFORDY ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXFIFORDY_POS))
430  #define MXC_F_I2C_TX_CTRL0_GCAMTXAFDIS_POS 2
431  #define MXC_F_I2C_TX_CTRL0_GCAMTXAFDIS ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_GCAMTXAFDIS_POS))
433  #define MXC_F_I2C_TX_CTRL0_SAMWTXAFDIS_POS 3
434  #define MXC_F_I2C_TX_CTRL0_SAMWTXAFDIS ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_SAMWTXAFDIS_POS))
436  #define MXC_F_I2C_TX_CTRL0_SAMRTXAFDIS_POS 4
437  #define MXC_F_I2C_TX_CTRL0_SAMRTXAFDIS ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_SAMRTXAFDIS_POS))
439  #define MXC_F_I2C_TX_CTRL0_RNACKTXAFDIS_POS 5
440  #define MXC_F_I2C_TX_CTRL0_RNACKTXAFDIS ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_RNACKTXAFDIS_POS))
442  #define MXC_F_I2C_TX_CTRL0_TXFSH_POS 7
443  #define MXC_F_I2C_TX_CTRL0_TXFSH ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL0_TXFSH_POS))
445  #define MXC_F_I2C_TX_CTRL0_TXTH_POS 8
446  #define MXC_F_I2C_TX_CTRL0_TXTH ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL0_TXTH_POS))
456  #define MXC_F_I2C_TX_CTRL1_TXRDY_POS 0
457  #define MXC_F_I2C_TX_CTRL1_TXRDY ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TXRDY_POS))
459  #define MXC_F_I2C_TX_CTRL1_TX_LAST_POS 1
460  #define MXC_F_I2C_TX_CTRL1_TX_LAST ((uint32_t)(0x1UL << MXC_F_I2C_TX_CTRL1_TX_LAST_POS))
462  #define MXC_F_I2C_TX_CTRL1_TXFIFO_POS 8
463  #define MXC_F_I2C_TX_CTRL1_TXFIFO ((uint32_t)(0xFUL << MXC_F_I2C_TX_CTRL1_TXFIFO_POS))
473  #define MXC_F_I2C_FIFO_DATA_POS 0
474  #define MXC_F_I2C_FIFO_DATA ((uint32_t)(0xFFUL << MXC_F_I2C_FIFO_DATA_POS))
484  #define MXC_F_I2C_MSTR_MODE_START_POS 0
485  #define MXC_F_I2C_MSTR_MODE_START ((uint32_t)(0x1UL << MXC_F_I2C_MSTR_MODE_START_POS))
487  #define MXC_F_I2C_MSTR_MODE_RESTART_POS 1
488  #define MXC_F_I2C_MSTR_MODE_RESTART ((uint32_t)(0x1UL << MXC_F_I2C_MSTR_MODE_RESTART_POS))
490  #define MXC_F_I2C_MSTR_MODE_STOP_POS 2
491  #define MXC_F_I2C_MSTR_MODE_STOP ((uint32_t)(0x1UL << MXC_F_I2C_MSTR_MODE_STOP_POS))
493  #define MXC_F_I2C_MSTR_MODE_SEA_POS 7
494  #define MXC_F_I2C_MSTR_MODE_SEA ((uint32_t)(0x1UL << MXC_F_I2C_MSTR_MODE_SEA_POS))
496  #define MXC_F_I2C_MSTR_MODE_MCODE_POS 8
497  #define MXC_F_I2C_MSTR_MODE_MCODE ((uint32_t)(0x7UL << MXC_F_I2C_MSTR_MODE_MCODE_POS))
499  #define MXC_F_I2C_MSTR_MODE_SCL_SPEED_UP_POS 11
500  #define MXC_F_I2C_MSTR_MODE_SCL_SPEED_UP ((uint32_t)(0x1UL << MXC_F_I2C_MSTR_MODE_SCL_SPEED_UP_POS))
510  #define MXC_F_I2C_CLK_LO_SCL_LO_POS 0
511  #define MXC_F_I2C_CLK_LO_SCL_LO ((uint32_t)(0x1FFUL << MXC_F_I2C_CLK_LO_SCL_LO_POS))
521  #define MXC_F_I2C_CLK_HI_SCL_HI_POS 0
522  #define MXC_F_I2C_CLK_HI_SCL_HI ((uint32_t)(0x1FFUL << MXC_F_I2C_CLK_HI_SCL_HI_POS))
532  #define MXC_F_I2C_HS_CLK_HS_CLK_LO_POS 0
533  #define MXC_F_I2C_HS_CLK_HS_CLK_LO ((uint32_t)(0xFFUL << MXC_F_I2C_HS_CLK_HS_CLK_LO_POS))
535  #define MXC_F_I2C_HS_CLK_HS_CLK_HI_POS 8
536  #define MXC_F_I2C_HS_CLK_HS_CLK_HI ((uint32_t)(0xFFUL << MXC_F_I2C_HS_CLK_HS_CLK_HI_POS))
546  #define MXC_F_I2C_TIMEOUT_TO_POS 0
547  #define MXC_F_I2C_TIMEOUT_TO ((uint32_t)(0xFFFFUL << MXC_F_I2C_TIMEOUT_TO_POS))
557  #define MXC_F_I2C_DMA_TXEN_POS 0
558  #define MXC_F_I2C_DMA_TXEN ((uint32_t)(0x1UL << MXC_F_I2C_DMA_TXEN_POS))
560  #define MXC_F_I2C_DMA_RXEN_POS 1
561  #define MXC_F_I2C_DMA_RXEN ((uint32_t)(0x1UL << MXC_F_I2C_DMA_RXEN_POS))
571  #define MXC_F_I2C_SLV_ADDR_SLA_POS 0
572  #define MXC_F_I2C_SLV_ADDR_SLA ((uint32_t)(0x3FFUL << MXC_F_I2C_SLV_ADDR_SLA_POS))
574  #define MXC_F_I2C_SLV_ADDR_EA_POS 15
575  #define MXC_F_I2C_SLV_ADDR_EA ((uint32_t)(0x1UL << MXC_F_I2C_SLV_ADDR_EA_POS))
579 #ifdef __cplusplus
580 }
581 #endif
582 
583 #endif /* _I2C_REGS_H_ */
mxc_i2c_regs_t::timeout
__IO uint32_t timeout
Definition: i2c_regs.h:105
mxc_i2c_regs_t::tx_ctrl1
__IO uint32_t tx_ctrl1
Definition: i2c_regs.h:99
mxc_i2c_regs_t::int_fl0
__IO uint32_t int_fl0
Definition: i2c_regs.h:91
mxc_i2c_regs_t::clk_hi
__IO uint32_t clk_hi
Definition: i2c_regs.h:103
mxc_i2c_regs_t::fifo
__IO uint32_t fifo
Definition: i2c_regs.h:100
mxc_i2c_regs_t::mstr_mode
__IO uint32_t mstr_mode
Definition: i2c_regs.h:101
mxc_i2c_regs_t::stat
__IO uint32_t stat
Definition: i2c_regs.h:90
mxc_i2c_regs_t::hs_clk
__IO uint32_t hs_clk
Definition: i2c_regs.h:104
mxc_i2c_regs_t::ctrl0
__IO uint32_t ctrl0
Definition: i2c_regs.h:89
mxc_i2c_regs_t::clk_lo
__IO uint32_t clk_lo
Definition: i2c_regs.h:102
mxc_i2c_regs_t::rx_ctrl0
__IO uint32_t rx_ctrl0
Definition: i2c_regs.h:96
mxc_i2c_regs_t::dma
__IO uint32_t dma
Definition: i2c_regs.h:107
mxc_i2c_regs_t::slv_addr
__IO uint32_t slv_addr
Definition: i2c_regs.h:108
mxc_i2c_regs_t::int_fl1
__IO uint32_t int_fl1
Definition: i2c_regs.h:93
mxc_i2c_regs_t::rx_ctrl1
__IO uint32_t rx_ctrl1
Definition: i2c_regs.h:97
mxc_i2c_regs_t
Definition: i2c_regs.h:88
mxc_i2c_regs_t::int_en0
__IO uint32_t int_en0
Definition: i2c_regs.h:92
mxc_i2c_regs_t::int_en1
__IO uint32_t int_en1
Definition: i2c_regs.h:94
mxc_i2c_regs_t::fifo_len
__IO uint32_t fifo_len
Definition: i2c_regs.h:95
mxc_i2c_regs_t::tx_ctrl0
__IO uint32_t tx_ctrl0
Definition: i2c_regs.h:98