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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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50 #if defined (__ICCARM__)
51 #pragma system_include
54 #if defined (__CC_ARM)
65 #define __I volatile const
71 #define __R volatile const
91 __IO uint16_t data16[2];
92 __IO uint8_t data8[4];
99 __R uint32_t rsv_0x18;
115 #define MXC_R_SPI_DATA32 ((uint32_t)0x00000000UL)
116 #define MXC_R_SPI_DATA16 ((uint32_t)0x00000000UL)
117 #define MXC_R_SPI_DATA8 ((uint32_t)0x00000000UL)
118 #define MXC_R_SPI_CTRL0 ((uint32_t)0x00000004UL)
119 #define MXC_R_SPI_CTRL1 ((uint32_t)0x00000008UL)
120 #define MXC_R_SPI_CTRL2 ((uint32_t)0x0000000CUL)
121 #define MXC_R_SPI_SS_TIME ((uint32_t)0x00000010UL)
122 #define MXC_R_SPI_CLK_CFG ((uint32_t)0x00000014UL)
123 #define MXC_R_SPI_DMA ((uint32_t)0x0000001CUL)
124 #define MXC_R_SPI_INT_FL ((uint32_t)0x00000020UL)
125 #define MXC_R_SPI_INT_EN ((uint32_t)0x00000024UL)
126 #define MXC_R_SPI_WAKE_FL ((uint32_t)0x00000028UL)
127 #define MXC_R_SPI_WAKE_EN ((uint32_t)0x0000002CUL)
128 #define MXC_R_SPI_STAT ((uint32_t)0x00000030UL)
137 #define MXC_F_SPI_DATA32_QSPIFIFO_POS 0
138 #define MXC_F_SPI_DATA32_QSPIFIFO ((uint32_t)(0xFFFFFFFFUL << MXC_F_SPI_DATA32_QSPIFIFO_POS))
148 #define MXC_F_SPI_DATA16_QSPIFIFO_POS 0
149 #define MXC_F_SPI_DATA16_QSPIFIFO ((uint16_t)(0xFFFFUL << MXC_F_SPI_DATA16_QSPIFIFO_POS))
159 #define MXC_F_SPI_DATA8_QSPIFIFO_POS 0
160 #define MXC_F_SPI_DATA8_QSPIFIFO ((uint8_t)(0xFFUL << MXC_F_SPI_DATA8_QSPIFIFO_POS))
170 #define MXC_F_SPI_CTRL0_ENABLE_POS 0
171 #define MXC_F_SPI_CTRL0_ENABLE ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_ENABLE_POS))
173 #define MXC_F_SPI_CTRL0_MM_EN_POS 1
174 #define MXC_F_SPI_CTRL0_MM_EN ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_MM_EN_POS))
176 #define MXC_F_SPI_CTRL0_SS_IO_POS 4
177 #define MXC_F_SPI_CTRL0_SS_IO ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_SS_IO_POS))
179 #define MXC_F_SPI_CTRL0_START_POS 5
180 #define MXC_F_SPI_CTRL0_START ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_START_POS))
182 #define MXC_F_SPI_CTRL0_SS_CTRL_POS 8
183 #define MXC_F_SPI_CTRL0_SS_CTRL ((uint32_t)(0x1UL << MXC_F_SPI_CTRL0_SS_CTRL_POS))
185 #define MXC_F_SPI_CTRL0_SS_POS 16
186 #define MXC_F_SPI_CTRL0_SS ((uint32_t)(0x7UL << MXC_F_SPI_CTRL0_SS_POS))
187 #define MXC_V_SPI_CTRL0_SS_SS0 ((uint32_t)0x1UL)
188 #define MXC_S_SPI_CTRL0_SS_SS0 (MXC_V_SPI_CTRL0_SS_SS0 << MXC_F_SPI_CTRL0_SS_POS)
189 #define MXC_V_SPI_CTRL0_SS_SS1 ((uint32_t)0x2UL)
190 #define MXC_S_SPI_CTRL0_SS_SS1 (MXC_V_SPI_CTRL0_SS_SS1 << MXC_F_SPI_CTRL0_SS_POS)
191 #define MXC_V_SPI_CTRL0_SS_SS2 ((uint32_t)0x4UL)
192 #define MXC_S_SPI_CTRL0_SS_SS2 (MXC_V_SPI_CTRL0_SS_SS2 << MXC_F_SPI_CTRL0_SS_POS)
202 #define MXC_F_SPI_CTRL1_TX_NUM_CHAR_POS 0
203 #define MXC_F_SPI_CTRL1_TX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPI_CTRL1_TX_NUM_CHAR_POS))
205 #define MXC_F_SPI_CTRL1_RX_NUM_CHAR_POS 16
206 #define MXC_F_SPI_CTRL1_RX_NUM_CHAR ((uint32_t)(0xFFFFUL << MXC_F_SPI_CTRL1_RX_NUM_CHAR_POS))
216 #define MXC_F_SPI_CTRL2_PHASE_POS 0
217 #define MXC_F_SPI_CTRL2_PHASE ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_PHASE_POS))
219 #define MXC_F_SPI_CTRL2_CLKPOL_POS 1
220 #define MXC_F_SPI_CTRL2_CLKPOL ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_CLKPOL_POS))
222 #define MXC_F_SPI_CTRL2_SCLK_INV_POS 4
223 #define MXC_F_SPI_CTRL2_SCLK_INV ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_SCLK_INV_POS))
225 #define MXC_F_SPI_CTRL2_NUMBITS_POS 8
226 #define MXC_F_SPI_CTRL2_NUMBITS ((uint32_t)(0xFUL << MXC_F_SPI_CTRL2_NUMBITS_POS))
227 #define MXC_V_SPI_CTRL2_NUMBITS_0 ((uint32_t)0x0UL)
228 #define MXC_S_SPI_CTRL2_NUMBITS_0 (MXC_V_SPI_CTRL2_NUMBITS_0 << MXC_F_SPI_CTRL2_NUMBITS_POS)
230 #define MXC_F_SPI_CTRL2_DATA_WIDTH_POS 12
231 #define MXC_F_SPI_CTRL2_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS))
232 #define MXC_V_SPI_CTRL2_DATA_WIDTH_MONO ((uint32_t)0x0UL)
233 #define MXC_S_SPI_CTRL2_DATA_WIDTH_MONO (MXC_V_SPI_CTRL2_DATA_WIDTH_MONO << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)
234 #define MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL ((uint32_t)0x1UL)
235 #define MXC_S_SPI_CTRL2_DATA_WIDTH_DUAL (MXC_V_SPI_CTRL2_DATA_WIDTH_DUAL << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)
236 #define MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD ((uint32_t)0x2UL)
237 #define MXC_S_SPI_CTRL2_DATA_WIDTH_QUAD (MXC_V_SPI_CTRL2_DATA_WIDTH_QUAD << MXC_F_SPI_CTRL2_DATA_WIDTH_POS)
239 #define MXC_F_SPI_CTRL2_THREE_WIRE_POS 15
240 #define MXC_F_SPI_CTRL2_THREE_WIRE ((uint32_t)(0x1UL << MXC_F_SPI_CTRL2_THREE_WIRE_POS))
242 #define MXC_F_SPI_CTRL2_SS_POL_POS 16
243 #define MXC_F_SPI_CTRL2_SS_POL ((uint32_t)(0xFUL << MXC_F_SPI_CTRL2_SS_POL_POS))
244 #define MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH ((uint32_t)0x1UL)
245 #define MXC_S_SPI_CTRL2_SS_POL_SS0_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS0_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS)
246 #define MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH ((uint32_t)0x2UL)
247 #define MXC_S_SPI_CTRL2_SS_POL_SS1_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS1_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS)
248 #define MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH ((uint32_t)0x4UL)
249 #define MXC_S_SPI_CTRL2_SS_POL_SS2_HIGH (MXC_V_SPI_CTRL2_SS_POL_SS2_HIGH << MXC_F_SPI_CTRL2_SS_POL_POS)
251 #define MXC_F_SPI_CTRL2_SRPOL_POS 24
252 #define MXC_F_SPI_CTRL2_SRPOL ((uint32_t)(0xFFUL << MXC_F_SPI_CTRL2_SRPOL_POS))
253 #define MXC_V_SPI_CTRL2_SRPOL_SR0_HIGH ((uint32_t)0x1UL)
254 #define MXC_S_SPI_CTRL2_SRPOL_SR0_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR0_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
255 #define MXC_V_SPI_CTRL2_SRPOL_SR1_HIGH ((uint32_t)0x2UL)
256 #define MXC_S_SPI_CTRL2_SRPOL_SR1_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR1_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
257 #define MXC_V_SPI_CTRL2_SRPOL_SR2_HIGH ((uint32_t)0x4UL)
258 #define MXC_S_SPI_CTRL2_SRPOL_SR2_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR2_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
259 #define MXC_V_SPI_CTRL2_SRPOL_SR3_HIGH ((uint32_t)0x8UL)
260 #define MXC_S_SPI_CTRL2_SRPOL_SR3_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR3_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
261 #define MXC_V_SPI_CTRL2_SRPOL_SR4_HIGH ((uint32_t)0x10UL)
262 #define MXC_S_SPI_CTRL2_SRPOL_SR4_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR4_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
263 #define MXC_V_SPI_CTRL2_SRPOL_SR5_HIGH ((uint32_t)0x20UL)
264 #define MXC_S_SPI_CTRL2_SRPOL_SR5_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR5_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
265 #define MXC_V_SPI_CTRL2_SRPOL_SR6_HIGH ((uint32_t)0x40UL)
266 #define MXC_S_SPI_CTRL2_SRPOL_SR6_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR6_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
267 #define MXC_V_SPI_CTRL2_SRPOL_SR7_HIGH ((uint32_t)0x80UL)
268 #define MXC_S_SPI_CTRL2_SRPOL_SR7_HIGH (MXC_V_SPI_CTRL2_SRPOL_SR7_HIGH << MXC_F_SPI_CTRL2_SRPOL_POS)
278 #define MXC_F_SPI_SS_TIME_PRE_POS 0
279 #define MXC_F_SPI_SS_TIME_PRE ((uint32_t)(0xFFUL << MXC_F_SPI_SS_TIME_PRE_POS))
280 #define MXC_V_SPI_SS_TIME_PRE_256 ((uint32_t)0x0UL)
281 #define MXC_S_SPI_SS_TIME_PRE_256 (MXC_V_SPI_SS_TIME_PRE_256 << MXC_F_SPI_SS_TIME_PRE_POS)
283 #define MXC_F_SPI_SS_TIME_POST_POS 8
284 #define MXC_F_SPI_SS_TIME_POST ((uint32_t)(0xFFUL << MXC_F_SPI_SS_TIME_POST_POS))
285 #define MXC_V_SPI_SS_TIME_POST_256 ((uint32_t)0x0UL)
286 #define MXC_S_SPI_SS_TIME_POST_256 (MXC_V_SPI_SS_TIME_POST_256 << MXC_F_SPI_SS_TIME_POST_POS)
288 #define MXC_F_SPI_SS_TIME_INACT_POS 16
289 #define MXC_F_SPI_SS_TIME_INACT ((uint32_t)(0xFFUL << MXC_F_SPI_SS_TIME_INACT_POS))
290 #define MXC_V_SPI_SS_TIME_INACT_256 ((uint32_t)0x0UL)
291 #define MXC_S_SPI_SS_TIME_INACT_256 (MXC_V_SPI_SS_TIME_INACT_256 << MXC_F_SPI_SS_TIME_INACT_POS)
301 #define MXC_F_SPI_CLK_CFG_LO_POS 0
302 #define MXC_F_SPI_CLK_CFG_LO ((uint32_t)(0xFFUL << MXC_F_SPI_CLK_CFG_LO_POS))
303 #define MXC_V_SPI_CLK_CFG_LO_DIS ((uint32_t)0x0UL)
304 #define MXC_S_SPI_CLK_CFG_LO_DIS (MXC_V_SPI_CLK_CFG_LO_DIS << MXC_F_SPI_CLK_CFG_LO_POS)
306 #define MXC_F_SPI_CLK_CFG_HI_POS 8
307 #define MXC_F_SPI_CLK_CFG_HI ((uint32_t)(0xFFUL << MXC_F_SPI_CLK_CFG_HI_POS))
308 #define MXC_V_SPI_CLK_CFG_HI_DIS ((uint32_t)0x0UL)
309 #define MXC_S_SPI_CLK_CFG_HI_DIS (MXC_V_SPI_CLK_CFG_HI_DIS << MXC_F_SPI_CLK_CFG_HI_POS)
311 #define MXC_F_SPI_CLK_CFG_SCALE_POS 16
312 #define MXC_F_SPI_CLK_CFG_SCALE ((uint32_t)(0xFUL << MXC_F_SPI_CLK_CFG_SCALE_POS))
322 #define MXC_F_SPI_DMA_TX_FIFO_LEVEL_POS 0
323 #define MXC_F_SPI_DMA_TX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPI_DMA_TX_FIFO_LEVEL_POS))
325 #define MXC_F_SPI_DMA_TX_FIFO_EN_POS 6
326 #define MXC_F_SPI_DMA_TX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPI_DMA_TX_FIFO_EN_POS))
328 #define MXC_F_SPI_DMA_TX_FIFO_CLEAR_POS 7
329 #define MXC_F_SPI_DMA_TX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPI_DMA_TX_FIFO_CLEAR_POS))
331 #define MXC_F_SPI_DMA_TX_FIFO_CNT_POS 8
332 #define MXC_F_SPI_DMA_TX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPI_DMA_TX_FIFO_CNT_POS))
334 #define MXC_F_SPI_DMA_TX_DMA_EN_POS 15
335 #define MXC_F_SPI_DMA_TX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPI_DMA_TX_DMA_EN_POS))
337 #define MXC_F_SPI_DMA_RX_FIFO_LEVEL_POS 16
338 #define MXC_F_SPI_DMA_RX_FIFO_LEVEL ((uint32_t)(0x1FUL << MXC_F_SPI_DMA_RX_FIFO_LEVEL_POS))
340 #define MXC_F_SPI_DMA_RX_FIFO_EN_POS 22
341 #define MXC_F_SPI_DMA_RX_FIFO_EN ((uint32_t)(0x1UL << MXC_F_SPI_DMA_RX_FIFO_EN_POS))
343 #define MXC_F_SPI_DMA_RX_FIFO_CLEAR_POS 23
344 #define MXC_F_SPI_DMA_RX_FIFO_CLEAR ((uint32_t)(0x1UL << MXC_F_SPI_DMA_RX_FIFO_CLEAR_POS))
346 #define MXC_F_SPI_DMA_RX_FIFO_CNT_POS 24
347 #define MXC_F_SPI_DMA_RX_FIFO_CNT ((uint32_t)(0x3FUL << MXC_F_SPI_DMA_RX_FIFO_CNT_POS))
349 #define MXC_F_SPI_DMA_RX_DMA_EN_POS 31
350 #define MXC_F_SPI_DMA_RX_DMA_EN ((uint32_t)(0x1UL << MXC_F_SPI_DMA_RX_DMA_EN_POS))
361 #define MXC_F_SPI_INT_FL_TX_THRESH_POS 0
362 #define MXC_F_SPI_INT_FL_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_TX_THRESH_POS))
364 #define MXC_F_SPI_INT_FL_TX_EMPTY_POS 1
365 #define MXC_F_SPI_INT_FL_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_TX_EMPTY_POS))
367 #define MXC_F_SPI_INT_FL_RX_THRESH_POS 2
368 #define MXC_F_SPI_INT_FL_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_RX_THRESH_POS))
370 #define MXC_F_SPI_INT_FL_RX_FULL_POS 3
371 #define MXC_F_SPI_INT_FL_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_RX_FULL_POS))
373 #define MXC_F_SPI_INT_FL_SSA_POS 4
374 #define MXC_F_SPI_INT_FL_SSA ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_SSA_POS))
376 #define MXC_F_SPI_INT_FL_SSD_POS 5
377 #define MXC_F_SPI_INT_FL_SSD ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_SSD_POS))
379 #define MXC_F_SPI_INT_FL_FAULT_POS 8
380 #define MXC_F_SPI_INT_FL_FAULT ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_FAULT_POS))
382 #define MXC_F_SPI_INT_FL_ABORT_POS 9
383 #define MXC_F_SPI_INT_FL_ABORT ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_ABORT_POS))
385 #define MXC_F_SPI_INT_FL_M_DONE_POS 11
386 #define MXC_F_SPI_INT_FL_M_DONE ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_M_DONE_POS))
388 #define MXC_F_SPI_INT_FL_TX_OVR_POS 12
389 #define MXC_F_SPI_INT_FL_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_TX_OVR_POS))
391 #define MXC_F_SPI_INT_FL_TX_UND_POS 13
392 #define MXC_F_SPI_INT_FL_TX_UND ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_TX_UND_POS))
394 #define MXC_F_SPI_INT_FL_RX_OVR_POS 14
395 #define MXC_F_SPI_INT_FL_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_RX_OVR_POS))
397 #define MXC_F_SPI_INT_FL_RX_UND_POS 15
398 #define MXC_F_SPI_INT_FL_RX_UND ((uint32_t)(0x1UL << MXC_F_SPI_INT_FL_RX_UND_POS))
408 #define MXC_F_SPI_INT_EN_TX_THRESH_POS 0
409 #define MXC_F_SPI_INT_EN_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_TX_THRESH_POS))
411 #define MXC_F_SPI_INT_EN_TX_EMPTY_POS 1
412 #define MXC_F_SPI_INT_EN_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_TX_EMPTY_POS))
414 #define MXC_F_SPI_INT_EN_RX_THRESH_POS 2
415 #define MXC_F_SPI_INT_EN_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_RX_THRESH_POS))
417 #define MXC_F_SPI_INT_EN_RX_FULL_POS 3
418 #define MXC_F_SPI_INT_EN_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_RX_FULL_POS))
420 #define MXC_F_SPI_INT_EN_SSA_POS 4
421 #define MXC_F_SPI_INT_EN_SSA ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_SSA_POS))
423 #define MXC_F_SPI_INT_EN_SSD_POS 5
424 #define MXC_F_SPI_INT_EN_SSD ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_SSD_POS))
426 #define MXC_F_SPI_INT_EN_FAULT_POS 8
427 #define MXC_F_SPI_INT_EN_FAULT ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_FAULT_POS))
429 #define MXC_F_SPI_INT_EN_ABORT_POS 9
430 #define MXC_F_SPI_INT_EN_ABORT ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_ABORT_POS))
432 #define MXC_F_SPI_INT_EN_M_DONE_POS 11
433 #define MXC_F_SPI_INT_EN_M_DONE ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_M_DONE_POS))
435 #define MXC_F_SPI_INT_EN_TX_OVR_POS 12
436 #define MXC_F_SPI_INT_EN_TX_OVR ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_TX_OVR_POS))
438 #define MXC_F_SPI_INT_EN_TX_UND_POS 13
439 #define MXC_F_SPI_INT_EN_TX_UND ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_TX_UND_POS))
441 #define MXC_F_SPI_INT_EN_RX_OVR_POS 14
442 #define MXC_F_SPI_INT_EN_RX_OVR ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_RX_OVR_POS))
444 #define MXC_F_SPI_INT_EN_RX_UND_POS 15
445 #define MXC_F_SPI_INT_EN_RX_UND ((uint32_t)(0x1UL << MXC_F_SPI_INT_EN_RX_UND_POS))
455 #define MXC_F_SPI_WAKE_FL_TX_THRESH_POS 0
456 #define MXC_F_SPI_WAKE_FL_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_FL_TX_THRESH_POS))
458 #define MXC_F_SPI_WAKE_FL_TX_EMPTY_POS 1
459 #define MXC_F_SPI_WAKE_FL_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_FL_TX_EMPTY_POS))
461 #define MXC_F_SPI_WAKE_FL_RX_THRESH_POS 2
462 #define MXC_F_SPI_WAKE_FL_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_FL_RX_THRESH_POS))
464 #define MXC_F_SPI_WAKE_FL_RX_FULL_POS 3
465 #define MXC_F_SPI_WAKE_FL_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_FL_RX_FULL_POS))
475 #define MXC_F_SPI_WAKE_EN_TX_THRESH_POS 0
476 #define MXC_F_SPI_WAKE_EN_TX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_EN_TX_THRESH_POS))
478 #define MXC_F_SPI_WAKE_EN_TX_EMPTY_POS 1
479 #define MXC_F_SPI_WAKE_EN_TX_EMPTY ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_EN_TX_EMPTY_POS))
481 #define MXC_F_SPI_WAKE_EN_RX_THRESH_POS 2
482 #define MXC_F_SPI_WAKE_EN_RX_THRESH ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_EN_RX_THRESH_POS))
484 #define MXC_F_SPI_WAKE_EN_RX_FULL_POS 3
485 #define MXC_F_SPI_WAKE_EN_RX_FULL ((uint32_t)(0x1UL << MXC_F_SPI_WAKE_EN_RX_FULL_POS))
495 #define MXC_F_SPI_STAT_BUSY_POS 0
496 #define MXC_F_SPI_STAT_BUSY ((uint32_t)(0x1UL << MXC_F_SPI_STAT_BUSY_POS))
Definition: spi_regs.h:88
__IO uint32_t wake_fl
Definition: spi_regs.h:103
__IO uint32_t data32
Definition: spi_regs.h:90
__IO uint32_t ctrl1
Definition: spi_regs.h:95
__IO uint32_t int_en
Definition: spi_regs.h:102
__IO uint32_t ctrl2
Definition: spi_regs.h:96
__IO uint32_t wake_en
Definition: spi_regs.h:104
__IO uint32_t ctrl0
Definition: spi_regs.h:94
__I uint32_t stat
Definition: spi_regs.h:105
__IO uint32_t int_fl
Definition: spi_regs.h:101
__IO uint32_t clk_cfg
Definition: spi_regs.h:98
__IO uint32_t ss_time
Definition: spi_regs.h:97
__IO uint32_t dma
Definition: spi_regs.h:100