MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
GCR_CLK_CTRL

Macros

#define MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS   6
 
#define MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE   ((uint32_t)(0x7UL << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS))
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1   ((uint32_t)0x0UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2   ((uint32_t)0x1UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4   ((uint32_t)0x2UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8   ((uint32_t)0x3UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16   ((uint32_t)0x4UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32   ((uint32_t)0x5UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64   ((uint32_t)0x6UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128   ((uint32_t)0x7UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)
 
#define MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS   9
 
#define MXC_F_GCR_CLK_CTRL_SYSOSC_SEL   ((uint32_t)(0x7UL << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS))
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC   ((uint32_t)0x0UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M   ((uint32_t)0x2UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8   ((uint32_t)0x3UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96   ((uint32_t)0x4UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8   ((uint32_t)0x5UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K   ((uint32_t)0x6UL)
 
#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)
 
#define MXC_F_GCR_CLK_CTRL_SYSOSC_RDY_POS   13
 
#define MXC_F_GCR_CLK_CTRL_SYSOSC_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_SYSOSC_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_CCD_POS   15
 
#define MXC_F_GCR_CLK_CTRL_CCD   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_CCD_POS))
 
#define MXC_F_GCR_CLK_CTRL_X32M_EN_POS   16
 
#define MXC_F_GCR_CLK_CTRL_X32M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32M_EN_POS))
 
#define MXC_F_GCR_CLK_CTRL_X32K_EN_POS   17
 
#define MXC_F_GCR_CLK_CTRL_X32K_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32K_EN_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRC60M_EN_POS   18
 
#define MXC_F_GCR_CLK_CTRL_HIRC60M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC60M_EN_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRCMM_EN_POS   19
 
#define MXC_F_GCR_CLK_CTRL_HIRCMM_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRCMM_EN_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_EN_POS   20
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_EN_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_VS_POS   21
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_VS   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_VS_POS))
 
#define MXC_F_GCR_CLK_CTRL_X32M_RDY_POS   24
 
#define MXC_F_GCR_CLK_CTRL_X32M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32M_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_X32K_RDY_POS   25
 
#define MXC_F_GCR_CLK_CTRL_X32K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32K_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRC60M_RDY_POS   26
 
#define MXC_F_GCR_CLK_CTRL_HIRC60M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC60M_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRCMM_RDY_POS   27
 
#define MXC_F_GCR_CLK_CTRL_HIRCMM_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRCMM_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_RDY_POS   28
 
#define MXC_F_GCR_CLK_CTRL_HIRC8M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_LIRC8K_RDY_POS   29
 
#define MXC_F_GCR_CLK_CTRL_LIRC8K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_LIRC8K_RDY_POS))
 
#define MXC_F_GCR_CLK_CTRL_LIRC6K_RDY_POS   30
 
#define MXC_F_GCR_CLK_CTRL_LIRC6K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_LIRC6K_RDY_POS))
 

Detailed Description

Clock Control.

Macro Definition Documentation

◆ MXC_F_GCR_CLK_CTRL_CCD

#define MXC_F_GCR_CLK_CTRL_CCD   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_CCD_POS))

CLK_CTRL_CCD Mask

◆ MXC_F_GCR_CLK_CTRL_CCD_POS

#define MXC_F_GCR_CLK_CTRL_CCD_POS   15

CLK_CTRL_CCD Position

◆ MXC_F_GCR_CLK_CTRL_HIRC60M_EN

#define MXC_F_GCR_CLK_CTRL_HIRC60M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC60M_EN_POS))

CLK_CTRL_HIRC60M_EN Mask

◆ MXC_F_GCR_CLK_CTRL_HIRC60M_EN_POS

#define MXC_F_GCR_CLK_CTRL_HIRC60M_EN_POS   18

CLK_CTRL_HIRC60M_EN Position

◆ MXC_F_GCR_CLK_CTRL_HIRC60M_RDY

#define MXC_F_GCR_CLK_CTRL_HIRC60M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC60M_RDY_POS))

CLK_CTRL_HIRC60M_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_HIRC60M_RDY_POS

#define MXC_F_GCR_CLK_CTRL_HIRC60M_RDY_POS   26

CLK_CTRL_HIRC60M_RDY Position

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_EN

#define MXC_F_GCR_CLK_CTRL_HIRC8M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_EN_POS))

CLK_CTRL_HIRC8M_EN Mask

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_EN_POS

#define MXC_F_GCR_CLK_CTRL_HIRC8M_EN_POS   20

CLK_CTRL_HIRC8M_EN Position

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_RDY

#define MXC_F_GCR_CLK_CTRL_HIRC8M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_RDY_POS))

CLK_CTRL_HIRC8M_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_RDY_POS

#define MXC_F_GCR_CLK_CTRL_HIRC8M_RDY_POS   28

CLK_CTRL_HIRC8M_RDY Position

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_VS

#define MXC_F_GCR_CLK_CTRL_HIRC8M_VS   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRC8M_VS_POS))

CLK_CTRL_HIRC8M_VS Mask

◆ MXC_F_GCR_CLK_CTRL_HIRC8M_VS_POS

#define MXC_F_GCR_CLK_CTRL_HIRC8M_VS_POS   21

CLK_CTRL_HIRC8M_VS Position

◆ MXC_F_GCR_CLK_CTRL_HIRCMM_EN

#define MXC_F_GCR_CLK_CTRL_HIRCMM_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRCMM_EN_POS))

CLK_CTRL_HIRCMM_EN Mask

◆ MXC_F_GCR_CLK_CTRL_HIRCMM_EN_POS

#define MXC_F_GCR_CLK_CTRL_HIRCMM_EN_POS   19

CLK_CTRL_HIRCMM_EN Position

◆ MXC_F_GCR_CLK_CTRL_HIRCMM_RDY

#define MXC_F_GCR_CLK_CTRL_HIRCMM_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_HIRCMM_RDY_POS))

CLK_CTRL_HIRCMM_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_HIRCMM_RDY_POS

#define MXC_F_GCR_CLK_CTRL_HIRCMM_RDY_POS   27

CLK_CTRL_HIRCMM_RDY Position

◆ MXC_F_GCR_CLK_CTRL_LIRC6K_RDY

#define MXC_F_GCR_CLK_CTRL_LIRC6K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_LIRC6K_RDY_POS))

CLK_CTRL_LIRC6K_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_LIRC6K_RDY_POS

#define MXC_F_GCR_CLK_CTRL_LIRC6K_RDY_POS   30

CLK_CTRL_LIRC6K_RDY Position

◆ MXC_F_GCR_CLK_CTRL_LIRC8K_RDY

#define MXC_F_GCR_CLK_CTRL_LIRC8K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_LIRC8K_RDY_POS))

CLK_CTRL_LIRC8K_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_LIRC8K_RDY_POS

#define MXC_F_GCR_CLK_CTRL_LIRC8K_RDY_POS   29

CLK_CTRL_LIRC8K_RDY Position

◆ MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE

#define MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE   ((uint32_t)(0x7UL << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS))

CLK_CTRL_SYSCLK_PRESCALE Mask

◆ MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS

#define MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS   6

CLK_CTRL_SYSCLK_PRESCALE Position

◆ MXC_F_GCR_CLK_CTRL_SYSOSC_RDY

#define MXC_F_GCR_CLK_CTRL_SYSOSC_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_SYSOSC_RDY_POS))

CLK_CTRL_SYSOSC_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_SYSOSC_RDY_POS

#define MXC_F_GCR_CLK_CTRL_SYSOSC_RDY_POS   13

CLK_CTRL_SYSOSC_RDY Position

◆ MXC_F_GCR_CLK_CTRL_SYSOSC_SEL

#define MXC_F_GCR_CLK_CTRL_SYSOSC_SEL   ((uint32_t)(0x7UL << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS))

CLK_CTRL_SYSOSC_SEL Mask

◆ MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS

#define MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS   9

CLK_CTRL_SYSOSC_SEL Position

◆ MXC_F_GCR_CLK_CTRL_X32K_EN

#define MXC_F_GCR_CLK_CTRL_X32K_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32K_EN_POS))

CLK_CTRL_X32K_EN Mask

◆ MXC_F_GCR_CLK_CTRL_X32K_EN_POS

#define MXC_F_GCR_CLK_CTRL_X32K_EN_POS   17

CLK_CTRL_X32K_EN Position

◆ MXC_F_GCR_CLK_CTRL_X32K_RDY

#define MXC_F_GCR_CLK_CTRL_X32K_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32K_RDY_POS))

CLK_CTRL_X32K_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_X32K_RDY_POS

#define MXC_F_GCR_CLK_CTRL_X32K_RDY_POS   25

CLK_CTRL_X32K_RDY Position

◆ MXC_F_GCR_CLK_CTRL_X32M_EN

#define MXC_F_GCR_CLK_CTRL_X32M_EN   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32M_EN_POS))

CLK_CTRL_X32M_EN Mask

◆ MXC_F_GCR_CLK_CTRL_X32M_EN_POS

#define MXC_F_GCR_CLK_CTRL_X32M_EN_POS   16

CLK_CTRL_X32M_EN Position

◆ MXC_F_GCR_CLK_CTRL_X32M_RDY

#define MXC_F_GCR_CLK_CTRL_X32M_RDY   ((uint32_t)(0x1UL << MXC_F_GCR_CLK_CTRL_X32M_RDY_POS))

CLK_CTRL_X32M_RDY Mask

◆ MXC_F_GCR_CLK_CTRL_X32M_RDY_POS

#define MXC_F_GCR_CLK_CTRL_X32M_RDY_POS   24

CLK_CTRL_X32M_RDY Position

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV1 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV128 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV16 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV2 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV32 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV4 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV64 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8

#define MXC_S_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8   (MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8 << MXC_F_GCR_CLK_CTRL_SYSCLK_PRESCALE_POS)

CLK_CTRL_SYSCLK_PRESCALE_DIV8 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_HIRC Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_HIRC8 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_HIRC96 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8 << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_LIRC8 Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_XTAL32K Setting

◆ MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M

#define MXC_S_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M   (MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M << MXC_F_GCR_CLK_CTRL_SYSOSC_SEL_POS)

CLK_CTRL_SYSOSC_SEL_XTAL32M Setting

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV1   ((uint32_t)0x0UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV1 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV128   ((uint32_t)0x7UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV128 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV16   ((uint32_t)0x4UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV16 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV2   ((uint32_t)0x1UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV2 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV32   ((uint32_t)0x5UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV32 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV4   ((uint32_t)0x2UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV4 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV64   ((uint32_t)0x6UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV64 Value

◆ MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8

#define MXC_V_GCR_CLK_CTRL_SYSCLK_PRESCALE_DIV8   ((uint32_t)0x3UL)

CLK_CTRL_SYSCLK_PRESCALE_DIV8 Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC   ((uint32_t)0x0UL)

CLK_CTRL_SYSOSC_SEL_HIRC Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC8   ((uint32_t)0x5UL)

CLK_CTRL_SYSOSC_SEL_HIRC8 Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_HIRC96   ((uint32_t)0x4UL)

CLK_CTRL_SYSOSC_SEL_HIRC96 Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_LIRC8   ((uint32_t)0x3UL)

CLK_CTRL_SYSOSC_SEL_LIRC8 Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32K   ((uint32_t)0x6UL)

CLK_CTRL_SYSOSC_SEL_XTAL32K Value

◆ MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M

#define MXC_V_GCR_CLK_CTRL_SYSOSC_SEL_XTAL32M   ((uint32_t)0x2UL)

CLK_CTRL_SYSOSC_SEL_XTAL32M Value