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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Force Event for Error Interrupt Status.
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS)) |
FORCE_EVENT_INT_STAT_ADMA Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS 9 |
FORCE_EVENT_INT_STAT_ADMA Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS)) |
FORCE_EVENT_INT_STAT_AUTO_CMD Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS 8 |
FORCE_EVENT_INT_STAT_AUTO_CMD Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS)) |
FORCE_EVENT_INT_STAT_CMD_CRC Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS 1 |
FORCE_EVENT_INT_STAT_CMD_CRC Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS)) |
FORCE_EVENT_INT_STAT_CMD_END_BIT Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS 2 |
FORCE_EVENT_INT_STAT_CMD_END_BIT Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS)) |
FORCE_EVENT_INT_STAT_CMD_INDEX Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS 3 |
FORCE_EVENT_INT_STAT_CMD_INDEX Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS)) |
FORCE_EVENT_INT_STAT_CMD_TO Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS 0 |
FORCE_EVENT_INT_STAT_CMD_TO Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS)) |
FORCE_EVENT_INT_STAT_CURR_LIMIT Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS 7 |
FORCE_EVENT_INT_STAT_CURR_LIMIT Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS)) |
FORCE_EVENT_INT_STAT_DATA_CRC Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS 5 |
FORCE_EVENT_INT_STAT_DATA_CRC Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS)) |
FORCE_EVENT_INT_STAT_DATA_END_BIT Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS 6 |
FORCE_EVENT_INT_STAT_DATA_END_BIT Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS)) |
FORCE_EVENT_INT_STAT_DATA_TO Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS 4 |
FORCE_EVENT_INT_STAT_DATA_TO Position
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR ((uint16_t)(0x7UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS)) |
FORCE_EVENT_INT_STAT_VENDOR Mask
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS 12 |
FORCE_EVENT_INT_STAT_VENDOR Position