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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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50 #if defined (__ICCARM__)
51 #pragma system_include
54 #if defined (__CC_ARM)
65 #define __I volatile const
71 #define __R volatile const
105 #define MXC_R_RTC_SEC ((uint32_t)0x00000000UL)
106 #define MXC_R_RTC_SSEC ((uint32_t)0x00000004UL)
107 #define MXC_R_RTC_TODA ((uint32_t)0x00000008UL)
108 #define MXC_R_RTC_SSECA ((uint32_t)0x0000000CUL)
109 #define MXC_R_RTC_CTRL ((uint32_t)0x00000010UL)
110 #define MXC_R_RTC_TRIM ((uint32_t)0x00000014UL)
111 #define MXC_R_RTC_OSCCTRL ((uint32_t)0x00000018UL)
121 #define MXC_F_RTC_SSEC_SSEC_POS 0
122 #define MXC_F_RTC_SSEC_SSEC ((uint32_t)(0xFFUL << MXC_F_RTC_SSEC_SSEC_POS))
132 #define MXC_F_RTC_TODA_TOD_ALARM_POS 0
133 #define MXC_F_RTC_TODA_TOD_ALARM ((uint32_t)(0xFFFFFUL << MXC_F_RTC_TODA_TOD_ALARM_POS))
144 #define MXC_F_RTC_SSECA_SSEC_ALARM_POS 0
145 #define MXC_F_RTC_SSECA_SSEC_ALARM ((uint32_t)(0xFFFFFFFFUL << MXC_F_RTC_SSECA_SSEC_ALARM_POS))
155 #define MXC_F_RTC_CTRL_ENABLE_POS 0
156 #define MXC_F_RTC_CTRL_ENABLE ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_ENABLE_POS))
158 #define MXC_F_RTC_CTRL_TOD_ALARM_EN_POS 1
159 #define MXC_F_RTC_CTRL_TOD_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_EN_POS))
161 #define MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS 2
162 #define MXC_F_RTC_CTRL_SSEC_ALARM_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_EN_POS))
164 #define MXC_F_RTC_CTRL_BUSY_POS 3
165 #define MXC_F_RTC_CTRL_BUSY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_BUSY_POS))
167 #define MXC_F_RTC_CTRL_READY_POS 4
168 #define MXC_F_RTC_CTRL_READY ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_POS))
170 #define MXC_F_RTC_CTRL_READY_INT_EN_POS 5
171 #define MXC_F_RTC_CTRL_READY_INT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_READY_INT_EN_POS))
173 #define MXC_F_RTC_CTRL_TOD_ALARM_FL_POS 6
174 #define MXC_F_RTC_CTRL_TOD_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_TOD_ALARM_FL_POS))
176 #define MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS 7
177 #define MXC_F_RTC_CTRL_SSEC_ALARM_FL ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SSEC_ALARM_FL_POS))
179 #define MXC_F_RTC_CTRL_SQWOUT_EN_POS 8
180 #define MXC_F_RTC_CTRL_SQWOUT_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_SQWOUT_EN_POS))
182 #define MXC_F_RTC_CTRL_FREQ_SEL_POS 9
183 #define MXC_F_RTC_CTRL_FREQ_SEL ((uint32_t)(0x3UL << MXC_F_RTC_CTRL_FREQ_SEL_POS))
184 #define MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ ((uint32_t)0x0UL)
185 #define MXC_S_RTC_CTRL_FREQ_SEL_FREQ1HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ1HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
186 #define MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ ((uint32_t)0x1UL)
187 #define MXC_S_RTC_CTRL_FREQ_SEL_FREQ512HZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ512HZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
188 #define MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ ((uint32_t)0x2UL)
189 #define MXC_S_RTC_CTRL_FREQ_SEL_FREQ4KHZ (MXC_V_RTC_CTRL_FREQ_SEL_FREQ4KHZ << MXC_F_RTC_CTRL_FREQ_SEL_POS)
190 #define MXC_V_RTC_CTRL_FREQ_SEL_CLKDIV8 ((uint32_t)0x3UL)
191 #define MXC_S_RTC_CTRL_FREQ_SEL_CLKDIV8 (MXC_V_RTC_CTRL_FREQ_SEL_CLKDIV8 << MXC_F_RTC_CTRL_FREQ_SEL_POS)
193 #define MXC_F_RTC_CTRL_WRITE_EN_POS 15
194 #define MXC_F_RTC_CTRL_WRITE_EN ((uint32_t)(0x1UL << MXC_F_RTC_CTRL_WRITE_EN_POS))
204 #define MXC_F_RTC_TRIM_TRIM_POS 0
205 #define MXC_F_RTC_TRIM_TRIM ((uint32_t)(0xFFUL << MXC_F_RTC_TRIM_TRIM_POS))
207 #define MXC_F_RTC_TRIM_VRTC_TMR_POS 8
208 #define MXC_F_RTC_TRIM_VRTC_TMR ((uint32_t)(0xFFFFFFUL << MXC_F_RTC_TRIM_VRTC_TMR_POS))
218 #define MXC_F_RTC_OSCCTRL_BYPASS_POS 4
219 #define MXC_F_RTC_OSCCTRL_BYPASS ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_BYPASS_POS))
221 #define MXC_F_RTC_OSCCTRL_OUT32K_POS 5
222 #define MXC_F_RTC_OSCCTRL_OUT32K ((uint32_t)(0x1UL << MXC_F_RTC_OSCCTRL_OUT32K_POS))
__IO uint32_t sec
Definition: rtc_regs.h:89
__IO uint32_t ssec
Definition: rtc_regs.h:90
Definition: rtc_regs.h:88
__IO uint32_t oscctrl
Definition: rtc_regs.h:95
__IO uint32_t sseca
Definition: rtc_regs.h:92
__IO uint32_t toda
Definition: rtc_regs.h:91
__IO uint32_t ctrl
Definition: rtc_regs.h:93
__IO uint32_t trim
Definition: rtc_regs.h:94