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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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USBHS Protection Register.
#define MXC_F_RPU_USBHS_CRYPTOACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_CRYPTOACNR_POS)) |
USBHS_CRYPTOACNR Mask
#define MXC_F_RPU_USBHS_CRYPTOACNR_POS 14 |
USBHS_CRYPTOACNR Position
#define MXC_F_RPU_USBHS_CRYPTOACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_CRYPTOACNW_POS)) |
USBHS_CRYPTOACNW Mask
#define MXC_F_RPU_USBHS_CRYPTOACNW_POS 15 |
USBHS_CRYPTOACNW Position
#define MXC_F_RPU_USBHS_DMA0ACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_DMA0ACNR_POS)) |
USBHS_DMA0ACNR Mask
#define MXC_F_RPU_USBHS_DMA0ACNR_POS 0 |
USBHS_DMA0ACNR Position
#define MXC_F_RPU_USBHS_DMA0ACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_DMA0ACNW_POS)) |
USBHS_DMA0ACNW Mask
#define MXC_F_RPU_USBHS_DMA0ACNW_POS 1 |
USBHS_DMA0ACNW Position
#define MXC_F_RPU_USBHS_DMA1ACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_DMA1ACNR_POS)) |
USBHS_DMA1ACNR Mask
#define MXC_F_RPU_USBHS_DMA1ACNR_POS 2 |
USBHS_DMA1ACNR Position
#define MXC_F_RPU_USBHS_DMA1ACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_DMA1ACNW_POS)) |
USBHS_DMA1ACNW Mask
#define MXC_F_RPU_USBHS_DMA1ACNW_POS 3 |
USBHS_DMA1ACNW Position
#define MXC_F_RPU_USBHS_SDIOACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDIOACNR_POS)) |
USBHS_SDIOACNR Mask
#define MXC_F_RPU_USBHS_SDIOACNR_POS 16 |
USBHS_SDIOACNR Position
#define MXC_F_RPU_USBHS_SDIOACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDIOACNW_POS)) |
USBHS_SDIOACNW Mask
#define MXC_F_RPU_USBHS_SDIOACNW_POS 17 |
USBHS_SDIOACNW Position
#define MXC_F_RPU_USBHS_SDMADACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDMADACNR_POS)) |
USBHS_SDMADACNR Mask
#define MXC_F_RPU_USBHS_SDMADACNR_POS 10 |
USBHS_SDMADACNR Position
#define MXC_F_RPU_USBHS_SDMADACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDMADACNW_POS)) |
USBHS_SDMADACNW Mask
#define MXC_F_RPU_USBHS_SDMADACNW_POS 11 |
USBHS_SDMADACNW Position
#define MXC_F_RPU_USBHS_SDMAIACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDMAIACNR_POS)) |
USBHS_SDMAIACNR Mask
#define MXC_F_RPU_USBHS_SDMAIACNR_POS 12 |
USBHS_SDMAIACNR Position
#define MXC_F_RPU_USBHS_SDMAIACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SDMAIACNW_POS)) |
USBHS_SDMAIACNW Mask
#define MXC_F_RPU_USBHS_SDMAIACNW_POS 13 |
USBHS_SDMAIACNW Position
#define MXC_F_RPU_USBHS_SYS0ACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SYS0ACNR_POS)) |
USBHS_SYS0ACNR Mask
#define MXC_F_RPU_USBHS_SYS0ACNR_POS 6 |
USBHS_SYS0ACNR Position
#define MXC_F_RPU_USBHS_SYS0ACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SYS0ACNW_POS)) |
USBHS_SYS0ACNW Mask
#define MXC_F_RPU_USBHS_SYS0ACNW_POS 7 |
USBHS_SYS0ACNW Position
#define MXC_F_RPU_USBHS_SYS1ACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SYS1ACNR_POS)) |
USBHS_SYS1ACNR Mask
#define MXC_F_RPU_USBHS_SYS1ACNR_POS 8 |
USBHS_SYS1ACNR Position
#define MXC_F_RPU_USBHS_SYS1ACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_SYS1ACNW_POS)) |
USBHS_SYS1ACNW Mask
#define MXC_F_RPU_USBHS_SYS1ACNW_POS 9 |
USBHS_SYS1ACNW Position
#define MXC_F_RPU_USBHS_USBACNR ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_USBACNR_POS)) |
USBHS_USBACNR Mask
#define MXC_F_RPU_USBHS_USBACNR_POS 4 |
USBHS_USBACNR Position
#define MXC_F_RPU_USBHS_USBACNW ((uint32_t)(0x1UL << MXC_F_RPU_USBHS_USBACNW_POS)) |
USBHS_USBACNW Mask
#define MXC_F_RPU_USBHS_USBACNW_POS 5 |
USBHS_USBACNW Position