MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
adc_regs.h
1 
6 /* ****************************************************************************
7  * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
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13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
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19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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23  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
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31  * The mere transfer of this software does not imply any licenses
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39 
40 #ifndef _ADC_REGS_H_
41 #define _ADC_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
88 typedef struct {
89  __IO uint32_t ctrl;
90  __IO uint32_t status;
91  __IO uint32_t data;
92  __IO uint32_t intr;
93  __IO uint32_t limit[4];
95 
96 /* Register offsets for module ADC */
103  #define MXC_R_ADC_CTRL ((uint32_t)0x00000000UL)
104  #define MXC_R_ADC_STATUS ((uint32_t)0x00000004UL)
105  #define MXC_R_ADC_DATA ((uint32_t)0x00000008UL)
106  #define MXC_R_ADC_INTR ((uint32_t)0x0000000CUL)
107  #define MXC_R_ADC_LIMIT ((uint32_t)0x00000010UL)
116  #define MXC_F_ADC_CTRL_START_POS 0
117  #define MXC_F_ADC_CTRL_START ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_START_POS))
119  #define MXC_F_ADC_CTRL_PWR_POS 1
120  #define MXC_F_ADC_CTRL_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_PWR_POS))
122  #define MXC_F_ADC_CTRL_REFBUF_PWR_POS 3
123  #define MXC_F_ADC_CTRL_REFBUF_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REFBUF_PWR_POS))
125  #define MXC_F_ADC_CTRL_CHGPUMP_PWR_POS 4
126  #define MXC_F_ADC_CTRL_CHGPUMP_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CHGPUMP_PWR_POS))
128  #define MXC_F_ADC_CTRL_REF_SCALE_POS 8
129  #define MXC_F_ADC_CTRL_REF_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SCALE_POS))
131  #define MXC_F_ADC_CTRL_INPUT_SCALE_POS 9
132  #define MXC_F_ADC_CTRL_INPUT_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_INPUT_SCALE_POS))
134  #define MXC_F_ADC_CTRL_REF_SEL_POS 10
135  #define MXC_F_ADC_CTRL_REF_SEL ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SEL_POS))
137  #define MXC_F_ADC_CTRL_CLK_EN_POS 11
138  #define MXC_F_ADC_CTRL_CLK_EN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CLK_EN_POS))
140  #define MXC_F_ADC_CTRL_ADC_CH_SEL_POS 12
141  #define MXC_F_ADC_CTRL_ADC_CH_SEL ((uint32_t)(0x1FUL << MXC_F_ADC_CTRL_ADC_CH_SEL_POS))
142  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN0 ((uint32_t)0x0UL)
143  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN0 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN0 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
144  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN1 ((uint32_t)0x1UL)
145  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN1 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN1 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
146  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN2 ((uint32_t)0x2UL)
147  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN2 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN2 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
148  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN3 ((uint32_t)0x3UL)
149  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN3 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN3 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
150  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN4 ((uint32_t)0x4UL)
151  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN4 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN4 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
152  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN5 ((uint32_t)0x5UL)
153  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN5 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN5 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
154  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN6 ((uint32_t)0x6UL)
155  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN6 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN6 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
156  #define MXC_V_ADC_CTRL_ADC_CH_SEL_AIN7 ((uint32_t)0x7UL)
157  #define MXC_S_ADC_CTRL_ADC_CH_SEL_AIN7 (MXC_V_ADC_CTRL_ADC_CH_SEL_AIN7 << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
158  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREA ((uint32_t)0x8UL)
159  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VCOREA (MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREA << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
160  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREB ((uint32_t)0x9UL)
161  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VCOREB (MXC_V_ADC_CTRL_ADC_CH_SEL_VCOREB << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
162  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VRXOUT ((uint32_t)0xAUL)
163  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VRXOUT (MXC_V_ADC_CTRL_ADC_CH_SEL_VRXOUT << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
164  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VTXOUT ((uint32_t)0xBUL)
165  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VTXOUT (MXC_V_ADC_CTRL_ADC_CH_SEL_VTXOUT << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
166  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDA ((uint32_t)0xCUL)
167  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDA (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDA << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
168  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDB ((uint32_t)0xDUL)
169  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDB (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDB << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
170  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIO ((uint32_t)0xEUL)
171  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDIO (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIO << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
172  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIOH ((uint32_t)0xFUL)
173  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VDDIOH (MXC_V_ADC_CTRL_ADC_CH_SEL_VDDIOH << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
174  #define MXC_V_ADC_CTRL_ADC_CH_SEL_VREGI ((uint32_t)0x10UL)
175  #define MXC_S_ADC_CTRL_ADC_CH_SEL_VREGI (MXC_V_ADC_CTRL_ADC_CH_SEL_VREGI << MXC_F_ADC_CTRL_ADC_CH_SEL_POS)
177  #define MXC_F_ADC_CTRL_ADC_DIVSEL_POS 17
178  #define MXC_F_ADC_CTRL_ADC_DIVSEL ((uint32_t)(0x3UL << MXC_F_ADC_CTRL_ADC_DIVSEL_POS))
179  #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 ((uint32_t)0x0UL)
180  #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV1 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
181  #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 ((uint32_t)0x1UL)
182  #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV2 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
183  #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 ((uint32_t)0x2UL)
184  #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV3 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
185  #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 ((uint32_t)0x3UL)
186  #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV4 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)
188  #define MXC_F_ADC_CTRL_DATA_ALIGN_POS 20
189  #define MXC_F_ADC_CTRL_DATA_ALIGN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_DATA_ALIGN_POS))
199  #define MXC_F_ADC_STATUS_ACTIVE_POS 0
200  #define MXC_F_ADC_STATUS_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_ACTIVE_POS))
202  #define MXC_F_ADC_STATUS_PWR_UP_ACTIVE_POS 2
203  #define MXC_F_ADC_STATUS_PWR_UP_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_PWR_UP_ACTIVE_POS))
205  #define MXC_F_ADC_STATUS_OVERFLOW_POS 3
206  #define MXC_F_ADC_STATUS_OVERFLOW ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_OVERFLOW_POS))
216  #define MXC_F_ADC_DATA_DATA_POS 0
217  #define MXC_F_ADC_DATA_DATA ((uint32_t)(0xFFFFUL << MXC_F_ADC_DATA_DATA_POS))
227  #define MXC_F_ADC_INTR_DONE_IE_POS 0
228  #define MXC_F_ADC_INTR_DONE_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IE_POS))
230  #define MXC_F_ADC_INTR_REF_READY_IE_POS 1
231  #define MXC_F_ADC_INTR_REF_READY_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IE_POS))
233  #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS 2
234  #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS))
236  #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS 3
237  #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS))
239  #define MXC_F_ADC_INTR_OVERFLOW_IE_POS 4
240  #define MXC_F_ADC_INTR_OVERFLOW_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IE_POS))
242  #define MXC_F_ADC_INTR_DONE_IF_POS 16
243  #define MXC_F_ADC_INTR_DONE_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IF_POS))
245  #define MXC_F_ADC_INTR_REF_READY_IF_POS 17
246  #define MXC_F_ADC_INTR_REF_READY_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IF_POS))
248  #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS 18
249  #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS))
251  #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS 19
252  #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS))
254  #define MXC_F_ADC_INTR_OVERFLOW_IF_POS 20
255  #define MXC_F_ADC_INTR_OVERFLOW_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IF_POS))
257  #define MXC_F_ADC_INTR_PENDING_POS 22
258  #define MXC_F_ADC_INTR_PENDING ((uint32_t)(0x1UL << MXC_F_ADC_INTR_PENDING_POS))
268  #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS 0
269  #define MXC_F_ADC_LIMIT_CH_LO_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS))
271  #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS 12
272  #define MXC_F_ADC_LIMIT_CH_HI_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS))
274  #define MXC_F_ADC_LIMIT_CH_SEL_POS 24
275  #define MXC_F_ADC_LIMIT_CH_SEL ((uint32_t)(0xFUL << MXC_F_ADC_LIMIT_CH_SEL_POS))
277  #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS 28
278  #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS))
280  #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS 29
281  #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS))
285 #ifdef __cplusplus
286 }
287 #endif
288 
289 #endif /* _ADC_REGS_H_ */
mxc_adc_regs_t
Definition: adc_regs.h:88
mxc_adc_regs_t::intr
__IO uint32_t intr
Definition: adc_regs.h:92
mxc_adc_regs_t::ctrl
__IO uint32_t ctrl
Definition: adc_regs.h:89
mxc_adc_regs_t::data
__IO uint32_t data
Definition: adc_regs.h:91
mxc_adc_regs_t::status
__IO uint32_t status
Definition: adc_regs.h:90