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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Macros | |
#define | MXC_F_SDHC_BLK_GAP_STOP_POS 0 |
#define | MXC_F_SDHC_BLK_GAP_STOP ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_STOP_POS)) |
#define | MXC_F_SDHC_BLK_GAP_CONT_POS 1 |
#define | MXC_F_SDHC_BLK_GAP_CONT ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_CONT_POS)) |
#define | MXC_F_SDHC_BLK_GAP_READ_WAIT_POS 2 |
#define | MXC_F_SDHC_BLK_GAP_READ_WAIT ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_READ_WAIT_POS)) |
#define | MXC_F_SDHC_BLK_GAP_INTR_POS 3 |
#define | MXC_F_SDHC_BLK_GAP_INTR ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_INTR_POS)) |
Block Gap Control.
#define MXC_F_SDHC_BLK_GAP_CONT ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_CONT_POS)) |
BLK_GAP_CONT Mask
#define MXC_F_SDHC_BLK_GAP_CONT_POS 1 |
BLK_GAP_CONT Position
#define MXC_F_SDHC_BLK_GAP_INTR ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_INTR_POS)) |
BLK_GAP_INTR Mask
#define MXC_F_SDHC_BLK_GAP_INTR_POS 3 |
BLK_GAP_INTR Position
#define MXC_F_SDHC_BLK_GAP_READ_WAIT ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_READ_WAIT_POS)) |
BLK_GAP_READ_WAIT Mask
#define MXC_F_SDHC_BLK_GAP_READ_WAIT_POS 2 |
BLK_GAP_READ_WAIT Position
#define MXC_F_SDHC_BLK_GAP_STOP ((uint8_t)(0x1UL << MXC_F_SDHC_BLK_GAP_STOP_POS)) |
BLK_GAP_STOP Mask
#define MXC_F_SDHC_BLK_GAP_STOP_POS 0 |
BLK_GAP_STOP Position