MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
SDHC_FORCE_EVENT_INT_STAT

Macros

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS   0
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS   1
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS   2
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS   3
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS   4
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS   5
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS   6
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS   7
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS   8
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS   9
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS))
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS   12
 
#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR   ((uint16_t)(0x7UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS))
 

Detailed Description

Force Event for Error Interrupt Status.

Macro Definition Documentation

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS))

FORCE_EVENT_INT_STAT_ADMA Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_ADMA_POS   9

FORCE_EVENT_INT_STAT_ADMA Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS))

FORCE_EVENT_INT_STAT_AUTO_CMD Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_AUTO_CMD_POS   8

FORCE_EVENT_INT_STAT_AUTO_CMD Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS))

FORCE_EVENT_INT_STAT_CMD_CRC Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_CRC_POS   1

FORCE_EVENT_INT_STAT_CMD_CRC Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS))

FORCE_EVENT_INT_STAT_CMD_END_BIT Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_END_BIT_POS   2

FORCE_EVENT_INT_STAT_CMD_END_BIT Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS))

FORCE_EVENT_INT_STAT_CMD_INDEX Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_INDEX_POS   3

FORCE_EVENT_INT_STAT_CMD_INDEX Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS))

FORCE_EVENT_INT_STAT_CMD_TO Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CMD_TO_POS   0

FORCE_EVENT_INT_STAT_CMD_TO Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS))

FORCE_EVENT_INT_STAT_CURR_LIMIT Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_CURR_LIMIT_POS   7

FORCE_EVENT_INT_STAT_CURR_LIMIT Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS))

FORCE_EVENT_INT_STAT_DATA_CRC Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_CRC_POS   5

FORCE_EVENT_INT_STAT_DATA_CRC Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS))

FORCE_EVENT_INT_STAT_DATA_END_BIT Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_END_BIT_POS   6

FORCE_EVENT_INT_STAT_DATA_END_BIT Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO   ((uint16_t)(0x1UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS))

FORCE_EVENT_INT_STAT_DATA_TO Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_DATA_TO_POS   4

FORCE_EVENT_INT_STAT_DATA_TO Position

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR   ((uint16_t)(0x7UL << MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS))

FORCE_EVENT_INT_STAT_VENDOR Mask

◆ MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS

#define MXC_F_SDHC_FORCE_EVENT_INT_STAT_VENDOR_POS   12

FORCE_EVENT_INT_STAT_VENDOR Position