MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665

Macros

#define MXC_F_TPU_CIPHER_INIT_IVEC_POS   0
 
#define MXC_F_TPU_CIPHER_INIT_IVEC   ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CIPHER_INIT_IVEC_POS))
 

Detailed Description

Initial Vector. For block cipher operations that use CBC, CFB, OFB, or CNTR modes, this register holds the initial value. This register is updated with each encryption or decryption operation. This register is affected by the endian swap bits.

Macro Definition Documentation

◆ MXC_F_TPU_CIPHER_INIT_IVEC

#define MXC_F_TPU_CIPHER_INIT_IVEC   ((uint32_t)(0xFFFFFFFFUL << MXC_F_TPU_CIPHER_INIT_IVEC_POS))

CIPHER_INIT_IVEC Mask

◆ MXC_F_TPU_CIPHER_INIT_IVEC_POS

#define MXC_F_TPU_CIPHER_INIT_IVEC_POS   0

CIPHER_INIT_IVEC Position