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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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50 #if defined (__ICCARM__)
51 #pragma system_include
54 #if defined (__CC_ARM)
65 #define __I volatile const
71 #define __R volatile const
106 __R uint32_t rsv_0x8_0xff[62];
117 #define MXC_R_DMA_CFG ((uint32_t)0x00000100UL)
118 #define MXC_R_DMA_ST ((uint32_t)0x00000104UL)
119 #define MXC_R_DMA_SRC ((uint32_t)0x00000108UL)
120 #define MXC_R_DMA_DST ((uint32_t)0x0000010CUL)
121 #define MXC_R_DMA_CNT ((uint32_t)0x00000110UL)
122 #define MXC_R_DMA_SRC_RLD ((uint32_t)0x00000114UL)
123 #define MXC_R_DMA_DST_RLD ((uint32_t)0x00000118UL)
124 #define MXC_R_DMA_CNT_RLD ((uint32_t)0x0000011CUL)
125 #define MXC_R_DMA_CN ((uint32_t)0x00000000UL)
126 #define MXC_R_DMA_INTFL ((uint32_t)0x00000004UL)
127 #define MXC_R_DMA_CH ((uint32_t)0x00000100UL)
136 #define MXC_F_DMA_CN_CHIEN_POS 0
137 #define MXC_F_DMA_CN_CHIEN ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_CN_CHIEN_POS))
138 #define MXC_V_DMA_CN_CHIEN_DIS ((uint32_t)0x0UL)
139 #define MXC_S_DMA_CN_CHIEN_DIS (MXC_V_DMA_CN_CHIEN_DIS << MXC_F_DMA_CN_CHIEN_POS)
140 #define MXC_V_DMA_CN_CHIEN_EN ((uint32_t)0x1UL)
141 #define MXC_S_DMA_CN_CHIEN_EN (MXC_V_DMA_CN_CHIEN_EN << MXC_F_DMA_CN_CHIEN_POS)
151 #define MXC_F_DMA_INTFL_IPEND_POS 0
152 #define MXC_F_DMA_INTFL_IPEND ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_INTFL_IPEND_POS))
153 #define MXC_V_DMA_INTFL_IPEND_INACTIVE ((uint32_t)0x0UL)
154 #define MXC_S_DMA_INTFL_IPEND_INACTIVE (MXC_V_DMA_INTFL_IPEND_INACTIVE << MXC_F_DMA_INTFL_IPEND_POS)
155 #define MXC_V_DMA_INTFL_IPEND_PENDING ((uint32_t)0x1UL)
156 #define MXC_S_DMA_INTFL_IPEND_PENDING (MXC_V_DMA_INTFL_IPEND_PENDING << MXC_F_DMA_INTFL_IPEND_POS)
166 #define MXC_F_DMA_CFG_CHEN_POS 0
167 #define MXC_F_DMA_CFG_CHEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CHEN_POS))
169 #define MXC_F_DMA_CFG_RLDEN_POS 1
170 #define MXC_F_DMA_CFG_RLDEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_RLDEN_POS))
172 #define MXC_F_DMA_CFG_PRI_POS 2
173 #define MXC_F_DMA_CFG_PRI ((uint32_t)(0x3UL << MXC_F_DMA_CFG_PRI_POS))
174 #define MXC_V_DMA_CFG_PRI_HIGH ((uint32_t)0x0UL)
175 #define MXC_S_DMA_CFG_PRI_HIGH (MXC_V_DMA_CFG_PRI_HIGH << MXC_F_DMA_CFG_PRI_POS)
176 #define MXC_V_DMA_CFG_PRI_MEDHIGH ((uint32_t)0x1UL)
177 #define MXC_S_DMA_CFG_PRI_MEDHIGH (MXC_V_DMA_CFG_PRI_MEDHIGH << MXC_F_DMA_CFG_PRI_POS)
178 #define MXC_V_DMA_CFG_PRI_MEDLOW ((uint32_t)0x2UL)
179 #define MXC_S_DMA_CFG_PRI_MEDLOW (MXC_V_DMA_CFG_PRI_MEDLOW << MXC_F_DMA_CFG_PRI_POS)
180 #define MXC_V_DMA_CFG_PRI_LOW ((uint32_t)0x3UL)
181 #define MXC_S_DMA_CFG_PRI_LOW (MXC_V_DMA_CFG_PRI_LOW << MXC_F_DMA_CFG_PRI_POS)
183 #define MXC_F_DMA_CFG_REQSEL_POS 4
184 #define MXC_F_DMA_CFG_REQSEL ((uint32_t)(0x3FUL << MXC_F_DMA_CFG_REQSEL_POS))
185 #define MXC_V_DMA_CFG_REQSEL_MEMTOMEM ((uint32_t)0x0UL)
186 #define MXC_S_DMA_CFG_REQSEL_MEMTOMEM (MXC_V_DMA_CFG_REQSEL_MEMTOMEM << MXC_F_DMA_CFG_REQSEL_POS)
187 #define MXC_V_DMA_CFG_REQSEL_SPI1RX ((uint32_t)0x1UL)
188 #define MXC_S_DMA_CFG_REQSEL_SPI1RX (MXC_V_DMA_CFG_REQSEL_SPI1RX << MXC_F_DMA_CFG_REQSEL_POS)
189 #define MXC_V_DMA_CFG_REQSEL_SPI2RX ((uint32_t)0x2UL)
190 #define MXC_S_DMA_CFG_REQSEL_SPI2RX (MXC_V_DMA_CFG_REQSEL_SPI2RX << MXC_F_DMA_CFG_REQSEL_POS)
191 #define MXC_V_DMA_CFG_REQSEL_UART0RX ((uint32_t)0x4UL)
192 #define MXC_S_DMA_CFG_REQSEL_UART0RX (MXC_V_DMA_CFG_REQSEL_UART0RX << MXC_F_DMA_CFG_REQSEL_POS)
193 #define MXC_V_DMA_CFG_REQSEL_UART1RX ((uint32_t)0x5UL)
194 #define MXC_S_DMA_CFG_REQSEL_UART1RX (MXC_V_DMA_CFG_REQSEL_UART1RX << MXC_F_DMA_CFG_REQSEL_POS)
195 #define MXC_V_DMA_CFG_REQSEL_I2C0RX ((uint32_t)0x7UL)
196 #define MXC_S_DMA_CFG_REQSEL_I2C0RX (MXC_V_DMA_CFG_REQSEL_I2C0RX << MXC_F_DMA_CFG_REQSEL_POS)
197 #define MXC_V_DMA_CFG_REQSEL_I2C1RX ((uint32_t)0x8UL)
198 #define MXC_S_DMA_CFG_REQSEL_I2C1RX (MXC_V_DMA_CFG_REQSEL_I2C1RX << MXC_F_DMA_CFG_REQSEL_POS)
199 #define MXC_V_DMA_CFG_REQSEL_ADC ((uint32_t)0x9UL)
200 #define MXC_S_DMA_CFG_REQSEL_ADC (MXC_V_DMA_CFG_REQSEL_ADC << MXC_F_DMA_CFG_REQSEL_POS)
201 #define MXC_V_DMA_CFG_REQSEL_I2C2RX ((uint32_t)0xAUL)
202 #define MXC_S_DMA_CFG_REQSEL_I2C2RX (MXC_V_DMA_CFG_REQSEL_I2C2RX << MXC_F_DMA_CFG_REQSEL_POS)
203 #define MXC_V_DMA_CFG_REQSEL_UART2RX ((uint32_t)0xEUL)
204 #define MXC_S_DMA_CFG_REQSEL_UART2RX (MXC_V_DMA_CFG_REQSEL_UART2RX << MXC_F_DMA_CFG_REQSEL_POS)
205 #define MXC_V_DMA_CFG_REQSEL_SPI0RX ((uint32_t)0xFUL)
206 #define MXC_S_DMA_CFG_REQSEL_SPI0RX (MXC_V_DMA_CFG_REQSEL_SPI0RX << MXC_F_DMA_CFG_REQSEL_POS)
207 #define MXC_V_DMA_CFG_REQSEL_USBRXEP1 ((uint32_t)0x11UL)
208 #define MXC_S_DMA_CFG_REQSEL_USBRXEP1 (MXC_V_DMA_CFG_REQSEL_USBRXEP1 << MXC_F_DMA_CFG_REQSEL_POS)
209 #define MXC_V_DMA_CFG_REQSEL_USBRXEP2 ((uint32_t)0x12UL)
210 #define MXC_S_DMA_CFG_REQSEL_USBRXEP2 (MXC_V_DMA_CFG_REQSEL_USBRXEP2 << MXC_F_DMA_CFG_REQSEL_POS)
211 #define MXC_V_DMA_CFG_REQSEL_USBRXEP3 ((uint32_t)0x13UL)
212 #define MXC_S_DMA_CFG_REQSEL_USBRXEP3 (MXC_V_DMA_CFG_REQSEL_USBRXEP3 << MXC_F_DMA_CFG_REQSEL_POS)
213 #define MXC_V_DMA_CFG_REQSEL_USBRXEP4 ((uint32_t)0x14UL)
214 #define MXC_S_DMA_CFG_REQSEL_USBRXEP4 (MXC_V_DMA_CFG_REQSEL_USBRXEP4 << MXC_F_DMA_CFG_REQSEL_POS)
215 #define MXC_V_DMA_CFG_REQSEL_USBRXEP5 ((uint32_t)0x15UL)
216 #define MXC_S_DMA_CFG_REQSEL_USBRXEP5 (MXC_V_DMA_CFG_REQSEL_USBRXEP5 << MXC_F_DMA_CFG_REQSEL_POS)
217 #define MXC_V_DMA_CFG_REQSEL_USBRXEP6 ((uint32_t)0x16UL)
218 #define MXC_S_DMA_CFG_REQSEL_USBRXEP6 (MXC_V_DMA_CFG_REQSEL_USBRXEP6 << MXC_F_DMA_CFG_REQSEL_POS)
219 #define MXC_V_DMA_CFG_REQSEL_USBRXEP7 ((uint32_t)0x17UL)
220 #define MXC_S_DMA_CFG_REQSEL_USBRXEP7 (MXC_V_DMA_CFG_REQSEL_USBRXEP7 << MXC_F_DMA_CFG_REQSEL_POS)
221 #define MXC_V_DMA_CFG_REQSEL_USBRXEP8 ((uint32_t)0x18UL)
222 #define MXC_S_DMA_CFG_REQSEL_USBRXEP8 (MXC_V_DMA_CFG_REQSEL_USBRXEP8 << MXC_F_DMA_CFG_REQSEL_POS)
223 #define MXC_V_DMA_CFG_REQSEL_USBRXEP9 ((uint32_t)0x19UL)
224 #define MXC_S_DMA_CFG_REQSEL_USBRXEP9 (MXC_V_DMA_CFG_REQSEL_USBRXEP9 << MXC_F_DMA_CFG_REQSEL_POS)
225 #define MXC_V_DMA_CFG_REQSEL_USBRXEP10 ((uint32_t)0x1AUL)
226 #define MXC_S_DMA_CFG_REQSEL_USBRXEP10 (MXC_V_DMA_CFG_REQSEL_USBRXEP10 << MXC_F_DMA_CFG_REQSEL_POS)
227 #define MXC_V_DMA_CFG_REQSEL_USBRXEP11 ((uint32_t)0x1BUL)
228 #define MXC_S_DMA_CFG_REQSEL_USBRXEP11 (MXC_V_DMA_CFG_REQSEL_USBRXEP11 << MXC_F_DMA_CFG_REQSEL_POS)
229 #define MXC_V_DMA_CFG_REQSEL_SPI1TX ((uint32_t)0x21UL)
230 #define MXC_S_DMA_CFG_REQSEL_SPI1TX (MXC_V_DMA_CFG_REQSEL_SPI1TX << MXC_F_DMA_CFG_REQSEL_POS)
231 #define MXC_V_DMA_CFG_REQSEL_SPI2TX ((uint32_t)0x22UL)
232 #define MXC_S_DMA_CFG_REQSEL_SPI2TX (MXC_V_DMA_CFG_REQSEL_SPI2TX << MXC_F_DMA_CFG_REQSEL_POS)
233 #define MXC_V_DMA_CFG_REQSEL_UART0TX ((uint32_t)0x24UL)
234 #define MXC_S_DMA_CFG_REQSEL_UART0TX (MXC_V_DMA_CFG_REQSEL_UART0TX << MXC_F_DMA_CFG_REQSEL_POS)
235 #define MXC_V_DMA_CFG_REQSEL_UART1TX ((uint32_t)0x25UL)
236 #define MXC_S_DMA_CFG_REQSEL_UART1TX (MXC_V_DMA_CFG_REQSEL_UART1TX << MXC_F_DMA_CFG_REQSEL_POS)
237 #define MXC_V_DMA_CFG_REQSEL_I2C0TX ((uint32_t)0x27UL)
238 #define MXC_S_DMA_CFG_REQSEL_I2C0TX (MXC_V_DMA_CFG_REQSEL_I2C0TX << MXC_F_DMA_CFG_REQSEL_POS)
239 #define MXC_V_DMA_CFG_REQSEL_I2C1TX ((uint32_t)0x28UL)
240 #define MXC_S_DMA_CFG_REQSEL_I2C1TX (MXC_V_DMA_CFG_REQSEL_I2C1TX << MXC_F_DMA_CFG_REQSEL_POS)
241 #define MXC_V_DMA_CFG_REQSEL_UART2TX ((uint32_t)0x2EUL)
242 #define MXC_S_DMA_CFG_REQSEL_UART2TX (MXC_V_DMA_CFG_REQSEL_UART2TX << MXC_F_DMA_CFG_REQSEL_POS)
243 #define MXC_V_DMA_CFG_REQSEL_SPI0TX ((uint32_t)0x2FUL)
244 #define MXC_S_DMA_CFG_REQSEL_SPI0TX (MXC_V_DMA_CFG_REQSEL_SPI0TX << MXC_F_DMA_CFG_REQSEL_POS)
245 #define MXC_V_DMA_CFG_REQSEL_USBTXEP1 ((uint32_t)0x31UL)
246 #define MXC_S_DMA_CFG_REQSEL_USBTXEP1 (MXC_V_DMA_CFG_REQSEL_USBTXEP1 << MXC_F_DMA_CFG_REQSEL_POS)
247 #define MXC_V_DMA_CFG_REQSEL_USBTXEP2 ((uint32_t)0x32UL)
248 #define MXC_S_DMA_CFG_REQSEL_USBTXEP2 (MXC_V_DMA_CFG_REQSEL_USBTXEP2 << MXC_F_DMA_CFG_REQSEL_POS)
249 #define MXC_V_DMA_CFG_REQSEL_USBTXEP3 ((uint32_t)0x33UL)
250 #define MXC_S_DMA_CFG_REQSEL_USBTXEP3 (MXC_V_DMA_CFG_REQSEL_USBTXEP3 << MXC_F_DMA_CFG_REQSEL_POS)
251 #define MXC_V_DMA_CFG_REQSEL_USBTXEP4 ((uint32_t)0x34UL)
252 #define MXC_S_DMA_CFG_REQSEL_USBTXEP4 (MXC_V_DMA_CFG_REQSEL_USBTXEP4 << MXC_F_DMA_CFG_REQSEL_POS)
253 #define MXC_V_DMA_CFG_REQSEL_USBTXEP5 ((uint32_t)0x35UL)
254 #define MXC_S_DMA_CFG_REQSEL_USBTXEP5 (MXC_V_DMA_CFG_REQSEL_USBTXEP5 << MXC_F_DMA_CFG_REQSEL_POS)
255 #define MXC_V_DMA_CFG_REQSEL_USBTXEP6 ((uint32_t)0x36UL)
256 #define MXC_S_DMA_CFG_REQSEL_USBTXEP6 (MXC_V_DMA_CFG_REQSEL_USBTXEP6 << MXC_F_DMA_CFG_REQSEL_POS)
257 #define MXC_V_DMA_CFG_REQSEL_USBTXEP7 ((uint32_t)0x37UL)
258 #define MXC_S_DMA_CFG_REQSEL_USBTXEP7 (MXC_V_DMA_CFG_REQSEL_USBTXEP7 << MXC_F_DMA_CFG_REQSEL_POS)
259 #define MXC_V_DMA_CFG_REQSEL_USBTXEP8 ((uint32_t)0x38UL)
260 #define MXC_S_DMA_CFG_REQSEL_USBTXEP8 (MXC_V_DMA_CFG_REQSEL_USBTXEP8 << MXC_F_DMA_CFG_REQSEL_POS)
261 #define MXC_V_DMA_CFG_REQSEL_USBTXEP9 ((uint32_t)0x39UL)
262 #define MXC_S_DMA_CFG_REQSEL_USBTXEP9 (MXC_V_DMA_CFG_REQSEL_USBTXEP9 << MXC_F_DMA_CFG_REQSEL_POS)
263 #define MXC_V_DMA_CFG_REQSEL_USBTXEP10 ((uint32_t)0x3AUL)
264 #define MXC_S_DMA_CFG_REQSEL_USBTXEP10 (MXC_V_DMA_CFG_REQSEL_USBTXEP10 << MXC_F_DMA_CFG_REQSEL_POS)
265 #define MXC_V_DMA_CFG_REQSEL_USBTXEP11 ((uint32_t)0x3BUL)
266 #define MXC_S_DMA_CFG_REQSEL_USBTXEP11 (MXC_V_DMA_CFG_REQSEL_USBTXEP11 << MXC_F_DMA_CFG_REQSEL_POS)
268 #define MXC_F_DMA_CFG_REQWAIT_POS 10
269 #define MXC_F_DMA_CFG_REQWAIT ((uint32_t)(0x1UL << MXC_F_DMA_CFG_REQWAIT_POS))
271 #define MXC_F_DMA_CFG_TOSEL_POS 11
272 #define MXC_F_DMA_CFG_TOSEL ((uint32_t)(0x7UL << MXC_F_DMA_CFG_TOSEL_POS))
273 #define MXC_V_DMA_CFG_TOSEL_TO4 ((uint32_t)0x0UL)
274 #define MXC_S_DMA_CFG_TOSEL_TO4 (MXC_V_DMA_CFG_TOSEL_TO4 << MXC_F_DMA_CFG_TOSEL_POS)
275 #define MXC_V_DMA_CFG_TOSEL_TO8 ((uint32_t)0x1UL)
276 #define MXC_S_DMA_CFG_TOSEL_TO8 (MXC_V_DMA_CFG_TOSEL_TO8 << MXC_F_DMA_CFG_TOSEL_POS)
277 #define MXC_V_DMA_CFG_TOSEL_TO16 ((uint32_t)0x2UL)
278 #define MXC_S_DMA_CFG_TOSEL_TO16 (MXC_V_DMA_CFG_TOSEL_TO16 << MXC_F_DMA_CFG_TOSEL_POS)
279 #define MXC_V_DMA_CFG_TOSEL_TO32 ((uint32_t)0x3UL)
280 #define MXC_S_DMA_CFG_TOSEL_TO32 (MXC_V_DMA_CFG_TOSEL_TO32 << MXC_F_DMA_CFG_TOSEL_POS)
281 #define MXC_V_DMA_CFG_TOSEL_TO64 ((uint32_t)0x4UL)
282 #define MXC_S_DMA_CFG_TOSEL_TO64 (MXC_V_DMA_CFG_TOSEL_TO64 << MXC_F_DMA_CFG_TOSEL_POS)
283 #define MXC_V_DMA_CFG_TOSEL_TO128 ((uint32_t)0x5UL)
284 #define MXC_S_DMA_CFG_TOSEL_TO128 (MXC_V_DMA_CFG_TOSEL_TO128 << MXC_F_DMA_CFG_TOSEL_POS)
285 #define MXC_V_DMA_CFG_TOSEL_TO256 ((uint32_t)0x6UL)
286 #define MXC_S_DMA_CFG_TOSEL_TO256 (MXC_V_DMA_CFG_TOSEL_TO256 << MXC_F_DMA_CFG_TOSEL_POS)
287 #define MXC_V_DMA_CFG_TOSEL_TO512 ((uint32_t)0x7UL)
288 #define MXC_S_DMA_CFG_TOSEL_TO512 (MXC_V_DMA_CFG_TOSEL_TO512 << MXC_F_DMA_CFG_TOSEL_POS)
290 #define MXC_F_DMA_CFG_PSSEL_POS 14
291 #define MXC_F_DMA_CFG_PSSEL ((uint32_t)(0x3UL << MXC_F_DMA_CFG_PSSEL_POS))
292 #define MXC_V_DMA_CFG_PSSEL_DIS ((uint32_t)0x0UL)
293 #define MXC_S_DMA_CFG_PSSEL_DIS (MXC_V_DMA_CFG_PSSEL_DIS << MXC_F_DMA_CFG_PSSEL_POS)
294 #define MXC_V_DMA_CFG_PSSEL_DIV256 ((uint32_t)0x1UL)
295 #define MXC_S_DMA_CFG_PSSEL_DIV256 (MXC_V_DMA_CFG_PSSEL_DIV256 << MXC_F_DMA_CFG_PSSEL_POS)
296 #define MXC_V_DMA_CFG_PSSEL_DIV64K ((uint32_t)0x2UL)
297 #define MXC_S_DMA_CFG_PSSEL_DIV64K (MXC_V_DMA_CFG_PSSEL_DIV64K << MXC_F_DMA_CFG_PSSEL_POS)
298 #define MXC_V_DMA_CFG_PSSEL_DIV16M ((uint32_t)0x3UL)
299 #define MXC_S_DMA_CFG_PSSEL_DIV16M (MXC_V_DMA_CFG_PSSEL_DIV16M << MXC_F_DMA_CFG_PSSEL_POS)
301 #define MXC_F_DMA_CFG_SRCWD_POS 16
302 #define MXC_F_DMA_CFG_SRCWD ((uint32_t)(0x3UL << MXC_F_DMA_CFG_SRCWD_POS))
303 #define MXC_V_DMA_CFG_SRCWD_BYTE ((uint32_t)0x0UL)
304 #define MXC_S_DMA_CFG_SRCWD_BYTE (MXC_V_DMA_CFG_SRCWD_BYTE << MXC_F_DMA_CFG_SRCWD_POS)
305 #define MXC_V_DMA_CFG_SRCWD_HALFWORD ((uint32_t)0x1UL)
306 #define MXC_S_DMA_CFG_SRCWD_HALFWORD (MXC_V_DMA_CFG_SRCWD_HALFWORD << MXC_F_DMA_CFG_SRCWD_POS)
307 #define MXC_V_DMA_CFG_SRCWD_WORD ((uint32_t)0x2UL)
308 #define MXC_S_DMA_CFG_SRCWD_WORD (MXC_V_DMA_CFG_SRCWD_WORD << MXC_F_DMA_CFG_SRCWD_POS)
310 #define MXC_F_DMA_CFG_SRINC_POS 18
311 #define MXC_F_DMA_CFG_SRINC ((uint32_t)(0x1UL << MXC_F_DMA_CFG_SRINC_POS))
313 #define MXC_F_DMA_CFG_DSTWD_POS 20
314 #define MXC_F_DMA_CFG_DSTWD ((uint32_t)(0x3UL << MXC_F_DMA_CFG_DSTWD_POS))
315 #define MXC_V_DMA_CFG_DSTWD_BYTE ((uint32_t)0x0UL)
316 #define MXC_S_DMA_CFG_DSTWD_BYTE (MXC_V_DMA_CFG_DSTWD_BYTE << MXC_F_DMA_CFG_DSTWD_POS)
317 #define MXC_V_DMA_CFG_DSTWD_HALFWORD ((uint32_t)0x1UL)
318 #define MXC_S_DMA_CFG_DSTWD_HALFWORD (MXC_V_DMA_CFG_DSTWD_HALFWORD << MXC_F_DMA_CFG_DSTWD_POS)
319 #define MXC_V_DMA_CFG_DSTWD_WORD ((uint32_t)0x2UL)
320 #define MXC_S_DMA_CFG_DSTWD_WORD (MXC_V_DMA_CFG_DSTWD_WORD << MXC_F_DMA_CFG_DSTWD_POS)
322 #define MXC_F_DMA_CFG_DISTINC_POS 22
323 #define MXC_F_DMA_CFG_DISTINC ((uint32_t)(0x1UL << MXC_F_DMA_CFG_DISTINC_POS))
325 #define MXC_F_DMA_CFG_BRST_POS 24
326 #define MXC_F_DMA_CFG_BRST ((uint32_t)(0x1FUL << MXC_F_DMA_CFG_BRST_POS))
328 #define MXC_F_DMA_CFG_CHDIEN_POS 30
329 #define MXC_F_DMA_CFG_CHDIEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CHDIEN_POS))
331 #define MXC_F_DMA_CFG_CTZIEN_POS 31
332 #define MXC_F_DMA_CFG_CTZIEN ((uint32_t)(0x1UL << MXC_F_DMA_CFG_CTZIEN_POS))
342 #define MXC_F_DMA_ST_CH_ST_POS 0
343 #define MXC_F_DMA_ST_CH_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CH_ST_POS))
345 #define MXC_F_DMA_ST_IPEND_POS 1
346 #define MXC_F_DMA_ST_IPEND ((uint32_t)(0x1UL << MXC_F_DMA_ST_IPEND_POS))
348 #define MXC_F_DMA_ST_CTZ_ST_POS 2
349 #define MXC_F_DMA_ST_CTZ_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_CTZ_ST_POS))
351 #define MXC_F_DMA_ST_RLD_ST_POS 3
352 #define MXC_F_DMA_ST_RLD_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_RLD_ST_POS))
354 #define MXC_F_DMA_ST_BUS_ERR_POS 4
355 #define MXC_F_DMA_ST_BUS_ERR ((uint32_t)(0x1UL << MXC_F_DMA_ST_BUS_ERR_POS))
357 #define MXC_F_DMA_ST_TO_ST_POS 6
358 #define MXC_F_DMA_ST_TO_ST ((uint32_t)(0x1UL << MXC_F_DMA_ST_TO_ST_POS))
372 #define MXC_F_DMA_SRC_SRC_POS 0
373 #define MXC_F_DMA_SRC_SRC ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_SRC_SRC_POS))
387 #define MXC_F_DMA_DST_DST_POS 0
388 #define MXC_F_DMA_DST_DST ((uint32_t)(0xFFFFFFFFUL << MXC_F_DMA_DST_DST_POS))
401 #define MXC_F_DMA_CNT_CNT_POS 0
402 #define MXC_F_DMA_CNT_CNT ((uint32_t)(0xFFFFFFUL << MXC_F_DMA_CNT_CNT_POS))
413 #define MXC_F_DMA_SRC_RLD_SRC_RLD_POS 0
414 #define MXC_F_DMA_SRC_RLD_SRC_RLD ((uint32_t)(0x7FFFFFFFUL << MXC_F_DMA_SRC_RLD_SRC_RLD_POS))
425 #define MXC_F_DMA_DST_RLD_DST_RLD_POS 0
426 #define MXC_F_DMA_DST_RLD_DST_RLD ((uint32_t)(0x7FFFFFFFUL << MXC_F_DMA_DST_RLD_DST_RLD_POS))
436 #define MXC_F_DMA_CNT_RLD_CNT_RLD_POS 0
437 #define MXC_F_DMA_CNT_RLD_CNT_RLD ((uint32_t)(0xFFFFFFUL << MXC_F_DMA_CNT_RLD_CNT_RLD_POS))
439 #define MXC_F_DMA_CNT_RLD_RLDEN_POS 31
440 #define MXC_F_DMA_CNT_RLD_RLDEN ((uint32_t)(0x1UL << MXC_F_DMA_CNT_RLD_RLDEN_POS))
__IO uint32_t cfg
Definition: dma_regs.h:89
__IO uint32_t cn
Definition: dma_regs.h:104
__IO uint32_t cnt_rld
Definition: dma_regs.h:96
Definition: dma_regs.h:103
__IO uint32_t src_rld
Definition: dma_regs.h:94
__I uint32_t intfl
Definition: dma_regs.h:105
__IO uint32_t dst
Definition: dma_regs.h:92
Definition: dma_regs.h:88
__IO uint32_t src
Definition: dma_regs.h:91
__IO uint32_t cnt
Definition: dma_regs.h:93
__IO uint32_t dst_rld
Definition: dma_regs.h:95
__IO uint32_t st
Definition: dma_regs.h:90