MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
smon_regs.h
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/* ****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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*
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*************************************************************************** */
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#ifndef _SMON_REGS_H_
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#define _SMON_REGS_H_
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/* **** Includes **** */
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#include <stdint.h>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#if defined (__ICCARM__)
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#pragma system_include
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#endif
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#if defined (__CC_ARM)
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#pragma anon_unions
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#endif
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/*
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If types are not defined elsewhere (CMSIS) define them here
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*/
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#ifndef __IO
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#define __IO volatile
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#endif
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#ifndef __I
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#define __I volatile const
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#endif
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#ifndef __O
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#define __O volatile
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#endif
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#ifndef __R
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#define __R volatile const
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#endif
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/* **** Definitions **** */
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typedef
struct
{
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__IO uint32_t
extscn
;
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__IO uint32_t
intscn
;
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__IO uint32_t
secalm
;
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__I uint32_t
secdiag
;
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__I uint32_t
dlrtc
;
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__R uint32_t rsv_0x14_0x33[8];
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__I uint32_t
secst
;
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}
mxc_smon_regs_t
;
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/* Register offsets for module SMON */
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#define MXC_R_SMON_EXTSCN ((uint32_t)0x00000000UL)
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#define MXC_R_SMON_INTSCN ((uint32_t)0x00000004UL)
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#define MXC_R_SMON_SECALM ((uint32_t)0x00000008UL)
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#define MXC_R_SMON_SECDIAG ((uint32_t)0x0000000CUL)
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#define MXC_R_SMON_DLRTC ((uint32_t)0x00000010UL)
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#define MXC_R_SMON_SECST ((uint32_t)0x00000034UL)
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#define MXC_F_SMON_EXTSCN_EXTS_EN0_POS 0
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#define MXC_F_SMON_EXTSCN_EXTS_EN0 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN0_POS))
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#define MXC_F_SMON_EXTSCN_EXTS_EN1_POS 1
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#define MXC_F_SMON_EXTSCN_EXTS_EN1 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN1_POS))
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#define MXC_F_SMON_EXTSCN_EXTS_EN2_POS 2
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#define MXC_F_SMON_EXTSCN_EXTS_EN2 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN2_POS))
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#define MXC_F_SMON_EXTSCN_EXTS_EN3_POS 3
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#define MXC_F_SMON_EXTSCN_EXTS_EN3 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN3_POS))
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#define MXC_F_SMON_EXTSCN_EXTS_EN4_POS 4
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#define MXC_F_SMON_EXTSCN_EXTS_EN4 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN4_POS))
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#define MXC_F_SMON_EXTSCN_EXTS_EN5_POS 5
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#define MXC_F_SMON_EXTSCN_EXTS_EN5 ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_EXTS_EN5_POS))
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#define MXC_F_SMON_EXTSCN_EXTCNT_POS 16
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#define MXC_F_SMON_EXTSCN_EXTCNT ((uint32_t)(0x1FUL << MXC_F_SMON_EXTSCN_EXTCNT_POS))
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#define MXC_F_SMON_EXTSCN_EXTFRQ_POS 21
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#define MXC_F_SMON_EXTSCN_EXTFRQ ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_EXTFRQ_POS))
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ ((uint32_t)0x0UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ2000HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ2000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ ((uint32_t)0x1UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ1000HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ1000HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ ((uint32_t)0x2UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ500HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ500HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ ((uint32_t)0x3UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ250HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ250HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ ((uint32_t)0x4UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ125HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ125HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ ((uint32_t)0x5UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ63HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ63HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ ((uint32_t)0x6UL)
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#define MXC_S_SMON_EXTSCN_EXTFRQ_FREQ31HZ (MXC_V_SMON_EXTSCN_EXTFRQ_FREQ31HZ << MXC_F_SMON_EXTSCN_EXTFRQ_POS)
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#define MXC_F_SMON_EXTSCN_DIVCLK_POS 24
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#define MXC_F_SMON_EXTSCN_DIVCLK ((uint32_t)(0x7UL << MXC_F_SMON_EXTSCN_DIVCLK_POS))
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV1 ((uint32_t)0x0UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV1 (MXC_V_SMON_EXTSCN_DIVCLK_DIV1 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV2 ((uint32_t)0x1UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV2 (MXC_V_SMON_EXTSCN_DIVCLK_DIV2 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV4 ((uint32_t)0x2UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV4 (MXC_V_SMON_EXTSCN_DIVCLK_DIV4 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV8 ((uint32_t)0x3UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV8 (MXC_V_SMON_EXTSCN_DIVCLK_DIV8 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV16 ((uint32_t)0x4UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV16 (MXC_V_SMON_EXTSCN_DIVCLK_DIV16 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV32 ((uint32_t)0x5UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV32 (MXC_V_SMON_EXTSCN_DIVCLK_DIV32 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_V_SMON_EXTSCN_DIVCLK_DIV64 ((uint32_t)0x6UL)
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#define MXC_S_SMON_EXTSCN_DIVCLK_DIV64 (MXC_V_SMON_EXTSCN_DIVCLK_DIV64 << MXC_F_SMON_EXTSCN_DIVCLK_POS)
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#define MXC_F_SMON_EXTSCN_BUSY_POS 30
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#define MXC_F_SMON_EXTSCN_BUSY ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_BUSY_POS))
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#define MXC_F_SMON_EXTSCN_LOCK_POS 31
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#define MXC_F_SMON_EXTSCN_LOCK ((uint32_t)(0x1UL << MXC_F_SMON_EXTSCN_LOCK_POS))
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#define MXC_F_SMON_INTSCN_SHIELD_EN_POS 0
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#define MXC_F_SMON_INTSCN_SHIELD_EN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_SHIELD_EN_POS))
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#define MXC_F_SMON_INTSCN_TEMP_EN_POS 1
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#define MXC_F_SMON_INTSCN_TEMP_EN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_TEMP_EN_POS))
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#define MXC_F_SMON_INTSCN_VBAT_EN_POS 2
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#define MXC_F_SMON_INTSCN_VBAT_EN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VBAT_EN_POS))
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#define MXC_F_SMON_INTSCN_LOTEMP_SEL_POS 16
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#define MXC_F_SMON_INTSCN_LOTEMP_SEL ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOTEMP_SEL_POS))
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#define MXC_F_SMON_INTSCN_VCORELOEN_POS 18
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#define MXC_F_SMON_INTSCN_VCORELOEN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCORELOEN_POS))
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#define MXC_F_SMON_INTSCN_VCOREHIEN_POS 19
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#define MXC_F_SMON_INTSCN_VCOREHIEN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VCOREHIEN_POS))
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#define MXC_F_SMON_INTSCN_VDDLOEN_POS 20
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#define MXC_F_SMON_INTSCN_VDDLOEN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDLOEN_POS))
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#define MXC_F_SMON_INTSCN_VDDHIEN_POS 21
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#define MXC_F_SMON_INTSCN_VDDHIEN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VDDHIEN_POS))
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#define MXC_F_SMON_INTSCN_VGLEN_POS 22
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#define MXC_F_SMON_INTSCN_VGLEN ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_VGLEN_POS))
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#define MXC_F_SMON_INTSCN_LOCK_POS 31
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#define MXC_F_SMON_INTSCN_LOCK ((uint32_t)(0x1UL << MXC_F_SMON_INTSCN_LOCK_POS))
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#define MXC_F_SMON_SECALM_DRS_POS 0
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#define MXC_F_SMON_SECALM_DRS ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_DRS_POS))
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#define MXC_F_SMON_SECALM_KEYWIPE_POS 1
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#define MXC_F_SMON_SECALM_KEYWIPE ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_KEYWIPE_POS))
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#define MXC_F_SMON_SECALM_SHIELDF_POS 2
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#define MXC_F_SMON_SECALM_SHIELDF ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_SHIELDF_POS))
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#define MXC_F_SMON_SECALM_LOTEMP_POS 3
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#define MXC_F_SMON_SECALM_LOTEMP ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_LOTEMP_POS))
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#define MXC_F_SMON_SECALM_HITEMP_POS 4
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#define MXC_F_SMON_SECALM_HITEMP ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_HITEMP_POS))
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#define MXC_F_SMON_SECALM_BATLO_POS 5
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#define MXC_F_SMON_SECALM_BATLO ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATLO_POS))
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#define MXC_F_SMON_SECALM_BATHI_POS 6
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#define MXC_F_SMON_SECALM_BATHI ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_BATHI_POS))
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#define MXC_F_SMON_SECALM_EXTF_POS 7
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#define MXC_F_SMON_SECALM_EXTF ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTF_POS))
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#define MXC_F_SMON_SECALM_VDDLO_POS 8
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#define MXC_F_SMON_SECALM_VDDLO ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDLO_POS))
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#define MXC_F_SMON_SECALM_VCORELO_POS 9
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#define MXC_F_SMON_SECALM_VCORELO ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCORELO_POS))
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#define MXC_F_SMON_SECALM_VCOREHI_POS 10
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#define MXC_F_SMON_SECALM_VCOREHI ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VCOREHI_POS))
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#define MXC_F_SMON_SECALM_VDDHI_POS 11
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#define MXC_F_SMON_SECALM_VDDHI ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VDDHI_POS))
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#define MXC_F_SMON_SECALM_VGL_POS 12
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#define MXC_F_SMON_SECALM_VGL ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_VGL_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT0_POS 16
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#define MXC_F_SMON_SECALM_EXTSTAT0 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT0_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT1_POS 17
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#define MXC_F_SMON_SECALM_EXTSTAT1 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT1_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT2_POS 18
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#define MXC_F_SMON_SECALM_EXTSTAT2 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT2_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT3_POS 19
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#define MXC_F_SMON_SECALM_EXTSTAT3 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT3_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT4_POS 20
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#define MXC_F_SMON_SECALM_EXTSTAT4 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT4_POS))
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#define MXC_F_SMON_SECALM_EXTSTAT5_POS 21
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#define MXC_F_SMON_SECALM_EXTSTAT5 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSTAT5_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN0_POS 24
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#define MXC_F_SMON_SECALM_EXTSWARN0 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN0_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN1_POS 25
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#define MXC_F_SMON_SECALM_EXTSWARN1 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN1_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN2_POS 26
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#define MXC_F_SMON_SECALM_EXTSWARN2 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN2_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN3_POS 27
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#define MXC_F_SMON_SECALM_EXTSWARN3 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN3_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN4_POS 28
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#define MXC_F_SMON_SECALM_EXTSWARN4 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN4_POS))
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#define MXC_F_SMON_SECALM_EXTSWARN5_POS 29
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#define MXC_F_SMON_SECALM_EXTSWARN5 ((uint32_t)(0x1UL << MXC_F_SMON_SECALM_EXTSWARN5_POS))
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#define MXC_F_SMON_SECDIAG_BORF_POS 0
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#define MXC_F_SMON_SECDIAG_BORF ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BORF_POS))
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#define MXC_F_SMON_SECDIAG_SHIELDF_POS 2
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#define MXC_F_SMON_SECDIAG_SHIELDF ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_SHIELDF_POS))
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#define MXC_F_SMON_SECDIAG_LOTEMP_POS 3
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#define MXC_F_SMON_SECDIAG_LOTEMP ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_LOTEMP_POS))
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#define MXC_F_SMON_SECDIAG_HITEMP_POS 4
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#define MXC_F_SMON_SECDIAG_HITEMP ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_HITEMP_POS))
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#define MXC_F_SMON_SECDIAG_BATLO_POS 5
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#define MXC_F_SMON_SECDIAG_BATLO ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATLO_POS))
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#define MXC_F_SMON_SECDIAG_BATHI_POS 6
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#define MXC_F_SMON_SECDIAG_BATHI ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_BATHI_POS))
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#define MXC_F_SMON_SECDIAG_DYNF_POS 7
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#define MXC_F_SMON_SECDIAG_DYNF ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_DYNF_POS))
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#define MXC_F_SMON_SECDIAG_AESKT_POS 8
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#define MXC_F_SMON_SECDIAG_AESKT ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_AESKT_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT0_POS 16
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#define MXC_F_SMON_SECDIAG_EXTSTAT0 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT0_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT1_POS 17
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#define MXC_F_SMON_SECDIAG_EXTSTAT1 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT1_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT2_POS 18
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#define MXC_F_SMON_SECDIAG_EXTSTAT2 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT2_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT3_POS 19
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#define MXC_F_SMON_SECDIAG_EXTSTAT3 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT3_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT4_POS 20
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#define MXC_F_SMON_SECDIAG_EXTSTAT4 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT4_POS))
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#define MXC_F_SMON_SECDIAG_EXTSTAT5_POS 21
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#define MXC_F_SMON_SECDIAG_EXTSTAT5 ((uint32_t)(0x1UL << MXC_F_SMON_SECDIAG_EXTSTAT5_POS))
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#define MXC_F_SMON_DLRTC_DLRTC_POS 0
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#define MXC_F_SMON_DLRTC_DLRTC ((uint32_t)(0xFFFFFFFFUL << MXC_F_SMON_DLRTC_DLRTC_POS))
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#define MXC_F_SMON_SECST_EXTSRS_POS 0
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#define MXC_F_SMON_SECST_EXTSRS ((uint32_t)(0x1UL << MXC_F_SMON_SECST_EXTSRS_POS))
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#define MXC_F_SMON_SECST_INTSRS_POS 1
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#define MXC_F_SMON_SECST_INTSRS ((uint32_t)(0x1UL << MXC_F_SMON_SECST_INTSRS_POS))
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#define MXC_F_SMON_SECST_SECALRS_POS 2
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#define MXC_F_SMON_SECST_SECALRS ((uint32_t)(0x1UL << MXC_F_SMON_SECST_SECALRS_POS))
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _SMON_REGS_H_ */
mxc_smon_regs_t::secdiag
__I uint32_t secdiag
Definition:
smon_regs.h:92
mxc_smon_regs_t::intscn
__IO uint32_t intscn
Definition:
smon_regs.h:90
mxc_smon_regs_t::secst
__I uint32_t secst
Definition:
smon_regs.h:95
mxc_smon_regs_t::extscn
__IO uint32_t extscn
Definition:
smon_regs.h:89
mxc_smon_regs_t
Definition:
smon_regs.h:88
mxc_smon_regs_t::secalm
__IO uint32_t secalm
Definition:
smon_regs.h:91
mxc_smon_regs_t::dlrtc
__I uint32_t dlrtc
Definition:
smon_regs.h:93
CMSIS
Device
Maxim
MAX32665
Include
smon_regs.h
Generated on Fri Dec 4 2020 11:48:59 for MAX32665 Peripheral Driver API by
1.8.20