MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
tpu.h
1 
6 /* ****************************************************************************
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37  * $Date: 2018-11-08 15:08:58 -0600 (Thu, 08 Nov 2018) $
38  * $Revision: 39056 $
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41 
42 #ifndef _TPU_H_
43 #define _TPU_H_
44 
45 #include <stdint.h>
46 #include "tpu_regs.h"
47 #include "trng_regs.h"
48 #include "mxc_sys.h"
49 
50 #ifdef __cplusplus
51 extern "C" {
52 #endif
53 
60 /* ****** MACROS ****** */
61 // CRC Polynomials
62 #define MXC_TPU_CRC32_ETHERNET 0xEDB88320
63 #define MXC_TPU_CRC_CCITT 0x00008408
64 #define MXC_TPU_CRC16 0x0000A001
65 #define MXC_TPU_USBDATA 0x80050000
66 #define MXC_TPU_PARITY 0x00000001
67 
68 //Cipher Keys' Length
69 #define DES_DATA_LEN 8 // The byte length for DES data block
70 #define AES_DATA_LEN 16 // The byte length for AES data block
71 #define MAX_KEY_SIZE 32 // Defines maximum key length
72 #define MXC_AES_DATA_LEN (128 / 8)
73 #define MXC_AES_KEY_128_LEN (128 / 8)
74 #define MXC_AES_KEY_192_LEN (192 / 8)
75 #define MXC_AES_KEY_256_LEN (256 / 8)
77 //Macros used for MAA
78 #define MAA_MAX_SIZE 256 // in bytes
79 #define MAA_MAX_WORD_SIZE 2048 // in bits
80 
81 /***************************************************************************************************************
82  DATA STRUCTURES FOR CRYPTO INITIALIZATION
83 ***************************************************************************************************************/
87 typedef enum {
88  MXC_TPU_CIPHER_DIS = MXC_V_TPU_CIPHER_CTRL_CIPHER_DIS, // Disable
89  MXC_TPU_CIPHER_AES128 = MXC_V_TPU_CIPHER_CTRL_CIPHER_AES128, // Select AES-128
90  MXC_TPU_CIPHER_AES192 = MXC_V_TPU_CIPHER_CTRL_CIPHER_AES192, // Select AES-192
91  MXC_TPU_CIPHER_AES256 = MXC_V_TPU_CIPHER_CTRL_CIPHER_AES256, // Select AES-256
92  MXC_TPU_CIPHER_DES = MXC_V_TPU_CIPHER_CTRL_CIPHER_DES, // Select DES
93  MXC_TPU_CIPHER_TDES = MXC_V_TPU_CIPHER_CTRL_CIPHER_TDES // Select TDEA
95 
99 typedef enum {
100  MXC_TPU_MODE_ECB = MXC_V_TPU_CIPHER_CTRL_MODE_ECB, // Select ECB
101  MXC_TPU_MODE_CBC = MXC_V_TPU_CIPHER_CTRL_MODE_CBC, // Select CBC
102  MXC_TPU_MODE_CFB = MXC_V_TPU_CIPHER_CTRL_MODE_CFB, // Select CFB
103  MXC_TPU_MODE_CTR = MXC_V_TPU_CIPHER_CTRL_MODE_CTR // Select CTR
105 
109 typedef enum {
110  MXC_TPU_HASH_DIS = MXC_V_TPU_HASH_CTRL_HASH_DIS, // Disable
111  MXC_TPU_HASH_SHA1 = MXC_V_TPU_HASH_CTRL_HASH_SHA1, // Select SHA1
112  MXC_TPU_HASH_SHA224 = MXC_V_TPU_HASH_CTRL_HASH_SHA224, // Select SHA224
113  MXC_TPU_HASH_SHA256 = MXC_V_TPU_HASH_CTRL_HASH_SHA256, // Select SHA256
114  MXC_TPU_HASH_SHA384 = MXC_V_TPU_HASH_CTRL_HASH_SHA384, // Select SHA384
115  MXC_TPU_HASH_SHA512 = MXC_V_TPU_HASH_CTRL_HASH_SHA512 // Select SHA384
117 
121 typedef enum {
122  MXC_TPU_MAA_EXP = MXC_V_TPU_MAA_CTRL_CLC_EXP, // Select exponentiation operation
123  MXC_TPU_MAA_SQ = MXC_V_TPU_MAA_CTRL_CLC_SQ, // Select square operation
124  MXC_TPU_MAA_MUL = MXC_V_TPU_MAA_CTRL_CLC_MUL, // Select multiplication operation
125  MXC_TPU_MAA_SQMUL = MXC_V_TPU_MAA_CTRL_CLC_SQMUL, // Select square followed by multiplication operation
126  MXC_TPU_MAA_ADD = MXC_V_TPU_MAA_CTRL_CLC_ADD, // Select add operation
127  MXC_TPU_MAA_SUB = MXC_V_TPU_MAA_CTRL_CLC_SUB // Select subtract operation
129 
130 
131 /***** Function Prototypes *****/
132 
133 /* ************************************************************************* */
134 /* Global Control/Configuration functions */
135 /* ************************************************************************* */
136 
143 int MXC_TPU_Init(mxc_sys_periph_clock_t clock);
144 
148 int MXC_TPU_Shutdown(mxc_sys_periph_clock_t clock);
149 
153 void MXC_TPU_Reset(void);
154 
155 
156 /* ************************************************************************* */
157 /* Cyclic Redundancy Check (CRC) functions */
158 /* ************************************************************************* */
159 
165 
175 int MXC_TPU_CRC(const uint8_t *src, uint32_t len, uint32_t poly, uint32_t *crc);
176 
182 
191 int MXC_TPU_Ham(const uint8_t *src, uint32_t len, uint32_t *ecc);
192 
193 
194 /* ************************************************************************* */
195 /* Cipher functions */
196 /* ************************************************************************* */
197 
202 
207 
211 unsigned int MXC_TPU_Cipher_GetLength(mxc_tpu_ciphersel_t cipher, unsigned int data_size);
212 
218 
226 
240 int MXC_TPU_Cipher_DoOperation(const char *src, const char *iv, const char *key,
241  mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
242 
255 int MXC_TPU_Cipher_DES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
256 
269 int MXC_TPU_Cipher_DES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
270 
283 int MXC_TPU_Cipher_TDES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
284 
297 int MXC_TPU_Cipher_TDES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
298 
313 int MXC_TPU_Cipher_AES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
314 
329 int MXC_TPU_Cipher_AES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr);
330 
331 
332 /* ************************************************************************* */
333 /* Hash functions */
334 /* ************************************************************************* */
335 
340 
345 
349 void MXC_TPU_Hash_SHA_Size(unsigned int *blocks, unsigned int *length, unsigned int *lbyte,
351 
358 
368 int MXC_TPU_Hash_SHA( const char *msg, mxc_tpu_hashfunsel_t fun, unsigned int byteLen, char *digest);
369 
370 
371 /* ************************************************************************* */
372 /* True Random Number Generator (TRNG) functions */
373 /* ************************************************************************* */
374 
381 
388 
395 
402 void MXC_TPU_TRNG_Read(mxc_trng_regs_t *trng, uint8_t *data, int len);
403 
409 
410 
411 /* ************************************************************************* */
412 /* Modular Arithmetic Accelerator (MAA) functions */
413 /* ************************************************************************* */
414 
419 
423 void MXC_TPU_MAA_Reset(void);
424 
431 int MXC_TPU_MAA_Init(unsigned int size);
432 
440 
457 int MXC_TPU_MAA_Compute(mxc_tpu_maa_clcsel_t clc, char *multiplier, char *multiplicand, char *exp, char *mod, int *result, unsigned int len);
458 
459 #ifdef __cplusplus
460 }
461 #endif
462 
464 #endif /* _TPU_H_ */
MXC_TPU_Cipher_TDES_Decrypt
int MXC_TPU_Cipher_TDES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The TDES decryption process.
MXC_TPU_Cipher_GetLength
unsigned int MXC_TPU_Cipher_GetLength(mxc_tpu_ciphersel_t cipher, unsigned int data_size)
Get number of blocks.
MXC_V_TPU_MAA_CTRL_CLC_SQ
#define MXC_V_TPU_MAA_CTRL_CLC_SQ
Definition: tpu_regs.h:370
MXC_TPU_Ham
int MXC_TPU_Ham(const uint8_t *src, uint32_t len, uint32_t *ecc)
Test the CRC process.
MXC_TPU_Cipher_Get_Block_Size
unsigned int MXC_TPU_Cipher_Get_Block_Size(mxc_tpu_ciphersel_t cipher)
Get cipher block's size.
MXC_V_TPU_CIPHER_CTRL_MODE_CFB
#define MXC_V_TPU_CIPHER_CTRL_MODE_CFB
Definition: tpu_regs.h:257
MXC_TPU_Hash_Config
int MXC_TPU_Hash_Config(mxc_tpu_hashfunsel_t func)
Configure crypto hash operation for different hash functions.
MXC_TPU_Hash_SHA
int MXC_TPU_Hash_SHA(const char *msg, mxc_tpu_hashfunsel_t fun, unsigned int byteLen, char *digest)
Test the SHA process.
MXC_V_TPU_CIPHER_CTRL_MODE_CTR
#define MXC_V_TPU_CIPHER_CTRL_MODE_CTR
Definition: tpu_regs.h:261
MXC_TPU_Cipher_TDES_Encrypt
int MXC_TPU_Cipher_TDES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The TDES encryption process.
MXC_TPU_CRC_Config
int MXC_TPU_CRC_Config(void)
Configure crypto CRC operation.
MXC_V_TPU_HASH_CTRL_HASH_SHA384
#define MXC_V_TPU_HASH_CTRL_HASH_SHA384
Definition: tpu_regs.h:288
MXC_TPU_Cipher_AES_Encrypt
int MXC_TPU_Cipher_AES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The AES encryption process.
MXC_V_TPU_MAA_CTRL_CLC_SQMUL
#define MXC_V_TPU_MAA_CTRL_CLC_SQMUL
Definition: tpu_regs.h:374
MXC_TPU_Shutdown
int MXC_TPU_Shutdown(mxc_sys_periph_clock_t clock)
Shutdown CRYPTO system specific settings.
MXC_TPU_Cipher_DoOperation
int MXC_TPU_Cipher_DoOperation(const char *src, const char *iv, const char *key, mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
Test Cipher Algorithm.
MXC_V_TPU_CIPHER_CTRL_CIPHER_DIS
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_DIS
Definition: tpu_regs.h:238
MXC_TPU_MAA_Shutdown
int MXC_TPU_MAA_Shutdown(void)
Release MAA.
MXC_TPU_Cipher_Config
int MXC_TPU_Cipher_Config(mxc_tpu_modesel_t mode, mxc_tpu_ciphersel_t cipher)
Configure crypto cipher operation for different modes.
MXC_V_TPU_HASH_CTRL_HASH_SHA224
#define MXC_V_TPU_HASH_CTRL_HASH_SHA224
Definition: tpu_regs.h:284
MXC_TPU_TRNG_Read8BIT
uint8_t MXC_TPU_TRNG_Read8BIT(mxc_trng_regs_t *trng)
Reads 8-bit value stored in the data register.
MXC_V_TPU_MAA_CTRL_CLC_SUB
#define MXC_V_TPU_MAA_CTRL_CLC_SUB
Definition: tpu_regs.h:378
MXC_V_TPU_CIPHER_CTRL_CIPHER_TDES
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_TDES
Definition: tpu_regs.h:248
MXC_V_TPU_MAA_CTRL_CLC_ADD
#define MXC_V_TPU_MAA_CTRL_CLC_ADD
Definition: tpu_regs.h:376
MXC_TPU_Init
int MXC_TPU_Init(mxc_sys_periph_clock_t clock)
Init CRYPTO system settings.
MXC_TPU_Ham_Config
int MXC_TPU_Ham_Config(void)
Configure crypto HAM operation.
MXC_V_TPU_CIPHER_CTRL_MODE_CBC
#define MXC_V_TPU_CIPHER_CTRL_MODE_CBC
Definition: tpu_regs.h:255
MXC_V_TPU_CIPHER_CTRL_CIPHER_AES128
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES128
Definition: tpu_regs.h:240
mxc_trng_regs_t
Definition: trng_regs.h:88
MXC_V_TPU_CIPHER_CTRL_MODE_ECB
#define MXC_V_TPU_CIPHER_CTRL_MODE_ECB
Definition: tpu_regs.h:253
MXC_V_TPU_HASH_CTRL_HASH_DIS
#define MXC_V_TPU_HASH_CTRL_HASH_DIS
Definition: tpu_regs.h:280
MXC_TPU_Hash_Get_Block_Size_SHA
unsigned int MXC_TPU_Hash_Get_Block_Size_SHA(mxc_tpu_hashfunsel_t func)
Get hash block's size.
MXC_TPU_MAA_Init
int MXC_TPU_MAA_Init(unsigned int size)
Configure MAA operation with appropriate MAA word size.
MXC_V_TPU_CIPHER_CTRL_CIPHER_AES192
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES192
Definition: tpu_regs.h:242
MXC_TPU_Cipher_AES_Decrypt
int MXC_TPU_Cipher_AES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_ciphersel_t cipher, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The AES decryption process.
mxc_tpu_hashfunsel_t
mxc_tpu_hashfunsel_t
Definition: tpu.h:109
MXC_TPU_Cipher_DES_Decrypt
int MXC_TPU_Cipher_DES_Decrypt(const char *ciphertext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The DES decryption process.
MXC_TPU_Cipher_DES_Encrypt
int MXC_TPU_Cipher_DES_Encrypt(const char *plaintext, const char *iv, const char *key, mxc_tpu_modesel_t mode, unsigned int data_size, char *outptr)
The DES encryption process.
MXC_V_TPU_HASH_CTRL_HASH_SHA1
#define MXC_V_TPU_HASH_CTRL_HASH_SHA1
Definition: tpu_regs.h:282
MXC_TPU_TRNG_Generate_AES
void MXC_TPU_TRNG_Generate_AES(mxc_trng_regs_t *trng)
Generates 256-bits random number automatically.
MXC_V_TPU_HASH_CTRL_HASH_SHA256
#define MXC_V_TPU_HASH_CTRL_HASH_SHA256
Definition: tpu_regs.h:286
MXC_TPU_Reset
void MXC_TPU_Reset(void)
Reset the crypto accelerator.
MXC_TPU_TRNG_Read32BIT
uint32_t MXC_TPU_TRNG_Read32BIT(mxc_trng_regs_t *trng)
Reads 32-bit value stored in the data register.
MXC_TPU_Hash_Get_Dgst_Size
unsigned int MXC_TPU_Hash_Get_Dgst_Size(mxc_tpu_hashfunsel_t func)
Get hash digest's size.
MXC_V_TPU_CIPHER_CTRL_CIPHER_AES256
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_AES256
Definition: tpu_regs.h:244
MXC_TPU_Hash_SHA_Size
void MXC_TPU_Hash_SHA_Size(unsigned int *blocks, unsigned int *length, unsigned int *lbyte, mxc_tpu_hashfunsel_t fun)
Get SHA size.
MXC_TPU_TRNG_Read16BIT
uint16_t MXC_TPU_TRNG_Read16BIT(mxc_trng_regs_t *trng)
Reads 16-bit value stored in the data register.
MXC_V_TPU_CIPHER_CTRL_CIPHER_DES
#define MXC_V_TPU_CIPHER_CTRL_CIPHER_DES
Definition: tpu_regs.h:246
mxc_tpu_maa_clcsel_t
mxc_tpu_maa_clcsel_t
Definition: tpu.h:121
MXC_TPU_Cipher_EncDecSelect
void MXC_TPU_Cipher_EncDecSelect(int enc)
Enable Encrypt/Decrypt Cipher Operation.
MXC_V_TPU_HASH_CTRL_HASH_SHA512
#define MXC_V_TPU_HASH_CTRL_HASH_SHA512
Definition: tpu_regs.h:290
MXC_V_TPU_MAA_CTRL_CLC_EXP
#define MXC_V_TPU_MAA_CTRL_CLC_EXP
Definition: tpu_regs.h:368
MXC_TPU_Cipher_Get_Key_Size
unsigned int MXC_TPU_Cipher_Get_Key_Size(mxc_tpu_ciphersel_t cipher)
Get cipher key's size.
mxc_tpu_ciphersel_t
mxc_tpu_ciphersel_t
Definition: tpu.h:87
MXC_TPU_CRC
int MXC_TPU_CRC(const uint8_t *src, uint32_t len, uint32_t poly, uint32_t *crc)
Test the CRC process.
mxc_tpu_modesel_t
mxc_tpu_modesel_t
Definition: tpu.h:99
MXC_TPU_MAA_Reset
void MXC_TPU_MAA_Reset(void)
Reset the TPU accelerator.
MXC_TPU_TRNG_Read
void MXC_TPU_TRNG_Read(mxc_trng_regs_t *trng, uint8_t *data, int len)
Generates Random Number of variable length.
MXC_TPU_MAA_Compute
int MXC_TPU_MAA_Compute(mxc_tpu_maa_clcsel_t clc, char *multiplier, char *multiplicand, char *exp, char *mod, int *result, unsigned int len)
MAA operation.
MXC_V_TPU_MAA_CTRL_CLC_MUL
#define MXC_V_TPU_MAA_CTRL_CLC_MUL
Definition: tpu_regs.h:372
MXC_TPU_MAA_Mem_Clear
void MXC_TPU_MAA_Mem_Clear(void)
Initialize memory used for MAA.