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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Interrupt register for OUT EP 1-15.
#define MXC_F_USBHS_INTROUT_EP10_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP10_OUT_INT_POS)) |
INTROUT_EP10_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP10_OUT_INT_POS 10 |
INTROUT_EP10_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP11_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP11_OUT_INT_POS)) |
INTROUT_EP11_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP11_OUT_INT_POS 11 |
INTROUT_EP11_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP12_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP12_OUT_INT_POS)) |
INTROUT_EP12_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP12_OUT_INT_POS 12 |
INTROUT_EP12_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP13_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP13_OUT_INT_POS)) |
INTROUT_EP13_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP13_OUT_INT_POS 13 |
INTROUT_EP13_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP14_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP14_OUT_INT_POS)) |
INTROUT_EP14_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP14_OUT_INT_POS 14 |
INTROUT_EP14_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP15_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP15_OUT_INT_POS)) |
INTROUT_EP15_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP15_OUT_INT_POS 15 |
INTROUT_EP15_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP1_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP1_OUT_INT_POS)) |
INTROUT_EP1_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP1_OUT_INT_POS 1 |
INTROUT_EP1_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP2_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP2_OUT_INT_POS)) |
INTROUT_EP2_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP2_OUT_INT_POS 2 |
INTROUT_EP2_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP3_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP3_OUT_INT_POS)) |
INTROUT_EP3_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP3_OUT_INT_POS 3 |
INTROUT_EP3_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP4_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP4_OUT_INT_POS)) |
INTROUT_EP4_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP4_OUT_INT_POS 4 |
INTROUT_EP4_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP5_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP5_OUT_INT_POS)) |
INTROUT_EP5_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP5_OUT_INT_POS 5 |
INTROUT_EP5_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP6_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP6_OUT_INT_POS)) |
INTROUT_EP6_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP6_OUT_INT_POS 6 |
INTROUT_EP6_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP7_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP7_OUT_INT_POS)) |
INTROUT_EP7_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP7_OUT_INT_POS 7 |
INTROUT_EP7_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP8_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP8_OUT_INT_POS)) |
INTROUT_EP8_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP8_OUT_INT_POS 8 |
INTROUT_EP8_OUT_INT Position
#define MXC_F_USBHS_INTROUT_EP9_OUT_INT ((uint16_t)(0x1UL << MXC_F_USBHS_INTROUT_EP9_OUT_INT_POS)) |
INTROUT_EP9_OUT_INT Mask
#define MXC_F_USBHS_INTROUT_EP9_OUT_INT_POS 9 |
INTROUT_EP9_OUT_INT Position