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MAX32665 Peripheral Driver API
Peripheral Driver API for the MAX32665
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Macros | |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24_POS 0 |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24_POS)) |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25_POS 8 |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25_POS)) |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26_POS 16 |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26_POS)) |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27_POS 24 |
#define | MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27_POS)) |
Interrupt Mux Control 2.
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24_POS)) |
INT_MUX_CTRL2_INTSEL24 Mask
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL24_POS 0 |
INT_MUX_CTRL2_INTSEL24 Position
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25_POS)) |
INT_MUX_CTRL2_INTSEL25 Mask
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL25_POS 8 |
INT_MUX_CTRL2_INTSEL25 Position
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26_POS)) |
INT_MUX_CTRL2_INTSEL26 Mask
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL26_POS 16 |
INT_MUX_CTRL2_INTSEL26 Position
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27 ((uint32_t)(0xFFUL << MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27_POS)) |
INT_MUX_CTRL2_INTSEL27 Mask
#define MXC_F_SDMA_INT_MUX_CTRL2_INTSEL27_POS 24 |
INT_MUX_CTRL2_INTSEL27 Position