Macros
#define	MXC_F_GCR_PCLKDIS0_GPIO0_POS 0

#define	MXC_F_GCR_PCLKDIS0_GPIO0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO0_POS))

#define	MXC_F_GCR_PCLKDIS0_GPIO1_POS 1

#define	MXC_F_GCR_PCLKDIS0_GPIO1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO1_POS))

#define	MXC_F_GCR_PCLKDIS0_DMA_POS 5

#define	MXC_F_GCR_PCLKDIS0_DMA ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_DMA_POS))

#define	MXC_F_GCR_PCLKDIS0_SPI1_POS 6

#define	MXC_F_GCR_PCLKDIS0_SPI1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_SPI1_POS))

#define	MXC_F_GCR_PCLKDIS0_UART0_POS 9

#define	MXC_F_GCR_PCLKDIS0_UART0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART0_POS))

#define	MXC_F_GCR_PCLKDIS0_UART1_POS 10

#define	MXC_F_GCR_PCLKDIS0_UART1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART1_POS))

#define	MXC_F_GCR_PCLKDIS0_I2C0_POS 13

#define	MXC_F_GCR_PCLKDIS0_I2C0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C0_POS))

#define	MXC_F_GCR_PCLKDIS0_TMR0_POS 15

#define	MXC_F_GCR_PCLKDIS0_TMR0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR0_POS))

#define	MXC_F_GCR_PCLKDIS0_TMR1_POS 16

#define	MXC_F_GCR_PCLKDIS0_TMR1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR1_POS))

#define	MXC_F_GCR_PCLKDIS0_TMR2_POS 17

#define	MXC_F_GCR_PCLKDIS0_TMR2 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR2_POS))

#define	MXC_F_GCR_PCLKDIS0_TMR3_POS 18

#define	MXC_F_GCR_PCLKDIS0_TMR3 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR3_POS))

#define	MXC_F_GCR_PCLKDIS0_ADC_POS 23

#define	MXC_F_GCR_PCLKDIS0_ADC ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_ADC_POS))

#define	MXC_F_GCR_PCLKDIS0_CNN_POS 25

#define	MXC_F_GCR_PCLKDIS0_CNN ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_CNN_POS))

#define	MXC_F_GCR_PCLKDIS0_I2C1_POS 28

#define	MXC_F_GCR_PCLKDIS0_I2C1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C1_POS))

#define	MXC_F_GCR_PCLKDIS0_PT_POS 29

#define	MXC_F_GCR_PCLKDIS0_PT ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_PT_POS))

Detailed Description

Peripheral Clock Disable.

Macro Definition Documentation

◆ MXC_F_GCR_PCLKDIS0_ADC

#define MXC_F_GCR_PCLKDIS0_ADC ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_ADC_POS))

PCLKDIS0_ADC Mask

◆ MXC_F_GCR_PCLKDIS0_ADC_POS

#define MXC_F_GCR_PCLKDIS0_ADC_POS 23

PCLKDIS0_ADC Position

◆ MXC_F_GCR_PCLKDIS0_CNN

#define MXC_F_GCR_PCLKDIS0_CNN ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_CNN_POS))

PCLKDIS0_CNN Mask

◆ MXC_F_GCR_PCLKDIS0_CNN_POS

#define MXC_F_GCR_PCLKDIS0_CNN_POS 25

PCLKDIS0_CNN Position

◆ MXC_F_GCR_PCLKDIS0_DMA

#define MXC_F_GCR_PCLKDIS0_DMA ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_DMA_POS))

PCLKDIS0_DMA Mask

◆ MXC_F_GCR_PCLKDIS0_DMA_POS

#define MXC_F_GCR_PCLKDIS0_DMA_POS 5

PCLKDIS0_DMA Position

◆ MXC_F_GCR_PCLKDIS0_GPIO0

#define MXC_F_GCR_PCLKDIS0_GPIO0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO0_POS))

PCLKDIS0_GPIO0 Mask

◆ MXC_F_GCR_PCLKDIS0_GPIO0_POS

#define MXC_F_GCR_PCLKDIS0_GPIO0_POS 0

PCLKDIS0_GPIO0 Position

◆ MXC_F_GCR_PCLKDIS0_GPIO1

#define MXC_F_GCR_PCLKDIS0_GPIO1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_GPIO1_POS))

PCLKDIS0_GPIO1 Mask

◆ MXC_F_GCR_PCLKDIS0_GPIO1_POS

#define MXC_F_GCR_PCLKDIS0_GPIO1_POS 1

PCLKDIS0_GPIO1 Position

◆ MXC_F_GCR_PCLKDIS0_I2C0

#define MXC_F_GCR_PCLKDIS0_I2C0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C0_POS))

PCLKDIS0_I2C0 Mask

◆ MXC_F_GCR_PCLKDIS0_I2C0_POS

#define MXC_F_GCR_PCLKDIS0_I2C0_POS 13

PCLKDIS0_I2C0 Position

◆ MXC_F_GCR_PCLKDIS0_I2C1

#define MXC_F_GCR_PCLKDIS0_I2C1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_I2C1_POS))

PCLKDIS0_I2C1 Mask

◆ MXC_F_GCR_PCLKDIS0_I2C1_POS

#define MXC_F_GCR_PCLKDIS0_I2C1_POS 28

PCLKDIS0_I2C1 Position

◆ MXC_F_GCR_PCLKDIS0_PT

#define MXC_F_GCR_PCLKDIS0_PT ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_PT_POS))

PCLKDIS0_PT Mask

◆ MXC_F_GCR_PCLKDIS0_PT_POS

#define MXC_F_GCR_PCLKDIS0_PT_POS 29

PCLKDIS0_PT Position

◆ MXC_F_GCR_PCLKDIS0_SPI1

#define MXC_F_GCR_PCLKDIS0_SPI1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_SPI1_POS))

PCLKDIS0_SPI1 Mask

◆ MXC_F_GCR_PCLKDIS0_SPI1_POS

#define MXC_F_GCR_PCLKDIS0_SPI1_POS 6

PCLKDIS0_SPI1 Position

◆ MXC_F_GCR_PCLKDIS0_TMR0

#define MXC_F_GCR_PCLKDIS0_TMR0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR0_POS))

PCLKDIS0_TMR0 Mask

◆ MXC_F_GCR_PCLKDIS0_TMR0_POS

#define MXC_F_GCR_PCLKDIS0_TMR0_POS 15

PCLKDIS0_TMR0 Position

◆ MXC_F_GCR_PCLKDIS0_TMR1

#define MXC_F_GCR_PCLKDIS0_TMR1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR1_POS))

PCLKDIS0_TMR1 Mask

◆ MXC_F_GCR_PCLKDIS0_TMR1_POS

#define MXC_F_GCR_PCLKDIS0_TMR1_POS 16

PCLKDIS0_TMR1 Position

◆ MXC_F_GCR_PCLKDIS0_TMR2

#define MXC_F_GCR_PCLKDIS0_TMR2 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR2_POS))

PCLKDIS0_TMR2 Mask

◆ MXC_F_GCR_PCLKDIS0_TMR2_POS

#define MXC_F_GCR_PCLKDIS0_TMR2_POS 17

PCLKDIS0_TMR2 Position

◆ MXC_F_GCR_PCLKDIS0_TMR3

#define MXC_F_GCR_PCLKDIS0_TMR3 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_TMR3_POS))

PCLKDIS0_TMR3 Mask

◆ MXC_F_GCR_PCLKDIS0_TMR3_POS

#define MXC_F_GCR_PCLKDIS0_TMR3_POS 18

PCLKDIS0_TMR3 Position

◆ MXC_F_GCR_PCLKDIS0_UART0

#define MXC_F_GCR_PCLKDIS0_UART0 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART0_POS))

PCLKDIS0_UART0 Mask

◆ MXC_F_GCR_PCLKDIS0_UART0_POS

#define MXC_F_GCR_PCLKDIS0_UART0_POS 9

PCLKDIS0_UART0 Position

◆ MXC_F_GCR_PCLKDIS0_UART1

#define MXC_F_GCR_PCLKDIS0_UART1 ((uint32_t)(0x1UL << MXC_F_GCR_PCLKDIS0_UART1_POS))

PCLKDIS0_UART1 Mask

◆ MXC_F_GCR_PCLKDIS0_UART1_POS

#define MXC_F_GCR_PCLKDIS0_UART1_POS 10

PCLKDIS0_UART1 Position

Macros