GCR_BTLELDODLY

Macros
#define	MXC_F_GCR_BTLELDODLY_BYPDLYCNT_POS   0
#define	MXC_F_GCR_BTLELDODLY_BYPDLYCNT   ((uint32_t)(0xFFUL << MXC_F_GCR_BTLELDODLY_BYPDLYCNT_POS))
#define	MXC_F_GCR_BTLELDODLY_LDORXDLYCNT_POS   8
#define	MXC_F_GCR_BTLELDODLY_LDORXDLYCNT   ((uint32_t)(0x1FFUL << MXC_F_GCR_BTLELDODLY_LDORXDLYCNT_POS))
#define	MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT_POS   20
#define	MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT   ((uint32_t)(0x1FFUL << MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT_POS))

Detailed Description

BTLE LDO Delay Register.

Macro Definition Documentation

MXC_F_GCR_BTLELDODLY_BYPDLYCNT

#define MXC_F_GCR_BTLELDODLY_BYPDLYCNT   ((uint32_t)(0xFFUL << MXC_F_GCR_BTLELDODLY_BYPDLYCNT_POS))

BTLELDODLY_BYPDLYCNT Mask

MXC_F_GCR_BTLELDODLY_BYPDLYCNT_POS

#define MXC_F_GCR_BTLELDODLY_BYPDLYCNT_POS   0

BTLELDODLY_BYPDLYCNT Position

MXC_F_GCR_BTLELDODLY_LDORXDLYCNT

#define MXC_F_GCR_BTLELDODLY_LDORXDLYCNT   ((uint32_t)(0x1FFUL << MXC_F_GCR_BTLELDODLY_LDORXDLYCNT_POS))

BTLELDODLY_LDORXDLYCNT Mask

MXC_F_GCR_BTLELDODLY_LDORXDLYCNT_POS

#define MXC_F_GCR_BTLELDODLY_LDORXDLYCNT_POS   8

BTLELDODLY_LDORXDLYCNT Position

MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT

#define MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT   ((uint32_t)(0x1FFUL << MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT_POS))

BTLELDODLY_LDOTXDLYCNT Mask

MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT_POS

#define MXC_F_GCR_BTLELDODLY_LDOTXDLYCNT_POS   20

BTLELDODLY_LDOTXDLYCNT Position