50 #if defined (__ICCARM__) 51 #pragma system_include 54 #if defined (__CC_ARM) 65 #define __I volatile const 71 #define __R volatile const 93 __IO uint32_t limit[4];
103 #define MXC_R_ADC_CTRL ((uint32_t)0x00000000UL) 104 #define MXC_R_ADC_STATUS ((uint32_t)0x00000004UL) 105 #define MXC_R_ADC_DATA ((uint32_t)0x00000008UL) 106 #define MXC_R_ADC_INTR ((uint32_t)0x0000000CUL) 107 #define MXC_R_ADC_LIMIT ((uint32_t)0x00000010UL) 116 #define MXC_F_ADC_CTRL_START_POS 0 117 #define MXC_F_ADC_CTRL_START ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_START_POS)) 119 #define MXC_F_ADC_CTRL_PWR_POS 1 120 #define MXC_F_ADC_CTRL_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_PWR_POS)) 122 #define MXC_F_ADC_CTRL_REFBUF_PWR_POS 3 123 #define MXC_F_ADC_CTRL_REFBUF_PWR ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REFBUF_PWR_POS)) 125 #define MXC_F_ADC_CTRL_REF_SEL_POS 4 126 #define MXC_F_ADC_CTRL_REF_SEL ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SEL_POS)) 128 #define MXC_F_ADC_CTRL_REF_SCALE_POS 8 129 #define MXC_F_ADC_CTRL_REF_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_REF_SCALE_POS)) 131 #define MXC_F_ADC_CTRL_SCALE_POS 9 132 #define MXC_F_ADC_CTRL_SCALE ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_SCALE_POS)) 134 #define MXC_F_ADC_CTRL_CLK_EN_POS 11 135 #define MXC_F_ADC_CTRL_CLK_EN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_CLK_EN_POS)) 137 #define MXC_F_ADC_CTRL_CH_SEL_POS 12 138 #define MXC_F_ADC_CTRL_CH_SEL ((uint32_t)(0x1FUL << MXC_F_ADC_CTRL_CH_SEL_POS)) 139 #define MXC_V_ADC_CTRL_CH_SEL_AIN0 ((uint32_t)0x0UL) 140 #define MXC_S_ADC_CTRL_CH_SEL_AIN0 (MXC_V_ADC_CTRL_CH_SEL_AIN0 << MXC_F_ADC_CTRL_CH_SEL_POS) 141 #define MXC_V_ADC_CTRL_CH_SEL_AIN1 ((uint32_t)0x1UL) 142 #define MXC_S_ADC_CTRL_CH_SEL_AIN1 (MXC_V_ADC_CTRL_CH_SEL_AIN1 << MXC_F_ADC_CTRL_CH_SEL_POS) 143 #define MXC_V_ADC_CTRL_CH_SEL_AIN2 ((uint32_t)0x2UL) 144 #define MXC_S_ADC_CTRL_CH_SEL_AIN2 (MXC_V_ADC_CTRL_CH_SEL_AIN2 << MXC_F_ADC_CTRL_CH_SEL_POS) 145 #define MXC_V_ADC_CTRL_CH_SEL_AIN3 ((uint32_t)0x3UL) 146 #define MXC_S_ADC_CTRL_CH_SEL_AIN3 (MXC_V_ADC_CTRL_CH_SEL_AIN3 << MXC_F_ADC_CTRL_CH_SEL_POS) 147 #define MXC_V_ADC_CTRL_CH_SEL_AIN4 ((uint32_t)0x4UL) 148 #define MXC_S_ADC_CTRL_CH_SEL_AIN4 (MXC_V_ADC_CTRL_CH_SEL_AIN4 << MXC_F_ADC_CTRL_CH_SEL_POS) 149 #define MXC_V_ADC_CTRL_CH_SEL_AIN5 ((uint32_t)0x5UL) 150 #define MXC_S_ADC_CTRL_CH_SEL_AIN5 (MXC_V_ADC_CTRL_CH_SEL_AIN5 << MXC_F_ADC_CTRL_CH_SEL_POS) 151 #define MXC_V_ADC_CTRL_CH_SEL_AIN6 ((uint32_t)0x6UL) 152 #define MXC_S_ADC_CTRL_CH_SEL_AIN6 (MXC_V_ADC_CTRL_CH_SEL_AIN6 << MXC_F_ADC_CTRL_CH_SEL_POS) 153 #define MXC_V_ADC_CTRL_CH_SEL_AIN7 ((uint32_t)0x7UL) 154 #define MXC_S_ADC_CTRL_CH_SEL_AIN7 (MXC_V_ADC_CTRL_CH_SEL_AIN7 << MXC_F_ADC_CTRL_CH_SEL_POS) 155 #define MXC_V_ADC_CTRL_CH_SEL_VCOREA ((uint32_t)0x8UL) 156 #define MXC_S_ADC_CTRL_CH_SEL_VCOREA (MXC_V_ADC_CTRL_CH_SEL_VCOREA << MXC_F_ADC_CTRL_CH_SEL_POS) 157 #define MXC_V_ADC_CTRL_CH_SEL_VCOREB ((uint32_t)0x9UL) 158 #define MXC_S_ADC_CTRL_CH_SEL_VCOREB (MXC_V_ADC_CTRL_CH_SEL_VCOREB << MXC_F_ADC_CTRL_CH_SEL_POS) 159 #define MXC_V_ADC_CTRL_CH_SEL_VRXOUT ((uint32_t)0xAUL) 160 #define MXC_S_ADC_CTRL_CH_SEL_VRXOUT (MXC_V_ADC_CTRL_CH_SEL_VRXOUT << MXC_F_ADC_CTRL_CH_SEL_POS) 161 #define MXC_V_ADC_CTRL_CH_SEL_VTXOUT ((uint32_t)0xBUL) 162 #define MXC_S_ADC_CTRL_CH_SEL_VTXOUT (MXC_V_ADC_CTRL_CH_SEL_VTXOUT << MXC_F_ADC_CTRL_CH_SEL_POS) 163 #define MXC_V_ADC_CTRL_CH_SEL_VDDA ((uint32_t)0xCUL) 164 #define MXC_S_ADC_CTRL_CH_SEL_VDDA (MXC_V_ADC_CTRL_CH_SEL_VDDA << MXC_F_ADC_CTRL_CH_SEL_POS) 165 #define MXC_V_ADC_CTRL_CH_SEL_VDDB ((uint32_t)0xDUL) 166 #define MXC_S_ADC_CTRL_CH_SEL_VDDB (MXC_V_ADC_CTRL_CH_SEL_VDDB << MXC_F_ADC_CTRL_CH_SEL_POS) 167 #define MXC_V_ADC_CTRL_CH_SEL_VDDIO ((uint32_t)0xEUL) 168 #define MXC_S_ADC_CTRL_CH_SEL_VDDIO (MXC_V_ADC_CTRL_CH_SEL_VDDIO << MXC_F_ADC_CTRL_CH_SEL_POS) 169 #define MXC_V_ADC_CTRL_CH_SEL_VDDIOH ((uint32_t)0xFUL) 170 #define MXC_S_ADC_CTRL_CH_SEL_VDDIOH (MXC_V_ADC_CTRL_CH_SEL_VDDIOH << MXC_F_ADC_CTRL_CH_SEL_POS) 171 #define MXC_V_ADC_CTRL_CH_SEL_VREGI ((uint32_t)0x10UL) 172 #define MXC_S_ADC_CTRL_CH_SEL_VREGI (MXC_V_ADC_CTRL_CH_SEL_VREGI << MXC_F_ADC_CTRL_CH_SEL_POS) 174 #define MXC_F_ADC_CTRL_ADC_DIVSEL_POS 17 175 #define MXC_F_ADC_CTRL_ADC_DIVSEL ((uint32_t)(0x3UL << MXC_F_ADC_CTRL_ADC_DIVSEL_POS)) 176 #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 ((uint32_t)0x0UL) 177 #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV1 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV1 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS) 178 #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 ((uint32_t)0x1UL) 179 #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV2 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV2 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS) 180 #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 ((uint32_t)0x2UL) 181 #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV3 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV3 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS) 182 #define MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 ((uint32_t)0x3UL) 183 #define MXC_S_ADC_CTRL_ADC_DIVSEL_DIV4 (MXC_V_ADC_CTRL_ADC_DIVSEL_DIV4 << MXC_F_ADC_CTRL_ADC_DIVSEL_POS) 185 #define MXC_F_ADC_CTRL_DATA_ALIGN_POS 20 186 #define MXC_F_ADC_CTRL_DATA_ALIGN ((uint32_t)(0x1UL << MXC_F_ADC_CTRL_DATA_ALIGN_POS)) 196 #define MXC_F_ADC_STATUS_ACTIVE_POS 0 197 #define MXC_F_ADC_STATUS_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_ACTIVE_POS)) 199 #define MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE_POS 2 200 #define MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE_POS)) 202 #define MXC_F_ADC_STATUS_OVERFLOW_POS 3 203 #define MXC_F_ADC_STATUS_OVERFLOW ((uint32_t)(0x1UL << MXC_F_ADC_STATUS_OVERFLOW_POS)) 213 #define MXC_F_ADC_DATA_ADC_DATA_POS 0 214 #define MXC_F_ADC_DATA_ADC_DATA ((uint32_t)(0xFFFFUL << MXC_F_ADC_DATA_ADC_DATA_POS)) 224 #define MXC_F_ADC_INTR_DONE_IE_POS 0 225 #define MXC_F_ADC_INTR_DONE_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IE_POS)) 227 #define MXC_F_ADC_INTR_REF_READY_IE_POS 1 228 #define MXC_F_ADC_INTR_REF_READY_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IE_POS)) 230 #define MXC_F_ADC_INTR_HI_LIMIT_IE_POS 2 231 #define MXC_F_ADC_INTR_HI_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_HI_LIMIT_IE_POS)) 233 #define MXC_F_ADC_INTR_LO_LIMIT_IE_POS 3 234 #define MXC_F_ADC_INTR_LO_LIMIT_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_LO_LIMIT_IE_POS)) 236 #define MXC_F_ADC_INTR_OVERFLOW_IE_POS 4 237 #define MXC_F_ADC_INTR_OVERFLOW_IE ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IE_POS)) 239 #define MXC_F_ADC_INTR_DONE_IF_POS 16 240 #define MXC_F_ADC_INTR_DONE_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_DONE_IF_POS)) 242 #define MXC_F_ADC_INTR_REF_READY_IF_POS 17 243 #define MXC_F_ADC_INTR_REF_READY_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_REF_READY_IF_POS)) 245 #define MXC_F_ADC_INTR_HI_LIMIT_IF_POS 18 246 #define MXC_F_ADC_INTR_HI_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_HI_LIMIT_IF_POS)) 248 #define MXC_F_ADC_INTR_LO_LIMIT_IF_POS 19 249 #define MXC_F_ADC_INTR_LO_LIMIT_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_LO_LIMIT_IF_POS)) 251 #define MXC_F_ADC_INTR_OVERFLOW_IF_POS 20 252 #define MXC_F_ADC_INTR_OVERFLOW_IF ((uint32_t)(0x1UL << MXC_F_ADC_INTR_OVERFLOW_IF_POS)) 254 #define MXC_F_ADC_INTR_PENDING_POS 22 255 #define MXC_F_ADC_INTR_PENDING ((uint32_t)(0x1UL << MXC_F_ADC_INTR_PENDING_POS)) 265 #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS 0 266 #define MXC_F_ADC_LIMIT_CH_LO_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_POS)) 268 #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS 12 269 #define MXC_F_ADC_LIMIT_CH_HI_LIMIT ((uint32_t)(0x3FFUL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_POS)) 271 #define MXC_F_ADC_LIMIT_CH_SEL_POS 24 272 #define MXC_F_ADC_LIMIT_CH_SEL ((uint32_t)(0xFUL << MXC_F_ADC_LIMIT_CH_SEL_POS)) 274 #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS 28 275 #define MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_LO_LIMIT_EN_POS)) 277 #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS 29 278 #define MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN ((uint32_t)(0x1UL << MXC_F_ADC_LIMIT_CH_HI_LIMIT_EN_POS)) __IO uint32_t data
Definition: adc_regs.h:91
__IO uint32_t status
Definition: adc_regs.h:90
__IO uint32_t intr
Definition: adc_regs.h:92
Definition: adc_regs.h:88
__IO uint32_t ctrl
Definition: adc_regs.h:89