42 #ifndef _MXC_MXC_SYS_H_ 43 #define _MXC_MXC_SYS_H_ 45 #include "mxc_device.h" 47 #include "lpgcr_regs.h" 136 } mxc_sys_periph_clock_t;
146 } mxc_sys_system_clock_t;
148 #define MXC_SYS_USN_CHECKSUM_LEN 16 158 int MXC_SYS_GetUSN(uint8_t *usn, uint8_t *checksum);
165 int MXC_SYS_IsClockEnabled (mxc_sys_periph_clock_t clock);
171 void MXC_SYS_ClockDisable (mxc_sys_periph_clock_t clock);
177 void MXC_SYS_ClockEnable (mxc_sys_periph_clock_t clock);
183 void MXC_SYS_RTCClockEnable (
void);
189 int MXC_SYS_RTCClockDisable();
196 int MXC_SYS_ClockSourceEnable (mxc_sys_system_clock_t clock);
203 int MXC_SYS_ClockSourceDisable (mxc_sys_system_clock_t clock);
211 int MXC_SYS_Clock_Select (mxc_sys_system_clock_t clock);
218 int MXC_SYS_Clock_Timeout (uint32_t ready);
223 void MXC_SYS_Reset_Periph (mxc_sys_reset_t reset);
#define MXC_F_GCR_RST0_SMPHR_POS
Definition: gcr_regs.h:221
#define MXC_F_GCR_RST0_RTC_POS
Definition: gcr_regs.h:218
#define MXC_F_GCR_RST0_UART1_POS
Definition: gcr_regs.h:209
#define MXC_F_GCR_RST1_I2C1_POS
Definition: gcr_regs.h:511
#define MXC_F_GCR_PCLKDIS0_DMA_POS
Definition: gcr_regs.h:416
#define MXC_F_LPGCR_PCLKDIS_GPIO2_POS
Definition: lpgcr_regs.h:137
#define MXC_F_GCR_RST1_OWM_POS
Definition: gcr_regs.h:517
#define MXC_F_GCR_RST0_DMA_POS
Definition: gcr_regs.h:182
#define MXC_F_GCR_PCLKDIS0_CNN_POS
Definition: gcr_regs.h:446
#define MXC_F_GCR_PCLKDIS0_UART1_POS
Definition: gcr_regs.h:425
#define MXC_F_GCR_PCLKDIS1_TRNG_POS
Definition: gcr_regs.h:564
#define MXC_F_GCR_PCLKDIS0_ADC_POS
Definition: gcr_regs.h:443
#define MXC_F_LPGCR_RST_TMR4_POS
Definition: lpgcr_regs.h:117
#define MXC_F_GCR_PCLKDIS0_GPIO0_POS
Definition: gcr_regs.h:410
#define MXC_F_GCR_PCLKDIS0_I2C0_POS
Definition: gcr_regs.h:428
#define MXC_F_LPGCR_RST_WDT2_POS
Definition: lpgcr_regs.h:114
#define MXC_F_GCR_RST1_I2S_POS
Definition: gcr_regs.h:535
#define MXC_F_LPGCR_RST_UART3_POS
Definition: lpgcr_regs.h:123
#define MXC_F_GCR_RST0_TRNG_POS
Definition: gcr_regs.h:224
#define MXC_F_LPGCR_RST_TMR5_POS
Definition: lpgcr_regs.h:120
#define MXC_F_GCR_RST0_WDT0_POS
Definition: gcr_regs.h:185
#define MXC_F_LPGCR_RST_LPCOMP_POS
Definition: lpgcr_regs.h:126
#define MXC_F_GCR_RST1_I2C2_POS
Definition: gcr_regs.h:538
#define MXC_F_GCR_PCLKDIS0_TMR1_POS
Definition: gcr_regs.h:434
#define MXC_F_GCR_PCLKDIS1_SMPHR_POS
Definition: gcr_regs.h:567
#define MXC_F_GCR_RST0_ADC_POS
Definition: gcr_regs.h:230
#define MXC_F_GCR_PCLKDIS1_I2C2_POS
Definition: gcr_regs.h:588
#define MXC_F_GCR_RST1_PT_POS
Definition: gcr_regs.h:514
#define MXC_F_GCR_PCLKDIS0_SPI1_POS
Definition: gcr_regs.h:419
#define MXC_F_GCR_RST0_CNN_POS
Definition: gcr_regs.h:227
#define MXC_F_GCR_RST1_CRC_POS
Definition: gcr_regs.h:523
#define MXC_F_GCR_PCLKDIS0_TMR2_POS
Definition: gcr_regs.h:437
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_INRO
Definition: gcr_regs.h:276
#define MXC_F_LPGCR_PCLKDIS_TMR4_POS
Definition: lpgcr_regs.h:143
#define MXC_F_GCR_PCLKDIS0_TMR3_POS
Definition: gcr_regs.h:440
#define MXC_F_GCR_PCLKDIS1_OWM_POS
Definition: gcr_regs.h:570
#define MXC_F_GCR_PCLKDIS0_GPIO1_POS
Definition: gcr_regs.h:413
#define MXC_F_GCR_PCLKDIS1_AES_POS
Definition: gcr_regs.h:576
#define MXC_F_GCR_RST1_SPI0_POS
Definition: gcr_regs.h:529
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_ERFO
Definition: gcr_regs.h:274
#define MXC_F_GCR_RST0_SYS_POS
Definition: gcr_regs.h:242
#define MXC_F_LPGCR_PCLKDIS_LPCOMP_POS
Definition: lpgcr_regs.h:152
#define MXC_F_GCR_PCLKDIS1_WDT0_POS
Definition: gcr_regs.h:591
#define MXC_F_GCR_PCLKDIS1_UART2_POS
Definition: gcr_regs.h:561
#define MXC_F_GCR_RST1_SIMO_POS
Definition: gcr_regs.h:544
#define MXC_F_GCR_RST0_UART0_POS
Definition: gcr_regs.h:206
#define MXC_F_GCR_RST1_AES_POS
Definition: gcr_regs.h:526
#define MXC_F_GCR_RST0_TMR0_POS
Definition: gcr_regs.h:194
#define MXC_F_GCR_RST0_SPI1_POS
Definition: gcr_regs.h:212
#define MXC_F_GCR_PCLKDIS1_I2S_POS
Definition: gcr_regs.h:585
#define MXC_F_GCR_RST1_DVS_POS
Definition: gcr_regs.h:541
#define MXC_F_LPGCR_RST_GPIO2_POS
Definition: lpgcr_regs.h:111
#define MXC_F_LPGCR_PCLKDIS_UART3_POS
Definition: lpgcr_regs.h:149
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_IPO
Definition: gcr_regs.h:278
#define MXC_F_LPGCR_PCLKDIS_WDT2_POS
Definition: lpgcr_regs.h:140
#define MXC_F_GCR_RST0_SOFT_POS
Definition: gcr_regs.h:236
#define MXC_F_GCR_PCLKDIS0_PT_POS
Definition: gcr_regs.h:452
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_ERTCO
Definition: gcr_regs.h:282
#define MXC_F_GCR_PCLKDIS1_CPU1_POS
Definition: gcr_regs.h:594
#define MXC_F_GCR_RST0_PERIPH_POS
Definition: gcr_regs.h:239
#define MXC_F_GCR_RST0_TMR2_POS
Definition: gcr_regs.h:200
#define MXC_F_GCR_RST1_SMPHR_POS
Definition: gcr_regs.h:532
#define MXC_F_GCR_RST0_GPIO1_POS
Definition: gcr_regs.h:191
#define MXC_F_GCR_PCLKDIS1_CRC_POS
Definition: gcr_regs.h:573
#define MXC_F_GCR_PCLKDIS1_SPI0_POS
Definition: gcr_regs.h:579
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_IBRO
Definition: gcr_regs.h:280
#define MXC_F_GCR_RST1_CPU1_POS
Definition: gcr_regs.h:547
#define MXC_F_GCR_RST0_I2C0_POS
Definition: gcr_regs.h:215
#define MXC_F_GCR_PCLKDIS0_I2C1_POS
Definition: gcr_regs.h:449
#define MXC_F_GCR_PCLKDIS0_TMR0_POS
Definition: gcr_regs.h:431
#define MXC_F_GCR_RST0_GPIO0_POS
Definition: gcr_regs.h:188
#define MXC_V_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK
Definition: gcr_regs.h:284
#define MXC_F_LPGCR_PCLKDIS_TMR5_POS
Definition: lpgcr_regs.h:146
#define MXC_F_GCR_RST0_UART2_POS
Definition: gcr_regs.h:233
#define MXC_F_GCR_RST0_TMR1_POS
Definition: gcr_regs.h:197
#define MXC_F_GCR_RST0_TMR3_POS
Definition: gcr_regs.h:203
#define MXC_F_GCR_PCLKDIS0_UART0_POS
Definition: gcr_regs.h:422
#define MXC_F_GCR_RST1_WDT1_POS
Definition: gcr_regs.h:520