MAX32655 Peripheral Driver API
Peripheral Driver API for the MAX32655
i2s_regs.h
1 
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39 
40 #ifndef _I2S_REGS_H_
41 #define _I2S_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
88 typedef struct {
89  __IO uint32_t ctrl0ch0;
90  __R uint32_t rsv_0x4_0xf[3];
91  __IO uint32_t ctrl1ch0;
92  __R uint32_t rsv_0x14_0x1f[3];
93  __IO uint32_t filtch0;
94  __R uint32_t rsv_0x24_0x2f[3];
95  __IO uint32_t dmach0;
96  __R uint32_t rsv_0x34_0x3f[3];
97  __IO uint32_t fifoch0;
98  __R uint32_t rsv_0x44_0x4f[3];
99  __IO uint32_t intfl;
100  __IO uint32_t inten;
101  __IO uint32_t extsetup;
102  __IO uint32_t wken;
103  __IO uint32_t wkfl;
105 
106 /* Register offsets for module I2S */
113  #define MXC_R_I2S_CTRL0CH0 ((uint32_t)0x00000000UL)
114  #define MXC_R_I2S_CTRL1CH0 ((uint32_t)0x00000010UL)
115  #define MXC_R_I2S_FILTCH0 ((uint32_t)0x00000020UL)
116  #define MXC_R_I2S_DMACH0 ((uint32_t)0x00000030UL)
117  #define MXC_R_I2S_FIFOCH0 ((uint32_t)0x00000040UL)
118  #define MXC_R_I2S_INTFL ((uint32_t)0x00000050UL)
119  #define MXC_R_I2S_INTEN ((uint32_t)0x00000054UL)
120  #define MXC_R_I2S_EXTSETUP ((uint32_t)0x00000058UL)
121  #define MXC_R_I2S_WKEN ((uint32_t)0x0000005CUL)
122  #define MXC_R_I2S_WKFL ((uint32_t)0x00000060UL)
131  #define MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS 1
132  #define MXC_F_I2S_CTRL0CH0_LSB_FIRST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_LSB_FIRST_POS))
134  #define MXC_F_I2S_CTRL0CH0_PDM_FILT_POS 2
135  #define MXC_F_I2S_CTRL0CH0_PDM_FILT ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_FILT_POS))
137  #define MXC_F_I2S_CTRL0CH0_PDM_EN_POS 3
138  #define MXC_F_I2S_CTRL0CH0_PDM_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_EN_POS))
140  #define MXC_F_I2S_CTRL0CH0_USEDDR_POS 4
141  #define MXC_F_I2S_CTRL0CH0_USEDDR ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_USEDDR_POS))
143  #define MXC_F_I2S_CTRL0CH0_PDM_INV_POS 5
144  #define MXC_F_I2S_CTRL0CH0_PDM_INV ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_PDM_INV_POS))
146  #define MXC_F_I2S_CTRL0CH0_CH_MODE_POS 6
147  #define MXC_F_I2S_CTRL0CH0_CH_MODE ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_CH_MODE_POS))
149  #define MXC_F_I2S_CTRL0CH0_WS_POL_POS 8
150  #define MXC_F_I2S_CTRL0CH0_WS_POL ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_WS_POL_POS))
152  #define MXC_F_I2S_CTRL0CH0_MSB_LOC_POS 9
153  #define MXC_F_I2S_CTRL0CH0_MSB_LOC ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_MSB_LOC_POS))
155  #define MXC_F_I2S_CTRL0CH0_ALIGN_POS 10
156  #define MXC_F_I2S_CTRL0CH0_ALIGN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_ALIGN_POS))
158  #define MXC_F_I2S_CTRL0CH0_EXT_SEL_POS 11
159  #define MXC_F_I2S_CTRL0CH0_EXT_SEL ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_EXT_SEL_POS))
161  #define MXC_F_I2S_CTRL0CH0_STEREO_POS 12
162  #define MXC_F_I2S_CTRL0CH0_STEREO ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_STEREO_POS))
164  #define MXC_F_I2S_CTRL0CH0_WSIZE_POS 14
165  #define MXC_F_I2S_CTRL0CH0_WSIZE ((uint32_t)(0x3UL << MXC_F_I2S_CTRL0CH0_WSIZE_POS))
167  #define MXC_F_I2S_CTRL0CH0_TX_EN_POS 16
168  #define MXC_F_I2S_CTRL0CH0_TX_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_TX_EN_POS))
170  #define MXC_F_I2S_CTRL0CH0_RX_EN_POS 17
171  #define MXC_F_I2S_CTRL0CH0_RX_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RX_EN_POS))
173  #define MXC_F_I2S_CTRL0CH0_FLUSH_POS 18
174  #define MXC_F_I2S_CTRL0CH0_FLUSH ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FLUSH_POS))
176  #define MXC_F_I2S_CTRL0CH0_RST_POS 19
177  #define MXC_F_I2S_CTRL0CH0_RST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_RST_POS))
179  #define MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS 20
180  #define MXC_F_I2S_CTRL0CH0_FIFO_LSB ((uint32_t)(0x1UL << MXC_F_I2S_CTRL0CH0_FIFO_LSB_POS))
182  #define MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS 24
183  #define MXC_F_I2S_CTRL0CH0_RX_THD_VAL ((uint32_t)(0xFFUL << MXC_F_I2S_CTRL0CH0_RX_THD_VAL_POS))
193  #define MXC_F_I2S_CTRL1CH0_BITS_WORD_POS 0
194  #define MXC_F_I2S_CTRL1CH0_BITS_WORD ((uint32_t)(0x1FUL << MXC_F_I2S_CTRL1CH0_BITS_WORD_POS))
196  #define MXC_F_I2S_CTRL1CH0_EN_POS 8
197  #define MXC_F_I2S_CTRL1CH0_EN ((uint32_t)(0x1UL << MXC_F_I2S_CTRL1CH0_EN_POS))
199  #define MXC_F_I2S_CTRL1CH0_SMP_SIZE_POS 9
200  #define MXC_F_I2S_CTRL1CH0_SMP_SIZE ((uint32_t)(0x1FUL << MXC_F_I2S_CTRL1CH0_SMP_SIZE_POS))
202  #define MXC_F_I2S_CTRL1CH0_ADJUST_POS 15
203  #define MXC_F_I2S_CTRL1CH0_ADJUST ((uint32_t)(0x1UL << MXC_F_I2S_CTRL1CH0_ADJUST_POS))
205  #define MXC_F_I2S_CTRL1CH0_CLKDIV_POS 16
206  #define MXC_F_I2S_CTRL1CH0_CLKDIV ((uint32_t)(0xFFFFUL << MXC_F_I2S_CTRL1CH0_CLKDIV_POS))
216  #define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS 0
217  #define MXC_F_I2S_DMACH0_DMA_TX_THD_VAL ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_TX_THD_VAL_POS))
219  #define MXC_F_I2S_DMACH0_DMA_TX_EN_POS 7
220  #define MXC_F_I2S_DMACH0_DMA_TX_EN ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_TX_EN_POS))
222  #define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS 8
223  #define MXC_F_I2S_DMACH0_DMA_RX_THD_VAL ((uint32_t)(0x7FUL << MXC_F_I2S_DMACH0_DMA_RX_THD_VAL_POS))
225  #define MXC_F_I2S_DMACH0_DMA_RX_EN_POS 15
226  #define MXC_F_I2S_DMACH0_DMA_RX_EN ((uint32_t)(0x1UL << MXC_F_I2S_DMACH0_DMA_RX_EN_POS))
228  #define MXC_F_I2S_DMACH0_TX_LVL_POS 16
229  #define MXC_F_I2S_DMACH0_TX_LVL ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_TX_LVL_POS))
231  #define MXC_F_I2S_DMACH0_RX_LVL_POS 24
232  #define MXC_F_I2S_DMACH0_RX_LVL ((uint32_t)(0xFFUL << MXC_F_I2S_DMACH0_RX_LVL_POS))
242  #define MXC_F_I2S_FIFOCH0_DATA_POS 0
243  #define MXC_F_I2S_FIFOCH0_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_I2S_FIFOCH0_DATA_POS))
253  #define MXC_F_I2S_INTFL_RX_OV_CH0_POS 0
254  #define MXC_F_I2S_INTFL_RX_OV_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_RX_OV_CH0_POS))
256  #define MXC_F_I2S_INTFL_RX_THD_CH0_POS 1
257  #define MXC_F_I2S_INTFL_RX_THD_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_RX_THD_CH0_POS))
259  #define MXC_F_I2S_INTFL_TX_OB_CH0_POS 2
260  #define MXC_F_I2S_INTFL_TX_OB_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_TX_OB_CH0_POS))
262  #define MXC_F_I2S_INTFL_TX_HE_CH0_POS 3
263  #define MXC_F_I2S_INTFL_TX_HE_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTFL_TX_HE_CH0_POS))
273  #define MXC_F_I2S_INTEN_RX_OV_CH0_POS 0
274  #define MXC_F_I2S_INTEN_RX_OV_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_RX_OV_CH0_POS))
276  #define MXC_F_I2S_INTEN_RX_THD_CH0_POS 1
277  #define MXC_F_I2S_INTEN_RX_THD_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_RX_THD_CH0_POS))
279  #define MXC_F_I2S_INTEN_TX_OB_CH0_POS 2
280  #define MXC_F_I2S_INTEN_TX_OB_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_TX_OB_CH0_POS))
282  #define MXC_F_I2S_INTEN_TX_HE_CH0_POS 3
283  #define MXC_F_I2S_INTEN_TX_HE_CH0 ((uint32_t)(0x1UL << MXC_F_I2S_INTEN_TX_HE_CH0_POS))
293  #define MXC_F_I2S_EXTSETUP_EXT_BITS_WORD_POS 0
294  #define MXC_F_I2S_EXTSETUP_EXT_BITS_WORD ((uint32_t)(0x1FUL << MXC_F_I2S_EXTSETUP_EXT_BITS_WORD_POS))
298 #ifdef __cplusplus
299 }
300 #endif
301 
302 #endif /* _I2S_REGS_H_ */
__IO uint32_t filtch0
Definition: i2s_regs.h:93
__IO uint32_t wkfl
Definition: i2s_regs.h:103
__IO uint32_t ctrl0ch0
Definition: i2s_regs.h:89
__IO uint32_t wken
Definition: i2s_regs.h:102
__IO uint32_t extsetup
Definition: i2s_regs.h:101
__IO uint32_t dmach0
Definition: i2s_regs.h:95
__IO uint32_t ctrl1ch0
Definition: i2s_regs.h:91
__IO uint32_t fifoch0
Definition: i2s_regs.h:97
__IO uint32_t intfl
Definition: i2s_regs.h:99
Definition: i2s_regs.h:88
__IO uint32_t inten
Definition: i2s_regs.h:100