MAX32655 Peripheral Driver API
Peripheral Driver API for the MAX32655
dma.h
1 
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38 
39 #ifndef _DMA_H_
40 #define _DMA_H_
41 
42 /* **** Includes **** */
43 #include "mxc_device.h"
44 #include "dma_regs.h"
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
56 /* **** Definitions **** */
57 
62 typedef enum {
68 
70 typedef enum {
95 
97 typedef enum {
103 
105 typedef enum {
115 
117 typedef enum {
118  /* Using the '_V_' define instead of the '_S_' since these same values will be used to
119  specify the DSTWD also. The API functions will shift the value the correct amount
120  prior to writing the cfg register. */
125 
131 typedef struct {
132  int ch;
133  mxc_dma_reqsel_t reqsel;
134  mxc_dma_width_t srcwd;
135  mxc_dma_width_t dstwd;
136  int srcinc_en;
137  int dstinc_en;
139 
144 typedef struct {
145  int ch;
146  void* source;
147  void* dest;
148  int len;
150 
157 typedef struct {
158  int ch;
159  mxc_dma_priority_t prio;
160  unsigned int reqwait_en;
161  mxc_dma_timeout_t tosel;
162  mxc_dma_prescale_t pssel;
163  unsigned int burst_size;
165 
171 typedef void (*mxc_dma_complete_cb_t) (void* dest);
172 
185 
186 /* **** Function Prototypes **** */
187 /*************************/
188 /* Low Level Functions */
189 /*************************/
195 int MXC_DMA_Init (void);
196 
206 int MXC_DMA_AcquireChannel (void);
207 
216 int MXC_DMA_ReleaseChannel (int ch);
217 
228 
237 
248 
257 
267 int MXC_DMA_SetSrcReload (mxc_dma_srcdst_t srcdstReload);
268 
276 int MXC_DMA_GetSrcReload (mxc_dma_srcdst_t srcdstReload);
277 
300 int MXC_DMA_SetCallback (int ch, void (*callback) (int, int));
301 
311 int MXC_DMA_ChannelEnableInt (int ch, int flags);
312 
320 int MXC_DMA_ChannelDisableInt (int ch, int flags);
321 
328 int MXC_DMA_ChannelGetFlags (int ch);
329 
337 int MXC_DMA_ChannelClearFlags (int ch, int flags);
338 
347 int MXC_DMA_EnableInt (int ch);
348 
355 int MXC_DMA_DisableInt (int ch);
356 
364 int MXC_DMA_Start (int ch);
365 
372 int MXC_DMA_Stop (int ch);
373 
382 
388 void MXC_DMA_Handler();
389 
390 /*************************/
391 /* High Level Functions */
392 /*************************/
393 
406 int MXC_DMA_MemCpy (void* dest, void* src, int len, mxc_dma_complete_cb_t callback);
407 
425 #ifdef __cplusplus
426 }
427 #endif
428 
429 #endif /* _DMA_H_ */
I2C0 Receive DMA Request Selection.
Definition: dma.h:76
unsigned int burst_size
Number of bytes moved in a single burst.
Definition: dma.h:163
#define MXC_S_DMA_CTRL_TO_PER_TO64
Definition: dma_regs.h:276
void(* mxc_dma_complete_cb_t)(void *dest)
The callback called on completion of a DMA_MemCpy() transfer.
Definition: dma.h:171
mxc_dma_srcdst_t(* mxc_dma_trans_chain_t)(mxc_dma_srcdst_t dest)
The callback called on completion of a transfer,.
Definition: dma.h:184
I2C2 Receive DMA Request Selection.
Definition: dma.h:79
int MXC_DMA_ReleaseChannel(int ch)
Release DMA channel.
DMA timeout of 32 clocks.
Definition: dma.h:109
Medium High Priority.
Definition: dma.h:64
DMA timeout of 8 clocks.
Definition: dma.h:107
#define MXC_S_DMA_CTRL_REQUEST_ADC
Definition: dma_regs.h:228
int ch
The channel to load the configuration data into.
Definition: dma.h:132
int MXC_DMA_ChannelGetFlags(int ch)
Read channel interrupt flags.
#define MXC_S_DMA_CTRL_REQUEST_UART1TX
Definition: dma_regs.h:244
#define MXC_S_DMA_CTRL_REQUEST_UART2RX
Definition: dma_regs.h:232
void * source
Pointer to the source address, if applicable.
Definition: dma.h:146
int len
Number of bytes to transfer.
Definition: dma.h:148
int MXC_DMA_Stop(int ch)
Stop DMA transfer, irrespective of status (complete or in-progress)
#define MXC_S_DMA_CTRL_REQUEST_AESTX
Definition: dma_regs.h:258
#define MXC_S_DMA_CTRL_REQUEST_I2C1TX
Definition: dma_regs.h:248
UART2 Receive DMA Request Selection.
Definition: dma.h:80
int MXC_DMA_DoTransfer(mxc_dma_config_t config, mxc_dma_srcdst_t firstSrcDst, mxc_dma_trans_chain_t callback)
Performs a memcpy, using DMA, optionally asynchronous.
DMA timeout of 512 clocks.
Definition: dma.h:113
#define MXC_S_DMA_CTRL_REQUEST_MEMTOMEM
Definition: dma_regs.h:216
int MXC_DMA_ConfigChannel(mxc_dma_config_t config, mxc_dma_srcdst_t srcdst)
Configure the DMA channel.
#define MXC_S_DMA_CTRL_TO_PER_TO8
Definition: dma_regs.h:270
Divide by 16,777,216.
Definition: dma.h:101
mxc_dma_ch_regs_t * MXC_DMA_GetCHRegs(int ch)
Get a pointer to the DMA channel registers.
Prescaler disabled.
Definition: dma.h:98
Divide by 65,536.
Definition: dma.h:100
AES Receive DMA Request Selection.
Definition: dma.h:81
unsigned int reqwait_en
Delay the timeout timer start until after first transfer.
Definition: dma.h:160
I2C1 Receive DMA Request Selection.
Definition: dma.h:77
int MXC_DMA_ChannelClearFlags(int ch, int flags)
Clear channel interrupt flags.
I2S Transmit DMA Request Selection.
Definition: dma.h:93
mxc_dma_timeout_t tosel
Number of prescaled clocks seen by the channel before a timeout.
Definition: dma.h:161
#define MXC_S_DMA_CTRL_TO_PER_TO256
Definition: dma_regs.h:280
#define MXC_V_DMA_CTRL_SRCWD_BYTE
Definition: dma_regs.h:297
#define MXC_S_DMA_CTRL_REQUEST_I2C2RX
Definition: dma_regs.h:230
#define MXC_S_DMA_CTRL_TO_PER_TO4
Definition: dma_regs.h:268
SPI1 Receive DMA Request Selection.
Definition: dma.h:72
I2C0 Transmit DMA Request Selection.
Definition: dma.h:87
#define MXC_V_DMA_CTRL_SRCWD_HALFWORD
Definition: dma_regs.h:299
#define MXC_S_DMA_CTRL_REQUEST_UART0TX
Definition: dma_regs.h:242
int MXC_DMA_SetCallback(int ch, void(*callback)(int, int))
Set channel interrupt callback.
mxc_dma_width_t srcwd
The source width (could be dependent on FIFO width)
Definition: dma.h:134
Memory to Memory DMA Request Selection.
Definition: dma.h:71
#define MXC_S_DMA_CTRL_TO_PER_TO32
Definition: dma_regs.h:274
Definition: dma_regs.h:88
#define MXC_V_DMA_CTRL_SRCWD_WORD
Definition: dma_regs.h:301
#define MXC_S_DMA_CTRL_REQUEST_I2STX
Definition: dma_regs.h:260
int MXC_DMA_Start(int ch)
Start transfer.
int MXC_DMA_SetSrcReload(mxc_dma_srcdst_t srcdstReload)
Set channel reload source, destination, and count for the transfer.
int MXC_DMA_MemCpy(void *dest, void *src, int len, mxc_dma_complete_cb_t callback)
Performs a memcpy, using DMA, optionally asynchronous.
mxc_dma_reqsel_t reqsel
The request select line to be used (mem2mem, peripheral)
Definition: dma.h:133
#define MXC_V_DMA_CTRL_PRI_HIGH
Definition: dma_regs.h:204
int MXC_DMA_GetSrcReload(mxc_dma_srcdst_t srcdstReload)
Get channel reload source, destination, and count for transfer.
The information needed to complete a DMA transfer.
Definition: dma.h:144
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIS
Definition: dma_regs.h:287
int MXC_DMA_ChannelEnableInt(int ch, int flags)
Enable channel interrupt.
int MXC_DMA_SetSrcDst(mxc_dma_srcdst_t srcdst)
Set channel source, destination, and count for the transfer.
int MXC_DMA_AdvConfigChannel(mxc_dma_adv_config_t advConfig)
Configure the DMA channel with more advanced parameters.
mxc_dma_width_t dstwd
The destination width (could be dependent on FIFO width)
Definition: dma.h:135
int MXC_DMA_DisableInt(int ch)
Disable channel interrupt.
#define MXC_S_DMA_CTRL_REQUEST_I2SRX
Definition: dma_regs.h:238
UART1 Receive DMA Request Selection.
Definition: dma.h:75
UART0 Transmit DMA Request Selection.
Definition: dma.h:85
SPI0 Transmit DMA Request Selection.
Definition: dma.h:84
#define MXC_S_DMA_CTRL_REQUEST_SPI1TX
Definition: dma_regs.h:240
DMA timeout of 256 clocks.
Definition: dma.h:112
int MXC_DMA_ChannelDisableInt(int ch, int flags)
Disable channel interrupt.
#define MXC_S_DMA_CTRL_REQUEST_SPI0RX
Definition: dma_regs.h:234
#define MXC_S_DMA_CTRL_TO_PER_TO128
Definition: dma_regs.h:278
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV256
Definition: dma_regs.h:289
I2C2 Transmit DMA Request Selection */.
Definition: dma.h:89
#define MXC_S_DMA_CTRL_REQUEST_UART1RX
Definition: dma_regs.h:222
mxc_dma_reqsel_t
DMA request select.
Definition: dma.h:70
DMA transfer in 16-bit half-words.
Definition: dma.h:122
mxc_dma_timeout_t
Enumeration for the DMA timeout value.
Definition: dma.h:105
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV64K
Definition: dma_regs.h:291
mxc_dma_width_t
DMA transfer data width.
Definition: dma.h:117
#define MXC_S_DMA_CTRL_REQUEST_UART2TX
Definition: dma_regs.h:254
int MXC_DMA_EnableInt(int ch)
Enable channel interrupt.
UART1 Transmit DMA Request Selection.
Definition: dma.h:86
#define MXC_S_DMA_CTRL_TO_CLKDIV_DIV16M
Definition: dma_regs.h:293
#define MXC_S_DMA_CTRL_REQUEST_I2C0RX
Definition: dma_regs.h:224
mxc_dma_priority_t
Enumeration for the DMA Channel's priority level.
Definition: dma.h:62
#define MXC_S_DMA_CTRL_REQUEST_I2C2TX
Definition: dma_regs.h:250
#define MXC_S_DMA_CTRL_REQUEST_I2C1RX
Definition: dma_regs.h:226
void * dest
Pointer to the destination address, if applicable.
Definition: dma.h:147
DMA transfer in 32-bit words.
Definition: dma.h:123
#define MXC_S_DMA_CTRL_REQUEST_SPI0TX
Definition: dma_regs.h:256
I2S Receive DMA Request Selection.
Definition: dma.h:82
DMA timeout of 128 clocks.
Definition: dma.h:111
UART0 Receive DMA Request Selection.
Definition: dma.h:74
Low Priority.
Definition: dma.h:66
DMA timeout of 16 clocks.
Definition: dma.h:108
#define MXC_S_DMA_CTRL_TO_PER_TO16
Definition: dma_regs.h:272
mxc_dma_prescale_t pssel
Prescaler for the timeout timer.
Definition: dma.h:162
#define MXC_S_DMA_CTRL_REQUEST_CRCTX
Definition: dma_regs.h:252
#define MXC_S_DMA_CTRL_TO_PER_TO512
Definition: dma_regs.h:282
int srcinc_en
Whether to increment the source address during the transfer.
Definition: dma.h:136
Medium Low Priority.
Definition: dma.h:65
SPI0 Receive DMA Request Selection.
Definition: dma.h:73
#define MXC_S_DMA_CTRL_REQUEST_SPI1RX
Definition: dma_regs.h:218
int MXC_DMA_Init(void)
Initialize DMA resources.
UART2 Transmit DMA Request Selection.
Definition: dma.h:91
Divide by 256.
Definition: dma.h:99
int MXC_DMA_GetSrcDst(mxc_dma_srcdst_t srcdst)
Get channel source, destination, and count for transfer.
int dstinc_en
Whether to increment the source address during the transfer.
Definition: dma.h:137
mxc_dma_prescale_t
Enumeration for the DMA prescaler.
Definition: dma.h:97
#define MXC_V_DMA_CTRL_PRI_LOW
Definition: dma_regs.h:210
SPI1 Transmit DMA Request Selection.
Definition: dma.h:83
DMA timeout of 64 clocks.
Definition: dma.h:110
CRC Transmit DMA Request Selection */.
Definition: dma.h:90
I2C1 Transmit DMA Request Selection.
Definition: dma.h:88
High Priority.
Definition: dma.h:63
int MXC_DMA_AcquireChannel(void)
Request DMA channel.
#define MXC_V_DMA_CTRL_PRI_MEDLOW
Definition: dma_regs.h:208
The advanced configuration options, these are optional but could be needed in cases where multiple DM...
Definition: dma.h:157
#define MXC_V_DMA_CTRL_PRI_MEDHIGH
Definition: dma_regs.h:206
mxc_dma_priority_t prio
The DMA priority for the channel.
Definition: dma.h:159
ADC Receive DMA Request Selection.
Definition: dma.h:78
#define MXC_S_DMA_CTRL_REQUEST_AESRX
Definition: dma_regs.h:236
DMA transfer in bytes.
Definition: dma.h:121
AES Transmit DMA Request Selection.
Definition: dma.h:92
DMA timeout of 4 clocks.
Definition: dma.h:106
The basic configuration information to set up a DMA channel and prepare it for transfers.
Definition: dma.h:131
#define MXC_S_DMA_CTRL_REQUEST_UART0RX
Definition: dma_regs.h:220
#define MXC_S_DMA_CTRL_REQUEST_I2C0TX
Definition: dma_regs.h:246
void MXC_DMA_Handler()
Interrupt handler function.