MAX32655 Peripheral Driver API
Peripheral Driver API for the MAX32655
mcr_regs.h
1 
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39 
40 #ifndef _MCR_REGS_H_
41 #define _MCR_REGS_H_
42 
43 /* **** Includes **** */
44 #include <stdint.h>
45 
46 #ifdef __cplusplus
47 extern "C" {
48 #endif
49 
50 #if defined (__ICCARM__)
51  #pragma system_include
52 #endif
53 
54 #if defined (__CC_ARM)
55  #pragma anon_unions
56 #endif
57 /*
59  If types are not defined elsewhere (CMSIS) define them here
60 */
61 #ifndef __IO
62 #define __IO volatile
63 #endif
64 #ifndef __I
65 #define __I volatile const
66 #endif
67 #ifndef __O
68 #define __O volatile
69 #endif
70 #ifndef __R
71 #define __R volatile const
72 #endif
73 
75 /* **** Definitions **** */
76 
88 typedef struct {
89  __IO uint32_t eccen;
90  __IO uint32_t ipo_mtrim;
91  __IO uint32_t outen;
92  __IO uint32_t cmp_ctrl;
93  __IO uint32_t ctrl;
94  __R uint32_t rsv_0x14_0x1f[3];
95  __IO uint32_t gpio3_ctrl;
97 
98 /* Register offsets for module MCR */
105  #define MXC_R_MCR_ECCEN ((uint32_t)0x00000000UL)
106  #define MXC_R_MCR_IPO_MTRIM ((uint32_t)0x00000004UL)
107  #define MXC_R_MCR_OUTEN ((uint32_t)0x00000008UL)
108  #define MXC_R_MCR_CMP_CTRL ((uint32_t)0x0000000CUL)
109  #define MXC_R_MCR_CTRL ((uint32_t)0x00000010UL)
110  #define MXC_R_MCR_GPIO3_CTRL ((uint32_t)0x00000020UL)
119  #define MXC_F_MCR_ECCEN_RAM0_POS 0
120  #define MXC_F_MCR_ECCEN_RAM0 ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_RAM0_POS))
130  #define MXC_F_MCR_IPO_MTRIM_MTRIM_POS 0
131  #define MXC_F_MCR_IPO_MTRIM_MTRIM ((uint32_t)(0xFFUL << MXC_F_MCR_IPO_MTRIM_MTRIM_POS))
133  #define MXC_F_MCR_IPO_MTRIM_TRIM_RANGE_POS 8
134  #define MXC_F_MCR_IPO_MTRIM_TRIM_RANGE ((uint32_t)(0x1UL << MXC_F_MCR_IPO_MTRIM_TRIM_RANGE_POS))
144  #define MXC_F_MCR_OUTEN_SQWOUT_EN_POS 0
145  #define MXC_F_MCR_OUTEN_SQWOUT_EN ((uint32_t)(0x1UL << MXC_F_MCR_OUTEN_SQWOUT_EN_POS))
147  #define MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS 1
148  #define MXC_F_MCR_OUTEN_PDOWN_OUT_EN ((uint32_t)(0x1UL << MXC_F_MCR_OUTEN_PDOWN_OUT_EN_POS))
158  #define MXC_F_MCR_CTRL_INRO_EN_POS 2
159  #define MXC_F_MCR_CTRL_INRO_EN ((uint32_t)(0x1UL << MXC_F_MCR_CTRL_INRO_EN_POS))
161  #define MXC_F_MCR_CTRL_ERTCO_EN_POS 3
162  #define MXC_F_MCR_CTRL_ERTCO_EN ((uint32_t)(0x1UL << MXC_F_MCR_CTRL_ERTCO_EN_POS))
164  #define MXC_F_MCR_CTRL_SIMO_CLKSCL_EN_POS 8
165  #define MXC_F_MCR_CTRL_SIMO_CLKSCL_EN ((uint32_t)(0x1UL << MXC_F_MCR_CTRL_SIMO_CLKSCL_EN_POS))
167  #define MXC_F_MCR_CTRL_SIMO_RSTD_POS 9
168  #define MXC_F_MCR_CTRL_SIMO_RSTD ((uint32_t)(0x1UL << MXC_F_MCR_CTRL_SIMO_RSTD_POS))
178  #define MXC_F_MCR_GPIO3_CTRL_P30_DO_POS 0
179  #define MXC_F_MCR_GPIO3_CTRL_P30_DO ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P30_DO_POS))
181  #define MXC_F_MCR_GPIO3_CTRL_P30_OE_POS 1
182  #define MXC_F_MCR_GPIO3_CTRL_P30_OE ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P30_OE_POS))
184  #define MXC_F_MCR_GPIO3_CTRL_P30_PE_POS 2
185  #define MXC_F_MCR_GPIO3_CTRL_P30_PE ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P30_PE_POS))
187  #define MXC_F_MCR_GPIO3_CTRL_P30_IN_POS 3
188  #define MXC_F_MCR_GPIO3_CTRL_P30_IN ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P30_IN_POS))
190  #define MXC_F_MCR_GPIO3_CTRL_P31_DO_POS 4
191  #define MXC_F_MCR_GPIO3_CTRL_P31_DO ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P31_DO_POS))
193  #define MXC_F_MCR_GPIO3_CTRL_P31_OE_POS 5
194  #define MXC_F_MCR_GPIO3_CTRL_P31_OE ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P31_OE_POS))
196  #define MXC_F_MCR_GPIO3_CTRL_P31_PE_POS 6
197  #define MXC_F_MCR_GPIO3_CTRL_P31_PE ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P31_PE_POS))
199  #define MXC_F_MCR_GPIO3_CTRL_P31_IN_POS 7
200  #define MXC_F_MCR_GPIO3_CTRL_P31_IN ((uint32_t)(0x1UL << MXC_F_MCR_GPIO3_CTRL_P31_IN_POS))
204 #ifdef __cplusplus
205 }
206 #endif
207 
208 #endif /* _MCR_REGS_H_ */
__IO uint32_t ctrl
Definition: mcr_regs.h:93
__IO uint32_t cmp_ctrl
Definition: mcr_regs.h:92
__IO uint32_t outen
Definition: mcr_regs.h:91
Definition: mcr_regs.h:88
__IO uint32_t ipo_mtrim
Definition: mcr_regs.h:90
__IO uint32_t eccen
Definition: mcr_regs.h:89
__IO uint32_t gpio3_ctrl
Definition: mcr_regs.h:95