Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
Data Fields
CANNODEFD_Type Struct Reference

Detailed Description

CAN Node FD (CANNODEFD)

#include <tle989x.h>

Data Fields

__IM uint32_t RESERVED [128]
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   BRP: 6
 
      uint32_t   __pad0__: 2
 
      __IOM uint32_t   SJW: 4
 
      uint32_t   __pad1__: 3
 
      __IOM uint32_t   DIV8: 1
 
      __IOM uint32_t   TSEG2: 5
 
      uint32_t   __pad2__: 1
 
      __IOM uint32_t   TSEG1: 6
 
      uint32_t   __pad3__: 4
 
   }   bit
 
CAN_NBTEVR0
 
__IM uint32_t RESERVED1 [9]
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   FBRP: 6
 
      __IOM uint32_t   FSJW: 2
 
      __IOM uint32_t   FTSEG1: 4
 
      __IOM uint32_t   FTSEG2: 3
 
      uint32_t   __pad0__: 17
 
   }   bit
 
CAN_FNBTR0
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IM uint32_t   TDCV: 6
 
      uint32_t   __pad0__: 2
 
      __IOM uint32_t   TDCO: 4
 
      uint32_t   __pad1__: 3
 
      __IOM uint32_t   TDC: 1
 
      uint32_t   __pad2__: 16
 
   }   bit
 
CAN_NTDCR0
 

Field Documentation

◆ __pad0__

uint32_t __pad0__

◆ __pad1__

uint32_t __pad1__

◆ __pad2__

uint32_t __pad2__

◆ __pad3__

uint32_t __pad3__

◆  [1/3]

struct { ... } bit

◆  [2/3]

struct { ... } bit

◆  [3/3]

struct { ... } bit

◆ BRP

__IOM uint32_t BRP

[5..0] Baud Rate Prescaler

◆ 

union { ... } CAN_FNBTR0

◆ 

union { ... } CAN_NBTEVR0

◆ 

union { ... } CAN_NTDCR0

◆ DIV8

__IOM uint32_t DIV8

[15..15] Divide Prescaler Clock by 8

◆ FBRP

__IOM uint32_t FBRP

[5..0] Fast Baud Rate Prescaler

◆ FSJW

__IOM uint32_t FSJW

[7..6] Fast (Re) Synchronization Jump Width

◆ FTSEG1

__IOM uint32_t FTSEG1

[11..8] Fast Time Segment Before Sample Point

◆ FTSEG2

__IOM uint32_t FTSEG2

[14..12] Fast Time Segment After Sample Point

◆ reg

__IOM uint32_t reg

(@ 0x00000200) Node 0 Bit Timing Extended View Register

(@ 0x00000228) Fast Node 0 Bit Timing Register

(@ 0x0000022C) Node 0 Transmitter Delay Compensation Register

◆ RESERVED

__IM uint32_t RESERVED[128]

◆ RESERVED1

__IM uint32_t RESERVED1[9]

◆ SJW

__IOM uint32_t SJW

[11..8] (Re) Synchronization Jump Width

◆ TDC

__IOM uint32_t TDC

[15..15] Transmitter Delay Compensation Enable

◆ TDCO

__IOM uint32_t TDCO

[11..8] Transmitter Delay Compensation Offset

◆ TDCV

__IM uint32_t TDCV

[5..0] Transmitter Delay Compensation Value

◆ TSEG1

__IOM uint32_t TSEG1

[27..22] Time Segment Before Sample Point

◆ TSEG2

__IOM uint32_t TSEG2

[20..16] Time Segment After Sample Point


The documentation for this struct was generated from the following file: