Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
scu.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
26 /*******************************************************************************
27 ** Author(s) Identity **
28 ********************************************************************************
29 ** Initials Name **
30 ** ---------------------------------------------------------------------------**
31 ** DM Daniel Mysliwitz **
32 ** BG Blandine Guillot **
33 ** JO Julia Ott **
34 *******************************************************************************/
35 
36 /*******************************************************************************
37 ** Revision Control History **
38 ********************************************************************************
39 ** V0.1.0: 2019-10-28, DM: Initial version **
40 ** V0.2.0: 2020-04-28, BG: Updated revision history format **
41 ** V0.2.1: 2020-09-28, JO: EP-477: Removed definition of variable **
42 ** u32_globtimestamp_ms from scu.c (defined in **
43 ** file isr_exceptions.c) **
44 ** V0.2.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
45 ** V0.2.3: 2020-10-20, BG: EP-532: Added missing function prototypes **
46 ** V0.3.0: 2020-10-20, JO: EP-524: Added parameter for SysTick reload value **
47 ** to function SCU_initSysTick **
48 ** V0.3.1: 2020-10-21, BG: EP-535: Corrected initialization of XTAL **
49 ** V0.3.2: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
50 ** avoid doxygen warning **
51 ** Added end of group for doxygen **
52 ** V0.3.3: 2020-11-16, JO: EP-582: Applied renaming of System_init to **
53 ** SystemInit, applied removal of return value of **
54 ** SystemInit **
55 ** V0.3.3: 2020-11-27, BG: EP-610: Corrected MISRA 2012 errors **
56 ** V0.3.4: 2020-12-04, JO: EP-626: Applied parameter change of function **
57 ** PMU_getWakeupSrc() **
58 ** Changed parameter type of SCU_enterSleepMode **
59 ** from tPMU_wakeupSrc to uint32 **
60 ** V0.3.5: 2020-12-18, BG: EP-652: Corrected name of error code variable **
61 ** V0.3.6: 2021-02-03, JO: EP-684: Fixed ARMCC v6 compiler warning about **
62 ** unused variables **
63 ** V0.3.7: 2021-03-04, BG: EP-717: Replaced the for-loop in the function **
64 ** SCU_enterSleepMode and removed the wake-up source**
65 ** as parameter (configured in the Config Wizard) **
66 ** Removed the return parameter for the functions: **
67 ** - SCU_enterDeepSleepMode **
68 ** - SCU_enterStopModeWithResetWakeup **
69 ** - SCU_enterStopModeWithoutResetWakeup **
70 ** - SCU_exitStopModeWithoutResetWakeup **
71 ** - SCU_enterSleepMode **
72 ** Removed the function to exit sleep mode **
73 ** V0.4.0: 2021-03-11, JO: EP-692: Added switch to HP40_Clk and disabling **
74 ** of PLL/XTAL at the beginning of SCU_initClk **
75 ** to support Reset in Debugger (don't reprogram **
76 ** PLL while using it) **
77 ** V0.4.1: 2021-04-09, JO: EP-753: Added Cache APIs **
78 ** V0.4.2: 2021-04-15, BG: EP-728: Removed the function to exit stop mode **
79 ** w/o reset SCU_exitStopModeWithoutResetWakeup and **
80 ** put the code at the end of the function **
81 ** SCU_enterStopModeWithoutResetWakeup **
82 ** Removed the function to exit stop mode with reset**
83 ** V0.4.3: 2021-07-07, JO: EP-873: Replaced intrinsics by CMSIS wrappers **
84 ** V0.4.4: 2021-07-27, BG: EP-852: Corrected initialization of SPCTR **
85 ** V0.4.5: 2021-07-27, BG: EP-814: Corrected the value to clear the register**
86 ** WAKE_STS_CLR **
87 ** V0.4.6: 2021-08-03, BG: EP-883: Removed SCU_exitFailSleepMode() as it is **
88 ** widely related to the application **
89 ** V0.4.7: 2021-08-18, JO: EP-914: Removed function CACHE_getCacheNCTBBits **
90 ** V0.4.8: 2021-08-18, JO: EP-806: Added functions SCU_GetXTALFailSts, **
91 ** SCU_GetPLL0LockSts, SCU_GetPLL1LockSts **
92 ** Use APIs in SCU_initClk **
93 ** V0.4.9: 2021-09-24, BG: EP-882: Updated SCU_enterStopModeWithResetWakeup,**
94 ** SCU_enterStopModeWithoutResetWakeup and **
95 ** SCU_enterSleepMode functions according to UM v0.2**
96 ** V0.5.0: 2021-09-29, BG: EP-881: Corrected wrong bitfield assignment in **
97 ** SCU_checkXTALDiagnosis() **
98 ** V0.5.1: 2021-10-20, JO: EP-770: Corrected function delay in case the **
99 ** current systick value is 0 or the reload value **
100 ** Updated local variable names **
101 ** V0.5.2: 2021-11-12, JO: EP-937: Updated copyright and branding **
102 ** V0.5.3: 2022-04-19, JO: EP-1002: Moved declaration of u32_currentTime_ms **
103 ** and u32_currentTime_ms to remove ARMCC V5 **
104 ** compiler warning **
105 ** V0.5.4: 2022-06-28, JO: EP-1021: Added timeout for PLL initialization **
106 ** V0.5.5: 2023-05-09, BG: EP-1428: To comply with the latest UM version: **
107 ** - Replaced the functions **
108 ** SCU_enterStopModeWithResetWakeup() and **
109 ** SCU_enterStopModeWithoutResetWakeup() with one **
110 ** single function SCU_enterStopMode() **
111 ** - Updated the function SCU_enterSleepMode() **
112 ** V0.5.6: 2024-11-05, JO: EP-1494: Updated license **
113 *******************************************************************************/
114 
115 #ifndef _SCU_H
116 #define _SCU_H
117 
118 /*******************************************************************************
119 ** Includes **
120 *******************************************************************************/
121 
122 #include "types.h"
123 #include "tle989x.h"
124 #include "tle_variants.h"
125 #include "system_tle989x.h"
126 #include "bdrv.h"
127 #include "csacsc.h"
128 #include "isr.h" /* for u32_globTimestamp_ms */
129 #include "pmu.h"
130 #include "isr_defines.h" /* for CPU_SYSTICK_RL */
131 #include "scu_defines.h"
132 
133 /*******************************************************************************
134 ** Global Constant Declarations **
135 *******************************************************************************/
136 
137 /*******************************************************************************
138 ** Global Type Declarations **
139 *******************************************************************************/
140 
141 /*******************************************************************************
142 ** Global Macro Declarations **
143 *******************************************************************************/
144 
146 #define MULTIPLIER_US_TO_TICKS SCU_fCPU_MHz
147 
148 /*******************************************************************************
149 ** Global Variable Declarations **
150 *******************************************************************************/
151 
153 extern sint8 e_xtalSts;
154 
155 /*******************************************************************************
156 ** Global Function Declarations **
157 *******************************************************************************/
158 
159 void SCU_init(void);
160 sint8 SCU_initClk(void);
162 void SCU_delay_us(uint32 u32_time_us);
163 void SCU_initSysTick(uint32 u32_value);
165 void SCU_enterDeepSleepMode(void);
167 void SCU_enterSleepMode(void);
173 INLINE void CACHE_setCleanAll(void);
174 INLINE void CACHE_setLockBlock(uint32 u32_value);
175 INLINE void CACHE_setTouchBlock(uint32 u32_value);
176 INLINE void CACHE_setUnlockBlock(uint32 u32_value);
177 INLINE void CACHE_setCleanSet(uint32 u32_value);
178 
179 /*******************************************************************************
180 ** Global Inline Function Definitions **
181 *******************************************************************************/
182 
188 {
189  return (uint8)SCU->XTALSTAT.bit.XTALFAIL;
190 }
191 
197 {
198  return (uint8)PLL->STAT.bit.LCK0;
199 }
200 
206 {
207  return (uint8)PLL->STAT.bit.LCK1;
208 }
209 
215 {
216  return (uint32)CPU->SYSTICK_CUR.bit.CURRENT;
217 }
218 
224 {
225  return (uint32)CPU->SYSTICK_RL.bit.RELOAD;
226 }
227 
231 {
232  CACHE->CACHE_AC.bit.Clean = 1u;
233 }
234 
240 {
241  CACHE->CACHE_BL.bit.ADDR = u32_value;
242 }
243 
249 {
250  CACHE->CACHE_BT.bit.ADDR = u32_value;
251 }
252 
258 {
259  CACHE->CACHE_BU.bit.ADDR = u32_value;
260 }
261 
267 {
268  CACHE->CACHE_SC.bit.ADDR = u32_value;
269 }
270 
273 #endif /* _SCU_H */
Bridge Driver low level access library.
CSACSC low level access library.
#define CACHE
Definition: tle989x.h:24059
#define PLL
Definition: tle989x.h:24073
#define CPU
Definition: tle989x.h:24067
#define SCU
Definition: tle989x.h:24075
INLINE uint8 SCU_GetPLL0LockSts(void)
Get the PLL0 Lock Status.
Definition: scu.h:196
INLINE uint8 SCU_GetPLL1LockSts(void)
Get the PLL1 Lock Status.
Definition: scu.h:205
sint8 SCU_checkXTALDiagnosis(void)
Check XTAL Diagnosis as describen in the User Manual.
Definition: scu.c:224
INLINE uint32 SCU_getSysTickCntVal(void)
Get the current SysTick Count Value.
Definition: scu.h:214
sint8 SCU_enSafeSwitchOffSeq(void)
Configure the Safe Switch-Off release sequence (SSO release sequence)
Definition: scu.c:381
sint8 SCU_enterStopMode(void)
Enter the Stop mode.
Definition: scu.c:423
INLINE uint8 SCU_GetXTALFailSts(void)
Get the XTAL Fail Status.
Definition: scu.h:187
INLINE void CACHE_setCleanAll(void)
Set Cache clean All.
Definition: scu.h:230
void SCU_init(void)
Initialize the SCU module.
Definition: scu.c:43
void SCU_initSysTick(uint32 u32_value)
Initialize the SysTick.
Definition: scu.c:363
void SCU_enterSleepMode(void)
Enter the Sleep mode.
Definition: scu.c:489
void SCU_enterDeepSleepMode(void)
Enter the Deep Sleep mode.
Definition: scu.c:405
INLINE void CACHE_setUnlockBlock(uint32 u32_value)
Set Address of Cache unlock Block.
Definition: scu.h:257
void SCU_delay_us(uint32 u32_time_us)
Delays the regular program execution by a given number of Microseconds.
Definition: scu.c:298
INLINE void CACHE_setTouchBlock(uint32 u32_value)
Set Address of Cache touch Block (load Block to Cache)
Definition: scu.h:248
sint8 e_xtalSts
XTAL status.
Definition: scu.c:31
INLINE uint32 SCU_getSysTickRelVal(void)
Get the current SysTick Reload Value.
Definition: scu.h:223
INLINE void CACHE_setLockBlock(uint32 u32_value)
Set Address of Cache lock Block.
Definition: scu.h:239
sint8 SCU_initClk(void)
Initialize the SCU clock.
Definition: scu.c:62
INLINE void CACHE_setCleanSet(uint32 u32_value)
Set Address of Cache clean Set.
Definition: scu.h:266
Interrupt Service Routines low level access library.
PMU low level access library.
System file for TLE989x.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:151
uint8_t uint8
8 bit unsigned value
Definition: types.h:204
int8_t sint8
8 bit signed value
Definition: types.h:209
uint32_t uint32
32 bit unsigned value
Definition: types.h:206