130 #include "isr_defines.h"
131 #include "scu_defines.h"
146 #define MULTIPLIER_US_TO_TICKS SCU_fCPU_MHz
189 return (
uint8)
SCU->XTALSTAT.bit.XTALFAIL;
216 return (
uint32)
CPU->SYSTICK_CUR.bit.CURRENT;
225 return (
uint32)
CPU->SYSTICK_RL.bit.RELOAD;
232 CACHE->CACHE_AC.bit.Clean = 1u;
241 CACHE->CACHE_BL.bit.ADDR = u32_value;
250 CACHE->CACHE_BT.bit.ADDR = u32_value;
259 CACHE->CACHE_BU.bit.ADDR = u32_value;
268 CACHE->CACHE_SC.bit.ADDR = u32_value;
Bridge Driver low level access library.
CSACSC low level access library.
#define CACHE
Definition: tle989x.h:24059
#define PLL
Definition: tle989x.h:24073
#define CPU
Definition: tle989x.h:24067
#define SCU
Definition: tle989x.h:24075
INLINE uint8 SCU_GetPLL0LockSts(void)
Get the PLL0 Lock Status.
Definition: scu.h:196
INLINE uint8 SCU_GetPLL1LockSts(void)
Get the PLL1 Lock Status.
Definition: scu.h:205
sint8 SCU_checkXTALDiagnosis(void)
Check XTAL Diagnosis as describen in the User Manual.
Definition: scu.c:224
INLINE uint32 SCU_getSysTickCntVal(void)
Get the current SysTick Count Value.
Definition: scu.h:214
sint8 SCU_enSafeSwitchOffSeq(void)
Configure the Safe Switch-Off release sequence (SSO release sequence)
Definition: scu.c:381
sint8 SCU_enterStopMode(void)
Enter the Stop mode.
Definition: scu.c:423
INLINE uint8 SCU_GetXTALFailSts(void)
Get the XTAL Fail Status.
Definition: scu.h:187
INLINE void CACHE_setCleanAll(void)
Set Cache clean All.
Definition: scu.h:230
void SCU_init(void)
Initialize the SCU module.
Definition: scu.c:43
void SCU_initSysTick(uint32 u32_value)
Initialize the SysTick.
Definition: scu.c:363
void SCU_enterSleepMode(void)
Enter the Sleep mode.
Definition: scu.c:489
void SCU_enterDeepSleepMode(void)
Enter the Deep Sleep mode.
Definition: scu.c:405
INLINE void CACHE_setUnlockBlock(uint32 u32_value)
Set Address of Cache unlock Block.
Definition: scu.h:257
void SCU_delay_us(uint32 u32_time_us)
Delays the regular program execution by a given number of Microseconds.
Definition: scu.c:298
INLINE void CACHE_setTouchBlock(uint32 u32_value)
Set Address of Cache touch Block (load Block to Cache)
Definition: scu.h:248
sint8 e_xtalSts
XTAL status.
Definition: scu.c:31
INLINE uint32 SCU_getSysTickRelVal(void)
Get the current SysTick Reload Value.
Definition: scu.h:223
INLINE void CACHE_setLockBlock(uint32 u32_value)
Set Address of Cache lock Block.
Definition: scu.h:239
sint8 SCU_initClk(void)
Initialize the SCU clock.
Definition: scu.c:62
INLINE void CACHE_setCleanSet(uint32 u32_value)
Set Address of Cache clean Set.
Definition: scu.h:266
Interrupt Service Routines low level access library.
PMU low level access library.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:151
uint8_t uint8
8 bit unsigned value
Definition: types.h:204
int8_t sint8
8 bit signed value
Definition: types.h:209
uint32_t uint32
32 bit unsigned value
Definition: types.h:206