Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
startup_tle989x.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
11 
23 /*******************************************************************************
24 ** Author(s) Identity **
25 ********************************************************************************
26 ** Initials Name **
27 ** ---------------------------------------------------------------------------**
28 ** JO Julia Ott **
29 ** PS Patrik Schwarz **
30 ** VO Vanessa Ongaro **
31 *******************************************************************************/
32 
33 /*******************************************************************************
34 ** Revision Control History **
35 ********************************************************************************
36 ** V0.1.0: 2022-08-18, JO: EP-1235: Initial version of startup file in C **
37 ** V0.1.1: 2023-05-15, PS: EP-1441: Update c startup file and linker file **
38 ** for IAR to use sections **
39 ** V0.1.2: 2023-08-10, VO: EP-1464: Put debug_entry also in deprecated VTOR **
40 ** Fixed location of ER_NVM0_DEBUG_CONNECT **
41 ** in sct files **
42 ** V0.1.3: 2023-11-29, VO: EP-1465: Added chache enable to reset handler **
43 ** V0.1.4: 2024-05-06, VO: EP-1510: Removed 'Todo' comments **
44 ** V0.1.5: 2024-11-05, JO: EP-1494: Updated license **
45 *******************************************************************************/
46 
47 /* Work instructions:
48  When using this startup file, the project needs a linker script.
49  The linker script is has already been copied to the
50  RTE/Device/--devicename-- folder of this project and
51  needs to be added to the project manually.
52  Keil:
53  'Options for target'
54  --> 'Linker' tab
55  --> uncheck 'Use Memory Layout from Rarget Dialog'
56  --> Scatter file: '...'
57  --> add the linker file mentioned above (tle9881_91.sct or tle9883_93.sct)
58 */
59 
60 #include "tle989x.h"
61 #include "bootrom.h"
62 #include "tle_variants.h"
63 #include "bsl_defines.h"
64 #include "scu_defines.h"
65 
66 /*---------------------------------------------------------------------------
67  External References
68  *---------------------------------------------------------------------------*/
69 extern uint32_t __INITIAL_SP;
70 extern uint32_t __STACK_LIMIT;
71 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
72  extern uint32_t __STACK_SEAL;
73 #endif
74 
78 typedef void(*VECTOR_TABLE_Type)(void);
79 
80 extern __NO_RETURN void __PROGRAM_START(void);
81 
82 #if defined(__ARMCC_VERSION)
83  /* Arm Compiler V5 and V6 */
84  __attribute__((noreturn)) static void debug_entry(void) __attribute__((section("sec_NVM0_DEBUG_CONNECT"), used));
85 #elif defined(__IAR_SYSTEMS_ICC__)
86  /* IAR compiler */
87  __attribute__((noreturn)) static void debug_entry(void) @ "sec_NVM0_DEBUG_CONNECT";
88 #elif defined(UNIT_TESTING_OCN)
89  __attribute__((noreturn)) static void debug_entry(void);
90 #endif
91 
92 /*---------------------------------------------------------------------------
93  Internal References
94  *---------------------------------------------------------------------------*/
95 __NO_RETURN void Reset_Handler (void);
96 __NO_RETURN void Default_Handler(void);
97 __NO_RETURN static void debug_entry(void);
98 
99 /*---------------------------------------------------------------------------
100  Exception / Interrupt Handler
101  *---------------------------------------------------------------------------*/
102 /* Exceptions */
103 void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
104 void HardFault_Handler (void) __attribute__ ((weak));
105 void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
106 void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
107 void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
108 //void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
109 void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
110 void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
111 void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
112 void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
113 
114 void NVIC_IRQ0_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 0: PMU, BDRV, CSC, ARVG
115 void NVIC_IRQ1_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 1: PMU, BDRV, CSC, ARVG
116 void NVIC_IRQ2_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 2: CCU7
117 void NVIC_IRQ3_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 3: CCU7
118 void NVIC_IRQ4_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 4: CCU7
119 void NVIC_IRQ5_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 5: CCU7
120 //0x000000c1 // 6: MEMCTRL
121 void NVIC_IRQ7_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 7: GPT12E
122 void NVIC_IRQ8_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 8: GPT12E
123 void NVIC_IRQ9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); // 9: Timer2
124 void NVIC_IRQ10_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 10: ADC2
125 void NVIC_IRQ11_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 11: ADC2
126 void NVIC_IRQ12_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 12: MON
127 void NVIC_IRQ13_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 13: MON
128 void NVIC_IRQ14_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 14: ADC1
129 void NVIC_IRQ15_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 15: ADC1
130 void NVIC_IRQ16_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 16: ADC1
131 void NVIC_IRQ17_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 17: ADC1
132 void NVIC_IRQ18_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 18: BEMF, SDADC
133 void NVIC_IRQ19_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 19: BEMF, SDADC
134 void NVIC_IRQ20_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 20: EXTINT
135 void NVIC_IRQ21_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 21: EXTINT
136 void NVIC_IRQ22_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 22: UART0/1, LIN
137 void NVIC_IRQ23_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 23: UART0/1, LIN
138 void NVIC_IRQ24_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 24: SSC0/1
139 void NVIC_IRQ25_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 25: SSC0/1
140 void NVIC_IRQ26_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 26: MultiCAN
141 void NVIC_IRQ27_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 27: MultiCAN
142 void NVIC_IRQ28_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 28: MultiCAN
143 void NVIC_IRQ29_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 29: DMA
144 void NVIC_IRQ30_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 30: DMA
145 void NVIC_IRQ31_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 31: Timer21
146 
147 /*----------------------------------------------------------------------------
148  Exception / Interrupt Vector table
149  *----------------------------------------------------------------------------*/
150 
151 #if defined ( __GNUC__ )
152  #pragma GCC diagnostic push
153  #pragma GCC diagnostic ignored "-Wpedantic"
154 #endif
155 
156 #if defined(__ARMCC_VERSION)
157  /* Arm Compiler V5 and V6 */
158  static const uint32 u32_flash0_page0[11] __attribute__((section("sec_NVM0_BOOTCFG"), used)) =
159 #elif defined(__IAR_SYSTEMS_ICC__)
160  /* IAR compiler */
161  __root const uint32 u32_flash0_page0[11] @ "sec_NVM0_BOOTCFG" =
162 #elif defined(UNIT_TESTING_OCN)
163  const uint32 u32_flash0_page0[11] =
164 #endif
165 {
166  (uint32)BSL_NAD_NAC, /* 0x00: NAC,NAD */
167  0xFFFFFFFF, /* 0x04: reserved */
168  0xFFFFFFFF, /* 0x08: Secure Boot Hash */
169  0xFFFFFFFF, /* 0x0C: Secure Boot Hash */
170  0xFFFFFFFF, /* 0x10: Secure Boot Hash */
171  0xFFFFFFFF, /* 0x14: Secure Boot Hash */
172  0xFFFFFFFF, /* 0x18: reserved */
173  0xFFFFFFFF, /* 0x1C: reserved */
174  0xFFFFFFFF, /* 0x20: reserved */
175  0xFFFFFFFF, /* 0x24: User BSL Code Size */
176  0xFFFFFFFF, /* 0x28: Secure Key ID */
177 };
178 
179 #if defined(__ARMCC_VERSION)
180  /* Arm Compiler V5 and V6 */
181  static const VECTOR_TABLE_Type vt_vectab_deprecated[2] __attribute__((section("sec_NVM0_VECTAB_DEPRECATED"), used)) =
182 #elif defined(__IAR_SYSTEMS_ICC__)
183  /* IAR compiler: __root needed so that the variable is not optimized away */
184  __root const VECTOR_TABLE_Type vt_vectab_deprecated[2] @ "sec_NVM0_VECTAB_DEPRECATED" =
185 #elif defined(UNIT_TESTING_OCN)
186  static const VECTOR_TABLE_Type vt_vectab_deprecated[2] =
187 #endif
188 {
189  (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
190  debug_entry, /* Reset Handler */
191 };
192 
193 __attribute__((noreturn)) static void debug_entry(void)
194 {
195 #define SCU_BOOT_CFG_LATCH_ADDR 0x480040BC
196 #define SCU_BOOT_CFG_LATCH_TMS_MASK 0x00000001
197 #define SCU_BOOT_CFG_LATCH_P00_MASK 0x00000002
198 #define CPU_DHCSR_ADDR 0xE000EDF0
199 #define CPU_DHCSR_C_DEBUGEN_MASK 0x00000001
200  uint32 u32_boot_cfg_latch;
201  uint32 u32_dhcsr_c_debugen;
202  u32_boot_cfg_latch = *(uint32 *)SCU_BOOT_CFG_LATCH_ADDR;
203 
205  {
206  do
207  {
208  u32_dhcsr_c_debugen = (*(uint32 *)CPU_DHCSR_ADDR) & CPU_DHCSR_C_DEBUGEN_MASK;
209  }
210  while (u32_dhcsr_c_debugen == 0);
211  }
212 
213  Reset_Handler();
214 }
215 
217 
218 #if defined(__ARMCC_VERSION)
219 /* Arm Compiler V5 and V6 */
220 const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE =
221 {
222 #elif defined(__IAR_SYSTEMS_ICC__)
223 /* IAR compiler */
224 const VECTOR_TABLE_Type __VECTOR_TABLE[48] @ "sec_NVM0_VECTAB" = {
225 #elif defined(UNIT_TESTING_OCN)
226 const VECTOR_TABLE_Type __VECTOR_TABLE[48] = {
227 #endif
228  (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
229  debug_entry, /* Reset Handler */
230  NMI_Handler, /* -14 NMI Handler */
231  HardFault_Handler, /* -13 Hard Fault Handler */
232  MemManage_Handler, /* -12 MPU Fault Handler */
233  BusFault_Handler, /* -11 Bus Fault Handler */
234  UsageFault_Handler, /* -10 Usage Fault Handler */
235  0, /* -9 Secure Fault Handler */
236  0, /* Reserved */
237  0, /* Reserved */
238  0, /* Reserved */
239  SVC_Handler, /* -5 SVCall Handler */
240  DebugMon_Handler, /* -4 Debug Monitor Handler */
241  0, /* Reserved */
242  PendSV_Handler, /* -2 PendSV Handler */
243  SysTick_Handler, /* -1 SysTick Handler */
244 
245  /* Interrupts */
246  NVIC_IRQ0_Handler, // 0: PMU, BDRV, CSC, ARVG
247  NVIC_IRQ1_Handler, // 1: PMU, BDRV, CSC, ARVG
248  NVIC_IRQ2_Handler, // 2: CCU7
249  NVIC_IRQ3_Handler, // 3: CCU7
250  NVIC_IRQ4_Handler, // 4: CCU7
251  NVIC_IRQ5_Handler, // 5: CCU7
252  (VECTOR_TABLE_Type)0x000000c1, // 6: MEMCTRL
253  NVIC_IRQ7_Handler, // 7: GPT12E
254  NVIC_IRQ8_Handler, // 8: GPT12E
255  NVIC_IRQ9_Handler, // 9: Timer2
256  NVIC_IRQ10_Handler, // 10: ADC2
257  NVIC_IRQ11_Handler, // 11: ADC2
258  NVIC_IRQ12_Handler, // 12: MON
259  NVIC_IRQ13_Handler, // 13: MON
260  NVIC_IRQ14_Handler, // 14: ADC1
261  NVIC_IRQ15_Handler, // 15: ADC1
262  NVIC_IRQ16_Handler, // 16: ADC1
263  NVIC_IRQ17_Handler, // 17: ADC1
264  NVIC_IRQ18_Handler, // 18: BEMF, SDADC
265  NVIC_IRQ19_Handler, // 19: BEMF, SDADC
266  NVIC_IRQ20_Handler, // 20: EXTINT
267  NVIC_IRQ21_Handler, // 21: EXTINT
268  NVIC_IRQ22_Handler, // 22: UART0/1, LIN
269  NVIC_IRQ23_Handler, // 23: UART0/1, LIN
270  NVIC_IRQ24_Handler, // 24: SSC0/1
271  NVIC_IRQ25_Handler, // 25: SSC0/1
272  NVIC_IRQ26_Handler, // 26: MultiCAN
273  NVIC_IRQ27_Handler, // 27: MultiCAN
274  NVIC_IRQ28_Handler, // 28: MultiCAN
275  NVIC_IRQ29_Handler, // 29: DMA
276  NVIC_IRQ30_Handler, // 30: DMA
277  NVIC_IRQ31_Handler // 31: Timer21
278 };
279 
280 #if defined ( __GNUC__ )
281 #pragma GCC diagnostic pop
282 #endif
283 
284 /*---------------------------------------------------------------------------
285  Reset Handler called on controller reset
286  *---------------------------------------------------------------------------*/
287 __NO_RETURN void Reset_Handler(void)
288 {
289  __set_PSP((uint32_t)(&__INITIAL_SP));
290 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
291  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
292 #endif
293 
294  /* Enable Flash1 caching according to CW setting */
295  if(FLASH1_CACHE_EN == 1)
296  {
298  }
299 
300  SystemInit(); /* CMSIS System Initialization */
301  __PROGRAM_START(); /* Enter PreMain (C library entry point) */
302 }
303 
304 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
305 #pragma clang diagnostic push
306 #pragma clang diagnostic ignored "-Wmissing-noreturn"
307 #endif
308 
309 /*---------------------------------------------------------------------------
310  Hard Fault Handler
311  *---------------------------------------------------------------------------*/
312 void HardFault_Handler(void)
313 {
314  while (1);
315 }
316 
317 /*---------------------------------------------------------------------------
318  Default Handler for Exceptions / Interrupts
319  *---------------------------------------------------------------------------*/
320 void Default_Handler(void)
321 {
322  while (1);
323 }
324 
325 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
326 #pragma clang diagnostic pop
327 #endif
BootROM low level access library.
#define user_cache_operation
This user API function provides an alternative to writing to cache registers in addition to direct re...
Definition: bootrom.h:775
@ CACHE_OP_EN
Cache enable operation.
Definition: bootrom.h:256
void(* VECTOR_TABLE_Type)(void)
Exception / Interrupt Handler Function Prototype.
Definition: startup_tle989x.h:78
() VECTOR_TABLE_Type NVIC_IRQ17_Handler
Definition: startup_tle989x.h:263
() VECTOR_TABLE_Type NVIC_IRQ30_Handler
Definition: startup_tle989x.h:276
() VECTOR_TABLE_Type NVIC_IRQ27_Handler
Definition: startup_tle989x.h:273
() VECTOR_TABLE_Type SysTick_Handler
Definition: startup_tle989x.h:243
__NO_RETURN void Reset_Handler(void)
Definition: startup_tle989x.h:287
() VECTOR_TABLE_Type NVIC_IRQ4_Handler
Definition: startup_tle989x.h:250
() VECTOR_TABLE_Type NVIC_IRQ5_Handler
Definition: startup_tle989x.h:251
() VECTOR_TABLE_Type UsageFault_Handler
Definition: startup_tle989x.h:234
() VECTOR_TABLE_Type NVIC_IRQ12_Handler
Definition: startup_tle989x.h:258
__attribute__((noreturn)) static void debug_entry(void)
Definition: startup_tle989x.h:193
() VECTOR_TABLE_Type NMI_Handler
Definition: startup_tle989x.h:230
() VECTOR_TABLE_Type NVIC_IRQ0_Handler
Definition: startup_tle989x.h:246
#define CPU_DHCSR_ADDR
() VECTOR_TABLE_Type BusFault_Handler
Definition: startup_tle989x.h:233
() VECTOR_TABLE_Type NVIC_IRQ9_Handler
Definition: startup_tle989x.h:255
() VECTOR_TABLE_Type debug_entry
Definition: startup_tle989x.h:229
() VECTOR_TABLE_Type NVIC_IRQ10_Handler
Definition: startup_tle989x.h:256
() VECTOR_TABLE_Type NVIC_IRQ31_Handler
Definition: startup_tle989x.h:278
() VECTOR_TABLE_Type NVIC_IRQ14_Handler
Definition: startup_tle989x.h:260
() VECTOR_TABLE_Type NVIC_IRQ15_Handler
Definition: startup_tle989x.h:261
() VECTOR_TABLE_Type MemManage_Handler
Definition: startup_tle989x.h:232
() VECTOR_TABLE_Type HardFault_Handler
Definition: startup_tle989x.h:231
() VECTOR_TABLE_Type NVIC_IRQ7_Handler
Definition: startup_tle989x.h:253
const VECTOR_TABLE_Type __VECTOR_TABLE[48]
() VECTOR_TABLE_Type NVIC_IRQ11_Handler
Definition: startup_tle989x.h:257
() VECTOR_TABLE_Type NVIC_IRQ21_Handler
Definition: startup_tle989x.h:267
() VECTOR_TABLE_Type NVIC_IRQ8_Handler
Definition: startup_tle989x.h:254
__NO_RETURN void Default_Handler(void)
Definition: startup_tle989x.h:320
() VECTOR_TABLE_Type PendSV_Handler
Definition: startup_tle989x.h:241
() VECTOR_TABLE_Type NVIC_IRQ20_Handler
Definition: startup_tle989x.h:266
#define SCU_BOOT_CFG_LATCH_TMS_MASK
() VECTOR_TABLE_Type DebugMon_Handler
Definition: startup_tle989x.h:240
() VECTOR_TABLE_Type NVIC_IRQ16_Handler
Definition: startup_tle989x.h:262
() VECTOR_TABLE_Type NVIC_IRQ18_Handler
Definition: startup_tle989x.h:264
() VECTOR_TABLE_Type NVIC_IRQ28_Handler
Definition: startup_tle989x.h:274
() VECTOR_TABLE_Type NVIC_IRQ1_Handler
Definition: startup_tle989x.h:247
#define SCU_BOOT_CFG_LATCH_P00_MASK
#define CPU_DHCSR_C_DEBUGEN_MASK
() VECTOR_TABLE_Type SVC_Handler
Definition: startup_tle989x.h:235
() VECTOR_TABLE_Type NVIC_IRQ19_Handler
Definition: startup_tle989x.h:265
() VECTOR_TABLE_Type NVIC_IRQ2_Handler
Definition: startup_tle989x.h:248
() VECTOR_TABLE_Type NVIC_IRQ24_Handler
Definition: startup_tle989x.h:270
() VECTOR_TABLE_Type NVIC_IRQ3_Handler
Definition: startup_tle989x.h:249
#define SCU_BOOT_CFG_LATCH_ADDR
void alias("Default_Handler")))
uint32_t __STACK_LIMIT
__NO_RETURN void __PROGRAM_START(void)
() VECTOR_TABLE_Type NVIC_IRQ22_Handler
Definition: startup_tle989x.h:268
uint32_t __INITIAL_SP
Definition: startup_tle989x.h:228
() VECTOR_TABLE_Type NVIC_IRQ23_Handler
Definition: startup_tle989x.h:269
() VECTOR_TABLE_Type NVIC_IRQ26_Handler
Definition: startup_tle989x.h:272
() VECTOR_TABLE_Type NVIC_IRQ29_Handler
Definition: startup_tle989x.h:275
() VECTOR_TABLE_Type NVIC_IRQ25_Handler
Definition: startup_tle989x.h:271
() VECTOR_TABLE_Type NVIC_IRQ13_Handler
Definition: startup_tle989x.h:259
void SystemInit(void)
Initialize the system.
Definition: system_tle988x.c:29
Device specific memory layout defines and features.
#define UC_FLASH1_START
Definition: tle_variants.h:322
uint32_t uint32
32 bit unsigned value
Definition: types.h:206