Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
adc1.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
26 /* Generated by generate_functions_02_xlsx2func.py, version 1.0.1 on 09. Feb 2021
27  * from File 'adc1.xlsx', version 0.2.1
28  */
29 
30 /*******************************************************************************
31 ** Author(s) Identity **
32 ********************************************************************************
33 ** Initials Name **
34 ** ---------------------------------------------------------------------------**
35 ** JO Julia Ott **
36 ** BG Blandine Guillot **
37 ** DM Daniel Mysliwitz **
38 *******************************************************************************/
39 
40 /*******************************************************************************
41 ** Revision Control History **
42 ********************************************************************************
43 ** V0.1.0: 2020-05-26, DM: Initial version **
44 ** V0.1.1: 2020-08-11, JO: EP-449: Disabled compiler warnings for ARMCC v6 **
45 ** locally where violations can't be avoided **
46 ** V0.1.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
47 ** V0.2.0: 2020-10-16, JO: EP-523: Updated parameter names **
48 ** Added functions for sequence configuration **
49 ** Removed functions that access **
50 ** ADC1->GLOBCONF.bit.LOWSUP, DSCAL, CPCLK_HV_FAST, **
51 ** EN_CONV_TIMOUT (bits have been removed) **
52 ** V0.2.1: 2020-10-21, BG: EP-539: Considered the enable checkbox in CW in **
53 ** the initialization function **
54 ** V0.3.0: 2020-10-22, JO: EP-543: Corrected check of return value in **
55 ** ADC1_getChResult_mV and ADC1_getChFiltResult_mV **
56 ** V0.3.1: 2020-10-27, BG: EP-561: Renamed split compare up/low bits **
57 ** V0.3.2: 2020-11-04, JO: EP-556: Removed functions that are related to **
58 ** ADC EOC Fail Interrupt **
59 ** V0.3.3: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
60 ** avoid doxygen warning **
61 ** Updated stype of parameter of type pointer **
62 ** V0.3.4: 2020-11-17, BG: EP-598: Added VAREF-related functions **
63 ** V0.3.5: 2020-11-18, DM: EP-579: Fixed filtout value for postprocessing **
64 ** private function declaration removed from h-file **
65 ** V0.3.6: 2020-11-20, BG: EP-610: Corrected MISRA 2012 errors **
66 ** The following rules are globally deactivated: **
67 ** - Info 774: Boolean within 'if' always evaluates **
68 ** to False/True **
69 ** V0.3.7: 2020-12-03, JO: EP-610: Fixed ARMCC v6 compiler warnings **
70 ** V0.3.8: 2020-12-16, DM: EP-650: Replaced NOP loop in the ADC1_init() by **
71 ** wait for ADC1 ready **
72 ** V0.3.9: 2020-12-18, DM: EP-642: add separate seq. shadow transfer enable **
73 ** prior to trigger seq. shadow transfer **
74 ** V0.4.0: 2020-12-18, BG: EP-652: Corrected name of error code variable **
75 ** V0.4.1: 2021-02-09, JO: EP-696: Changed from anonymous to named typedefs **
76 ** to prevent MISRA warning **
77 ** V0.4.2: 2021-03-04, BG: EP-718: Added enums for trigger sources **
78 ** V0.4.3: 2021-04-06, BG: EP-760: Replaced if instructions to check if the **
79 ** module is enabled with preprocessor directives to**
80 ** avoid compiler warnings **
81 ** V0.4.4: 2021-04-23, NI: EP-706: Added function instead of direct field **
82 ** access in ADC1_init() **
83 ** Added missing elses for range check if() in **
84 ** several functions. **
85 ** V0.4.5: 2021-08-06, BG: EP-695: Removed the check of the VALID bit in **
86 ** ADC1_getChResult() **
87 ** Updated documentation for ADC1_getChResult() and **
88 ** ADC1_getChResult_mV() **
89 ** V0.4.6: 2021-11-12, JO: EP-937: Updated copyright and branding **
90 ** V0.4.7: 2022-06-23, JO: EP-1150: Removed ARMCC V6.18 warnings **
91 ** V0.4.8: 2022-08-29, JO: EP-1244: Removed sequence running check from **
92 ** ADC1_startSequence **
93 ** V0.4.9: 2022-11-17, JO: EP-1342: Updated enum documentation to remove **
94 ** doxygen warning **
95 ** V0.5.0: 2023-02-23, BG: EP-1279: Corrected Doxygen documentation for **
96 ** ADC1_getChFiltResult and ADC1_getChFiltResult_mV **
97 ** V0.6.0: 2024-06-03, JO: EP-1488: Added functions ADC1_setChxInsel **
98 ** V0.6.1: 2024-11-05, JO: EP-1494: Updated license **
99 *******************************************************************************/
100 
101 #ifndef _ADC1_H
102 #define _ADC1_H
103 
104 /*******************************************************************************
105 ** Includes **
106 *******************************************************************************/
107 
108 #include "tle_variants.h"
109 #include "types.h"
110 #include "adc1_defines.h"
111 #include "tle989x.h"
112 
113 /*******************************************************************************
114 ** Global Macro Declarations **
115 *******************************************************************************/
116 
118 #define ADC1_DCH_CNT (20u)
120 #define ADC1_AI_CNT (27u)
122 #define ADC1_FILT_CNT (4u)
124 #define ADC1_SEQ_CNT (4u)
126 #define ADC1_SLOT_CNT (4u)
128 #define ADC1_FILT_CH_DIS (4u)
130 #define ADC1_SHADOWTRANS_EN (0x00700000u)
132 #define ADC1_SHADOWTRANS_BY_SW (0x00770000u)
134 #define ADC1_ALL_DCH_MSK (0xFFFFFu)
136 #define ADC1_ALL_SQSTS_MSK (0xFFFu)
138 #define ADC1_ALL_FILTSTS_MSK (0xFu)
140 #define ADC1_ALL_CMPSTS_MSK (0xFF00FFu)
142 #define ADC1_VREF_5000mV (5000u)
144 #define ADC1_MAX_RESOLUTION (0x3FFFu)
146 #define ADC1_ATT_TYPE0 (102u)
148 #define ADC1_ATT_TYPE1 (72u)
150 #define ADC1_ATT_TYPE2 (512u)
152 #define ADC1_ATT_DENOM (512u)
154 #define ADC1_DCH0 (0u)
156 #define ADC1_DCH1 (1u)
158 #define ADC1_DCH2 (2u)
160 #define ADC1_DCH3 (3u)
162 #define ADC1_DCH4 (4u)
164 #define ADC1_DCH5 (5u)
166 #define ADC1_DCH6 (6u)
168 #define ADC1_DCH7 (7u)
170 #define ADC1_DCH8 (8u)
172 #define ADC1_DCH9 (9u)
174 #define ADC1_DCH10 (10u)
176 #define ADC1_DCH11 (11u)
178 #define ADC1_DCH12 (12u)
180 #define ADC1_DCH13 (13u)
182 #define ADC1_DCH14 (14u)
184 #define ADC1_DCH15 (15u)
186 #define ADC1_DCH16 (16u)
188 #define ADC1_DCH17 (17u)
190 #define ADC1_DCH18 (18u)
192 #define ADC1_DCH19 (19u)
193 
195 #define ADC1_SEQ0 (0u)
197 #define ADC1_SEQ1 (1u)
199 #define ADC1_SEQ2 (2u)
201 #define ADC1_SEQ3 (3u)
202 
204 #define ADC1_SEQ_SLOT0 (0u)
206 #define ADC1_SEQ_SLOT1 (1u)
208 #define ADC1_SEQ_SLOT2 (2u)
210 #define ADC1_SEQ_SLOT3 (3u)
211 
213 #define ADC1_SW_TRIGGER (0u)
214 
215 /*******************************************************************************
216 ** Global Type Declarations **
217 *******************************************************************************/
218 
219 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
220  #pragma clang diagnostic push
221  #pragma clang diagnostic ignored "-Wpadded"
222 #endif
223 
228 typedef enum ADC1_Seq0Trig
229 {
239 
244 typedef enum ADC1_Seq1Trig
245 {
256 
261 typedef enum ADC1_Seq2Trig
262 {
273 
278 typedef enum ADC1_Seq3Trig
279 {
289 
294 typedef enum tADC1_CHINSELx
295 {
305 #ifdef UC_FEATURE_64PIN
310 #endif
316 #ifdef UC_FEATURE_64PIN
318 #endif
323  ADC1_CHINSELx_P2_2 = 26
325 
329 typedef union ADC1_SQCFGx
330 {
332  struct
333  {
334  uint32 SLOTS : 3;
335  uint32 : 1;
336  uint32 SQREP : 2;
340  uint32 GTSEL : 2;
341  uint32 TRGSW : 1;
342  uint32 GTSW : 1;
343  } bit;
345 
349 typedef union ADC1_SQSLOTx
350 {
352  struct
353  {
355  uint32 : 3;
357  uint32 : 3;
359  uint32 : 3;
361  } bit;
363 
367 typedef union ADC1_CHCFGx
368 {
370  struct
371  {
372  uint32 INSEL : 5;
373  uint32 : 3;
374  uint32 CHREP : 4;
375  uint32 : 4;
379  } bit;
381 
385 typedef union ADC1_CONVCFGx
386 {
388  struct
389  {
390  uint32 TCONF : 2;
391  uint32 OVERS : 2;
392  uint32 STC : 4;
393  uint32 SESP : 1;
394  uint32 : 1;
395  uint32 MSBD : 1;
396  uint32 PCAL : 1;
397  uint32 BWD : 2;
399  } bit;
401 
405 typedef union ADC1_CMPCFGx
406 {
408  struct
409  {
410  uint32 LOWER : 8;
412  uint32 : 3;
414  uint32 : 2;
415  uint32 UPPER : 8;
419  uint32 MODE : 2;
420  } bit;
422 
423 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
424  #pragma clang diagnostic pop
425 #endif
426 
427 /*******************************************************************************
428 ** Global Function Declarations **
429 *******************************************************************************/
430 
431 sint8 ADC1_init(void);
432 sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel);
433 sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel);
434 sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel);
435 sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel);
436 sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx);
437 sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx);
438 sint8 ADC1_startSequence(uint8 u8_seqIdx);
439 uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx);
440 INLINE void ADC1_enPower(void);
441 INLINE void ADC1_disPower(void);
442 INLINE void ADC1_setClockDiv(uint8 u8_value);
444 INLINE void ADC1_enSuspend(void);
445 INLINE void ADC1_disSuspend(void);
446 INLINE void ADC1_setSuspendMode(uint8 u8_value);
451 INLINE void ADC1_setSeq0Repetition(uint8 u8_value);
455 INLINE void ADC1_enSeq0WaitForRead(void);
459 INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value);
461 INLINE void ADC1_enSeq0TriggerGate(void);
463 INLINE void ADC1_setSeq0Slot0(uint8 u8_value);
465 INLINE void ADC1_setSeq0Slot1(uint8 u8_value);
467 INLINE void ADC1_setSeq0Slot2(uint8 u8_value);
469 INLINE void ADC1_setSeq0Slot3(uint8 u8_value);
472 INLINE void ADC1_setSeq1Repetition(uint8 u8_value);
476 INLINE void ADC1_enSeq1WaitForRead(void);
480 INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value);
482 INLINE void ADC1_enSeq1TriggerGate(void);
484 INLINE void ADC1_setSeq1Slot0(uint8 u8_value);
486 INLINE void ADC1_setSeq1Slot1(uint8 u8_value);
488 INLINE void ADC1_setSeq1Slot2(uint8 u8_value);
490 INLINE void ADC1_setSeq1Slot3(uint8 u8_value);
493 INLINE void ADC1_setSeq2Repetition(uint8 u8_value);
497 INLINE void ADC1_enSeq2WaitForRead(void);
501 INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value);
503 INLINE void ADC1_enSeq2TriggerGate(void);
505 INLINE void ADC1_setSeq2Slot0(uint8 u8_value);
507 INLINE void ADC1_setSeq2Slot1(uint8 u8_value);
509 INLINE void ADC1_setSeq2Slot2(uint8 u8_value);
511 INLINE void ADC1_setSeq2Slot3(uint8 u8_value);
514 INLINE void ADC1_setSeq3Repetition(uint8 u8_value);
518 INLINE void ADC1_enSeq3WaitForRead(void);
522 INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value);
524 INLINE void ADC1_enSeq3TriggerGate(void);
526 INLINE void ADC1_setSeq3Slot0(uint8 u8_value);
528 INLINE void ADC1_setSeq3Slot1(uint8 u8_value);
530 INLINE void ADC1_setSeq3Slot2(uint8 u8_value);
532 INLINE void ADC1_setSeq3Slot3(uint8 u8_value);
551 INLINE void ADC1_clrSeq0CollSts(void);
552 INLINE void ADC1_clrSeq1CollSts(void);
553 INLINE void ADC1_clrSeq2CollSts(void);
554 INLINE void ADC1_clrSeq3CollSts(void);
555 INLINE void ADC1_clrSeq0IntSts(void);
556 INLINE void ADC1_clrSeq1IntSts(void);
557 INLINE void ADC1_clrSeq2IntSts(void);
558 INLINE void ADC1_clrSeq3IntSts(void);
563 INLINE void ADC1_setSeq0CollSts(void);
564 INLINE void ADC1_setSeq1CollSts(void);
565 INLINE void ADC1_setSeq2CollSts(void);
566 INLINE void ADC1_setSeq3CollSts(void);
567 INLINE void ADC1_setSeq0IntSts(void);
568 INLINE void ADC1_setSeq1IntSts(void);
569 INLINE void ADC1_setSeq2IntSts(void);
570 INLINE void ADC1_setSeq3IntSts(void);
676 INLINE void ADC1_enCalibCh0 (void);
677 INLINE void ADC1_disCalibCh0 (void);
678 INLINE void ADC1_enCalibCh1 (void);
679 INLINE void ADC1_disCalibCh1 (void);
680 INLINE void ADC1_enCalibCh2 (void);
681 INLINE void ADC1_disCalibCh2 (void);
682 INLINE void ADC1_enCalibCh3 (void);
683 INLINE void ADC1_disCalibCh3 (void);
684 INLINE void ADC1_enCalibCh4 (void);
685 INLINE void ADC1_disCalibCh4 (void);
686 INLINE void ADC1_enCalibCh5 (void);
687 INLINE void ADC1_disCalibCh5 (void);
688 INLINE void ADC1_enCalibCh6 (void);
689 INLINE void ADC1_disCalibCh6 (void);
690 INLINE void ADC1_enCalibCh7 (void);
691 INLINE void ADC1_disCalibCh7 (void);
692 INLINE void ADC1_enCalibCh8 (void);
693 INLINE void ADC1_disCalibCh8 (void);
694 INLINE void ADC1_enCalibCh9 (void);
695 INLINE void ADC1_disCalibCh9 (void);
696 INLINE void ADC1_enCalibCh10(void);
697 INLINE void ADC1_disCalibCh10(void);
698 INLINE void ADC1_enCalibCh11(void);
699 INLINE void ADC1_disCalibCh11(void);
700 INLINE void ADC1_enCalibCh12(void);
701 INLINE void ADC1_disCalibCh12(void);
702 INLINE void ADC1_enCalibCh13(void);
703 INLINE void ADC1_disCalibCh13(void);
704 INLINE void ADC1_enCalibCh14(void);
705 INLINE void ADC1_disCalibCh14(void);
706 INLINE void ADC1_enCalibCh15(void);
707 INLINE void ADC1_disCalibCh15(void);
708 INLINE void ADC1_enCalibCh16(void);
709 INLINE void ADC1_disCalibCh16(void);
710 INLINE void ADC1_enCalibCh17(void);
711 INLINE void ADC1_disCalibCh17(void);
712 INLINE void ADC1_enCalibCh18(void);
713 INLINE void ADC1_disCalibCh18(void);
714 INLINE void ADC1_enCalibCh19(void);
715 INLINE void ADC1_disCalibCh19(void);
716 INLINE void ADC1_enCalibCh20(void);
717 INLINE void ADC1_disCalibCh20(void);
718 INLINE void ADC1_enCalibCh21(void);
719 INLINE void ADC1_disCalibCh21(void);
720 INLINE void ADC1_enCalibCh22(void);
721 INLINE void ADC1_disCalibCh22(void);
722 INLINE void ADC1_enCalibCh23(void);
723 INLINE void ADC1_disCalibCh23(void);
724 INLINE void ADC1_enCalibCh24(void);
725 INLINE void ADC1_disCalibCh24(void);
726 INLINE void ADC1_enCalibCh25(void);
727 INLINE void ADC1_disCalibCh25(void);
728 INLINE void ADC1_enCalibCh26(void);
729 INLINE void ADC1_disCalibCh26(void);
730 INLINE void ADC1_enCalibProtCh0 (void);
731 INLINE void ADC1_disCalibProtCh0 (void);
732 INLINE void ADC1_enCalibProtCh1 (void);
733 INLINE void ADC1_disCalibProtCh1 (void);
734 INLINE void ADC1_enCalibProtCh2 (void);
735 INLINE void ADC1_disCalibProtCh2 (void);
736 INLINE void ADC1_enCalibProtCh3 (void);
737 INLINE void ADC1_disCalibProtCh3 (void);
738 INLINE void ADC1_enCalibProtCh4 (void);
739 INLINE void ADC1_disCalibProtCh4 (void);
740 INLINE void ADC1_enCalibProtCh5 (void);
741 INLINE void ADC1_disCalibProtCh5 (void);
742 INLINE void ADC1_enCalibProtCh6 (void);
743 INLINE void ADC1_disCalibProtCh6 (void);
744 INLINE void ADC1_enCalibProtCh7 (void);
745 INLINE void ADC1_disCalibProtCh7 (void);
746 INLINE void ADC1_enCalibProtCh8 (void);
747 INLINE void ADC1_disCalibProtCh8 (void);
748 INLINE void ADC1_enCalibProtCh9 (void);
749 INLINE void ADC1_disCalibProtCh9 (void);
750 INLINE void ADC1_enCalibProtCh10(void);
751 INLINE void ADC1_disCalibProtCh10(void);
752 INLINE void ADC1_enCalibProtCh11(void);
753 INLINE void ADC1_disCalibProtCh11(void);
754 INLINE void ADC1_enCalibProtCh12(void);
755 INLINE void ADC1_disCalibProtCh12(void);
756 INLINE void ADC1_enCalibProtCh13(void);
757 INLINE void ADC1_disCalibProtCh13(void);
758 INLINE void ADC1_enCalibProtCh14(void);
759 INLINE void ADC1_disCalibProtCh14(void);
760 INLINE void ADC1_enCalibProtCh15(void);
761 INLINE void ADC1_disCalibProtCh15(void);
762 INLINE void ADC1_enCalibProtCh16(void);
763 INLINE void ADC1_disCalibProtCh16(void);
764 INLINE void ADC1_enCalibProtCh17(void);
765 INLINE void ADC1_disCalibProtCh17(void);
766 INLINE void ADC1_enCalibProtCh18(void);
767 INLINE void ADC1_disCalibProtCh18(void);
768 INLINE void ADC1_enCalibProtCh19(void);
769 INLINE void ADC1_disCalibProtCh19(void);
770 INLINE void ADC1_enCalibProtCh20(void);
771 INLINE void ADC1_disCalibProtCh20(void);
772 INLINE void ADC1_enCalibProtCh21(void);
773 INLINE void ADC1_disCalibProtCh21(void);
774 INLINE void ADC1_enCalibProtCh22(void);
775 INLINE void ADC1_disCalibProtCh22(void);
776 INLINE void ADC1_enCalibProtCh23(void);
777 INLINE void ADC1_disCalibProtCh23(void);
778 INLINE void ADC1_enCalibProtCh24(void);
779 INLINE void ADC1_disCalibProtCh24(void);
780 INLINE void ADC1_enCalibProtCh25(void);
781 INLINE void ADC1_disCalibProtCh25(void);
782 INLINE void ADC1_enCalibProtCh26(void);
783 INLINE void ADC1_disCalibProtCh26(void);
784 INLINE void ADC1_setFilter0Coeff(uint8 u8_value);
786 INLINE void ADC1_setFilter1Coeff(uint8 u8_value);
788 INLINE void ADC1_setFilter2Coeff(uint8 u8_value);
790 INLINE void ADC1_setFilter3Coeff(uint8 u8_value);
800 INLINE void ADC1_clrFilter0Sts(void);
801 INLINE void ADC1_clrFilter1Sts(void);
802 INLINE void ADC1_clrFilter2Sts(void);
803 INLINE void ADC1_clrFilter3Sts(void);
804 INLINE void ADC1_setFilter0Sts(void);
805 INLINE void ADC1_setFilter1Sts(void);
806 INLINE void ADC1_setFilter2Sts(void);
807 INLINE void ADC1_setFilter3Sts(void);
868 INLINE void ADC1_clrCmp0UpIntSts(void);
869 INLINE void ADC1_clrCmp1UpIntSts(void);
870 INLINE void ADC1_clrCmp2UpIntSts(void);
871 INLINE void ADC1_clrCmp3UpIntSts(void);
872 INLINE void ADC1_clrCmp0UpThSts(void);
873 INLINE void ADC1_clrCmp1UpThSts(void);
874 INLINE void ADC1_clrCmp2UpThSts(void);
875 INLINE void ADC1_clrCmp3UpThSts(void);
876 INLINE void ADC1_clrCmp0LoIntSts(void);
877 INLINE void ADC1_clrCmp1LoIntSts(void);
878 INLINE void ADC1_clrCmp2LoIntSts(void);
879 INLINE void ADC1_clrCmp3LoIntSts(void);
880 INLINE void ADC1_clrCmp0LoThSts(void);
881 INLINE void ADC1_clrCmp1LoThSts(void);
882 INLINE void ADC1_clrCmp2LoThSts(void);
883 INLINE void ADC1_clrCmp3LoThSts(void);
884 INLINE void ADC1_setCmp0UpIntSts(void);
885 INLINE void ADC1_setCmp1UpIntSts(void);
886 INLINE void ADC1_setCmp2UpIntSts(void);
887 INLINE void ADC1_setCmp3UpIntSts(void);
888 INLINE void ADC1_setCmp0UpThSts(void);
889 INLINE void ADC1_setCmp1UpThSts(void);
890 INLINE void ADC1_setCmp2UpThSts(void);
891 INLINE void ADC1_setCmp3UpThSts(void);
892 INLINE void ADC1_setCmp0LoIntSts(void);
893 INLINE void ADC1_setCmp1LoIntSts(void);
894 INLINE void ADC1_setCmp2LoIntSts(void);
895 INLINE void ADC1_setCmp3LoIntSts(void);
896 INLINE void ADC1_setCmp0LoThSts(void);
897 INLINE void ADC1_setCmp1LoThSts(void);
898 INLINE void ADC1_setCmp2LoThSts(void);
899 INLINE void ADC1_setCmp3LoThSts(void);
900 INLINE void ADC1_enCmp0UpInt(void);
901 INLINE void ADC1_disCmp0UpInt(void);
902 INLINE void ADC1_enCmp1UpInt(void);
903 INLINE void ADC1_disCmp1UpInt(void);
904 INLINE void ADC1_enCmp2UpInt(void);
905 INLINE void ADC1_disCmp2UpInt(void);
906 INLINE void ADC1_enCmp3UpInt(void);
907 INLINE void ADC1_disCmp3UpInt(void);
908 INLINE void ADC1_enCmp0LoInt(void);
909 INLINE void ADC1_disCmp0LoInt(void);
910 INLINE void ADC1_enCmp1LoInt(void);
911 INLINE void ADC1_disCmp1LoInt(void);
912 INLINE void ADC1_enCmp2LoInt(void);
913 INLINE void ADC1_disCmp2LoInt(void);
914 INLINE void ADC1_enCmp3LoInt(void);
915 INLINE void ADC1_disCmp3LoInt(void);
916 INLINE void ADC1_enSeq0Int(void);
917 INLINE void ADC1_disSeq0Int(void);
918 INLINE void ADC1_enSeq1Int(void);
919 INLINE void ADC1_disSeq1Int(void);
920 INLINE void ADC1_enSeq2Int(void);
921 INLINE void ADC1_disSeq2Int(void);
922 INLINE void ADC1_enSeq3Int(void);
923 INLINE void ADC1_disSeq3Int(void);
924 INLINE void ADC1_enCh0Int(void);
925 INLINE void ADC1_disCh0Int(void);
926 INLINE void ADC1_enCh1Int(void);
927 INLINE void ADC1_disCh1Int(void);
928 INLINE void ADC1_enCh2Int(void);
929 INLINE void ADC1_disCh2Int(void);
930 INLINE void ADC1_enCh3Int(void);
931 INLINE void ADC1_disCh3Int(void);
932 INLINE void ADC1_enCh4Int(void);
933 INLINE void ADC1_disCh4Int(void);
934 INLINE void ADC1_enCh5Int(void);
935 INLINE void ADC1_disCh5Int(void);
936 INLINE void ADC1_enCh6Int(void);
937 INLINE void ADC1_disCh6Int(void);
938 INLINE void ADC1_enCh7Int(void);
939 INLINE void ADC1_disCh7Int(void);
940 INLINE void ADC1_enCh8Int(void);
941 INLINE void ADC1_disCh8Int(void);
942 INLINE void ADC1_enCh9Int(void);
943 INLINE void ADC1_disCh9Int(void);
944 INLINE void ADC1_enCh10Int(void);
945 INLINE void ADC1_disCh10Int(void);
946 INLINE void ADC1_enCh11Int(void);
947 INLINE void ADC1_disCh11Int(void);
948 INLINE void ADC1_enCh12Int(void);
949 INLINE void ADC1_disCh12Int(void);
950 INLINE void ADC1_enCh13Int(void);
951 INLINE void ADC1_disCh13Int(void);
952 INLINE void ADC1_enCh14Int(void);
953 INLINE void ADC1_disCh14Int(void);
954 INLINE void ADC1_enCh15Int(void);
955 INLINE void ADC1_disCh15Int(void);
956 INLINE void ADC1_enCh16Int(void);
957 INLINE void ADC1_disCh16Int(void);
958 INLINE void ADC1_enCh17Int(void);
959 INLINE void ADC1_disCh17Int(void);
960 INLINE void ADC1_enCh18Int(void);
961 INLINE void ADC1_disCh18Int(void);
962 INLINE void ADC1_enCh19Int(void);
963 INLINE void ADC1_disCh19Int(void);
972 INLINE void ADC1_enSeq0CollInt(void);
973 INLINE void ADC1_disSeq0CollInt(void);
974 INLINE void ADC1_enSeq1CollInt(void);
975 INLINE void ADC1_disSeq1CollInt(void);
976 INLINE void ADC1_enSeq2CollInt(void);
977 INLINE void ADC1_disSeq2CollInt(void);
978 INLINE void ADC1_enSeq3CollInt(void);
979 INLINE void ADC1_disSeq3CollInt(void);
1020 INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value);
1022 INLINE void ADC1_setTriggHwShadowTrans(uint8 u8_value);
1024 INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value);
1026 INLINE void ADC1_enSeqHwShadowTrans(void);
1027 INLINE void ADC1_disSeqHwShadowTrans(void);
1030 INLINE void ADC1_enGateHwShadowTrans(void);
1032 INLINE void ADC1_setSeqSwShadowTrans(void);
1038 INLINE void ADC1_enSeqSwShadowTrans(void);
1039 INLINE void ADC1_disSeqSwShadowTrans(void);
1042 INLINE void ADC1_enGateSwShadowTrans(void);
1044 INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value);
1046 INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value);
1048 INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value);
1050 INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value);
1052 INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value);
1054 INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value);
1056 INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value);
1058 INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value);
1060 INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value);
1062 INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value);
1064 INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value);
1066 INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value);
1068 INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value);
1070 INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value);
1072 INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value);
1074 INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value);
1076 INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value);
1078 INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value);
1080 INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value);
1082 INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value);
1084 INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value);
1086 INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value);
1088 INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value);
1090 INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value);
1092 INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value);
1094 INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value);
1096 INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value);
1098 INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value);
1100 INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value);
1102 INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value);
1104 INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value);
1106 INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value);
1108 INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value);
1110 INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value);
1112 INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value);
1114 INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value);
1116 INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value);
1118 INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value);
1120 INLINE void ARVG_enVAREF(void);
1121 INLINE void ARVG_disVAREF(void);
1128 
1129 
1130 /*******************************************************************************
1131 ** Deprecated Function Declarations **
1132 *******************************************************************************/
1133 
1137 void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1138 
1142 void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1143 
1147 void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1148 
1152 void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1153 
1157 void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1158 
1162 void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1163 
1167 void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1168 
1172 void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1173 
1177 void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1178 
1182 void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1183 
1187 void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1188 
1192 void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1193 
1197 void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1198 
1202 void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1203 
1207 void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1208 
1212 void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1213 
1217 void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1218 
1222 void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1223 
1227 void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1228 
1232 void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1233 
1237 void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1238 
1242 void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1243 
1247 void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1248 
1252 void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1253 
1257 void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1258 
1262 void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1263 
1267 void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1268 
1272 void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1273 
1277 void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1278 
1282 void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1283 
1287 void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1288 
1292 void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1293 
1297 void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1298 
1302 void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1303 
1307 void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1308 
1312 void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1313 
1317 void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1318 
1322 void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1323 
1327 void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1328 
1332 void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1333 
1334 
1335 /*******************************************************************************
1336 ** Global Inline Function Definitions **
1337 *******************************************************************************/
1338 
1342 {
1343  ADC1->GLOBCONF.bit.EN = 1u;
1344 }
1345 
1349 {
1350  ADC1->GLOBCONF.bit.EN = 0u;
1351 }
1352 
1358 {
1359  ADC1->CLKCON.bit.CLKDIV = u8_value;
1360 }
1361 
1367 {
1368  return (uint8)ADC1->CLKCON.bit.CLKDIV;
1369 }
1370 
1374 {
1375  ADC1->SUSCTR.bit.SUSEN = 1u;
1376 }
1377 
1381 {
1382  ADC1->SUSCTR.bit.SUSEN = 0u;
1383 }
1384 
1390 {
1391  ADC1->SUSCTR.bit.SUSMOD = u8_value;
1392 }
1393 
1399 {
1400  return (uint8)ADC1->SUSCTR.bit.SUSMOD;
1401 }
1402 
1408 {
1409  return (uint8)ADC1->SUSSTAT.bit.STAT;
1410 }
1411 
1417 {
1418  return (uint8)ADC1->SUSSTAT.bit.READY;
1419 }
1420 
1426 {
1427  ADC1->SQCFG0.reg = (uint32)s_value.reg;
1428 }
1429 
1435 {
1436  ADC1->SQCFG0.bit.SQREP = u8_value;
1437 }
1438 
1444 {
1445  return (uint8)ADC1->SQCFG0.bit.SQREP;
1446 }
1447 
1451 {
1452  ADC1->SQCFG0.bit.COLLCFG = 1u;
1453 }
1454 
1458 {
1459  ADC1->SQCFG0.bit.COLLCFG = 0u;
1460 }
1461 
1465 {
1466  ADC1->SQCFG0.bit.WFRCFG = 1u;
1467 }
1468 
1472 {
1473  ADC1->SQCFG0.bit.WFRCFG = 0u;
1474 }
1475 
1481 {
1482  ADC1->SQCFG0.bit.TRGSEL = (uint8)e_Seq0Trig;
1483 }
1484 
1490 {
1491  return ADC1->SQCFG0.bit.TRGSEL;
1492 }
1493 
1499 {
1500  ADC1->SQCFG0.bit.GTSEL = u8_value;
1501 }
1502 
1508 {
1509  return (uint8)ADC1->SQCFG0.bit.GTSEL;
1510 }
1511 
1515 {
1516  ADC1->SQCFG0.bit.GTSW = 1u;
1517 }
1518 
1522 {
1523  ADC1->SQCFG0.bit.GTSW = 0u;
1524 }
1525 
1531 {
1532  ADC1->SQSLOT0.bit.CHSEL0 = u8_value;
1533 }
1534 
1540 {
1541  return (uint8)ADC1->SQSLOT0.bit.CHSEL0;
1542 }
1543 
1549 {
1550  ADC1->SQSLOT0.bit.CHSEL1 = u8_value;
1551 }
1552 
1558 {
1559  return (uint8)ADC1->SQSLOT0.bit.CHSEL1;
1560 }
1561 
1567 {
1568  ADC1->SQSLOT0.bit.CHSEL2 = u8_value;
1569 }
1570 
1576 {
1577  return (uint8)ADC1->SQSLOT0.bit.CHSEL2;
1578 }
1579 
1585 {
1586  ADC1->SQSLOT0.bit.CHSEL3 = u8_value;
1587 }
1588 
1594 {
1595  return (uint8)ADC1->SQSLOT0.bit.CHSEL3;
1596 }
1597 
1603 {
1604  ADC1->SQCFG1.reg = (uint32)s_value.reg;
1605 }
1606 
1612 {
1613  ADC1->SQCFG1.bit.SQREP = u8_value;
1614 }
1615 
1621 {
1622  return (uint8)ADC1->SQCFG1.bit.SQREP;
1623 }
1624 
1628 {
1629  ADC1->SQCFG1.bit.COLLCFG = 1u;
1630 }
1631 
1635 {
1636  ADC1->SQCFG1.bit.COLLCFG = 0u;
1637 }
1638 
1642 {
1643  ADC1->SQCFG1.bit.WFRCFG = 1u;
1644 }
1645 
1649 {
1650  ADC1->SQCFG1.bit.WFRCFG = 0u;
1651 }
1652 
1658 {
1659  ADC1->SQCFG1.bit.TRGSEL = (uint8)e_Seq1Trig;
1660 }
1661 
1667 {
1668  return ADC1->SQCFG1.bit.TRGSEL;
1669 }
1670 
1676 {
1677  ADC1->SQCFG1.bit.GTSEL = u8_value;
1678 }
1679 
1685 {
1686  return (uint8)ADC1->SQCFG1.bit.GTSEL;
1687 }
1688 
1692 {
1693  ADC1->SQCFG1.bit.GTSW = 1u;
1694 }
1695 
1699 {
1700  ADC1->SQCFG1.bit.GTSW = 0u;
1701 }
1702 
1708 {
1709  ADC1->SQSLOT1.bit.CHSEL0 = u8_value;
1710 }
1711 
1717 {
1718  return (uint8)ADC1->SQSLOT1.bit.CHSEL0;
1719 }
1720 
1726 {
1727  ADC1->SQSLOT1.bit.CHSEL1 = u8_value;
1728 }
1729 
1735 {
1736  return (uint8)ADC1->SQSLOT1.bit.CHSEL1;
1737 }
1738 
1744 {
1745  ADC1->SQSLOT1.bit.CHSEL2 = u8_value;
1746 }
1747 
1753 {
1754  return (uint8)ADC1->SQSLOT1.bit.CHSEL2;
1755 }
1756 
1762 {
1763  ADC1->SQSLOT1.bit.CHSEL3 = u8_value;
1764 }
1765 
1771 {
1772  return (uint8)ADC1->SQSLOT1.bit.CHSEL3;
1773 }
1774 
1780 {
1781  ADC1->SQCFG2.reg = (uint32)s_value.reg;
1782 }
1783 
1789 {
1790  ADC1->SQCFG2.bit.SQREP = u8_value;
1791 }
1792 
1798 {
1799  return (uint8)ADC1->SQCFG2.bit.SQREP;
1800 }
1801 
1805 {
1806  ADC1->SQCFG2.bit.COLLCFG = 1u;
1807 }
1808 
1812 {
1813  ADC1->SQCFG2.bit.COLLCFG = 0u;
1814 }
1815 
1819 {
1820  ADC1->SQCFG2.bit.WFRCFG = 1u;
1821 }
1822 
1826 {
1827  ADC1->SQCFG2.bit.WFRCFG = 0u;
1828 }
1829 
1835 {
1836  ADC1->SQCFG2.bit.TRGSEL = (uint8)e_Seq2Trig;
1837 }
1838 
1844 {
1845  return ADC1->SQCFG2.bit.TRGSEL;
1846 }
1847 
1853 {
1854  ADC1->SQCFG2.bit.GTSEL = u8_value;
1855 }
1856 
1862 {
1863  return (uint8)ADC1->SQCFG2.bit.GTSEL;
1864 }
1865 
1869 {
1870  ADC1->SQCFG2.bit.GTSW = 1u;
1871 }
1872 
1876 {
1877  ADC1->SQCFG2.bit.GTSW = 0u;
1878 }
1879 
1885 {
1886  ADC1->SQSLOT2.bit.CHSEL0 = u8_value;
1887 }
1888 
1894 {
1895  return (uint8)ADC1->SQSLOT2.bit.CHSEL0;
1896 }
1897 
1903 {
1904  ADC1->SQSLOT2.bit.CHSEL1 = u8_value;
1905 }
1906 
1912 {
1913  return (uint8)ADC1->SQSLOT2.bit.CHSEL1;
1914 }
1915 
1921 {
1922  ADC1->SQSLOT2.bit.CHSEL2 = u8_value;
1923 }
1924 
1930 {
1931  return (uint8)ADC1->SQSLOT2.bit.CHSEL2;
1932 }
1933 
1939 {
1940  ADC1->SQSLOT2.bit.CHSEL3 = u8_value;
1941 }
1942 
1948 {
1949  return (uint8)ADC1->SQSLOT2.bit.CHSEL3;
1950 }
1951 
1957 {
1958  ADC1->SQCFG3.reg = (uint32)s_value.reg;
1959 }
1960 
1966 {
1967  ADC1->SQCFG3.bit.SQREP = u8_value;
1968 }
1969 
1975 {
1976  return (uint8)ADC1->SQCFG3.bit.SQREP;
1977 }
1978 
1982 {
1983  ADC1->SQCFG3.bit.COLLCFG = 1u;
1984 }
1985 
1989 {
1990  ADC1->SQCFG3.bit.COLLCFG = 0u;
1991 }
1992 
1996 {
1997  ADC1->SQCFG3.bit.WFRCFG = 1u;
1998 }
1999 
2003 {
2004  ADC1->SQCFG3.bit.WFRCFG = 0u;
2005 }
2006 
2012 {
2013  ADC1->SQCFG3.bit.TRGSEL = (uint8)e_Seq3Trig;
2014 }
2015 
2021 {
2022  return ADC1->SQCFG3.bit.TRGSEL;
2023 }
2024 
2030 {
2031  ADC1->SQCFG3.bit.GTSEL = u8_value;
2032 }
2033 
2039 {
2040  return (uint8)ADC1->SQCFG3.bit.GTSEL;
2041 }
2042 
2046 {
2047  ADC1->SQCFG3.bit.GTSW = 1u;
2048 }
2049 
2053 {
2054  ADC1->SQCFG3.bit.GTSW = 0u;
2055 }
2056 
2062 {
2063  ADC1->SQSLOT3.bit.CHSEL0 = u8_value;
2064 }
2065 
2071 {
2072  return (uint8)ADC1->SQSLOT3.bit.CHSEL0;
2073 }
2074 
2080 {
2081  ADC1->SQSLOT3.bit.CHSEL1 = u8_value;
2082 }
2083 
2089 {
2090  return (uint8)ADC1->SQSLOT3.bit.CHSEL1;
2091 }
2092 
2098 {
2099  ADC1->SQSLOT3.bit.CHSEL2 = u8_value;
2100 }
2101 
2107 {
2108  return (uint8)ADC1->SQSLOT3.bit.CHSEL2;
2109 }
2110 
2116 {
2117  ADC1->SQSLOT3.bit.CHSEL3 = u8_value;
2118 }
2119 
2125 {
2126  return (uint8)ADC1->SQSLOT3.bit.CHSEL3;
2127 }
2128 
2134 {
2135  return (uint8)ADC1->SQSTAT.bit.WFR0;
2136 }
2137 
2143 {
2144  return (uint8)ADC1->SQSTAT.bit.WFR1;
2145 }
2146 
2152 {
2153  return (uint8)ADC1->SQSTAT.bit.WFR2;
2154 }
2155 
2161 {
2162  return (uint8)ADC1->SQSTAT.bit.WFR3;
2163 }
2164 
2170 {
2171  return (uint8)ADC1->SQSTAT.bit.COLL0;
2172 }
2173 
2179 {
2180  return (uint8)ADC1->SQSTAT.bit.COLL1;
2181 }
2182 
2188 {
2189  return (uint8)ADC1->SQSTAT.bit.COLL2;
2190 }
2191 
2197 {
2198  return (uint8)ADC1->SQSTAT.bit.COLL3;
2199 }
2200 
2206 {
2207  return (uint8)ADC1->SQSTAT.bit.SQ0;
2208 }
2209 
2215 {
2216  return (uint8)ADC1->SQSTAT.bit.SQ1;
2217 }
2218 
2224 {
2225  return (uint8)ADC1->SQSTAT.bit.SQ2;
2226 }
2227 
2233 {
2234  return (uint8)ADC1->SQSTAT.bit.SQ3;
2235 }
2236 
2242 {
2243  return (uint8)ADC1->SQSTAT.bit.SQNUM;
2244 }
2245 
2249 {
2250  ADC1->SQSTATCLR.bit.WFR0CLR = 1u;
2251 }
2252 
2256 {
2257  ADC1->SQSTATCLR.bit.WFR1CLR = 1u;
2258 }
2259 
2263 {
2264  ADC1->SQSTATCLR.bit.WFR2CLR = 1u;
2265 }
2266 
2270 {
2271  ADC1->SQSTATCLR.bit.WFR3CLR = 1u;
2272 }
2273 
2277 {
2278  ADC1->SQSTATCLR.bit.COLL0CLR = 1u;
2279 }
2280 
2284 {
2285  ADC1->SQSTATCLR.bit.COLL1CLR = 1u;
2286 }
2287 
2291 {
2292  ADC1->SQSTATCLR.bit.COLL2CLR = 1u;
2293 }
2294 
2298 {
2299  ADC1->SQSTATCLR.bit.COLL3CLR = 1u;
2300 }
2301 
2305 {
2306  ADC1->SQSTATCLR.bit.SQ0CLR = 1u;
2307 }
2308 
2312 {
2313  ADC1->SQSTATCLR.bit.SQ1CLR = 1u;
2314 }
2315 
2319 {
2320  ADC1->SQSTATCLR.bit.SQ2CLR = 1u;
2321 }
2322 
2326 {
2327  ADC1->SQSTATCLR.bit.SQ3CLR = 1u;
2328 }
2329 
2333 {
2334  ADC1->SQSTATSET.bit.WFR0SET = 1u;
2335 }
2336 
2340 {
2341  ADC1->SQSTATSET.bit.WFR1SET = 1u;
2342 }
2343 
2347 {
2348  ADC1->SQSTATSET.bit.WFR2SET = 1u;
2349 }
2350 
2354 {
2355  ADC1->SQSTATSET.bit.WFR3SET = 1u;
2356 }
2357 
2361 {
2362  ADC1->SQSTATSET.bit.COLL0SET = 1u;
2363 }
2364 
2368 {
2369  ADC1->SQSTATSET.bit.COLL1SET = 1u;
2370 }
2371 
2375 {
2376  ADC1->SQSTATSET.bit.COLL2SET = 1u;
2377 }
2378 
2382 {
2383  ADC1->SQSTATSET.bit.COLL3SET = 1u;
2384 }
2385 
2389 {
2390  ADC1->SQSTATSET.bit.SQ0SET = 1u;
2391 }
2392 
2396 {
2397  ADC1->SQSTATSET.bit.SQ1SET = 1u;
2398 }
2399 
2403 {
2404  ADC1->SQSTATSET.bit.SQ2SET = 1u;
2405 }
2406 
2410 {
2411  ADC1->SQSTATSET.bit.SQ3SET = 1u;
2412 }
2413 
2419 {
2420  ADC1->CHCFG0.reg = (uint32)s_value.reg;
2421 }
2422 
2428 {
2429  ADC1->CHCFG1.reg = (uint32)s_value.reg;
2430 }
2431 
2437 {
2438  ADC1->CHCFG2.reg = (uint32)s_value.reg;
2439 }
2440 
2446 {
2447  ADC1->CHCFG3.reg = (uint32)s_value.reg;
2448 }
2449 
2455 {
2456  ADC1->CHCFG4.reg = (uint32)s_value.reg;
2457 }
2458 
2464 {
2465  ADC1->CHCFG5.reg = (uint32)s_value.reg;
2466 }
2467 
2473 {
2474  ADC1->CHCFG6.reg = (uint32)s_value.reg;
2475 }
2476 
2482 {
2483  ADC1->CHCFG7.reg = (uint32)s_value.reg;
2484 }
2485 
2491 {
2492  ADC1->CHCFG8.reg = (uint32)s_value.reg;
2493 }
2494 
2500 {
2501  ADC1->CHCFG9.reg = (uint32)s_value.reg;
2502 }
2503 
2509 {
2510  ADC1->CHCFG10.reg = (uint32)s_value.reg;
2511 }
2512 
2518 {
2519  ADC1->CHCFG11.reg = (uint32)s_value.reg;
2520 }
2521 
2527 {
2528  ADC1->CHCFG12.reg = (uint32)s_value.reg;
2529 }
2530 
2536 {
2537  ADC1->CHCFG13.reg = (uint32)s_value.reg;
2538 }
2539 
2545 {
2546  ADC1->CHCFG14.reg = (uint32)s_value.reg;
2547 }
2548 
2554 {
2555  ADC1->CHCFG15.reg = (uint32)s_value.reg;
2556 }
2557 
2563 {
2564  ADC1->CHCFG16.reg = (uint32)s_value.reg;
2565 }
2566 
2572 {
2573  ADC1->CHCFG17.reg = (uint32)s_value.reg;
2574 }
2575 
2581 {
2582  ADC1->CHCFG18.reg = (uint32)s_value.reg;
2583 }
2584 
2590 {
2591  ADC1->CHCFG19.reg = (uint32)s_value.reg;
2592 }
2593 
2599 {
2600  ADC1->CHCFG0.bit.INSEL = (uint8)e_value;
2601 }
2602 
2608 {
2609  ADC1->CHCFG1.bit.INSEL = (uint8)e_value;
2610 }
2611 
2617 {
2618  ADC1->CHCFG2.bit.INSEL = (uint8)e_value;
2619 }
2620 
2626 {
2627  ADC1->CHCFG3.bit.INSEL = (uint8)e_value;
2628 }
2629 
2635 {
2636  ADC1->CHCFG4.bit.INSEL = (uint8)e_value;
2637 }
2638 
2644 {
2645  ADC1->CHCFG5.bit.INSEL = (uint8)e_value;
2646 }
2647 
2653 {
2654  ADC1->CHCFG6.bit.INSEL = (uint8)e_value;
2655 }
2656 
2662 {
2663  ADC1->CHCFG7.bit.INSEL = (uint8)e_value;
2664 }
2665 
2671 {
2672  ADC1->CHCFG8.bit.INSEL = (uint8)e_value;
2673 }
2674 
2680 {
2681  ADC1->CHCFG9.bit.INSEL = (uint8)e_value;
2682 }
2683 
2689 {
2690  ADC1->CHCFG10.bit.INSEL = (uint8)e_value;
2691 }
2692 
2698 {
2699  ADC1->CHCFG11.bit.INSEL = (uint8)e_value;
2700 }
2701 
2707 {
2708  ADC1->CHCFG12.bit.INSEL = (uint8)e_value;
2709 }
2710 
2716 {
2717  ADC1->CHCFG13.bit.INSEL = (uint8)e_value;
2718 }
2719 
2725 {
2726  ADC1->CHCFG14.bit.INSEL = (uint8)e_value;
2727 }
2728 
2734 {
2735  ADC1->CHCFG15.bit.INSEL = (uint8)e_value;
2736 }
2737 
2743 {
2744  ADC1->CHCFG16.bit.INSEL = (uint8)e_value;
2745 }
2746 
2752 {
2753  ADC1->CHCFG17.bit.INSEL = (uint8)e_value;
2754 }
2755 
2761 {
2762  ADC1->CHCFG18.bit.INSEL = (uint8)e_value;
2763 }
2764 
2770 {
2771  ADC1->CHCFG19.bit.INSEL = (uint8)e_value;
2772 }
2773 
2779 {
2780  return (uint8)ADC1->CHSTAT.bit.CH0;
2781 }
2782 
2788 {
2789  return (uint8)ADC1->CHSTAT.bit.CH1;
2790 }
2791 
2797 {
2798  return (uint8)ADC1->CHSTAT.bit.CH2;
2799 }
2800 
2806 {
2807  return (uint8)ADC1->CHSTAT.bit.CH3;
2808 }
2809 
2815 {
2816  return (uint8)ADC1->CHSTAT.bit.CH4;
2817 }
2818 
2824 {
2825  return (uint8)ADC1->CHSTAT.bit.CH5;
2826 }
2827 
2833 {
2834  return (uint8)ADC1->CHSTAT.bit.CH6;
2835 }
2836 
2842 {
2843  return (uint8)ADC1->CHSTAT.bit.CH7;
2844 }
2845 
2851 {
2852  return (uint8)ADC1->CHSTAT.bit.CH8;
2853 }
2854 
2860 {
2861  return (uint8)ADC1->CHSTAT.bit.CH9;
2862 }
2863 
2869 {
2870  return (uint8)ADC1->CHSTAT.bit.CH10;
2871 }
2872 
2878 {
2879  return (uint8)ADC1->CHSTAT.bit.CH11;
2880 }
2881 
2887 {
2888  return (uint8)ADC1->CHSTAT.bit.CH12;
2889 }
2890 
2896 {
2897  return (uint8)ADC1->CHSTAT.bit.CH13;
2898 }
2899 
2905 {
2906  return (uint8)ADC1->CHSTAT.bit.CH14;
2907 }
2908 
2914 {
2915  return (uint8)ADC1->CHSTAT.bit.CH15;
2916 }
2917 
2923 {
2924  return (uint8)ADC1->CHSTAT.bit.CH16;
2925 }
2926 
2932 {
2933  return (uint8)ADC1->CHSTAT.bit.CH17;
2934 }
2935 
2941 {
2942  return (uint8)ADC1->CHSTAT.bit.CH18;
2943 }
2944 
2950 {
2951  return (uint8)ADC1->CHSTAT.bit.CH19;
2952 }
2953 
2959 {
2960  return (uint8)ADC1->CHSTAT.bit.CHNUM;
2961 }
2962 
2966 {
2967  ADC1->CHSTATCLR.bit.CH0CLR = 1u;
2968 }
2969 
2973 {
2974  ADC1->CHSTATCLR.bit.CH1CLR = 1u;
2975 }
2976 
2980 {
2981  ADC1->CHSTATCLR.bit.CH2CLR = 1u;
2982 }
2983 
2987 {
2988  ADC1->CHSTATCLR.bit.CH3CLR = 1u;
2989 }
2990 
2994 {
2995  ADC1->CHSTATCLR.bit.CH4CLR = 1u;
2996 }
2997 
3001 {
3002  ADC1->CHSTATCLR.bit.CH5CLR = 1u;
3003 }
3004 
3008 {
3009  ADC1->CHSTATCLR.bit.CH6CLR = 1u;
3010 }
3011 
3015 {
3016  ADC1->CHSTATCLR.bit.CH7CLR = 1u;
3017 }
3018 
3022 {
3023  ADC1->CHSTATCLR.bit.CH8CLR = 1u;
3024 }
3025 
3029 {
3030  ADC1->CHSTATCLR.bit.CH9CLR = 1u;
3031 }
3032 
3036 {
3037  ADC1->CHSTATCLR.bit.CH10CLR = 1u;
3038 }
3039 
3043 {
3044  ADC1->CHSTATCLR.bit.CH11CLR = 1u;
3045 }
3046 
3050 {
3051  ADC1->CHSTATCLR.bit.CH12CLR = 1u;
3052 }
3053 
3057 {
3058  ADC1->CHSTATCLR.bit.CH13CLR = 1u;
3059 }
3060 
3064 {
3065  ADC1->CHSTATCLR.bit.CH14CLR = 1u;
3066 }
3067 
3071 {
3072  ADC1->CHSTATCLR.bit.CH15CLR = 1u;
3073 }
3074 
3078 {
3079  ADC1->CHSTATCLR.bit.CH16CLR = 1u;
3080 }
3081 
3085 {
3086  ADC1->CHSTATCLR.bit.CH17CLR = 1u;
3087 }
3088 
3092 {
3093  ADC1->CHSTATCLR.bit.CH18CLR = 1u;
3094 }
3095 
3099 {
3100  ADC1->CHSTATCLR.bit.CH19CLR = 1u;
3101 }
3102 
3106 {
3107  ADC1->CHSTATSET.bit.CH0SET = 1u;
3108 }
3109 
3113 {
3114  ADC1->CHSTATSET.bit.CH1SET = 1u;
3115 }
3116 
3120 {
3121  ADC1->CHSTATSET.bit.CH2SET = 1u;
3122 }
3123 
3127 {
3128  ADC1->CHSTATSET.bit.CH3SET = 1u;
3129 }
3130 
3134 {
3135  ADC1->CHSTATSET.bit.CH4SET = 1u;
3136 }
3137 
3141 {
3142  ADC1->CHSTATSET.bit.CH5SET = 1u;
3143 }
3144 
3148 {
3149  ADC1->CHSTATSET.bit.CH6SET = 1u;
3150 }
3151 
3155 {
3156  ADC1->CHSTATSET.bit.CH7SET = 1u;
3157 }
3158 
3162 {
3163  ADC1->CHSTATSET.bit.CH8SET = 1u;
3164 }
3165 
3169 {
3170  ADC1->CHSTATSET.bit.CH9SET = 1u;
3171 }
3172 
3176 {
3177  ADC1->CHSTATSET.bit.CH10SET = 1u;
3178 }
3179 
3183 {
3184  ADC1->CHSTATSET.bit.CH11SET = 1u;
3185 }
3186 
3190 {
3191  ADC1->CHSTATSET.bit.CH12SET = 1u;
3192 }
3193 
3197 {
3198  ADC1->CHSTATSET.bit.CH13SET = 1u;
3199 }
3200 
3204 {
3205  ADC1->CHSTATSET.bit.CH14SET = 1u;
3206 }
3207 
3211 {
3212  ADC1->CHSTATSET.bit.CH15SET = 1u;
3213 }
3214 
3218 {
3219  ADC1->CHSTATSET.bit.CH16SET = 1u;
3220 }
3221 
3225 {
3226  ADC1->CHSTATSET.bit.CH17SET = 1u;
3227 }
3228 
3232 {
3233  ADC1->CHSTATSET.bit.CH18SET = 1u;
3234 }
3235 
3239 {
3240  ADC1->CHSTATSET.bit.CH19SET = 1u;
3241 }
3242 
3248 {
3249  ADC1->CONVCFG0.reg = (uint32)s_value.reg;
3250 }
3251 
3257 {
3258  ADC1->CONVCFG1.reg = (uint32)s_value.reg;
3259 }
3260 
3266 {
3267  ADC1->CONVCFG2.reg = (uint32)s_value.reg;
3268 }
3269 
3275 {
3276  ADC1->CONVCFG3.reg = (uint32)s_value.reg;
3277 }
3278 
3282 {
3283  ADC1->CALEN.bit.CALEN0 = 1u;
3284 }
3285 
3289 {
3290  ADC1->CALEN.bit.CALEN0 = 0u;
3291 }
3292 
3296 {
3297  ADC1->CALEN.bit.CALEN1 = 1u;
3298 }
3299 
3303 {
3304  ADC1->CALEN.bit.CALEN1 = 0u;
3305 }
3306 
3310 {
3311  ADC1->CALEN.bit.CALEN2 = 1u;
3312 }
3313 
3317 {
3318  ADC1->CALEN.bit.CALEN2 = 0u;
3319 }
3320 
3324 {
3325  ADC1->CALEN.bit.CALEN3 = 1u;
3326 }
3327 
3331 {
3332  ADC1->CALEN.bit.CALEN3 = 0u;
3333 }
3334 
3338 {
3339  ADC1->CALEN.bit.CALEN4 = 1u;
3340 }
3341 
3345 {
3346  ADC1->CALEN.bit.CALEN4 = 0u;
3347 }
3348 
3352 {
3353  ADC1->CALEN.bit.CALEN5 = 1u;
3354 }
3355 
3359 {
3360  ADC1->CALEN.bit.CALEN5 = 0u;
3361 }
3362 
3366 {
3367  ADC1->CALEN.bit.CALEN6 = 1u;
3368 }
3369 
3373 {
3374  ADC1->CALEN.bit.CALEN6 = 0u;
3375 }
3376 
3380 {
3381  ADC1->CALEN.bit.CALEN7 = 1u;
3382 }
3383 
3387 {
3388  ADC1->CALEN.bit.CALEN7 = 0u;
3389 }
3390 
3394 {
3395  ADC1->CALEN.bit.CALEN8 = 1u;
3396 }
3397 
3401 {
3402  ADC1->CALEN.bit.CALEN8 = 0u;
3403 }
3404 
3408 {
3409  ADC1->CALEN.bit.CALEN9 = 1u;
3410 }
3411 
3415 {
3416  ADC1->CALEN.bit.CALEN9 = 0u;
3417 }
3418 
3422 {
3423  ADC1->CALEN.bit.CALEN10 = 1u;
3424 }
3425 
3429 {
3430  ADC1->CALEN.bit.CALEN10 = 0u;
3431 }
3432 
3436 {
3437  ADC1->CALEN.bit.CALEN11 = 1u;
3438 }
3439 
3443 {
3444  ADC1->CALEN.bit.CALEN11 = 0u;
3445 }
3446 
3450 {
3451  ADC1->CALEN.bit.CALEN12 = 1u;
3452 }
3453 
3457 {
3458  ADC1->CALEN.bit.CALEN12 = 0u;
3459 }
3460 
3464 {
3465  ADC1->CALEN.bit.CALEN13 = 1u;
3466 }
3467 
3471 {
3472  ADC1->CALEN.bit.CALEN13 = 0u;
3473 }
3474 
3478 {
3479  ADC1->CALEN.bit.CALEN14 = 1u;
3480 }
3481 
3485 {
3486  ADC1->CALEN.bit.CALEN14 = 0u;
3487 }
3488 
3492 {
3493  ADC1->CALEN.bit.CALEN15 = 1u;
3494 }
3495 
3499 {
3500  ADC1->CALEN.bit.CALEN15 = 0u;
3501 }
3502 
3506 {
3507  ADC1->CALEN.bit.CALEN16 = 1u;
3508 }
3509 
3513 {
3514  ADC1->CALEN.bit.CALEN16 = 0u;
3515 }
3516 
3520 {
3521  ADC1->CALEN.bit.CALEN17 = 1u;
3522 }
3523 
3527 {
3528  ADC1->CALEN.bit.CALEN17 = 0u;
3529 }
3530 
3534 {
3535  ADC1->CALEN.bit.CALEN18 = 1u;
3536 }
3537 
3541 {
3542  ADC1->CALEN.bit.CALEN18 = 0u;
3543 }
3544 
3548 {
3549  ADC1->CALEN.bit.CALEN19 = 1u;
3550 }
3551 
3555 {
3556  ADC1->CALEN.bit.CALEN19 = 0u;
3557 }
3558 
3562 {
3563  ADC1->CALEN.bit.CALEN20 = 1u;
3564 }
3565 
3569 {
3570  ADC1->CALEN.bit.CALEN20 = 0u;
3571 }
3572 
3576 {
3577  ADC1->CALEN.bit.CALEN21 = 1u;
3578 }
3579 
3583 {
3584  ADC1->CALEN.bit.CALEN21 = 0u;
3585 }
3586 
3590 {
3591  ADC1->CALEN.bit.CALEN22 = 1u;
3592 }
3593 
3597 {
3598  ADC1->CALEN.bit.CALEN22 = 0u;
3599 }
3600 
3604 {
3605  ADC1->CALEN.bit.CALEN23 = 1u;
3606 }
3607 
3611 {
3612  ADC1->CALEN.bit.CALEN23 = 0u;
3613 }
3614 
3618 {
3619  ADC1->CALEN.bit.CALEN24 = 1u;
3620 }
3621 
3625 {
3626  ADC1->CALEN.bit.CALEN24 = 0u;
3627 }
3628 
3632 {
3633  ADC1->CALEN.bit.CALEN25 = 1u;
3634 }
3635 
3639 {
3640  ADC1->CALEN.bit.CALEN25 = 0u;
3641 }
3642 
3646 {
3647  ADC1->CALEN.bit.CALEN26 = 1u;
3648 }
3649 
3653 {
3654  ADC1->CALEN.bit.CALEN26 = 0u;
3655 }
3656 
3660 {
3661  ADC1->CALPEN.bit.CALPEN0 = 1u;
3662 }
3663 
3667 {
3668  ADC1->CALPEN.bit.CALPEN0 = 0u;
3669 }
3670 
3674 {
3675  ADC1->CALPEN.bit.CALPEN1 = 1u;
3676 }
3677 
3681 {
3682  ADC1->CALPEN.bit.CALPEN1 = 0u;
3683 }
3684 
3688 {
3689  ADC1->CALPEN.bit.CALPEN2 = 1u;
3690 }
3691 
3695 {
3696  ADC1->CALPEN.bit.CALPEN2 = 0u;
3697 }
3698 
3702 {
3703  ADC1->CALPEN.bit.CALPEN3 = 1u;
3704 }
3705 
3709 {
3710  ADC1->CALPEN.bit.CALPEN3 = 0u;
3711 }
3712 
3716 {
3717  ADC1->CALPEN.bit.CALPEN4 = 1u;
3718 }
3719 
3723 {
3724  ADC1->CALPEN.bit.CALPEN4 = 0u;
3725 }
3726 
3730 {
3731  ADC1->CALPEN.bit.CALPEN5 = 1u;
3732 }
3733 
3737 {
3738  ADC1->CALPEN.bit.CALPEN5 = 0u;
3739 }
3740 
3744 {
3745  ADC1->CALPEN.bit.CALPEN6 = 1u;
3746 }
3747 
3751 {
3752  ADC1->CALPEN.bit.CALPEN6 = 0u;
3753 }
3754 
3758 {
3759  ADC1->CALPEN.bit.CALPEN7 = 1u;
3760 }
3761 
3765 {
3766  ADC1->CALPEN.bit.CALPEN7 = 0u;
3767 }
3768 
3772 {
3773  ADC1->CALPEN.bit.CALPEN8 = 1u;
3774 }
3775 
3779 {
3780  ADC1->CALPEN.bit.CALPEN8 = 0u;
3781 }
3782 
3786 {
3787  ADC1->CALPEN.bit.CALPEN9 = 1u;
3788 }
3789 
3793 {
3794  ADC1->CALPEN.bit.CALPEN9 = 0u;
3795 }
3796 
3800 {
3801  ADC1->CALPEN.bit.CALPEN10 = 1u;
3802 }
3803 
3807 {
3808  ADC1->CALPEN.bit.CALPEN10 = 0u;
3809 }
3810 
3814 {
3815  ADC1->CALPEN.bit.CALPEN11 = 1u;
3816 }
3817 
3821 {
3822  ADC1->CALPEN.bit.CALPEN11 = 0u;
3823 }
3824 
3828 {
3829  ADC1->CALPEN.bit.CALPEN12 = 1u;
3830 }
3831 
3835 {
3836  ADC1->CALPEN.bit.CALPEN12 = 0u;
3837 }
3838 
3842 {
3843  ADC1->CALPEN.bit.CALPEN13 = 1u;
3844 }
3845 
3849 {
3850  ADC1->CALPEN.bit.CALPEN13 = 0u;
3851 }
3852 
3856 {
3857  ADC1->CALPEN.bit.CALPEN14 = 1u;
3858 }
3859 
3863 {
3864  ADC1->CALPEN.bit.CALPEN14 = 0u;
3865 }
3866 
3870 {
3871  ADC1->CALPEN.bit.CALPEN15 = 1u;
3872 }
3873 
3877 {
3878  ADC1->CALPEN.bit.CALPEN15 = 0u;
3879 }
3880 
3884 {
3885  ADC1->CALPEN.bit.CALPEN16 = 1u;
3886 }
3887 
3891 {
3892  ADC1->CALPEN.bit.CALPEN16 = 0u;
3893 }
3894 
3898 {
3899  ADC1->CALPEN.bit.CALPEN17 = 1u;
3900 }
3901 
3905 {
3906  ADC1->CALPEN.bit.CALPEN17 = 0u;
3907 }
3908 
3912 {
3913  ADC1->CALPEN.bit.CALPEN18 = 1u;
3914 }
3915 
3919 {
3920  ADC1->CALPEN.bit.CALPEN18 = 0u;
3921 }
3922 
3926 {
3927  ADC1->CALPEN.bit.CALPEN19 = 1u;
3928 }
3929 
3933 {
3934  ADC1->CALPEN.bit.CALPEN19 = 0u;
3935 }
3936 
3940 {
3941  ADC1->CALPEN.bit.CALPEN20 = 1u;
3942 }
3943 
3947 {
3948  ADC1->CALPEN.bit.CALPEN20 = 0u;
3949 }
3950 
3954 {
3955  ADC1->CALPEN.bit.CALPEN21 = 1u;
3956 }
3957 
3961 {
3962  ADC1->CALPEN.bit.CALPEN21 = 0u;
3963 }
3964 
3968 {
3969  ADC1->CALPEN.bit.CALPEN22 = 1u;
3970 }
3971 
3975 {
3976  ADC1->CALPEN.bit.CALPEN22 = 0u;
3977 }
3978 
3982 {
3983  ADC1->CALPEN.bit.CALPEN23 = 1u;
3984 }
3985 
3989 {
3990  ADC1->CALPEN.bit.CALPEN23 = 0u;
3991 }
3992 
3996 {
3997  ADC1->CALPEN.bit.CALPEN24 = 1u;
3998 }
3999 
4003 {
4004  ADC1->CALPEN.bit.CALPEN24 = 0u;
4005 }
4006 
4010 {
4011  ADC1->CALPEN.bit.CALPEN25 = 1u;
4012 }
4013 
4017 {
4018  ADC1->CALPEN.bit.CALPEN25 = 0u;
4019 }
4020 
4024 {
4025  ADC1->CALPEN.bit.CALPEN26 = 1u;
4026 }
4027 
4031 {
4032  ADC1->CALPEN.bit.CALPEN26 = 0u;
4033 }
4034 
4040 {
4041  ADC1->FILTCFG.bit.COEF_A0 = u8_value;
4042 }
4043 
4049 {
4050  return (uint8)ADC1->FILTCFG.bit.COEF_A0;
4051 }
4052 
4058 {
4059  ADC1->FILTCFG.bit.COEF_A1 = u8_value;
4060 }
4061 
4067 {
4068  return (uint8)ADC1->FILTCFG.bit.COEF_A1;
4069 }
4070 
4076 {
4077  ADC1->FILTCFG.bit.COEF_A2 = u8_value;
4078 }
4079 
4085 {
4086  return (uint8)ADC1->FILTCFG.bit.COEF_A2;
4087 }
4088 
4094 {
4095  ADC1->FILTCFG.bit.COEF_A3 = u8_value;
4096 }
4097 
4103 {
4104  return (uint8)ADC1->FILTCFG.bit.COEF_A3;
4105 }
4106 
4112 {
4113  return (uint16)ADC1->FIL0.bit.FILRESULT;
4114 }
4115 
4121 {
4122  return (uint16)ADC1->FIL1.bit.FILRESULT;
4123 }
4124 
4130 {
4131  return (uint16)ADC1->FIL2.bit.FILRESULT;
4132 }
4133 
4139 {
4140  return (uint16)ADC1->FIL3.bit.FILRESULT;
4141 }
4142 
4148 {
4149  return (uint8)ADC1->FILSTAT.bit.FIL0;
4150 }
4151 
4157 {
4158  return (uint8)ADC1->FILSTAT.bit.FIL1;
4159 }
4160 
4166 {
4167  return (uint8)ADC1->FILSTAT.bit.FIL2;
4168 }
4169 
4175 {
4176  return (uint8)ADC1->FILSTAT.bit.FIL3;
4177 }
4178 
4182 {
4183  ADC1->FILSTATCLR.bit.FIL0CLR = 1u;
4184 }
4185 
4189 {
4190  ADC1->FILSTATCLR.bit.FIL1CLR = 1u;
4191 }
4192 
4196 {
4197  ADC1->FILSTATCLR.bit.FIL2CLR = 1u;
4198 }
4199 
4203 {
4204  ADC1->FILSTATCLR.bit.FIL3CLR = 1u;
4205 }
4206 
4210 {
4211  ADC1->FILSTATSET.bit.FIL0SET = 1u;
4212 }
4213 
4217 {
4218  ADC1->FILSTATSET.bit.FIL1SET = 1u;
4219 }
4220 
4224 {
4225  ADC1->FILSTATSET.bit.FIL2SET = 1u;
4226 }
4227 
4231 {
4232  ADC1->FILSTATSET.bit.FIL3SET = 1u;
4233 }
4234 
4240 {
4241  return (uint16)ADC1->RES0.bit.RESULT;
4242 }
4243 
4249 {
4250  return (uint8)ADC1->RES0.bit.VALID;
4251 }
4252 
4258 {
4259  return (uint16)ADC1->RES1.bit.RESULT;
4260 }
4261 
4267 {
4268  return (uint8)ADC1->RES1.bit.VALID;
4269 }
4270 
4276 {
4277  return (uint16)ADC1->RES2.bit.RESULT;
4278 }
4279 
4285 {
4286  return (uint8)ADC1->RES2.bit.VALID;
4287 }
4288 
4294 {
4295  return (uint16)ADC1->RES3.bit.RESULT;
4296 }
4297 
4303 {
4304  return (uint8)ADC1->RES3.bit.VALID;
4305 }
4306 
4312 {
4313  return (uint16)ADC1->RES4.bit.RESULT;
4314 }
4315 
4321 {
4322  return (uint8)ADC1->RES4.bit.VALID;
4323 }
4324 
4330 {
4331  return (uint16)ADC1->RES5.bit.RESULT;
4332 }
4333 
4339 {
4340  return (uint8)ADC1->RES5.bit.VALID;
4341 }
4342 
4348 {
4349  return (uint16)ADC1->RES6.bit.RESULT;
4350 }
4351 
4357 {
4358  return (uint8)ADC1->RES6.bit.VALID;
4359 }
4360 
4366 {
4367  return (uint16)ADC1->RES7.bit.RESULT;
4368 }
4369 
4375 {
4376  return (uint8)ADC1->RES7.bit.VALID;
4377 }
4378 
4384 {
4385  return (uint16)ADC1->RES8.bit.RESULT;
4386 }
4387 
4393 {
4394  return (uint8)ADC1->RES8.bit.VALID;
4395 }
4396 
4402 {
4403  return (uint16)ADC1->RES9.bit.RESULT;
4404 }
4405 
4411 {
4412  return (uint8)ADC1->RES9.bit.VALID;
4413 }
4414 
4420 {
4421  return (uint16)ADC1->RES10.bit.RESULT;
4422 }
4423 
4429 {
4430  return (uint8)ADC1->RES10.bit.VALID;
4431 }
4432 
4438 {
4439  return (uint16)ADC1->RES11.bit.RESULT;
4440 }
4441 
4447 {
4448  return (uint8)ADC1->RES11.bit.VALID;
4449 }
4450 
4456 {
4457  return (uint16)ADC1->RES12.bit.RESULT;
4458 }
4459 
4465 {
4466  return (uint8)ADC1->RES12.bit.VALID;
4467 }
4468 
4474 {
4475  return (uint16)ADC1->RES13.bit.RESULT;
4476 }
4477 
4483 {
4484  return (uint8)ADC1->RES13.bit.VALID;
4485 }
4486 
4492 {
4493  return (uint16)ADC1->RES14.bit.RESULT;
4494 }
4495 
4501 {
4502  return (uint8)ADC1->RES14.bit.VALID;
4503 }
4504 
4510 {
4511  return (uint16)ADC1->RES15.bit.RESULT;
4512 }
4513 
4519 {
4520  return (uint8)ADC1->RES15.bit.VALID;
4521 }
4522 
4528 {
4529  return (uint16)ADC1->RES16.bit.RESULT;
4530 }
4531 
4537 {
4538  return (uint8)ADC1->RES16.bit.VALID;
4539 }
4540 
4546 {
4547  return (uint16)ADC1->RES17.bit.RESULT;
4548 }
4549 
4555 {
4556  return (uint8)ADC1->RES17.bit.VALID;
4557 }
4558 
4564 {
4565  return (uint16)ADC1->RES18.bit.RESULT;
4566 }
4567 
4573 {
4574  return (uint8)ADC1->RES18.bit.VALID;
4575 }
4576 
4582 {
4583  return (uint16)ADC1->RES19.bit.RESULT;
4584 }
4585 
4591 {
4592  return (uint8)ADC1->RES19.bit.VALID;
4593 }
4594 
4600 {
4601  ADC1->CMPCFG0.reg = (uint32)s_value.reg;
4602 }
4603 
4609 {
4610  ADC1->CMPCFG1.reg = (uint32)s_value.reg;
4611 }
4612 
4618 {
4619  ADC1->CMPCFG2.reg = (uint32)s_value.reg;
4620 }
4621 
4627 {
4628  ADC1->CMPCFG3.reg = (uint32)s_value.reg;
4629 }
4630 
4636 {
4637  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_IS;
4638 }
4639 
4645 {
4646  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_IS;
4647 }
4648 
4654 {
4655  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_IS;
4656 }
4657 
4663 {
4664  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_IS;
4665 }
4666 
4672 {
4673  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_STS;
4674 }
4675 
4681 {
4682  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_STS;
4683 }
4684 
4690 {
4691  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_STS;
4692 }
4693 
4699 {
4700  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_STS;
4701 }
4702 
4708 {
4709  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_IS;
4710 }
4711 
4717 {
4718  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_IS;
4719 }
4720 
4726 {
4727  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_IS;
4728 }
4729 
4735 {
4736  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_IS;
4737 }
4738 
4744 {
4745  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_STS;
4746 }
4747 
4753 {
4754  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_STS;
4755 }
4756 
4762 {
4763  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_STS;
4764 }
4765 
4771 {
4772  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_STS;
4773 }
4774 
4778 {
4779  ADC1->CMPSTATCLR.bit.CMP_UP0_ISCLR = 1u;
4780 }
4781 
4785 {
4786  ADC1->CMPSTATCLR.bit.CMP_UP1_ISCLR = 1u;
4787 }
4788 
4792 {
4793  ADC1->CMPSTATCLR.bit.CMP_UP2_ISCLR = 1u;
4794 }
4795 
4799 {
4800  ADC1->CMPSTATCLR.bit.CMP_UP3_ISCLR = 1u;
4801 }
4802 
4806 {
4807  ADC1->CMPSTATCLR.bit.CMP_UP0_STSCLR = 1u;
4808 }
4809 
4813 {
4814  ADC1->CMPSTATCLR.bit.CMP_UP1_STSCLR = 1u;
4815 }
4816 
4820 {
4821  ADC1->CMPSTATCLR.bit.CMP_UP2_STSCLR = 1u;
4822 }
4823 
4827 {
4828  ADC1->CMPSTATCLR.bit.CMP_UP3_STSCLR = 1u;
4829 }
4830 
4834 {
4835  ADC1->CMPSTATCLR.bit.CMP_LO0_ISCLR = 1u;
4836 }
4837 
4841 {
4842  ADC1->CMPSTATCLR.bit.CMP_LO1_ISCLR = 1u;
4843 }
4844 
4848 {
4849  ADC1->CMPSTATCLR.bit.CMP_LO2_ISCLR = 1u;
4850 }
4851 
4855 {
4856  ADC1->CMPSTATCLR.bit.CMP_LO3_ISCLR = 1u;
4857 }
4858 
4862 {
4863  ADC1->CMPSTATCLR.bit.CMP_LO0_STSCLR = 1u;
4864 }
4865 
4869 {
4870  ADC1->CMPSTATCLR.bit.CMP_LO1_STSCLR = 1u;
4871 }
4872 
4876 {
4877  ADC1->CMPSTATCLR.bit.CMP_LO2_STSCLR = 1u;
4878 }
4879 
4883 {
4884  ADC1->CMPSTATCLR.bit.CMP_LO3_STSCLR = 1u;
4885 }
4886 
4890 {
4891  ADC1->CMPSTATSET.bit.CMP_UP0_ISSET = 1u;
4892 }
4893 
4897 {
4898  ADC1->CMPSTATSET.bit.CMP_UP1_ISSET = 1u;
4899 }
4900 
4904 {
4905  ADC1->CMPSTATSET.bit.CMP_UP2_ISSET = 1u;
4906 }
4907 
4911 {
4912  ADC1->CMPSTATSET.bit.CMP_UP3_ISSET = 1u;
4913 }
4914 
4918 {
4919  ADC1->CMPSTATSET.bit.CMP_UP0_STSSET = 1u;
4920 }
4921 
4925 {
4926  ADC1->CMPSTATSET.bit.CMP_UP1_STSSET = 1u;
4927 }
4928 
4932 {
4933  ADC1->CMPSTATSET.bit.CMP_UP2_STSSET = 1u;
4934 }
4935 
4939 {
4940  ADC1->CMPSTATSET.bit.CMP_UP3_STSSET = 1u;
4941 }
4942 
4946 {
4947  ADC1->CMPSTATSET.bit.CMP_LO0_ISSET = 1u;
4948 }
4949 
4953 {
4954  ADC1->CMPSTATSET.bit.CMP_LO1_ISSET = 1u;
4955 }
4956 
4960 {
4961  ADC1->CMPSTATSET.bit.CMP_LO2_ISSET = 1u;
4962 }
4963 
4967 {
4968  ADC1->CMPSTATSET.bit.CMP_LO3_ISSET = 1u;
4969 }
4970 
4974 {
4975  ADC1->CMPSTATSET.bit.CMP_LO0_STSSET = 1u;
4976 }
4977 
4981 {
4982  ADC1->CMPSTATSET.bit.CMP_LO1_STSSET = 1u;
4983 }
4984 
4988 {
4989  ADC1->CMPSTATSET.bit.CMP_LO2_STSSET = 1u;
4990 }
4991 
4995 {
4996  ADC1->CMPSTATSET.bit.CMP_LO3_STSSET = 1u;
4997 }
4998 
5002 {
5003  ADC1->IEN0.bit.IEN_UP0 = 1u;
5004 }
5005 
5009 {
5010  ADC1->IEN0.bit.IEN_UP0 = 0u;
5011 }
5012 
5016 {
5017  ADC1->IEN0.bit.IEN_UP1 = 1u;
5018 }
5019 
5023 {
5024  ADC1->IEN0.bit.IEN_UP1 = 0u;
5025 }
5026 
5030 {
5031  ADC1->IEN0.bit.IEN_UP2 = 1u;
5032 }
5033 
5037 {
5038  ADC1->IEN0.bit.IEN_UP2 = 0u;
5039 }
5040 
5044 {
5045  ADC1->IEN0.bit.IEN_UP3 = 1u;
5046 }
5047 
5051 {
5052  ADC1->IEN0.bit.IEN_UP3 = 0u;
5053 }
5054 
5058 {
5059  ADC1->IEN0.bit.IEN_LO0 = 1u;
5060 }
5061 
5065 {
5066  ADC1->IEN0.bit.IEN_LO0 = 0u;
5067 }
5068 
5072 {
5073  ADC1->IEN0.bit.IEN_LO1 = 1u;
5074 }
5075 
5079 {
5080  ADC1->IEN0.bit.IEN_LO1 = 0u;
5081 }
5082 
5086 {
5087  ADC1->IEN0.bit.IEN_LO2 = 1u;
5088 }
5089 
5093 {
5094  ADC1->IEN0.bit.IEN_LO2 = 0u;
5095 }
5096 
5100 {
5101  ADC1->IEN0.bit.IEN_LO3 = 1u;
5102 }
5103 
5107 {
5108  ADC1->IEN0.bit.IEN_LO3 = 0u;
5109 }
5110 
5114 {
5115  ADC1->IEN0.bit.IEN_SQ0 = 1u;
5116 }
5117 
5121 {
5122  ADC1->IEN0.bit.IEN_SQ0 = 0u;
5123 }
5124 
5128 {
5129  ADC1->IEN0.bit.IEN_SQ1 = 1u;
5130 }
5131 
5135 {
5136  ADC1->IEN0.bit.IEN_SQ1 = 0u;
5137 }
5138 
5142 {
5143  ADC1->IEN0.bit.IEN_SQ2 = 1u;
5144 }
5145 
5149 {
5150  ADC1->IEN0.bit.IEN_SQ2 = 0u;
5151 }
5152 
5156 {
5157  ADC1->IEN0.bit.IEN_SQ3 = 1u;
5158 }
5159 
5163 {
5164  ADC1->IEN0.bit.IEN_SQ3 = 0u;
5165 }
5166 
5170 {
5171  ADC1->IEN0.bit.IEN_CH0 = 1u;
5172 }
5173 
5177 {
5178  ADC1->IEN0.bit.IEN_CH0 = 0u;
5179 }
5180 
5184 {
5185  ADC1->IEN0.bit.IEN_CH1 = 1u;
5186 }
5187 
5191 {
5192  ADC1->IEN0.bit.IEN_CH1 = 0u;
5193 }
5194 
5198 {
5199  ADC1->IEN0.bit.IEN_CH2 = 1u;
5200 }
5201 
5205 {
5206  ADC1->IEN0.bit.IEN_CH2 = 0u;
5207 }
5208 
5212 {
5213  ADC1->IEN0.bit.IEN_CH3 = 1u;
5214 }
5215 
5219 {
5220  ADC1->IEN0.bit.IEN_CH3 = 0u;
5221 }
5222 
5226 {
5227  ADC1->IEN0.bit.IEN_CH4 = 1u;
5228 }
5229 
5233 {
5234  ADC1->IEN0.bit.IEN_CH4 = 0u;
5235 }
5236 
5240 {
5241  ADC1->IEN0.bit.IEN_CH5 = 1u;
5242 }
5243 
5247 {
5248  ADC1->IEN0.bit.IEN_CH5 = 0u;
5249 }
5250 
5254 {
5255  ADC1->IEN0.bit.IEN_CH6 = 1u;
5256 }
5257 
5261 {
5262  ADC1->IEN0.bit.IEN_CH6 = 0u;
5263 }
5264 
5268 {
5269  ADC1->IEN0.bit.IEN_CH7 = 1u;
5270 }
5271 
5275 {
5276  ADC1->IEN0.bit.IEN_CH7 = 0u;
5277 }
5278 
5282 {
5283  ADC1->IEN0.bit.IEN_CH8 = 1u;
5284 }
5285 
5289 {
5290  ADC1->IEN0.bit.IEN_CH8 = 0u;
5291 }
5292 
5296 {
5297  ADC1->IEN0.bit.IEN_CH9 = 1u;
5298 }
5299 
5303 {
5304  ADC1->IEN0.bit.IEN_CH9 = 0u;
5305 }
5306 
5310 {
5311  ADC1->IEN0.bit.IEN_CH10 = 1u;
5312 }
5313 
5317 {
5318  ADC1->IEN0.bit.IEN_CH10 = 0u;
5319 }
5320 
5324 {
5325  ADC1->IEN0.bit.IEN_CH11 = 1u;
5326 }
5327 
5331 {
5332  ADC1->IEN0.bit.IEN_CH11 = 0u;
5333 }
5334 
5338 {
5339  ADC1->IEN0.bit.IEN_CH12 = 1u;
5340 }
5341 
5345 {
5346  ADC1->IEN0.bit.IEN_CH12 = 0u;
5347 }
5348 
5352 {
5353  ADC1->IEN0.bit.IEN_CH13 = 1u;
5354 }
5355 
5359 {
5360  ADC1->IEN0.bit.IEN_CH13 = 0u;
5361 }
5362 
5366 {
5367  ADC1->IEN0.bit.IEN_CH14 = 1u;
5368 }
5369 
5373 {
5374  ADC1->IEN0.bit.IEN_CH14 = 0u;
5375 }
5376 
5380 {
5381  ADC1->IEN0.bit.IEN_CH15 = 1u;
5382 }
5383 
5387 {
5388  ADC1->IEN0.bit.IEN_CH15 = 0u;
5389 }
5390 
5394 {
5395  ADC1->IEN0.bit.IEN_CH16 = 1u;
5396 }
5397 
5401 {
5402  ADC1->IEN0.bit.IEN_CH16 = 0u;
5403 }
5404 
5408 {
5409  ADC1->IEN0.bit.IEN_CH17 = 1u;
5410 }
5411 
5415 {
5416  ADC1->IEN0.bit.IEN_CH17 = 0u;
5417 }
5418 
5422 {
5423  ADC1->IEN0.bit.IEN_CH18 = 1u;
5424 }
5425 
5429 {
5430  ADC1->IEN0.bit.IEN_CH18 = 0u;
5431 }
5432 
5436 {
5437  ADC1->IEN0.bit.IEN_CH19 = 1u;
5438 }
5439 
5443 {
5444  ADC1->IEN0.bit.IEN_CH19 = 0u;
5445 }
5446 
5450 {
5451  ADC1->IEN1.bit.IEN_WFR0 = 1u;
5452 }
5453 
5457 {
5458  ADC1->IEN1.bit.IEN_WFR0 = 0u;
5459 }
5460 
5464 {
5465  ADC1->IEN1.bit.IEN_WFR1 = 1u;
5466 }
5467 
5471 {
5472  ADC1->IEN1.bit.IEN_WFR1 = 0u;
5473 }
5474 
5478 {
5479  ADC1->IEN1.bit.IEN_WFR2 = 1u;
5480 }
5481 
5485 {
5486  ADC1->IEN1.bit.IEN_WFR2 = 0u;
5487 }
5488 
5492 {
5493  ADC1->IEN1.bit.IEN_WFR3 = 1u;
5494 }
5495 
5499 {
5500  ADC1->IEN1.bit.IEN_WFR3 = 0u;
5501 }
5502 
5506 {
5507  ADC1->IEN1.bit.IEN_COLL0 = 1u;
5508 }
5509 
5513 {
5514  ADC1->IEN1.bit.IEN_COLL0 = 0u;
5515 }
5516 
5520 {
5521  ADC1->IEN1.bit.IEN_COLL1 = 1u;
5522 }
5523 
5527 {
5528  ADC1->IEN1.bit.IEN_COLL1 = 0u;
5529 }
5530 
5534 {
5535  ADC1->IEN1.bit.IEN_COLL2 = 1u;
5536 }
5537 
5541 {
5542  ADC1->IEN1.bit.IEN_COLL2 = 0u;
5543 }
5544 
5548 {
5549  ADC1->IEN1.bit.IEN_COLL3 = 1u;
5550 }
5551 
5555 {
5556  ADC1->IEN1.bit.IEN_COLL3 = 0u;
5557 }
5558 
5564 {
5565  return (uint8)ADC1->INP0.bit.INP_CH0;
5566 }
5567 
5573 {
5574  return (uint8)ADC1->INP0.bit.INP_CH1;
5575 }
5576 
5582 {
5583  return (uint8)ADC1->INP0.bit.INP_CH2;
5584 }
5585 
5591 {
5592  return (uint8)ADC1->INP0.bit.INP_CH3;
5593 }
5594 
5600 {
5601  return (uint8)ADC1->INP0.bit.INP_CH4;
5602 }
5603 
5609 {
5610  return (uint8)ADC1->INP0.bit.INP_CH5;
5611 }
5612 
5618 {
5619  return (uint8)ADC1->INP0.bit.INP_CH6;
5620 }
5621 
5627 {
5628  return (uint8)ADC1->INP0.bit.INP_CH7;
5629 }
5630 
5636 {
5637  return (uint8)ADC1->INP0.bit.INP_CH8;
5638 }
5639 
5645 {
5646  return (uint8)ADC1->INP0.bit.INP_CH9;
5647 }
5648 
5654 {
5655  return (uint8)ADC1->INP0.bit.INP_CH10;
5656 }
5657 
5663 {
5664  return (uint8)ADC1->INP0.bit.INP_CH11;
5665 }
5666 
5672 {
5673  return (uint8)ADC1->INP0.bit.INP_CH12;
5674 }
5675 
5681 {
5682  return (uint8)ADC1->INP0.bit.INP_CH13;
5683 }
5684 
5690 {
5691  return (uint8)ADC1->INP0.bit.INP_CH14;
5692 }
5693 
5699 {
5700  return (uint8)ADC1->INP0.bit.INP_CH15;
5701 }
5702 
5708 {
5709  return (uint8)ADC1->INP1.bit.INP_CH16;
5710 }
5711 
5717 {
5718  return (uint8)ADC1->INP1.bit.INP_CH17;
5719 }
5720 
5726 {
5727  return (uint8)ADC1->INP1.bit.INP_CH18;
5728 }
5729 
5735 {
5736  return (uint8)ADC1->INP1.bit.INP_CH19;
5737 }
5738 
5744 {
5745  return (uint8)ADC1->INP2.bit.INP_CMP_LO0;
5746 }
5747 
5753 {
5754  return (uint8)ADC1->INP2.bit.INP_CMP_LO1;
5755 }
5756 
5762 {
5763  return (uint8)ADC1->INP2.bit.INP_CMP_LO2;
5764 }
5765 
5771 {
5772  return (uint8)ADC1->INP2.bit.INP_CMP_LO3;
5773 }
5774 
5780 {
5781  return (uint8)ADC1->INP2.bit.INP_CMP_UP0;
5782 }
5783 
5789 {
5790  return (uint8)ADC1->INP2.bit.INP_CMP_UP1;
5791 }
5792 
5798 {
5799  return (uint8)ADC1->INP2.bit.INP_CMP_UP2;
5800 }
5801 
5807 {
5808  return (uint8)ADC1->INP2.bit.INP_CMP_UP3;
5809 }
5810 
5816 {
5817  return (uint8)ADC1->INP3.bit.INP_SQ0;
5818 }
5819 
5825 {
5826  return (uint8)ADC1->INP3.bit.INP_SQ1;
5827 }
5828 
5834 {
5835  return (uint8)ADC1->INP3.bit.INP_SQ2;
5836 }
5837 
5843 {
5844  return (uint8)ADC1->INP3.bit.INP_SQ3;
5845 }
5846 
5852 {
5853  return (uint8)ADC1->INP3.bit.INP_COLL0;
5854 }
5855 
5861 {
5862  return (uint8)ADC1->INP3.bit.INP_COLL1;
5863 }
5864 
5870 {
5871  return (uint8)ADC1->INP3.bit.INP_COLL2;
5872 }
5873 
5879 {
5880  return (uint8)ADC1->INP3.bit.INP_COLL3;
5881 }
5882 
5888 {
5889  return (uint8)ADC1->INP3.bit.INP_WFR0;
5890 }
5891 
5897 {
5898  return (uint8)ADC1->INP3.bit.INP_WFR1;
5899 }
5900 
5906 {
5907  return (uint8)ADC1->INP3.bit.INP_WFR2;
5908 }
5909 
5915 {
5916  return (uint8)ADC1->INP3.bit.INP_WFR3;
5917 }
5918 
5924 {
5925  ADC1->SHDCTR.bit.ST_SQSEL = u8_value;
5926 }
5927 
5933 {
5934  return (uint8)ADC1->SHDCTR.bit.ST_SQSEL;
5935 }
5936 
5942 {
5943  ADC1->SHDCTR.bit.ST_TRGSEL = u8_value;
5944 }
5945 
5951 {
5952  return (uint8)ADC1->SHDCTR.bit.ST_TRGSEL;
5953 }
5954 
5960 {
5961  ADC1->SHDCTR.bit.ST_GTGSEL = u8_value;
5962 }
5963 
5969 {
5970  return (uint8)ADC1->SHDCTR.bit.ST_GTGSEL;
5971 }
5972 
5976 {
5977  ADC1->SHDCTR.bit.STE_SQSEL = 1u;
5978 }
5979 
5983 {
5984  ADC1->SHDCTR.bit.STE_SQSEL = 0u;
5985 }
5986 
5990 {
5991  ADC1->SHDCTR.bit.STE_TRGSEL = 1u;
5992 }
5993 
5997 {
5998  ADC1->SHDCTR.bit.STE_TRGSEL = 0u;
5999 }
6000 
6004 {
6005  ADC1->SHDCTR.bit.STE_GTGSEL = 1u;
6006 }
6007 
6011 {
6012  ADC1->SHDCTR.bit.STE_GTGSEL = 0u;
6013 }
6014 
6018 {
6019  ADC1->SHDCTR.bit.ST_SQSW = 1u;
6020 }
6021 
6027 {
6028  return (uint8)ADC1->SHDCTR.bit.ST_SQSW;
6029 }
6030 
6034 {
6035  ADC1->SHDCTR.bit.ST_TRGSW = 1u;
6036 }
6037 
6043 {
6044  return (uint8)ADC1->SHDCTR.bit.ST_TRGSW;
6045 }
6046 
6050 {
6051  ADC1->SHDCTR.bit.ST_GTGSW = 1u;
6052 }
6053 
6059 {
6060  return (uint8)ADC1->SHDCTR.bit.ST_GTGSW;
6061 }
6062 
6066 {
6067  ADC1->SHDCTR.bit.STE_SQ = 1u;
6068 }
6069 
6073 {
6074  ADC1->SHDCTR.bit.STE_SQ = 0u;
6075 }
6076 
6080 {
6081  ADC1->SHDCTR.bit.STE_TRG = 1u;
6082 }
6083 
6087 {
6088  ADC1->SHDCTR.bit.STE_TRG = 0u;
6089 }
6090 
6094 {
6095  ADC1->SHDCTR.bit.STE_GTG = 1u;
6096 }
6097 
6101 {
6102  ADC1->SHDCTR.bit.STE_GTG = 0u;
6103 }
6104 
6110 {
6111  ADC1->CALAI1.bit.CALOFFS = u8_value;
6112 }
6113 
6119 {
6120  return (uint8)ADC1->CALAI1.bit.CALOFFS;
6121 }
6122 
6128 {
6129  ADC1->CALAI1.bit.CALGAIN = u16_value;
6130 }
6131 
6137 {
6138  return (uint16)ADC1->CALAI1.bit.CALGAIN;
6139 }
6140 
6146 {
6147  ADC1->CALAI3.bit.CALOFFS = u8_value;
6148 }
6149 
6155 {
6156  return (uint8)ADC1->CALAI3.bit.CALOFFS;
6157 }
6158 
6164 {
6165  ADC1->CALAI3.bit.CALGAIN = u16_value;
6166 }
6167 
6173 {
6174  return (uint16)ADC1->CALAI3.bit.CALGAIN;
6175 }
6176 
6182 {
6183  ADC1->CALAI5.bit.CALOFFS = u8_value;
6184 }
6185 
6191 {
6192  return (uint8)ADC1->CALAI5.bit.CALOFFS;
6193 }
6194 
6200 {
6201  ADC1->CALAI5.bit.CALGAIN = u16_value;
6202 }
6203 
6209 {
6210  return (uint16)ADC1->CALAI5.bit.CALGAIN;
6211 }
6212 
6218 {
6219  ADC1->CALAI7.bit.CALOFFS = u8_value;
6220 }
6221 
6227 {
6228  return (uint8)ADC1->CALAI7.bit.CALOFFS;
6229 }
6230 
6236 {
6237  ADC1->CALAI7.bit.CALGAIN = u16_value;
6238 }
6239 
6245 {
6246  return (uint16)ADC1->CALAI7.bit.CALGAIN;
6247 }
6248 
6254 {
6255  ADC1->CALAI9.bit.CALOFFS = u8_value;
6256 }
6257 
6263 {
6264  return (uint8)ADC1->CALAI9.bit.CALOFFS;
6265 }
6266 
6272 {
6273  ADC1->CALAI9.bit.CALGAIN = u16_value;
6274 }
6275 
6281 {
6282  return (uint16)ADC1->CALAI9.bit.CALGAIN;
6283 }
6284 
6290 {
6291  ADC1->CALAI11.bit.CALOFFS = u8_value;
6292 }
6293 
6299 {
6300  return (uint8)ADC1->CALAI11.bit.CALOFFS;
6301 }
6302 
6308 {
6309  ADC1->CALAI11.bit.CALGAIN = u16_value;
6310 }
6311 
6317 {
6318  return (uint16)ADC1->CALAI11.bit.CALGAIN;
6319 }
6320 
6326 {
6327  ADC1->CALAI13.bit.CALOFFS = u8_value;
6328 }
6329 
6335 {
6336  return (uint8)ADC1->CALAI13.bit.CALOFFS;
6337 }
6338 
6344 {
6345  ADC1->CALAI13.bit.CALGAIN = u16_value;
6346 }
6347 
6353 {
6354  return (uint16)ADC1->CALAI13.bit.CALGAIN;
6355 }
6356 
6362 {
6363  ADC1->CALAI15.bit.CALOFFS = u8_value;
6364 }
6365 
6371 {
6372  return (uint8)ADC1->CALAI15.bit.CALOFFS;
6373 }
6374 
6380 {
6381  ADC1->CALAI15.bit.CALGAIN = u16_value;
6382 }
6383 
6389 {
6390  return (uint16)ADC1->CALAI15.bit.CALGAIN;
6391 }
6392 
6398 {
6399  ADC1->CALAI16.bit.CALOFFS = u8_value;
6400 }
6401 
6407 {
6408  return (uint8)ADC1->CALAI16.bit.CALOFFS;
6409 }
6410 
6416 {
6417  ADC1->CALAI16.bit.CALGAIN = u16_value;
6418 }
6419 
6425 {
6426  return (uint16)ADC1->CALAI16.bit.CALGAIN;
6427 }
6428 
6434 {
6435  ADC1->CALAI17.bit.CALOFFS = u8_value;
6436 }
6437 
6443 {
6444  return (uint8)ADC1->CALAI17.bit.CALOFFS;
6445 }
6446 
6452 {
6453  ADC1->CALAI17.bit.CALGAIN = u16_value;
6454 }
6455 
6461 {
6462  return (uint16)ADC1->CALAI17.bit.CALGAIN;
6463 }
6464 
6470 {
6471  ADC1->CALAI18.bit.CALOFFS = u8_value;
6472 }
6473 
6479 {
6480  return (uint8)ADC1->CALAI18.bit.CALOFFS;
6481 }
6482 
6488 {
6489  ADC1->CALAI18.bit.CALGAIN = u16_value;
6490 }
6491 
6497 {
6498  return (uint16)ADC1->CALAI18.bit.CALGAIN;
6499 }
6500 
6506 {
6507  ADC1->CALAI19.bit.CALOFFS = u8_value;
6508 }
6509 
6515 {
6516  return (uint8)ADC1->CALAI19.bit.CALOFFS;
6517 }
6518 
6524 {
6525  ADC1->CALAI19.bit.CALGAIN = u16_value;
6526 }
6527 
6533 {
6534  return (uint16)ADC1->CALAI19.bit.CALGAIN;
6535 }
6536 
6542 {
6543  ADC1->CALAI20.bit.CALOFFS = u8_value;
6544 }
6545 
6551 {
6552  return (uint8)ADC1->CALAI20.bit.CALOFFS;
6553 }
6554 
6560 {
6561  ADC1->CALAI20.bit.CALGAIN = u16_value;
6562 }
6563 
6569 {
6570  return (uint16)ADC1->CALAI20.bit.CALGAIN;
6571 }
6572 
6578 {
6579  ADC1->CALAI21.bit.CALOFFS = u8_value;
6580 }
6581 
6587 {
6588  return (uint8)ADC1->CALAI21.bit.CALOFFS;
6589 }
6590 
6596 {
6597  ADC1->CALAI21.bit.CALGAIN = u16_value;
6598 }
6599 
6605 {
6606  return (uint16)ADC1->CALAI21.bit.CALGAIN;
6607 }
6608 
6614 {
6615  ADC1->CALAI22.bit.CALOFFS = u8_value;
6616 }
6617 
6623 {
6624  return (uint8)ADC1->CALAI22.bit.CALOFFS;
6625 }
6626 
6632 {
6633  ADC1->CALAI22.bit.CALGAIN = u16_value;
6634 }
6635 
6641 {
6642  return (uint16)ADC1->CALAI22.bit.CALGAIN;
6643 }
6644 
6650 {
6651  ADC1->CALAI23.bit.CALOFFS = u8_value;
6652 }
6653 
6659 {
6660  return (uint8)ADC1->CALAI23.bit.CALOFFS;
6661 }
6662 
6668 {
6669  ADC1->CALAI23.bit.CALGAIN = u16_value;
6670 }
6671 
6677 {
6678  return (uint16)ADC1->CALAI23.bit.CALGAIN;
6679 }
6680 
6686 {
6687  ADC1->CALAI24.bit.CALOFFS = u8_value;
6688 }
6689 
6695 {
6696  return (uint8)ADC1->CALAI24.bit.CALOFFS;
6697 }
6698 
6704 {
6705  ADC1->CALAI24.bit.CALGAIN = u16_value;
6706 }
6707 
6713 {
6714  return (uint16)ADC1->CALAI24.bit.CALGAIN;
6715 }
6716 
6722 {
6723  ADC1->CALAI25.bit.CALOFFS = u8_value;
6724 }
6725 
6731 {
6732  return (uint8)ADC1->CALAI25.bit.CALOFFS;
6733 }
6734 
6740 {
6741  ADC1->CALAI25.bit.CALGAIN = u16_value;
6742 }
6743 
6749 {
6750  return (uint16)ADC1->CALAI25.bit.CALGAIN;
6751 }
6752 
6758 {
6759  ADC1->CALAI26.bit.CALOFFS = u8_value;
6760 }
6761 
6767 {
6768  return (uint8)ADC1->CALAI26.bit.CALOFFS;
6769 }
6770 
6776 {
6777  ADC1->CALAI26.bit.CALGAIN = u16_value;
6778 }
6779 
6785 {
6786  return (uint16)ADC1->CALAI26.bit.CALGAIN;
6787 }
6788 
6792 {
6793  ARVG->VAREF_CTRL.bit.EN = 1u;
6794 }
6795 
6799 {
6800  ARVG->VAREF_CTRL.bit.EN = 0u;
6801 }
6802 
6806 {
6807  ARVG->VAREF_IEN.bit.OC_IEN = 1u;
6808 }
6809 
6813 {
6814  ARVG->VAREF_IEN.bit.OC_IEN = 0u;
6815 }
6816 
6822 {
6823  return (uint8)ARVG->VAREF_IRQ.bit.OC_IS;
6824 }
6825 
6831 {
6832  return (uint8)ARVG->VAREF_IRQ.bit.OC_STS;
6833 }
6834 
6838 {
6839  ARVG->VAREF_IRQ_CLR.bit.OC_IS_CLR = 1u;
6840 }
6841 
6845 {
6846  ARVG->VAREF_IRQ_CLR.bit.OC_STS_CLR = 1u;
6847 }
6848 
6851 #endif /* _ADC1_H */
6852 
INLINE uint8 ADC1_getSeq3IntSts(void)
Get Sequence 3 Interrupt Status.
Definition: adc1.h:2232
tADC1_CHINSELx
Definition: adc1.h:295
INLINE uint16 ADC1_getCalibGainAnaIn1(void)
Get Calibration Gain analog input 1.
Definition: adc1.h:6136
INLINE uint8 ADC1_getCh0IntNodePtr(void)
Get Channel 0 Interrupt Node Pointer.
Definition: adc1.h:5563
INLINE void ADC1_clrCh1EndOfConvSts(void)
Clear Channel 1 End Of Conversion Status.
Definition: adc1.h:2972
INLINE void ADC1_disCalibProtCh24(void)
Disable Calibration Protection Channel 24.
Definition: adc1.h:4002
INLINE void ADC1_disCmp1LoInt(void)
Disable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:5078
INLINE void ADC1_clrFilter1Sts(void)
Clear Filter 1 Event flag.
Definition: adc1.h:4188
INLINE uint8 ADC1_getCh9ResultValidSts(void)
Get Result Valid Flag Channel 9.
Definition: adc1.h:4410
INLINE void ADC1_clrCmp0UpThSts(void)
Clear Compare 0 Upper Threshold Status.
Definition: adc1.h:4805
INLINE uint8 ADC1_getCh9IntNodePtr(void)
Get Channel 9 Interrupt Node Pointer.
Definition: adc1.h:5644
INLINE uint8 ADC1_getSeq1Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1620
INLINE uint8 ADC1_getCmp3UpThSts(void)
Get Compare 3 Upper Threshold Status.
Definition: adc1.h:4698
INLINE void ADC1_setCmp2LoThSts(void)
Set Compare 2 Lower Threshold Status.
Definition: adc1.h:4987
INLINE uint8 ADC1_getSeq2IntSts(void)
Get Sequence 2 Interrupt Status.
Definition: adc1.h:2223
INLINE void ADC1_clrCh5EndOfConvSts(void)
Clear Channel 5 End Of Conversion Status.
Definition: adc1.h:3000
INLINE uint8 ADC1_getCh6EndOfConvSts(void)
Get Channel 6 End Of Conversion Status.
Definition: adc1.h:2832
INLINE uint8 ADC1_getCalibOffsAnaIn22(void)
Get Calibration Offset analog input 22.
Definition: adc1.h:6622
INLINE void ADC1_disCalibProtCh25(void)
Disable Calibration Protection Channel 25.
Definition: adc1.h:4016
INLINE void ADC1_setCh13Insel(tADC1_CHINSELx e_value)
Set Channel 13 input selection.
Definition: adc1.h:2715
INLINE uint8 ADC1_getCh12IntNodePtr(void)
Get Channel 12 Interrupt Node Pointer.
Definition: adc1.h:5671
INLINE void ADC1_disCh6Int(void)
Disable Channel 6 Interrupt.
Definition: adc1.h:5260
INLINE uint8 ADC1_getCh5ResultValidSts(void)
Get Result Valid Flag Channel 5.
Definition: adc1.h:4338
INLINE uint16 ADC1_getCalibGainAnaIn23(void)
Get Calibration Gain analog input 23.
Definition: adc1.h:6676
INLINE void ADC1_setSeq1Slot3(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1761
INLINE void ADC1_enCh3Int(void)
Enable Channel 3 Interrupt.
Definition: adc1.h:5211
INLINE uint16 ADC1_getCalibGainAnaIn3(void)
Get Calibration Gain analog input 3.
Definition: adc1.h:6172
INLINE uint16 ADC1_getCalibGainAnaIn17(void)
Get Calibration Gain analog input 17.
Definition: adc1.h:6460
union ADC1_CONVCFGx tADC1_CONVCFGx
INLINE void ADC1_enSeq1CollInt(void)
Enable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5519
INLINE void ADC1_disSeq2Int(void)
Disable Sequence 2 Interrupt.
Definition: adc1.h:5148
INLINE uint16 ADC1_getCalibGainAnaIn20(void)
Get Calibration Gain analog input 20.
Definition: adc1.h:6568
INLINE void ADC1_enSeq3Int(void)
Enable Sequence 3 Interrupt.
Definition: adc1.h:5155
INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value)
Set Calibration Gain analog input 25.
Definition: adc1.h:6739
INLINE uint8 ADC1_getCh18ResultValidSts(void)
Get Result Valid Flag Channel 18.
Definition: adc1.h:4572
INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value)
Set Calibration Gain analog input 11.
Definition: adc1.h:6307
INLINE void ADC1_clrCmp3UpIntSts(void)
Clear Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4798
INLINE uint8 ADC1_getSeq3Slot3(void)
Get Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2124
INLINE void ADC1_clrSeq0CollSts(void)
Clear Sequence 0 Collision Status.
Definition: adc1.h:2276
INLINE uint8 ADC1_getCmp0UpThSts(void)
Get Compare 0 Upper Threshold Status.
Definition: adc1.h:4671
INLINE void ADC1_enCh15Int(void)
Enable Channel 15 Interrupt.
Definition: adc1.h:5379
INLINE void ADC1_enCalibCh16(void)
Enable Calibration Channel 16.
Definition: adc1.h:3505
INLINE uint8 ADC1_getSeq3Slot2(void)
Get Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2106
INLINE uint8 ADC1_getSeq2WaitForRead(void)
Get Sequence 2 Wait for Read Status.
Definition: adc1.h:2151
INLINE void ADC1_setFilter3Sts(void)
Set Filter 3 Event flag.
Definition: adc1.h:4230
INLINE void ADC1_clrCmp1LoIntSts(void)
Clear Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4840
INLINE void ADC1_disSeq0CollInt(void)
Disable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5512
INLINE uint8 ADC1_getCalibOffsAnaIn7(void)
Get Calibration Offset analog input 7.
Definition: adc1.h:6226
INLINE uint8 ADC1_getCh2ResultValidSts(void)
Get Result Valid Flag Channel 2.
Definition: adc1.h:4284
INLINE void ADC1_disCalibCh20(void)
Disable Calibration Channel 20.
Definition: adc1.h:3568
INLINE void ADC1_enTriggSwShadowTrans(void)
Enable Trigger Shadow Transfer.
Definition: adc1.h:6079
INLINE void ADC1_disSeq1CollInt(void)
Disable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5526
INLINE void ARVG_disVAREF(void)
Disable VAREF.
Definition: adc1.h:6798
void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 18 Interrupt Node Pointer.
INLINE void ADC1_enCmp3UpInt(void)
Enable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:5043
INLINE uint16 ADC1_getCh4Result(void)
Get Result Value Channel 4.
Definition: adc1.h:4311
INLINE void ADC1_setTriggSwShadowTrans(void)
Set Trigger Software Shadow Transfer.
Definition: adc1.h:6033
void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 17 Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1443
INLINE void ADC1_disCalibCh14(void)
Disable Calibration Channel 14.
Definition: adc1.h:3484
INLINE void ADC1_setCh3Insel(tADC1_CHINSELx e_value)
Set Channel 3 input selection.
Definition: adc1.h:2625
INLINE uint8 ADC1_getSeq3WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5914
INLINE void ADC1_setCh8EndOfConvSts(void)
Set Channel 8 End Of Conversion Status.
Definition: adc1.h:3161
INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value)
Set Calibration Offset analog input 22.
Definition: adc1.h:6613
INLINE void ADC1_setSeq3TriggerSelect(tADC1_Seq3Trig e_Seq3Trig)
Set Trigger Select.
Definition: adc1.h:2011
void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 16 Interrupt Node Pointer.
void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh18(void)
Disable Calibration Protection Channel 18.
Definition: adc1.h:3918
INLINE void ADC1_disSeq1CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1634
INLINE uint8 ARVG_getVAREFOvercurrentSts(void)
Get VAREF Overcurrent Status.
Definition: adc1.h:6830
INLINE void ADC1_clrCh6EndOfConvSts(void)
Clear Channel 6 End Of Conversion Status.
Definition: adc1.h:3007
sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel)
Get the 16-bit value of the ADC1 Filter Result Register of the selected ADC1 channel and returns the ...
Definition: adc1.c:357
INLINE uint8 ADC1_getCalibOffsAnaIn1(void)
Get Calibration Offset analog input 1.
Definition: adc1.h:6118
INLINE uint8 ADC1_getCh16EndOfConvSts(void)
Get Channel 16 End Of Conversion Status.
Definition: adc1.h:2922
INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value)
Set Calibration Offset analog input 21.
Definition: adc1.h:6577
INLINE void ADC1_clrCmp1LoThSts(void)
Clear Compare 1 Lower Threshold Status.
Definition: adc1.h:4868
INLINE void ADC1_setSeq2Slot3(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1938
INLINE void ADC1_enSeq0WaitForReadInt(void)
Enable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5449
INLINE void ADC1_setCmp2UpIntSts(void)
Set Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4903
INLINE void ADC1_disCalibCh18(void)
Disable Calibration Channel 18.
Definition: adc1.h:3540
INLINE void ADC1_enCalibCh25(void)
Enable Calibration Channel 25.
Definition: adc1.h:3631
INLINE uint8 ADC1_getCh15IntNodePtr(void)
Get Channel 15 Interrupt Node Pointer.
Definition: adc1.h:5698
INLINE uint8 ADC1_getSeq0IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5815
INLINE void ADC1_enCmp2LoInt(void)
Enable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:5085
INLINE void ADC1_setCh3EndOfConvSts(void)
Set Channel 3 End Of Conversion Status.
Definition: adc1.h:3126
INLINE uint8 ARVG_getVAREFOvercurrentIntSts(void)
Get VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6821
INLINE uint8 ADC1_getCalibOffsAnaIn24(void)
Get Calibration Offset analog input 24.
Definition: adc1.h:6694
INLINE uint8 ADC1_getCh13ResultValidSts(void)
Get Result Valid Flag Channel 13.
Definition: adc1.h:4482
INLINE uint8 ADC1_getCalibOffsAnaIn11(void)
Get Calibration Offset analog input 11.
Definition: adc1.h:6298
INLINE uint8 ADC1_getCalibOffsAnaIn15(void)
Get Calibration Offset analog input 15.
Definition: adc1.h:6370
INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value)
Set Calibration Offset analog input 16.
Definition: adc1.h:6397
INLINE void ADC1_enSeq2WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1818
INLINE void ADC1_disCalibProtCh2(void)
Disable Calibration Protection Channel 2.
Definition: adc1.h:3694
INLINE uint8 ADC1_getCh0ResultValidSts(void)
Get Result Valid Flag Channel 0.
Definition: adc1.h:4248
INLINE void ADC1_disCalibCh10(void)
Disable Calibration Channel 10.
Definition: adc1.h:3428
INLINE void ADC1_disPower(void)
Disable ADC1 Module.
Definition: adc1.h:1348
INLINE void ADC1_setSeqSwShadowTrans(void)
Set Sequence Software Shadow Transfer.
Definition: adc1.h:6017
INLINE void ADC1_disCmp2UpInt(void)
Disable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:5036
INLINE void ADC1_setSeq0Slot0(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1530
INLINE void ADC1_enCalibProtCh13(void)
Enable Calibration Protection Channel 13.
Definition: adc1.h:3841
INLINE uint8 ADC1_getSeq2TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1843
INLINE void ADC1_setSeq3IntSts(void)
Set Sequence 3 Interrupt Status.
Definition: adc1.h:2409
INLINE void ADC1_setSeq3Slot2(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2097
INLINE void ADC1_clrCh7EndOfConvSts(void)
Clear Channel 7 End Of Conversion Status.
Definition: adc1.h:3014
INLINE void ADC1_setSeq0Slot1(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1548
INLINE void ADC1_clrCh18EndOfConvSts(void)
Clear Channel 18 End Of Conversion Status.
Definition: adc1.h:3091
INLINE void ADC1_enCalibProtCh21(void)
Enable Calibration Protection Channel 21.
Definition: adc1.h:3953
INLINE uint16 ADC1_getCh10Result(void)
Get Result Value Channel 10.
Definition: adc1.h:4419
INLINE void ADC1_setCh15Config(tADC1_CHCFGx s_value)
Set Channel 15 configuration.
Definition: adc1.h:2553
INLINE void ADC1_enPower(void)
Enable ADC1 Module.
Definition: adc1.h:1341
INLINE void ADC1_disCh5Int(void)
Disable Channel 5 Interrupt.
Definition: adc1.h:5246
INLINE uint8 ADC1_getTriggHwShadowTrans(void)
Get Trigger Shadow Transfer Selection.
Definition: adc1.h:5950
INLINE void ADC1_enCh13Int(void)
Enable Channel 13 Interrupt.
Definition: adc1.h:5351
INLINE void ADC1_disCalibProtCh9(void)
Disable Calibration Protection Channel 9.
Definition: adc1.h:3792
INLINE void ADC1_disSeq0Int(void)
Disable Sequence 0 Interrupt.
Definition: adc1.h:5120
INLINE uint8 ADC1_getCalibOffsAnaIn17(void)
Get Calibration Offset analog input 17.
Definition: adc1.h:6442
INLINE void ADC1_enCalibCh6(void)
Enable Calibration Channel 6.
Definition: adc1.h:3365
INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value)
Set Calibration Offset analog input 9.
Definition: adc1.h:6253
INLINE uint8 ADC1_getSeq2CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5869
INLINE uint8 ADC1_getCmp0UpIntSts(void)
Get Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4635
INLINE void ADC1_disCmp3LoInt(void)
Disable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:5106
INLINE void ADC1_setFilter3Coeff(uint8 u8_value)
Set Filter 3 Coefficient.
Definition: adc1.h:4093
INLINE void ADC1_setCh2Insel(tADC1_CHINSELx e_value)
Set Channel 2 input selection.
Definition: adc1.h:2616
INLINE uint8 ADC1_getCmp2LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5761
INLINE void ADC1_setCh1Config(tADC1_CHCFGx s_value)
Set Channel 1 configuration.
Definition: adc1.h:2427
INLINE uint8 ADC1_getCh11IntNodePtr(void)
Get Channel 11 Interrupt Node Pointer.
Definition: adc1.h:5662
INLINE void ADC1_enSeq2CollInt(void)
Enable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5533
INLINE void ADC1_setFilter1Sts(void)
Set Filter 1 Event flag.
Definition: adc1.h:4216
INLINE void ADC1_enCalibCh3(void)
Enable Calibration Channel 3.
Definition: adc1.h:3323
INLINE void ADC1_disCalibCh22(void)
Disable Calibration Channel 22.
Definition: adc1.h:3596
INLINE void ADC1_enCalibCh13(void)
Enable Calibration Channel 13.
Definition: adc1.h:3463
INLINE void ADC1_disCalibCh7(void)
Disable Calibration Channel 7.
Definition: adc1.h:3386
INLINE uint8 ADC1_getCh4EndOfConvSts(void)
Get Channel 4 End Of Conversion Status.
Definition: adc1.h:2814
INLINE void ADC1_disCalibCh16(void)
Disable Calibration Channel 16.
Definition: adc1.h:3512
INLINE uint8 ADC1_getCh16ResultValidSts(void)
Get Result Valid Flag Channel 16.
Definition: adc1.h:4536
INLINE void ADC1_setCh19Config(tADC1_CHCFGx s_value)
Set Channel 19 configuration.
Definition: adc1.h:2589
INLINE uint8 ADC1_getFilter0Coeff(void)
Get Filter 0 Coefficient.
Definition: adc1.h:4048
INLINE uint8 ADC1_getCh14ResultValidSts(void)
Get Result Valid Flag Channel 14.
Definition: adc1.h:4500
INLINE uint8 ADC1_getSeq1IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5824
INLINE void ADC1_enSeq0WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1464
INLINE void ADC1_enCh4Int(void)
Enable Channel 4 Interrupt.
Definition: adc1.h:5225
INLINE void ADC1_disCalibCh5(void)
Disable Calibration Channel 5.
Definition: adc1.h:3358
INLINE uint16 ADC1_getCh7Result(void)
Get Result Value Channel 7.
Definition: adc1.h:4365
INLINE void ADC1_setCh5EndOfConvSts(void)
Set Channel 5 End Of Conversion Status.
Definition: adc1.h:3140
INLINE void ADC1_setSeq2TriggerSelect(tADC1_Seq2Trig e_Seq2Trig)
Set Trigger Select.
Definition: adc1.h:1834
void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 19 Interrupt Node Pointer.
void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getCh4ResultValidSts(void)
Get Result Valid Flag Channel 4.
Definition: adc1.h:4320
INLINE void ADC1_enCalibCh24(void)
Enable Calibration Channel 24.
Definition: adc1.h:3617
INLINE void ADC1_enCmp2UpInt(void)
Enable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:5029
INLINE void ADC1_setCmp3UpIntSts(void)
Set Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4910
INLINE uint8 ADC1_getCalibOffsAnaIn20(void)
Get Calibration Offset analog input 20.
Definition: adc1.h:6550
INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value)
Set Calibration Gain analog input 20.
Definition: adc1.h:6559
INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value)
Set Calibration Offset analog input 19.
Definition: adc1.h:6505
INLINE uint8 ADC1_getCh1EndOfConvSts(void)
Get Channel 1 End Of Conversion Status.
Definition: adc1.h:2787
INLINE uint8 ADC1_getCmp3LoThSts(void)
Get Compare 3 Lower Threshold Status.
Definition: adc1.h:4770
INLINE void ADC1_clrCmp0LoThSts(void)
Clear Compare 0 Lower Threshold Status.
Definition: adc1.h:4861
INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value)
Set Calibration Gain analog input 15.
Definition: adc1.h:6379
INLINE void ADC1_setCmp3UpThSts(void)
Set Compare 3 Upper Threshold Status.
Definition: adc1.h:4938
INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value)
Set Calibration Offset analog input 7.
Definition: adc1.h:6217
INLINE void ADC1_disCalibProtCh0(void)
Disable Calibration Protection Channel 0.
Definition: adc1.h:3666
INLINE void ADC1_clrCh3EndOfConvSts(void)
Clear Channel 3 End Of Conversion Status.
Definition: adc1.h:2986
INLINE void ADC1_disCmp1UpInt(void)
Disable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:5022
INLINE void ADC1_enCalibProtCh16(void)
Enable Calibration Protection Channel 16.
Definition: adc1.h:3883
INLINE void ADC1_setSeq2CollSts(void)
Set Sequence 2 Collision Status.
Definition: adc1.h:2374
INLINE void ADC1_enCh5Int(void)
Enable Channel 5 Interrupt.
Definition: adc1.h:5239
INLINE void ADC1_clrCmp3UpThSts(void)
Clear Compare 3 Upper Threshold Status.
Definition: adc1.h:4826
INLINE void ADC1_disSeq1WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1648
ADC1_Seq0Trig
Enumeration for the trigger source of the sequence 0.
Definition: adc1.h:229
INLINE void ADC1_disCh7Int(void)
Disable Channel 7 Interrupt.
Definition: adc1.h:5274
INLINE void ADC1_enCalibCh18(void)
Enable Calibration Channel 18.
Definition: adc1.h:3533
INLINE void ADC1_disSuspend(void)
Disable ADC1 Suspend.
Definition: adc1.h:1380
INLINE void ADC1_clrCmp3LoIntSts(void)
Clear Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4854
INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value)
Set Calibration Offset analog input 3.
Definition: adc1.h:6145
INLINE void ADC1_disSeq2WaitForReadInt(void)
Disable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5484
sint8 ADC1_init(void)
Initialize all CW registers of the ADC1 module.
Definition: adc1.c:111
INLINE void ADC1_setSeq3Slot3(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2115
INLINE void ADC1_enCalibProtCh20(void)
Enable Calibration Protection Channel 20.
Definition: adc1.h:3939
INLINE uint8 ADC1_getSeq0CollSts(void)
Get Sequence 0 Collision Status.
Definition: adc1.h:2169
INLINE uint8 ADC1_getCmp1UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5788
INLINE void ADC1_enSeq0TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1514
INLINE void ADC1_enCh6Int(void)
Enable Channel 6 Interrupt.
Definition: adc1.h:5253
INLINE uint8 ADC1_getSeq3TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:2020
INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value)
Set Calibration Offset analog input 17.
Definition: adc1.h:6433
INLINE void ADC1_setGateSwShadowTrans(void)
Set Gating Software Shadow Transfer.
Definition: adc1.h:6049
INLINE uint8 ADC1_getSeq3Slot0(void)
Get Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2070
INLINE void ADC1_enCmp3LoInt(void)
Enable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:5099
INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value)
Set Calibration Gain analog input 17.
Definition: adc1.h:6451
INLINE uint8 ADC1_getCh11ResultValidSts(void)
Get Result Valid Flag Channel 11.
Definition: adc1.h:4446
INLINE void ADC1_clrCh10EndOfConvSts(void)
Clear Channel 10 End Of Conversion Status.
Definition: adc1.h:3035
INLINE void ADC1_setSeq3Slot0(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2061
INLINE uint8 ADC1_getCh13EndOfConvSts(void)
Get Channel 13 End Of Conversion Status.
Definition: adc1.h:2895
INLINE void ADC1_setCh0Config(tADC1_CHCFGx s_value)
Set Channel 0 configuration.
Definition: adc1.h:2418
void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint8 ADC1_getCmp1LoThSts(void)
Get Compare 1 Lower Threshold Status.
Definition: adc1.h:4752
INLINE void ADC1_enCalibProtCh4(void)
Enable Calibration Protection Channel 4.
Definition: adc1.h:3715
INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value)
Set Calibration Offset analog input 15.
Definition: adc1.h:6361
INLINE void ADC1_clrSeq2IntSts(void)
Clear Sequence 2 Interrupt Status.
Definition: adc1.h:2318
INLINE uint16 ADC1_getCalibGainAnaIn7(void)
Get Calibration Gain analog input 7.
Definition: adc1.h:6244
INLINE void ADC1_disCalibProtCh4(void)
Disable Calibration Protection Channel 4.
Definition: adc1.h:3722
INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value)
Set Calibration Gain analog input 23.
Definition: adc1.h:6667
INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value)
Set Calibration Offset analog input 11.
Definition: adc1.h:6289
INLINE uint8 ADC1_getCh5IntNodePtr(void)
Get Channel 5 Interrupt Node Pointer.
Definition: adc1.h:5608
INLINE void ADC1_enCh17Int(void)
Enable Channel 17 Interrupt.
Definition: adc1.h:5407
INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value)
Set Calibration Gain analog input 22.
Definition: adc1.h:6631
INLINE void ADC1_enCh12Int(void)
Enable Channel 12 Interrupt.
Definition: adc1.h:5337
INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value)
Set Calibration Gain analog input 3.
Definition: adc1.h:6163
void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint16 ADC1_getCh1Result(void)
Get Result Value Channel 1.
Definition: adc1.h:4257
INLINE void ADC1_setSeq2Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1788
INLINE uint16 ADC1_getCalibGainAnaIn18(void)
Get Calibration Gain analog input 18.
Definition: adc1.h:6496
INLINE void ADC1_enCalibProtCh9(void)
Enable Calibration Protection Channel 9.
Definition: adc1.h:3785
INLINE void ADC1_enCalibCh21(void)
Enable Calibration Channel 21.
Definition: adc1.h:3575
INLINE void ADC1_enCalibProtCh14(void)
Enable Calibration Protection Channel 14.
Definition: adc1.h:3855
INLINE uint8 ADC1_getCh1ResultValidSts(void)
Get Result Valid Flag Channel 1.
Definition: adc1.h:4266
INLINE void ADC1_setCh8Insel(tADC1_CHINSELx e_value)
Set Channel 8 input selection.
Definition: adc1.h:2670
INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value)
Set Calibration Offset analog input 23.
Definition: adc1.h:6649
INLINE void ADC1_enSeqSwShadowTrans(void)
Enable Sequence Shadow Transfer.
Definition: adc1.h:6065
uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx)
Get End-of-Convertion status for selected sequence and slot.
Definition: adc1.c:745
INLINE uint8 ADC1_getSeq1TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1666
INLINE uint8 ADC1_getCmp3LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5770
INLINE uint8 ADC1_getCalibOffsAnaIn18(void)
Get Calibration Offset analog input 18.
Definition: adc1.h:6478
INLINE uint8 ADC1_getCmp2LoThSts(void)
Get Compare 2 Lower Threshold Status.
Definition: adc1.h:4761
INLINE void ADC1_setSeq2Slot1(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1902
INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value)
Set Calibration Gain analog input 26.
Definition: adc1.h:6775
INLINE uint8 ADC1_getCh10EndOfConvSts(void)
Get Channel 10 End Of Conversion Status.
Definition: adc1.h:2868
INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value)
Set Calibration Gain analog input 5.
Definition: adc1.h:6199
INLINE uint8 ADC1_getCmp2UpIntSts(void)
Get Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4653
INLINE void ADC1_enCalibCh4(void)
Enable Calibration Channel 4.
Definition: adc1.h:3337
void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq1Slot1(void)
Get Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1734
INLINE uint8 ADC1_getCh7EndOfConvSts(void)
Get Channel 7 End Of Conversion Status.
Definition: adc1.h:2841
void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_disCalibCh12(void)
Disable Calibration Channel 12.
Definition: adc1.h:3456
INLINE void ADC1_setCh6Config(tADC1_CHCFGx s_value)
Set Channel 6 configuration.
Definition: adc1.h:2472
INLINE void ADC1_clrSeq3CollSts(void)
Clear Sequence 3 Collision Status.
Definition: adc1.h:2297
INLINE uint8 ADC1_getCurrChannel(void)
Get Current Channel under conversion.
Definition: adc1.h:2958
INLINE uint8 ADC1_getCh9EndOfConvSts(void)
Get Channel 9 End Of Conversion Status.
Definition: adc1.h:2859
INLINE uint16 ADC1_getCalibGainAnaIn16(void)
Get Calibration Gain analog input 16.
Definition: adc1.h:6424
INLINE void ADC1_setSeq3Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1965
INLINE uint8 ADC1_getFilter1Sts(void)
Get Filter 1 Event flag.
Definition: adc1.h:4156
INLINE void ADC1_clrCh17EndOfConvSts(void)
Clear Channel 17 End Of Conversion Status.
Definition: adc1.h:3084
INLINE void ADC1_setSeq0Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1434
INLINE void ADC1_enCalibProtCh10(void)
Enable Calibration Protection Channel 10.
Definition: adc1.h:3799
ADC1_Seq3Trig
Enumeration for the trigger source of the sequence 3.
Definition: adc1.h:279
INLINE uint8 ADC1_getCh15EndOfConvSts(void)
Get Channel 15 End Of Conversion Status.
Definition: adc1.h:2913
INLINE void ADC1_enSuspend(void)
Enable ADC1 Suspend.
Definition: adc1.h:1373
INLINE void ADC1_setFilter2Coeff(uint8 u8_value)
Set Filter 2 Coefficient.
Definition: adc1.h:4075
INLINE void ADC1_enCalibCh19(void)
Enable Calibration Channel 19.
Definition: adc1.h:3547
INLINE void ADC1_disCalibCh13(void)
Disable Calibration Channel 13.
Definition: adc1.h:3470
INLINE uint8 ADC1_getGateHwShadowTrans(void)
Get Gating Shadow Transfer Selection.
Definition: adc1.h:5968
INLINE void ADC1_enCh9Int(void)
Enable Channel 9 Interrupt.
Definition: adc1.h:5295
INLINE void ADC1_setCh14Config(tADC1_CHCFGx s_value)
Set Channel 14 configuration.
Definition: adc1.h:2544
INLINE void ADC1_disCalibCh26(void)
Disable Calibration Channel 26.
Definition: adc1.h:3652
INLINE void ADC1_enCalibProtCh19(void)
Enable Calibration Protection Channel 19.
Definition: adc1.h:3925
INLINE uint16 ADC1_getCh11Result(void)
Get Result Value Channel 11.
Definition: adc1.h:4437
INLINE void ADC1_disSeq1Int(void)
Disable Sequence 1 Interrupt.
Definition: adc1.h:5134
INLINE void ADC1_enCalibCh14(void)
Enable Calibration Channel 14.
Definition: adc1.h:3477
INLINE void ADC1_setFilter2Sts(void)
Set Filter 2 Event flag.
Definition: adc1.h:4223
INLINE uint8 ADC1_getSeq1Slot2(void)
Get Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1752
INLINE uint8 ADC1_getSeq3CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5878
INLINE void ADC1_disSeq0TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1521
INLINE void ADC1_disCalibProtCh3(void)
Disable Calibration Protection Channel 3.
Definition: adc1.h:3708
INLINE void ADC1_setCh17Config(tADC1_CHCFGx s_value)
Set Channel 17 configuration.
Definition: adc1.h:2571
INLINE void ADC1_disCh4Int(void)
Disable Channel 4 Interrupt.
Definition: adc1.h:5232
INLINE void ADC1_enCalibProtCh23(void)
Enable Calibration Protection Channel 23.
Definition: adc1.h:3981
INLINE uint8 ADC1_getGateSwShadowTrans(void)
Get Gating Software Shadow Transfer.
Definition: adc1.h:6058
INLINE void ADC1_enCalibProtCh24(void)
Enable Calibration Protection Channel 24.
Definition: adc1.h:3995
INLINE uint8 ADC1_getSeq3Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1974
INLINE void ADC1_disCalibProtCh1(void)
Disable Calibration Protection Channel 1.
Definition: adc1.h:3680
INLINE void ADC1_enSeq1WaitForReadInt(void)
Enable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5463
void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE uint8 ADC1_getFilter2Coeff(void)
Get Filter 2 Coefficient.
Definition: adc1.h:4084
INLINE void ADC1_disCh18Int(void)
Disable Channel 18 Interrupt.
Definition: adc1.h:5428
INLINE uint8 ADC1_getSeqSwShadowTrans(void)
Get Sequence Software Shadow Transfer.
Definition: adc1.h:6026
INLINE void ADC1_setSeq0WaitForRead(void)
Set Sequence 0 Wait for Read Status.
Definition: adc1.h:2332
INLINE void ADC1_enSeq3WaitForReadInt(void)
Enable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5491
INLINE void ADC1_enSeq0CollInt(void)
Enable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5505
INLINE uint16 ADC1_getCh15Result(void)
Get Result Value Channel 15.
Definition: adc1.h:4509
INLINE void ADC1_disSeq3CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1988
INLINE void ADC1_disCh3Int(void)
Disable Channel 3 Interrupt.
Definition: adc1.h:5218
INLINE uint8 ADC1_getSeq2IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5833
void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_disSeqHwShadowTrans(void)
Disable Sequence Shadow Transfer Selection.
Definition: adc1.h:5982
INLINE void ADC1_disCalibCh2(void)
Disable Calibration Channel 2.
Definition: adc1.h:3316
INLINE uint16 ADC1_getCalibGainAnaIn13(void)
Get Calibration Gain analog input 13.
Definition: adc1.h:6352
INLINE uint8 ADC1_getFilter3Sts(void)
Get Filter 3 Event flag.
Definition: adc1.h:4174
INLINE uint16 ADC1_getCh6Result(void)
Get Result Value Channel 6.
Definition: adc1.h:4347
INLINE uint8 ADC1_getSeq1Slot3(void)
Get Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1770
INLINE void ADC1_disSeq2TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1875
INLINE uint8 ADC1_getFilter0Sts(void)
Get Filter 0 Event flag.
Definition: adc1.h:4147
enum ADC1_Seq1Trig tADC1_Seq1Trig
INLINE uint8 ADC1_getCh3IntNodePtr(void)
Get Channel 3 Interrupt Node Pointer.
Definition: adc1.h:5590
INLINE void ADC1_disCalibProtCh12(void)
Disable Calibration Protection Channel 12.
Definition: adc1.h:3834
void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 12 Interrupt Node Pointer.
INLINE uint16 ADC1_getCalibGainAnaIn19(void)
Get Calibration Gain analog input 19.
Definition: adc1.h:6532
INLINE void ADC1_setCh13Config(tADC1_CHCFGx s_value)
Set Channel 13 configuration.
Definition: adc1.h:2535
INLINE uint8 ADC1_getSeq2GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1861
void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 0 Interrupt Node Pointer.
INLINE void ADC1_setCmp1UpIntSts(void)
Set Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4896
INLINE uint8 ADC1_getSeq1IntSts(void)
Get Sequence 1 Interrupt Status.
Definition: adc1.h:2214
INLINE uint8 ADC1_getSeq1CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5860
INLINE uint8 ADC1_getCh2IntNodePtr(void)
Get Channel 2 Interrupt Node Pointer.
Definition: adc1.h:5581
INLINE void ADC1_setCmp2Config(tADC1_CMPCFGx s_value)
Set Compare Channel 2 configuration.
Definition: adc1.h:4617
INLINE uint8 ADC1_getSeq3CollSts(void)
Get Sequence 3 Collision Status.
Definition: adc1.h:2196
INLINE void ADC1_enCh11Int(void)
Enable Channel 11 Interrupt.
Definition: adc1.h:5323
INLINE uint8 ADC1_getCmp2UpThSts(void)
Get Compare 2 Upper Threshold Status.
Definition: adc1.h:4689
INLINE uint8 ADC1_getSeq0Slot0(void)
Get Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1539
INLINE void ADC1_enCalibProtCh25(void)
Enable Calibration Protection Channel 25.
Definition: adc1.h:4009
enum ADC1_Seq2Trig tADC1_Seq2Trig
INLINE void ADC1_setCh1EndOfConvSts(void)
Set Channel 1 End Of Conversion Status.
Definition: adc1.h:3112
INLINE void ADC1_enCh14Int(void)
Enable Channel 14 Interrupt.
Definition: adc1.h:5365
INLINE void ADC1_disCh19Int(void)
Disable Channel 19 Interrupt.
Definition: adc1.h:5442
INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value)
Set Calibration Offset analog input 25.
Definition: adc1.h:6721
INLINE void ADC1_disCalibProtCh17(void)
Disable Calibration Protection Channel 17.
Definition: adc1.h:3904
INLINE void ADC1_disCmp0UpInt(void)
Disable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:5008
void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh6(void)
Disable Calibration Protection Channel 6.
Definition: adc1.h:3750
INLINE void ADC1_disCalibCh9(void)
Disable Calibration Channel 9.
Definition: adc1.h:3414
INLINE uint8 ADC1_getSuspendMode(void)
Get Suspend Mode.
Definition: adc1.h:1398
INLINE uint16 ADC1_getCh8Result(void)
Get Result Value Channel 8.
Definition: adc1.h:4383
void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 11 Interrupt Node Pointer.
void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0IntSts(void)
Get Sequence 0 Interrupt Status.
Definition: adc1.h:2205
INLINE void ADC1_disCmp2LoInt(void)
Disable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:5092
INLINE void ADC1_enCh1Int(void)
Enable Channel 1 Interrupt.
Definition: adc1.h:5183
INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value)
Set Calibration Gain analog input 1.
Definition: adc1.h:6127
INLINE void ADC1_enCalibCh17(void)
Enable Calibration Channel 17.
Definition: adc1.h:3519
INLINE void ADC1_setCh9Config(tADC1_CHCFGx s_value)
Set Channel 9 configuration.
Definition: adc1.h:2499
INLINE void ADC1_setCh10Config(tADC1_CHCFGx s_value)
Set Channel 10 configuration.
Definition: adc1.h:2508
INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value)
Set Calibration Gain analog input 19.
Definition: adc1.h:6523
INLINE void ADC1_enCalibProtCh5(void)
Enable Calibration Protection Channel 5.
Definition: adc1.h:3729
INLINE uint8 ADC1_getSeq3IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5842
INLINE void ADC1_clrCmp2LoThSts(void)
Clear Compare 2 Lower Threshold Status.
Definition: adc1.h:4875
INLINE uint16 ADC1_getCh0Result(void)
Get Result Value Channel 0.
Definition: adc1.h:4239
INLINE void ADC1_enCalibCh9(void)
Enable Calibration Channel 9.
Definition: adc1.h:3407
INLINE uint16 ADC1_getCh17Result(void)
Get Result Value Channel 17.
Definition: adc1.h:4545
INLINE void ADC1_disCalibCh23(void)
Disable Calibration Channel 23.
Definition: adc1.h:3610
INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value)
Set Calibration Offset analog input 24.
Definition: adc1.h:6685
INLINE uint8 ADC1_getSeq2Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1797
INLINE void ADC1_enCalibCh8(void)
Enable Calibration Channel 8.
Definition: adc1.h:3393
INLINE uint8 ADC1_getCalibOffsAnaIn3(void)
Get Calibration Offset analog input 3.
Definition: adc1.h:6154
INLINE void ADC1_clrFilter2Sts(void)
Clear Filter 2 Event flag.
Definition: adc1.h:4195
INLINE void ADC1_disCalibCh3(void)
Disable Calibration Channel 3.
Definition: adc1.h:3330
INLINE void ADC1_setCh11Config(tADC1_CHCFGx s_value)
Set Channel 11 configuration.
Definition: adc1.h:2517
INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value)
Set Gating Shadow Transfer Selection.
Definition: adc1.h:5959
INLINE uint16 ADC1_getCalibGainAnaIn26(void)
Get Calibration Gain analog input 26.
Definition: adc1.h:6784
INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1675
INLINE uint8 ADC1_getCalibOffsAnaIn9(void)
Get Calibration Offset analog input 9.
Definition: adc1.h:6262
INLINE void ADC1_setSeq1TriggerSelect(tADC1_Seq1Trig e_Seq1Trig)
Set Trigger Select.
Definition: adc1.h:1657
INLINE void ADC1_setCh11Insel(tADC1_CHINSELx e_value)
Set Channel 11 input selection.
Definition: adc1.h:2697
INLINE uint8 ADC1_getCmp0LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5743
void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 2 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh16(void)
Disable Calibration Protection Channel 16.
Definition: adc1.h:3890
INLINE void ADC1_enCalibProtCh0(void)
Enable Calibration Protection Channel 0.
Definition: adc1.h:3659
INLINE void ADC1_clrSeq0WaitForRead(void)
Clear Sequence 0 Wait for Read Status.
Definition: adc1.h:2248
INLINE void ADC1_setCh9EndOfConvSts(void)
Set Channel 9 End Of Conversion Status.
Definition: adc1.h:3168
INLINE void ADC1_setSeq1Slot0(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1707
INLINE uint8 ADC1_getSeq1WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5896
INLINE uint16 ADC1_getFilter2Result(void)
Get Result Value Filter 2.
Definition: adc1.h:4129
INLINE void ADC1_setFilter0Coeff(uint8 u8_value)
Set Filter 0 Coefficient.
Definition: adc1.h:4039
INLINE void ADC1_clrSeq1CollSts(void)
Clear Sequence 1 Collision Status.
Definition: adc1.h:2283
INLINE void ADC1_clrSeq2WaitForRead(void)
Clear Sequence 2 Wait for Read Status.
Definition: adc1.h:2262
INLINE uint8 ADC1_getCh5EndOfConvSts(void)
Get Channel 5 End Of Conversion Status.
Definition: adc1.h:2823
INLINE void ADC1_disSeq3CollInt(void)
Disable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5554
INLINE void ADC1_disSeq3WaitForReadInt(void)
Disable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5498
INLINE uint8 ADC1_getCh10ResultValidSts(void)
Get Result Valid Flag Channel 10.
Definition: adc1.h:4428
INLINE void ADC1_setCmp2UpThSts(void)
Set Compare 2 Upper Threshold Status.
Definition: adc1.h:4931
INLINE void ADC1_setTriggHwShadowTrans(uint8 u8_value)
Set Trigger Shadow Transfer Selection.
Definition: adc1.h:5941
INLINE void ADC1_disCalibProtCh8(void)
Disable Calibration Protection Channel 8.
Definition: adc1.h:3778
sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register in mV of the selected slot in the sequencer and retu...
Definition: adc1.c:580
INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value)
Set Calibration Gain analog input 21.
Definition: adc1.h:6595
INLINE void ADC1_enSeq2CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1804
INLINE void ADC1_setCh18EndOfConvSts(void)
Set Channel 18 End Of Conversion Status.
Definition: adc1.h:3231
INLINE void ADC1_setCh2EndOfConvSts(void)
Set Channel 2 End Of Conversion Status.
Definition: adc1.h:3119
void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1498
INLINE uint16 ADC1_getCh2Result(void)
Get Result Value Channel 2.
Definition: adc1.h:4275
INLINE void ADC1_enCh18Int(void)
Enable Channel 18 Interrupt.
Definition: adc1.h:5421
INLINE uint8 ADC1_getCh8EndOfConvSts(void)
Get Channel 8 End Of Conversion Status.
Definition: adc1.h:2850
INLINE void ADC1_disCh14Int(void)
Disable Channel 14 Interrupt.
Definition: adc1.h:5372
INLINE uint8 ADC1_getSeq0Slot1(void)
Get Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1557
INLINE void ADC1_setCh7Insel(tADC1_CHINSELx e_value)
Set Channel 7 input selection.
Definition: adc1.h:2661
INLINE uint8 ADC1_getCh12EndOfConvSts(void)
Get Channel 12 End Of Conversion Status.
Definition: adc1.h:2886
void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_setConvClass2Config(tADC1_CONVCFGx s_value)
Set Conversion Class 2.
Definition: adc1.h:3265
INLINE void ARVG_enVAREFOvercurrentInt(void)
Enable VAREF Overcurrent Interrupt.
Definition: adc1.h:6805
INLINE void ADC1_clrCh8EndOfConvSts(void)
Clear Channel 8 End Of Conversion Status.
Definition: adc1.h:3021
INLINE void ADC1_clrCmp3LoThSts(void)
Clear Compare 3 Lower Threshold Status.
Definition: adc1.h:4882
INLINE void ADC1_setCh12Config(tADC1_CHCFGx s_value)
Set Channel 12 configuration.
Definition: adc1.h:2526
INLINE void ADC1_disSeq0WaitForReadInt(void)
Disable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5456
INLINE void ADC1_setSeq1WaitForRead(void)
Set Sequence 1 Wait for Read Status.
Definition: adc1.h:2339
union ADC1_SQSLOTx tADC1_SQSLOTx
INLINE void ADC1_setCmp1LoThSts(void)
Set Compare 1 Lower Threshold Status.
Definition: adc1.h:4980
INLINE void ADC1_clrCh4EndOfConvSts(void)
Clear Channel 4 End Of Conversion Status.
Definition: adc1.h:2993
INLINE uint8 ADC1_getCmp3UpIntSts(void)
Get Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4662
INLINE void ADC1_setCmp1Config(tADC1_CMPCFGx s_value)
Set Compare Channel 1 configuration.
Definition: adc1.h:4608
INLINE void ADC1_setCmp2LoIntSts(void)
Set Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4959
INLINE uint8 ADC1_getSeq3WaitForRead(void)
Get Sequence 3 Wait for Read Status.
Definition: adc1.h:2160
INLINE void ADC1_disSeq3TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:2052
INLINE uint8 ADC1_getCalibOffsAnaIn5(void)
Get Calibration Offset analog input 5.
Definition: adc1.h:6190
INLINE uint8 ADC1_getCh19IntNodePtr(void)
Get Channel 19 Interrupt Node Pointer.
Definition: adc1.h:5734
INLINE uint8 ADC1_getCh16IntNodePtr(void)
Get Channel 16 Interrupt Node Pointer.
Definition: adc1.h:5707
INLINE uint8 ADC1_getCh8IntNodePtr(void)
Get Channel 8 Interrupt Node Pointer.
Definition: adc1.h:5635
INLINE uint8 ADC1_getSeq2CollSts(void)
Get Sequence 2 Collision Status.
Definition: adc1.h:2187
INLINE uint8 ADC1_getCalibOffsAnaIn26(void)
Get Calibration Offset analog input 26.
Definition: adc1.h:6766
INLINE uint8 ADC1_getCh3ResultValidSts(void)
Get Result Valid Flag Channel 3.
Definition: adc1.h:4302
INLINE void ADC1_clrFilter3Sts(void)
Clear Filter 3 Event flag.
Definition: adc1.h:4202
INLINE void ADC1_setSeq2Slot2(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1920
INLINE uint8 ADC1_getCh19EndOfConvSts(void)
Get Channel 19 End Of Conversion Status.
Definition: adc1.h:2949
INLINE void ADC1_enCmp1UpInt(void)
Enable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:5015
INLINE void ADC1_disCmp3UpInt(void)
Disable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:5050
INLINE void ADC1_enSeq3WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1995
INLINE uint8 ADC1_getCalibOffsAnaIn13(void)
Get Calibration Offset analog input 13.
Definition: adc1.h:6334
INLINE void ADC1_setSeq1CollSts(void)
Set Sequence 1 Collision Status.
Definition: adc1.h:2367
INLINE uint8 ADC1_getCh0EndOfConvSts(void)
Get Channel 0 End Of Conversion Status.
Definition: adc1.h:2778
INLINE void ADC1_setCh11EndOfConvSts(void)
Set Channel 11 End Of Conversion Status.
Definition: adc1.h:3182
INLINE void ADC1_enCalibProtCh11(void)
Enable Calibration Protection Channel 11.
Definition: adc1.h:3813
INLINE void ADC1_enCmp0LoInt(void)
Enable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:5057
INLINE uint8 ADC1_getSeq1WaitForRead(void)
Get Sequence 1 Wait for Read Status.
Definition: adc1.h:2142
INLINE void ADC1_disCalibCh1(void)
Disable Calibration Channel 1.
Definition: adc1.h:3302
INLINE void ADC1_setCh16Insel(tADC1_CHINSELx e_value)
Set Channel 16 input selection.
Definition: adc1.h:2742
INLINE void ADC1_enCalibCh23(void)
Enable Calibration Channel 23.
Definition: adc1.h:3603
INLINE void ADC1_enCh16Int(void)
Enable Channel 16 Interrupt.
Definition: adc1.h:5393
INLINE uint8 ADC1_getCh11EndOfConvSts(void)
Get Channel 11 End Of Conversion Status.
Definition: adc1.h:2877
INLINE uint16 ADC1_getCh14Result(void)
Get Result Value Channel 14.
Definition: adc1.h:4491
INLINE void ADC1_enCalibProtCh26(void)
Enable Calibration Protection Channel 26.
Definition: adc1.h:4023
INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value)
Set Calibration Offset analog input 1.
Definition: adc1.h:6109
INLINE void ADC1_setSeq0Slot3(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1584
INLINE void ADC1_enCalibProtCh8(void)
Enable Calibration Protection Channel 8.
Definition: adc1.h:3771
INLINE uint8 ADC1_getSeq0WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5887
INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value)
Set Calibration Gain analog input 18.
Definition: adc1.h:6487
INLINE void ADC1_setCmp0Config(tADC1_CMPCFGx s_value)
Set Compare Channel 0 configuration.
Definition: adc1.h:4599
INLINE uint8 ADC1_getSeq3Slot1(void)
Get Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2088
INLINE void ADC1_enSeq3CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1981
INLINE void ADC1_enCalibProtCh15(void)
Enable Calibration Protection Channel 15.
Definition: adc1.h:3869
INLINE void ADC1_disSeqSwShadowTrans(void)
Disable Sequence Shadow Transfer.
Definition: adc1.h:6072
void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_setCh7EndOfConvSts(void)
Set Channel 7 End Of Conversion Status.
Definition: adc1.h:3154
INLINE void ADC1_clrSeq1WaitForRead(void)
Clear Sequence 1 Wait for Read Status.
Definition: adc1.h:2255
INLINE void ADC1_enCmp1LoInt(void)
Enable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:5071
INLINE void ADC1_disCalibProtCh14(void)
Disable Calibration Protection Channel 14.
Definition: adc1.h:3862
INLINE void ADC1_clrCmp1UpIntSts(void)
Clear Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4784
INLINE void ADC1_disCh1Int(void)
Disable Channel 1 Interrupt.
Definition: adc1.h:5190
INLINE uint16 ADC1_getCalibGainAnaIn9(void)
Get Calibration Gain analog input 9.
Definition: adc1.h:6280
INLINE void ADC1_enSeq1CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1627
INLINE uint8 ADC1_getCh17ResultValidSts(void)
Get Result Valid Flag Channel 17.
Definition: adc1.h:4554
INLINE uint16 ADC1_getFilter1Result(void)
Get Result Value Filter 1.
Definition: adc1.h:4120
INLINE uint16 ADC1_getCalibGainAnaIn15(void)
Get Calibration Gain analog input 15.
Definition: adc1.h:6388
INLINE void ADC1_setFilter0Sts(void)
Set Filter 0 Event flag.
Definition: adc1.h:4209
INLINE void ADC1_disSeq1TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1698
INLINE uint8 ADC1_getCh10IntNodePtr(void)
Get Channel 10 Interrupt Node Pointer.
Definition: adc1.h:5653
INLINE void ADC1_setSeq1Slot2(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1743
INLINE uint16 ADC1_getCh9Result(void)
Get Result Value Channel 9.
Definition: adc1.h:4401
INLINE uint8 ADC1_getCh18EndOfConvSts(void)
Get Channel 18 End Of Conversion Status.
Definition: adc1.h:2940
INLINE uint8 ADC1_getSeq2Slot1(void)
Get Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1911
sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel)
Get the value of the ADC1 Filter Result Register of the selected ADC1 channel in millivolt (mV) and r...
Definition: adc1.c:412
INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value)
Set Calibration Offset analog input 13.
Definition: adc1.h:6325
INLINE void ADC1_disCalibProtCh21(void)
Disable Calibration Protection Channel 21.
Definition: adc1.h:3960
INLINE uint8 ADC1_getCh19ResultValidSts(void)
Get Result Valid Flag Channel 19.
Definition: adc1.h:4590
ADC1_Seq2Trig
Enumeration for the trigger source of the sequence 2.
Definition: adc1.h:262
INLINE void ADC1_disCh12Int(void)
Disable Channel 12 Interrupt.
Definition: adc1.h:5344
INLINE void ADC1_disCh17Int(void)
Disable Channel 17 Interrupt.
Definition: adc1.h:5414
INLINE void ADC1_setCh18Config(tADC1_CHCFGx s_value)
Set Channel 18 configuration.
Definition: adc1.h:2580
INLINE void ADC1_enSeq2TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1868
void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 9 Interrupt Node Pointer.
INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value)
Set Calibration Gain analog input 13.
Definition: adc1.h:6343
INLINE uint8 ADC1_getCmp1LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5752
INLINE uint16 ADC1_getCalibGainAnaIn5(void)
Get Calibration Gain analog input 5.
Definition: adc1.h:6208
INLINE void ADC1_setCh6EndOfConvSts(void)
Set Channel 6 End Of Conversion Status.
Definition: adc1.h:3147
INLINE void ADC1_clrCh0EndOfConvSts(void)
Clear Channel 0 End Of Conversion Status.
Definition: adc1.h:2965
INLINE void ADC1_disSeq3Int(void)
Disable Sequence 3 Interrupt.
Definition: adc1.h:5162
INLINE void ADC1_enSeq0CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1450
INLINE uint8 ADC1_getSeq0GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1507
INLINE void ADC1_setCh12EndOfConvSts(void)
Set Channel 12 End Of Conversion Status.
Definition: adc1.h:3189
INLINE void ADC1_disTriggSwShadowTrans(void)
Disable Trigger Shadow Transfer.
Definition: adc1.h:6086
INLINE void ADC1_disCalibProtCh26(void)
Disable Calibration Protection Channel 26.
Definition: adc1.h:4030
INLINE uint8 ADC1_getCalibOffsAnaIn21(void)
Get Calibration Offset analog input 21.
Definition: adc1.h:6586
INLINE void ADC1_enCmp0UpInt(void)
Enable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:5001
INLINE void ADC1_clrCh11EndOfConvSts(void)
Clear Channel 11 End Of Conversion Status.
Definition: adc1.h:3042
INLINE void ADC1_enCalibCh11(void)
Enable Calibration Channel 11.
Definition: adc1.h:3435
INLINE void ARVG_enVAREF(void)
Enable VAREF.
Definition: adc1.h:6791
INLINE void ADC1_setCmp3LoIntSts(void)
Set Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4966
INLINE void ADC1_disCalibCh4(void)
Disable Calibration Channel 4.
Definition: adc1.h:3344
INLINE void ARVG_clrVAREFOvercurrentIntSts(void)
Clear VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6837
INLINE void ADC1_enGateSwShadowTrans(void)
Enable Gating Shadow Transfer.
Definition: adc1.h:6093
INLINE void ADC1_disCh2Int(void)
Disable Channel 2 Interrupt.
Definition: adc1.h:5204
INLINE uint8 ADC1_getCmp0LoIntSts(void)
Get Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4707
INLINE uint16 ADC1_getCalibGainAnaIn21(void)
Get Calibration Gain analog input 21.
Definition: adc1.h:6604
INLINE void ADC1_setCh5Config(tADC1_CHCFGx s_value)
Set Channel 5 configuration.
Definition: adc1.h:2463
INLINE void ADC1_enCalibCh7(void)
Enable Calibration Channel 7.
Definition: adc1.h:3379
INLINE uint16 ADC1_getCalibGainAnaIn22(void)
Get Calibration Gain analog input 22.
Definition: adc1.h:6640
INLINE void ADC1_setCh15Insel(tADC1_CHINSELx e_value)
Set Channel 15 input selection.
Definition: adc1.h:2733
INLINE void ADC1_enCalibCh12(void)
Enable Calibration Channel 12.
Definition: adc1.h:3449
INLINE uint8 ADC1_getCh17EndOfConvSts(void)
Get Channel 17 End Of Conversion Status.
Definition: adc1.h:2931
INLINE uint8 ADC1_getCh4IntNodePtr(void)
Get Channel 4 Interrupt Node Pointer.
Definition: adc1.h:5599
INLINE void ADC1_setCh4Insel(tADC1_CHINSELx e_value)
Set Channel 4 input selection.
Definition: adc1.h:2634
INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value)
Set Calibration Gain analog input 24.
Definition: adc1.h:6703
INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value)
Set Calibration Gain analog input 16.
Definition: adc1.h:6415
INLINE uint8 ADC1_getSeq2Slot0(void)
Get Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1893
INLINE void ADC1_disCalibCh17(void)
Disable Calibration Channel 17.
Definition: adc1.h:3526
INLINE void ADC1_disCalibProtCh11(void)
Disable Calibration Protection Channel 11.
Definition: adc1.h:3820
INLINE void ADC1_setClockDiv(uint8 u8_value)
Set Clock Divider Settings.
Definition: adc1.h:1357
INLINE void ADC1_setSeq1Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1611
INLINE void ADC1_disCalibCh24(void)
Disable Calibration Channel 24.
Definition: adc1.h:3624
INLINE uint16 ADC1_getCh5Result(void)
Get Result Value Channel 5.
Definition: adc1.h:4329
INLINE void ADC1_clrCh12EndOfConvSts(void)
Clear Channel 12 End Of Conversion Status.
Definition: adc1.h:3049
INLINE uint8 ADC1_getSeq2Slot3(void)
Get Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1947
INLINE void ADC1_enCalibCh22(void)
Enable Calibration Channel 22.
Definition: adc1.h:3589
void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCh16Int(void)
Disable Channel 16 Interrupt.
Definition: adc1.h:5400
INLINE uint8 ADC1_getClockDiv(void)
Get Clock Divider Settings.
Definition: adc1.h:1366
INLINE uint8 ADC1_getFilter2Sts(void)
Get Filter 2 Event flag.
Definition: adc1.h:4165
INLINE uint8 ADC1_getCh1IntNodePtr(void)
Get Channel 1 Interrupt Node Pointer.
Definition: adc1.h:5572
INLINE void ADC1_clrCh13EndOfConvSts(void)
Clear Channel 13 End Of Conversion Status.
Definition: adc1.h:3056
INLINE void ADC1_clrSeq3IntSts(void)
Clear Sequence 3 Interrupt Status.
Definition: adc1.h:2325
void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
enum ADC1_Seq3Trig tADC1_Seq3Trig
INLINE void ADC1_disTriggHwShadowTrans(void)
Disable Trigger Shadow Transfer Selection.
Definition: adc1.h:5996
INLINE void ADC1_disCalibCh25(void)
Disable Calibration Channel 25.
Definition: adc1.h:3638
void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCalibCh11(void)
Disable Calibration Channel 11.
Definition: adc1.h:3442
INLINE void ADC1_setCh10Insel(tADC1_CHINSELx e_value)
Set Channel 10 input selection.
Definition: adc1.h:2688
INLINE void ADC1_clrCmp2LoIntSts(void)
Clear Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4847
INLINE void ADC1_setSeq3Slot1(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2079
INLINE uint8 ADC1_getSeq0Slot3(void)
Get Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1593
INLINE void ADC1_disCalibProtCh15(void)
Disable Calibration Protection Channel 15.
Definition: adc1.h:3876
INLINE void ADC1_setCmp1UpThSts(void)
Set Compare 1 Upper Threshold Status.
Definition: adc1.h:4924
INLINE void ADC1_disGateHwShadowTrans(void)
Disable Gating Shadow Transfer Selection.
Definition: adc1.h:6010
void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 3 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh17(void)
Enable Calibration Protection Channel 17.
Definition: adc1.h:3897
INLINE void ADC1_setCmp0LoThSts(void)
Set Compare 0 Lower Threshold Status.
Definition: adc1.h:4973
INLINE void ADC1_setCmp3Config(tADC1_CMPCFGx s_value)
Set Compare Channel 3 configuration.
Definition: adc1.h:4626
INLINE void ADC1_clrCh2EndOfConvSts(void)
Clear Channel 2 End Of Conversion Status.
Definition: adc1.h:2979
INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value)
Set Calibration Gain analog input 9.
Definition: adc1.h:6271
INLINE uint8 ADC1_getSeq1CollSts(void)
Get Sequence 1 Collision Status.
Definition: adc1.h:2178
INLINE void ADC1_setSeq2WaitForRead(void)
Set Sequence 2 Wait for Read Status.
Definition: adc1.h:2346
INLINE uint16 ADC1_getCh12Result(void)
Get Result Value Channel 12.
Definition: adc1.h:4455
INLINE void ADC1_clrCmp2UpIntSts(void)
Clear Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4791
INLINE void ADC1_setSeq2Config(tADC1_SQCFGx s_value)
Set Sequence 2 configuration.
Definition: adc1.h:1779
INLINE void ADC1_clrCh16EndOfConvSts(void)
Clear Channel 16 End Of Conversion Status.
Definition: adc1.h:3077
void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 5 Interrupt Node Pointer.
INLINE uint8 ADC1_getCh2EndOfConvSts(void)
Get Channel 2 End Of Conversion Status.
Definition: adc1.h:2796
INLINE void ADC1_disCh0Int(void)
Disable Channel 0 Interrupt.
Definition: adc1.h:5176
sint8 ADC1_startSequence(uint8 u8_seqIdx)
Start the conversion of a sequence by software.
Definition: adc1.c:681
INLINE void ADC1_clrCmp0UpIntSts(void)
Clear Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4777
INLINE void ADC1_disSeq1WaitForReadInt(void)
Disable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5470
INLINE uint8 ADC1_getCmp1UpIntSts(void)
Get Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4644
INLINE uint8 ADC1_getSeq0Slot2(void)
Get Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1575
INLINE uint8 ADC1_getFilter1Coeff(void)
Get Filter 1 Coefficient.
Definition: adc1.h:4066
INLINE void ADC1_enSeq3CollInt(void)
Enable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5547
INLINE void ADC1_setCh16Config(tADC1_CHCFGx s_value)
Set Channel 16 configuration.
Definition: adc1.h:2562
INLINE uint8 ADC1_getSeq0CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5851
INLINE void ADC1_enSeq2WaitForReadInt(void)
Enable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5477
INLINE void ADC1_disCh15Int(void)
Disable Channel 15 Interrupt.
Definition: adc1.h:5386
INLINE void ADC1_setSeq0TriggerSelect(tADC1_Seq0Trig e_Seq0Trig)
Set Trigger Select.
Definition: adc1.h:1480
INLINE void ADC1_enSeq3TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:2045
INLINE void ADC1_setCmp3LoThSts(void)
Set Compare 3 Lower Threshold Status.
Definition: adc1.h:4994
INLINE void ADC1_clrCh19EndOfConvSts(void)
Clear Channel 19 End Of Conversion Status.
Definition: adc1.h:3098
INLINE void ADC1_enCalibProtCh7(void)
Enable Calibration Protection Channel 7.
Definition: adc1.h:3757
INLINE uint8 ADC1_getCmp1UpThSts(void)
Get Compare 1 Upper Threshold Status.
Definition: adc1.h:4680
INLINE uint8 ADC1_getSuspendSts(void)
Get Suspend Mode Status.
Definition: adc1.h:1407
INLINE uint8 ADC1_getCh18IntNodePtr(void)
Get Channel 18 Interrupt Node Pointer.
Definition: adc1.h:5725
INLINE void ADC1_setCh16EndOfConvSts(void)
Set Channel 16 End Of Conversion Status.
Definition: adc1.h:3217
void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 13 Interrupt Node Pointer.
void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 10 Interrupt Node Pointer.
ADC1_Seq1Trig
Enumeration for the trigger source of the sequence 1.
Definition: adc1.h:245
union ADC1_SQCFGx tADC1_SQCFGx
INLINE void ADC1_disCalibProtCh20(void)
Disable Calibration Protection Channel 20.
Definition: adc1.h:3946
INLINE uint8 ADC1_getCurrSeq(void)
Get Actual Sequence processed.
Definition: adc1.h:2241
INLINE void ADC1_setSeq1Config(tADC1_SQCFGx s_value)
Set Sequence 1 configuration.
Definition: adc1.h:1602
INLINE void ADC1_enCh2Int(void)
Enable Channel 2 Interrupt.
Definition: adc1.h:5197
INLINE void ADC1_disCh9Int(void)
Disable Channel 9 Interrupt.
Definition: adc1.h:5302
INLINE uint8 ADC1_getCalibOffsAnaIn16(void)
Get Calibration Offset analog input 16.
Definition: adc1.h:6406
INLINE void ADC1_clrFilter0Sts(void)
Clear Filter 0 Event flag.
Definition: adc1.h:4181
INLINE void ADC1_setFilter1Coeff(uint8 u8_value)
Set Filter 1 Coefficient.
Definition: adc1.h:4057
INLINE uint8 ADC1_getCh8ResultValidSts(void)
Get Result Valid Flag Channel 8.
Definition: adc1.h:4392
INLINE uint8 ADC1_getCmp2UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5797
INLINE void ADC1_setCh14Insel(tADC1_CHINSELx e_value)
Set Channel 14 input selection.
Definition: adc1.h:2724
INLINE uint8 ADC1_getCh13IntNodePtr(void)
Get Channel 13 Interrupt Node Pointer.
Definition: adc1.h:5680
INLINE void ADC1_setCh14EndOfConvSts(void)
Set Channel 14 End Of Conversion Status.
Definition: adc1.h:3203
INLINE void ADC1_setSuspendMode(uint8 u8_value)
Set Suspend Mode.
Definition: adc1.h:1389
INLINE void ADC1_setCh7Config(tADC1_CHCFGx s_value)
Set Channel 7 configuration.
Definition: adc1.h:2481
sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register of the selected slot in the sequencer and returns th...
Definition: adc1.c:478
INLINE uint16 ADC1_getFilter0Result(void)
Get Result Value Filter 0.
Definition: adc1.h:4111
INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1852
INLINE void ADC1_clrSeq0IntSts(void)
Clear Sequence 0 Interrupt Status.
Definition: adc1.h:2304
INLINE void ADC1_enCh8Int(void)
Enable Channel 8 Interrupt.
Definition: adc1.h:5281
INLINE void ADC1_clrCh15EndOfConvSts(void)
Clear Channel 15 End Of Conversion Status.
Definition: adc1.h:3070
INLINE void ADC1_enCh0Int(void)
Enable Channel 0 Interrupt.
Definition: adc1.h:5169
enum ADC1_Seq0Trig tADC1_Seq0Trig
INLINE void ADC1_setConvClass3Config(tADC1_CONVCFGx s_value)
Set Conversion Class 3.
Definition: adc1.h:3274
INLINE void ADC1_setCh6Insel(tADC1_CHINSELx e_value)
Set Channel 6 input selection.
Definition: adc1.h:2652
INLINE void ADC1_setSeq0Config(tADC1_SQCFGx s_value)
Set Sequence 0 configuration.
Definition: adc1.h:1425
INLINE void ADC1_disCh8Int(void)
Disable Channel 8 Interrupt.
Definition: adc1.h:5288
INLINE void ADC1_setCh4Config(tADC1_CHCFGx s_value)
Set Channel 4 configuration.
Definition: adc1.h:2454
INLINE void ADC1_enCalibCh0(void)
Enable Calibration Channel 0.
Definition: adc1.h:3281
INLINE void ADC1_disCalibCh19(void)
Disable Calibration Channel 19.
Definition: adc1.h:3554
void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 8 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh7(void)
Disable Calibration Protection Channel 7.
Definition: adc1.h:3764
INLINE void ADC1_enCalibProtCh22(void)
Enable Calibration Protection Channel 22.
Definition: adc1.h:3967
INLINE void ADC1_disSeq3WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:2002
INLINE void ADC1_enCalibProtCh2(void)
Enable Calibration Protection Channel 2.
Definition: adc1.h:3687
INLINE void ADC1_setCh1Insel(tADC1_CHINSELx e_value)
Set Channel 1 input selection.
Definition: adc1.h:2607
sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel)
Get the value of the ADC1 Result Register of the selected ADC1 channel in millivolt (mV)
Definition: adc1.c:290
INLINE uint16 ADC1_getCh18Result(void)
Get Result Value Channel 18.
Definition: adc1.h:4563
INLINE void ADC1_setSeq1Slot1(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1725
INLINE uint8 ADC1_getCh6IntNodePtr(void)
Get Channel 6 Interrupt Node Pointer.
Definition: adc1.h:5617
INLINE void ADC1_setCh19Insel(tADC1_CHINSELx e_value)
Set Channel 19 input selection.
Definition: adc1.h:2769
INLINE void ADC1_disSeq2CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1811
INLINE uint8 ADC1_getCalibOffsAnaIn25(void)
Get Calibration Offset analog input 25.
Definition: adc1.h:6730
INLINE void ADC1_setCh0Insel(tADC1_CHINSELx e_value)
Set Channel 0 input selection.
Definition: adc1.h:2598
INLINE void ADC1_disGateSwShadowTrans(void)
Disable Gating Shadow Transfer.
Definition: adc1.h:6100
INLINE void ADC1_setCmp0UpThSts(void)
Set Compare 0 Upper Threshold Status.
Definition: adc1.h:4917
void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:2029
INLINE void ADC1_setSeq3WaitForRead(void)
Set Sequence 3 Wait for Read Status.
Definition: adc1.h:2353
INLINE void ADC1_enCalibProtCh3(void)
Enable Calibration Protection Channel 3.
Definition: adc1.h:3701
INLINE void ADC1_disCalibProtCh19(void)
Disable Calibration Protection Channel 19.
Definition: adc1.h:3932
INLINE void ADC1_clrSeq2CollSts(void)
Clear Sequence 2 Collision Status.
Definition: adc1.h:2290
INLINE uint8 ADC1_getCh14IntNodePtr(void)
Get Channel 14 Interrupt Node Pointer.
Definition: adc1.h:5689
INLINE void ADC1_setSeq1IntSts(void)
Set Sequence 1 Interrupt Status.
Definition: adc1.h:2395
INLINE void ADC1_disSeq0CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1457
INLINE uint16 ADC1_getCh13Result(void)
Get Result Value Channel 13.
Definition: adc1.h:4473
INLINE void ADC1_enGateHwShadowTrans(void)
Enable Gating Shadow Transfer Selection.
Definition: adc1.h:6003
INLINE uint8 ADC1_getSeq0TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1489
INLINE void ADC1_clrCmp0LoIntSts(void)
Clear Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4833
INLINE uint16 ADC1_getCalibGainAnaIn11(void)
Get Calibration Gain analog input 11.
Definition: adc1.h:6316
INLINE uint8 ADC1_getSeq1Slot0(void)
Get Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1716
INLINE void ADC1_enCalibCh15(void)
Enable Calibration Channel 15.
Definition: adc1.h:3491
INLINE void ADC1_enCalibCh26(void)
Enable Calibration Channel 26.
Definition: adc1.h:3645
INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value)
Set Calibration Offset analog input 18.
Definition: adc1.h:6469
INLINE uint16 ADC1_getFilter3Result(void)
Get Result Value Filter 3.
Definition: adc1.h:4138
INLINE void ADC1_setCh5Insel(tADC1_CHINSELx e_value)
Set Channel 5 input selection.
Definition: adc1.h:2643
INLINE uint16 ADC1_getCh16Result(void)
Get Result Value Channel 16.
Definition: adc1.h:4527
INLINE uint8 ADC1_getReady(void)
Get Module Ready.
Definition: adc1.h:1416
INLINE void ADC1_setCmp0LoIntSts(void)
Set Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4945
INLINE void ADC1_disCalibCh21(void)
Disable Calibration Channel 21.
Definition: adc1.h:3582
INLINE void ADC1_enCalibProtCh6(void)
Enable Calibration Protection Channel 6.
Definition: adc1.h:3743
INLINE void ADC1_disCalibProtCh22(void)
Disable Calibration Protection Channel 22.
Definition: adc1.h:3974
INLINE void ADC1_disSeq0WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1471
INLINE void ADC1_setCh3Config(tADC1_CHCFGx s_value)
Set Channel 3 configuration.
Definition: adc1.h:2445
INLINE uint16 ADC1_getCh19Result(void)
Get Result Value Channel 19.
Definition: adc1.h:4581
sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel)
Get the 14-bit value of the ADC1 Result Register of the selected ADC1 channel.
Definition: adc1.c:236
INLINE void ADC1_enCalibProtCh18(void)
Enable Calibration Protection Channel 18.
Definition: adc1.h:3911
INLINE void ADC1_enSeqHwShadowTrans(void)
Enable Sequence Shadow Transfer Selection.
Definition: adc1.h:5975
INLINE void ADC1_disCalibProtCh13(void)
Disable Calibration Protection Channel 13.
Definition: adc1.h:3848
INLINE void ADC1_setCh4EndOfConvSts(void)
Set Channel 4 End Of Conversion Status.
Definition: adc1.h:3133
INLINE void ADC1_clrCh9EndOfConvSts(void)
Clear Channel 9 End Of Conversion Status.
Definition: adc1.h:3028
INLINE uint8 ADC1_getCh6ResultValidSts(void)
Get Result Valid Flag Channel 6.
Definition: adc1.h:4356
INLINE void ADC1_disCalibProtCh10(void)
Disable Calibration Protection Channel 10.
Definition: adc1.h:3806
INLINE void ARVG_clrVAREFOvercurrentSts(void)
Clear VAREF Overcurrent Status.
Definition: adc1.h:6844
INLINE void ADC1_enSeq0Int(void)
Enable Sequence 0 Interrupt.
Definition: adc1.h:5113
INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value)
Set Calibration Offset analog input 20.
Definition: adc1.h:6541
INLINE uint8 ADC1_getCalibOffsAnaIn23(void)
Get Calibration Offset analog input 23.
Definition: adc1.h:6658
INLINE void ADC1_disCh11Int(void)
Disable Channel 11 Interrupt.
Definition: adc1.h:5330
INLINE void ADC1_setCh8Config(tADC1_CHCFGx s_value)
Set Channel 8 configuration.
Definition: adc1.h:2490
INLINE void ADC1_enCh10Int(void)
Enable Channel 10 Interrupt.
Definition: adc1.h:5309
INLINE void ADC1_enSeq1Int(void)
Enable Sequence 1 Interrupt.
Definition: adc1.h:5127
INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value)
Set Sequence Shadow Transfer Selection.
Definition: adc1.h:5923
INLINE void ADC1_enSeq2Int(void)
Enable Sequence 2 Interrupt.
Definition: adc1.h:5141
INLINE uint8 ADC1_getCh14EndOfConvSts(void)
Get Channel 14 End Of Conversion Status.
Definition: adc1.h:2904
INLINE uint8 ADC1_getSeq0WaitForRead(void)
Get Sequence 0 Wait for Read Status.
Definition: adc1.h:2133
INLINE void ADC1_setSeq3Config(tADC1_SQCFGx s_value)
Set Sequence 3 configuration.
Definition: adc1.h:1956
INLINE void ADC1_disSeq2WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1825
INLINE void ADC1_setConvClass1Config(tADC1_CONVCFGx s_value)
Set Conversion Class 1.
Definition: adc1.h:3256
void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 6 Interrupt Node Pointer.
INLINE void ARVG_disVAREFOvercurrentInt(void)
Disable VAREF Overcurrent Interrupt.
Definition: adc1.h:6812
INLINE uint8 ADC1_getCalibOffsAnaIn19(void)
Get Calibration Offset analog input 19.
Definition: adc1.h:6514
INLINE void ADC1_setCh2Config(tADC1_CHCFGx s_value)
Set Channel 2 configuration.
Definition: adc1.h:2436
INLINE void ADC1_enCalibCh5(void)
Enable Calibration Channel 5.
Definition: adc1.h:3351
INLINE void ADC1_disCalibProtCh23(void)
Disable Calibration Protection Channel 23.
Definition: adc1.h:3988
INLINE uint8 ADC1_getTriggSwShadowTrans(void)
Get Trigger Software Shadow Transfer.
Definition: adc1.h:6042
INLINE uint8 ADC1_getCh17IntNodePtr(void)
Get Channel 17 Interrupt Node Pointer.
Definition: adc1.h:5716
INLINE uint8 ADC1_getFilter3Coeff(void)
Get Filter 3 Coefficient.
Definition: adc1.h:4102
INLINE void ADC1_enCh7Int(void)
Enable Channel 7 Interrupt.
Definition: adc1.h:5267
union ADC1_CMPCFGx tADC1_CMPCFGx
INLINE uint8 ADC1_getSeqHwShadowTrans(void)
Get Sequence Shadow Transfer Selection.
Definition: adc1.h:5932
INLINE void ADC1_setCh19EndOfConvSts(void)
Set Channel 19 End Of Conversion Status.
Definition: adc1.h:3238
INLINE void ADC1_disCalibCh8(void)
Disable Calibration Channel 8.
Definition: adc1.h:3400
void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 15 Interrupt Node Pointer.
INLINE void ADC1_setCh15EndOfConvSts(void)
Set Channel 15 End Of Conversion Status.
Definition: adc1.h:3210
INLINE void ADC1_disCh13Int(void)
Disable Channel 13 Interrupt.
Definition: adc1.h:5358
INLINE void ADC1_clrCmp2UpThSts(void)
Clear Compare 2 Upper Threshold Status.
Definition: adc1.h:4819
INLINE void ADC1_disCalibCh6(void)
Disable Calibration Channel 6.
Definition: adc1.h:3372
void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq2WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5905
INLINE uint8 ADC1_getCh7ResultValidSts(void)
Get Result Valid Flag Channel 7.
Definition: adc1.h:4374
INLINE void ADC1_clrCh14EndOfConvSts(void)
Clear Channel 14 End Of Conversion Status.
Definition: adc1.h:3063
INLINE uint8 ADC1_getCmp1LoIntSts(void)
Get Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4716
INLINE uint8 ADC1_getCmp0LoThSts(void)
Get Compare 0 Lower Threshold Status.
Definition: adc1.h:4743
INLINE void ADC1_setConvClass0Config(tADC1_CONVCFGx s_value)
Set Conversion Class 0.
Definition: adc1.h:3247
INLINE void ADC1_enCalibCh2(void)
Enable Calibration Channel 2.
Definition: adc1.h:3309
INLINE void ADC1_setCmp1LoIntSts(void)
Set Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4952
INLINE void ADC1_setCmp0UpIntSts(void)
Set Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4889
INLINE void ADC1_clrSeq3WaitForRead(void)
Clear Sequence 3 Wait for Read Status.
Definition: adc1.h:2269
INLINE uint8 ADC1_getCmp2LoIntSts(void)
Get Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4725
INLINE uint8 ADC1_getSeq1GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1684
INLINE uint8 ADC1_getCh12ResultValidSts(void)
Get Result Valid Flag Channel 12.
Definition: adc1.h:4464
INLINE void ADC1_setCh18Insel(tADC1_CHINSELx e_value)
Set Channel 18 input selection.
Definition: adc1.h:2760
INLINE uint8 ADC1_getCmp3LoIntSts(void)
Get Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4734
INLINE void ADC1_clrSeq1IntSts(void)
Clear Sequence 1 Interrupt Status.
Definition: adc1.h:2311
INLINE void ADC1_setCh0EndOfConvSts(void)
Set Channel 0 End Of Conversion Status.
Definition: adc1.h:3105
INLINE void ADC1_setSeq0Slot2(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1566
void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 7 Interrupt Node Pointer.
INLINE void ADC1_setSeq2IntSts(void)
Set Sequence 2 Interrupt Status.
Definition: adc1.h:2402
INLINE void ADC1_disCh10Int(void)
Disable Channel 10 Interrupt.
Definition: adc1.h:5316
void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 4 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh1(void)
Enable Calibration Protection Channel 1.
Definition: adc1.h:3673
INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value)
Set Calibration Offset analog input 5.
Definition: adc1.h:6181
INLINE uint8 ADC1_getCh3EndOfConvSts(void)
Get Channel 3 End Of Conversion Status.
Definition: adc1.h:2805
INLINE uint8 ADC1_getCh15ResultValidSts(void)
Get Result Valid Flag Channel 15.
Definition: adc1.h:4518
INLINE uint16 ADC1_getCh3Result(void)
Get Result Value Channel 3.
Definition: adc1.h:4293
INLINE void ADC1_setCh13EndOfConvSts(void)
Set Channel 13 End Of Conversion Status.
Definition: adc1.h:3196
INLINE void ADC1_setCh10EndOfConvSts(void)
Set Channel 10 End Of Conversion Status.
Definition: adc1.h:3175
INLINE void ADC1_enCalibProtCh12(void)
Enable Calibration Protection Channel 12.
Definition: adc1.h:3827
INLINE void ADC1_setSeq0IntSts(void)
Set Sequence 0 Interrupt Status.
Definition: adc1.h:2388
INLINE void ADC1_enCalibCh1(void)
Enable Calibration Channel 1.
Definition: adc1.h:3295
INLINE void ADC1_disSeq2CollInt(void)
Disable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5540
void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_enCalibCh20(void)
Enable Calibration Channel 20.
Definition: adc1.h:3561
INLINE void ADC1_setCh12Insel(tADC1_CHINSELx e_value)
Set Channel 12 input selection.
Definition: adc1.h:2706
INLINE void ADC1_enSeq1TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1691
INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value)
Set Calibration Offset analog input 26.
Definition: adc1.h:6757
INLINE void ADC1_disCalibCh0(void)
Disable Calibration Channel 0.
Definition: adc1.h:3288
union ADC1_CHCFGx tADC1_CHCFGx
INLINE uint16 ADC1_getCalibGainAnaIn25(void)
Get Calibration Gain analog input 25.
Definition: adc1.h:6748
INLINE uint8 ADC1_getSeq3GatingSelect(void)
Get Gating Select.
Definition: adc1.h:2038
INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value)
Set Calibration Gain analog input 7.
Definition: adc1.h:6235
INLINE void ADC1_setCh17EndOfConvSts(void)
Set Channel 17 End Of Conversion Status.
Definition: adc1.h:3224
INLINE void ADC1_enSeq1WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1641
INLINE uint8 ADC1_getCmp0UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5779
INLINE void ADC1_disCalibProtCh5(void)
Disable Calibration Protection Channel 5.
Definition: adc1.h:3736
INLINE void ADC1_setCh17Insel(tADC1_CHINSELx e_value)
Set Channel 17 input selection.
Definition: adc1.h:2751
INLINE void ADC1_setSeq2Slot0(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1884
INLINE void ADC1_disCalibCh15(void)
Disable Calibration Channel 15.
Definition: adc1.h:3498
void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_enTriggHwShadowTrans(void)
Enable Trigger Shadow Transfer Selection.
Definition: adc1.h:5989
INLINE uint8 ADC1_getCh7IntNodePtr(void)
Get Channel 7 Interrupt Node Pointer.
Definition: adc1.h:5626
INLINE void ADC1_clrCmp1UpThSts(void)
Clear Compare 1 Upper Threshold Status.
Definition: adc1.h:4812
INLINE void ADC1_disCmp0LoInt(void)
Disable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:5064
INLINE uint8 ADC1_getCmp3UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5806
INLINE uint8 ADC1_getSeq2Slot2(void)
Get Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1929
INLINE void ADC1_setSeq0CollSts(void)
Set Sequence 0 Collision Status.
Definition: adc1.h:2360
INLINE uint16 ADC1_getCalibGainAnaIn24(void)
Get Calibration Gain analog input 24.
Definition: adc1.h:6712
void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 1 Interrupt Node Pointer.
INLINE void ADC1_enCalibCh10(void)
Enable Calibration Channel 10.
Definition: adc1.h:3421
INLINE void ADC1_enCh19Int(void)
Enable Channel 19 Interrupt.
Definition: adc1.h:5435
INLINE void ADC1_setSeq3CollSts(void)
Set Sequence 3 Collision Status.
Definition: adc1.h:2381
INLINE void ADC1_setCh9Insel(tADC1_CHINSELx e_value)
Set Channel 9 input selection.
Definition: adc1.h:2679
void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 14 Interrupt Node Pointer.
@ ADC1_CHINSELx_P2_6
Definition: adc1.h:322
@ ADC1_CHINSELx_MON2_3V_25V
Definition: adc1.h:306
@ ADC1_CHINSELx_VDH_3V_25V
Definition: adc1.h:298
@ ADC1_CHINSELx_P2_0
Definition: adc1.h:314
@ ADC1_CHINSELx_VDDEXT
Definition: adc1.h:312
@ ADC1_CHINSELx_P2_4
Definition: adc1.h:320
@ ADC1_CHINSELx_VS_3V_25V
Definition: adc1.h:296
@ ADC1_CHINSELx_SH2
Definition: adc1.h:301
@ ADC1_CHINSELx_P2_7
Definition: adc1.h:317
@ ADC1_CHINSELx_REF_VOLT_1V2
Definition: adc1.h:311
@ ADC1_CHINSELx_SH3
Definition: adc1.h:302
@ ADC1_CHINSELx_SH1
Definition: adc1.h:300
@ ADC1_CHINSELx_MON3_3V_25V
Definition: adc1.h:308
@ ADC1_CHINSELx_VDH_3V_35V
Definition: adc1.h:299
@ ADC1_CHINSELx_MON1_3V_35V
Definition: adc1.h:304
@ ADC1_CHINSELx_MON1_3V_25V
Definition: adc1.h:303
@ ADC1_CHINSELx_CSA
Definition: adc1.h:313
@ ADC1_CHINSELx_P2_2
Definition: adc1.h:323
@ ADC1_CHINSELx_MON3_3V_35V
Definition: adc1.h:309
@ ADC1_CHINSELx_P2_5
Definition: adc1.h:321
@ ADC1_CHINSELx_VS_3V_35V
Definition: adc1.h:297
@ ADC1_CHINSELx_MON2_3V_35V
Definition: adc1.h:307
@ ADC1_CHINSELx_P2_3
Definition: adc1.h:319
@ ADC1_CHINSELx_P2_1
Definition: adc1.h:315
@ ADC1_Seq0Trig_Seq0Complete
Definition: adc1.h:236
@ ADC1_Seq0Trig_T12ZM
Definition: adc1.h:231
@ ADC1_Seq0Trig_T13PM
Definition: adc1.h:233
@ ADC1_Seq0Trig_T16CM
Definition: adc1.h:234
@ ADC1_Seq0Trig_HallCorrect
Definition: adc1.h:235
@ ADC1_Seq0Trig_T12PM
Definition: adc1.h:232
@ ADC1_Seq0Trig_SW
Definition: adc1.h:230
@ ADC1_Seq0Trig_Seq3Complete
Definition: adc1.h:237
@ ADC1_SQ3Trig_Seq3Complete
Definition: adc1.h:286
@ ADC1_SQ3Trig_SW
Definition: adc1.h:280
@ ADC1_SQ3Trig_T12CC72ACM
Definition: adc1.h:282
@ ADC1_SQ3Trig_T12C71BCM
Definition: adc1.h:283
@ ADC1_SQ3Trig_T12ZM
Definition: adc1.h:281
@ ADC1_SQ3Trig_T16PM
Definition: adc1.h:284
@ ADC1_SQ3Trig_Seq2Complete
Definition: adc1.h:287
@ ADC1_SQ3Trig_T15CM
Definition: adc1.h:285
@ ADC1_Seq2Trig_T12C70BCM
Definition: adc1.h:266
@ ADC1_Seq2Trig_T12CC71ACM
Definition: adc1.h:265
@ ADC1_Seq2Trig_T12ZM
Definition: adc1.h:264
@ ADC1_Seq2Trig_T15PM
Definition: adc1.h:267
@ ADC1_Seq2Trig_GPT2
Definition: adc1.h:269
@ ADC1_Seq2Trig_Seq2Complete
Definition: adc1.h:270
@ ADC1_Seq2Trig_SW
Definition: adc1.h:263
@ ADC1_Seq2Trig_T14CM
Definition: adc1.h:268
@ ADC1_Seq2Trig_Seq1Complete
Definition: adc1.h:271
@ ADC1_Seq1Trig_T12ZM
Definition: adc1.h:247
@ ADC1_Seq1Trig_Seq0Complete
Definition: adc1.h:254
@ ADC1_Seq1Trig_T14PM
Definition: adc1.h:250
@ ADC1_Seq1Trig_SW
Definition: adc1.h:246
@ ADC1_Seq1Trig_GPT1
Definition: adc1.h:252
@ ADC1_Seq1Trig_T12CC70ACM
Definition: adc1.h:248
@ ADC1_Seq1Trig_Seq1Complete
Definition: adc1.h:253
@ ADC1_Seq1Trig_T13CM
Definition: adc1.h:251
@ ADC1_Seq1Trig_T12C72BCM
Definition: adc1.h:249
#define ARVG
Definition: tle989x.h:24057
#define ADC1
Definition: tle989x.h:24055
__attribute__((noreturn))
Definition: startup_tle989x.c:193
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Compare Channel 0 Control Register.
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Sequence Configuration Register.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:151
uint8_t uint8
8 bit unsigned value
Definition: types.h:204
int8_t sint8
8 bit signed value
Definition: types.h:209
uint16_t uint16
16 bit unsigned value
Definition: types.h:205
uint32_t uint32
32 bit unsigned value
Definition: types.h:206
Definition: adc1.h:368
uint32 CMPSEL
Definition: adc1.h:377
uint32 CLASSEL
Definition: adc1.h:378
uint32 INSEL
Definition: adc1.h:372
uint32 FILSEL
Definition: adc1.h:376
uint32 reg
Definition: adc1.h:369
struct ADC1_CHCFGx::@2 bit
uint32 CHREP
Definition: adc1.h:374
Definition: adc1.h:406
uint32 LOWER
Definition: adc1.h:410
uint32 HYST_LO
Definition: adc1.h:413
uint32 RST_BLANK_TIME
Definition: adc1.h:417
uint32 BLANK_TIME
Definition: adc1.h:416
uint32 MODE
Definition: adc1.h:419
struct ADC1_CMPCFGx::@4 bit
uint32 INP_SEL
Definition: adc1.h:411
uint32 reg
Definition: adc1.h:407
uint32 HYST_UP
Definition: adc1.h:418
uint32 UPPER
Definition: adc1.h:415
Definition: adc1.h:386
uint32 STC
Definition: adc1.h:392
uint32 SESP
Definition: adc1.h:393
uint32 BWD
Definition: adc1.h:397
uint32 TCONF
Definition: adc1.h:390
uint32 PCAL
Definition: adc1.h:396
uint32 OVERS
Definition: adc1.h:391
struct ADC1_CONVCFGx::@3 bit
uint32 BWD_HI_CUR
Definition: adc1.h:398
uint32 MSBD
Definition: adc1.h:395
uint32 reg
Definition: adc1.h:387
Definition: adc1.h:330
uint32 TRGSEL
Definition: adc1.h:339
struct ADC1_SQCFGx::@0 bit
uint32 GTSW
Definition: adc1.h:342
uint32 GTSEL
Definition: adc1.h:340
uint32 WFRCFG
Definition: adc1.h:338
uint32 COLLCFG
Definition: adc1.h:337
uint32 SLOTS
Definition: adc1.h:334
uint32 TRGSW
Definition: adc1.h:341
uint32 reg
Definition: adc1.h:331
uint32 SQREP
Definition: adc1.h:336
Definition: adc1.h:350
uint32 CHSEL3
Definition: adc1.h:360
uint32 CHSEL2
Definition: adc1.h:358
uint32 CHSEL0
Definition: adc1.h:354
struct ADC1_SQSLOTx::@1 bit
uint32 CHSEL1
Definition: adc1.h:356
uint32 reg
Definition: adc1.h:351