Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
Data Fields
GPT12_Type Struct Reference

Detailed Description

GPT12 (GPT12)

#include <tle989x.h>

Data Fields

union {
   __IM uint32_t   reg
 
   struct {
      __IM uint32_t   MOD_REV: 8
 
      __IM uint32_t   MOD_TYPE: 8
 
      uint32_t   __pad0__: 16
 
   }   bit
 
ID
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   IST2IN: 1
 
      __IOM uint32_t   IST2EUD: 1
 
      __IOM uint32_t   IST3IN: 2
 
      __IOM uint32_t   IST3EUD: 2
 
      __IOM uint32_t   IST4IN: 2
 
      __IOM uint32_t   IST4EUD: 2
 
      __IOM uint32_t   IST5IN: 1
 
      __IOM uint32_t   IST5EUD: 1
 
      __IOM uint32_t   IST6IN: 1
 
      __IOM uint32_t   IST6EUD: 1
 
      __IOM uint32_t   ISCAPIN: 2
 
      uint32_t   __pad0__: 16
 
   }   bit
 
PISEL
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T2I: 3
 
      __IOM uint32_t   T2M: 3
 
      __IOM uint32_t   T2R: 1
 
      __IOM uint32_t   T2UD: 1
 
      __IOM uint32_t   T2UDE: 1
 
      __IOM uint32_t   T2RC: 1
 
      uint32_t   __pad0__: 2
 
      __IOM uint32_t   T2IRIDIS: 1
 
      __IOM uint32_t   T2EDGE: 1
 
      __IOM uint32_t   T2CHDIR: 1
 
      __IM uint32_t   T2DIR: 1
 
      uint32_t   __pad1__: 16
 
   }   bit
 
T2CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T3I: 3
 
      __IOM uint32_t   T3M: 3
 
      __IOM uint32_t   T3R: 1
 
      __IOM uint32_t   T3UD: 1
 
      __IOM uint32_t   T3UDE: 1
 
      __IOM uint32_t   T3OE: 1
 
      __IOM uint32_t   T3OTL: 1
 
      __IOM uint32_t   BPS1: 2
 
      __IOM uint32_t   T3EDGE: 1
 
      __IOM uint32_t   T3CHDIR: 1
 
      __IM uint32_t   T3DIR: 1
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T3CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T4I: 3
 
      __IOM uint32_t   T4M: 3
 
      __IOM uint32_t   T4R: 1
 
      __IOM uint32_t   T4UD: 1
 
      __IOM uint32_t   T4UDE: 1
 
      __IOM uint32_t   T4RC: 1
 
      __IOM uint32_t   CLRT2EN: 1
 
      __IOM uint32_t   CLRT3EN: 1
 
      __IOM uint32_t   T4IRDIS: 1
 
      __IOM uint32_t   T4EDGE: 1
 
      __IOM uint32_t   T4CHDIR: 1
 
      __IM uint32_t   T4RDIR: 1
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T4CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T5I: 3
 
      __IOM uint32_t   T5M: 2
 
      uint32_t   __pad0__: 1
 
      __IOM uint32_t   T5R: 1
 
      __IOM uint32_t   T5UD: 1
 
      __IOM uint32_t   T5UDE: 1
 
      __IOM uint32_t   T5RC: 1
 
      __IOM uint32_t   CT3: 1
 
      uint32_t   __pad1__: 1
 
      __IOM uint32_t   CI: 2
 
      __IOM uint32_t   T5CLR: 1
 
      __IOM uint32_t   T5SC: 1
 
      uint32_t   __pad2__: 16
 
   }   bit
 
T5CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T6I: 3
 
      __IOM uint32_t   T6M: 3
 
      __IOM uint32_t   T6R: 1
 
      __IOM uint32_t   T6UD: 1
 
      __IOM uint32_t   T6UDE: 1
 
      __IOM uint32_t   T6OE: 1
 
      __IOM uint32_t   T6OTL: 1
 
      __IOM uint32_t   BPS2: 2
 
      uint32_t   __pad0__: 1
 
      __IOM uint32_t   T6CLR: 1
 
      __IOM uint32_t   T6SR: 1
 
      uint32_t   __pad1__: 16
 
   }   bit
 
T6CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   CAPREL: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
CAPREL
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T2: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T2
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T3: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T3
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T4: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T4
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T5: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T5
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T6: 16
 
      uint32_t   __pad0__: 16
 
   }   bit
 
T6
 

Field Documentation

◆ __pad0__

uint32_t __pad0__

◆ __pad1__

uint32_t __pad1__

◆ __pad2__

uint32_t __pad2__

◆  [1/13]

struct { ... } bit

◆  [2/13]

struct { ... } bit

◆  [3/13]

struct { ... } bit

◆  [4/13]

struct { ... } bit

◆  [5/13]

struct { ... } bit

◆  [6/13]

struct { ... } bit

◆  [7/13]

struct { ... } bit

◆  [8/13]

struct { ... } bit

◆  [9/13]

struct { ... } bit

◆  [10/13]

struct { ... } bit

◆  [11/13]

struct { ... } bit

◆  [12/13]

struct { ... } bit

◆  [13/13]

struct { ... } bit

◆ BPS1

__IOM uint32_t BPS1

[12..11] GPT1 Block Prescaler Control

◆ BPS2

__IOM uint32_t BPS2

[12..11] GPT2 Block Prescaler Control

◆ CAPREL [1/2]

__IOM uint32_t CAPREL

[15..0] Current reload value or Captured value

◆  [2/2]

union { ... } CAPREL

◆ CI

__IOM uint32_t CI

[13..12] Register CAPREL Capture Trigger Selection

◆ CLRT2EN

__IOM uint32_t CLRT2EN

[10..10] Clear Timer T2 Enable

◆ CLRT3EN

__IOM uint32_t CLRT3EN

[11..11] Clear Timer T3 Enable

◆ CT3

__IOM uint32_t CT3

[10..10] Timer T3 Capture Trigger Enable

◆ 

union { ... } ID

◆ ISCAPIN

__IOM uint32_t ISCAPIN

[15..14] Input Select for CAPIN

◆ IST2EUD

__IOM uint32_t IST2EUD

[1..1] Input Select for T2EUD

◆ IST2IN

__IOM uint32_t IST2IN

[0..0] Input Select for T2IN

◆ IST3EUD

__IOM uint32_t IST3EUD

[5..4] Input Select for T3EUD

◆ IST3IN

__IOM uint32_t IST3IN

[3..2] Input Select for T3IN

◆ IST4EUD

__IOM uint32_t IST4EUD

[9..8] Input Select for TEUD

◆ IST4IN

__IOM uint32_t IST4IN

[7..6] Input Select for T4IN

◆ IST5EUD

__IOM uint32_t IST5EUD

[11..11] Input Select for T5EUD

◆ IST5IN

__IOM uint32_t IST5IN

[10..10] Input Select for T5IN

◆ IST6EUD

__IOM uint32_t IST6EUD

[13..13] Input Select for T6EUD

◆ IST6IN

__IOM uint32_t IST6IN

[12..12] Input Select for T6IN

◆ MOD_REV

__IM uint32_t MOD_REV

[7..0] Module Revision Number

◆ MOD_TYPE

__IM uint32_t MOD_TYPE

[15..8] Module Identification Number

◆ 

union { ... } PISEL

◆ reg [1/2]

__IM uint32_t reg

(@ 0x00000000) Module Identification Register

◆ reg [2/2]

__IOM uint32_t reg

(@ 0x00000004) Port Input Select Register

(@ 0x00000008) Timer T2 Control Register

(@ 0x0000000C) Timer T3 Control Register

(@ 0x00000010) Timer T4 Control Register

(@ 0x00000014) Timer T5 Control Register

(@ 0x00000018) Timer T6 Control Register

(@ 0x0000001C) Capture/Reload Register

(@ 0x00000020) Timer T2 Count Register

(@ 0x00000024) Timer T3 Count Register

(@ 0x00000028) Timer T4 Count Register

(@ 0x0000002C) Timer 5 Count Register

(@ 0x00000030) Timer 6 Count Register

◆ T2 [1/2]

__IOM uint32_t T2

[15..0] Timer T2 Current Value

◆  [2/2]

union { ... } T2

◆ T2CHDIR

__IOM uint32_t T2CHDIR

[14..14] Timer T2 Count Direction Change

◆ 

union { ... } T2CON

◆ T2DIR

__IM uint32_t T2DIR

[15..15] Timer T2 Rotation Direction

◆ T2EDGE

__IOM uint32_t T2EDGE

[13..13] Timer T2 Edge Detection

◆ T2I

__IOM uint32_t T2I

[2..0] Timer T2 Input Parameter Selection

◆ T2IRIDIS

__IOM uint32_t T2IRIDIS

[12..12] Timer T2 Interrupt Disable

◆ T2M

__IOM uint32_t T2M

[5..3] Timer T2 Input Mode Control

◆ T2R

__IOM uint32_t T2R

[6..6] Timer T2 Input Run Bit

◆ T2RC

__IOM uint32_t T2RC

[9..9] Timer T2 Remote Control

◆ T2UD

__IOM uint32_t T2UD

[7..7] Timer T2 Up/Down Control

◆ T2UDE

__IOM uint32_t T2UDE

[8..8] Timer T2 External Up/Down Enable

◆ T3 [1/2]

__IOM uint32_t T3

[15..0] Timer T3 Current Value

◆  [2/2]

union { ... } T3

◆ T3CHDIR

__IOM uint32_t T3CHDIR

[14..14] Timer T3 Count Direction Change Flag

◆ 

union { ... } T3CON

◆ T3DIR

__IM uint32_t T3DIR

[15..15] Timer T3 Rotation Direction Flag

◆ T3EDGE

__IOM uint32_t T3EDGE

[13..13] Timer T3 Edge Detection Flag

◆ T3I

__IOM uint32_t T3I

[2..0] Timer T3 Input Parameter Selection

◆ T3M

__IOM uint32_t T3M

[5..3] Timer T3 Input Mode Control

◆ T3OE

__IOM uint32_t T3OE

[9..9] Overflow/Underflow Output Enable

◆ T3OTL

__IOM uint32_t T3OTL

[10..10] Timer T3 Overflow Toggle Latch

◆ T3R

__IOM uint32_t T3R

[6..6] Timer T3 Input Run Bit

◆ T3UD

__IOM uint32_t T3UD

[7..7] Timer T3 Up/Down Control

◆ T3UDE

__IOM uint32_t T3UDE

[8..8] Timer T3 External Up/Down Enable

◆ T4 [1/2]

__IOM uint32_t T4

[15..0] Timer T4 Current Value

◆  [2/2]

union { ... } T4

◆ T4CHDIR

__IOM uint32_t T4CHDIR

[14..14] Timer T4 Count Direction Change

◆ 

union { ... } T4CON

◆ T4EDGE

__IOM uint32_t T4EDGE

[13..13] Timer T4 Edge Direction

◆ T4I

__IOM uint32_t T4I

[2..0] Timer T4 Input Parameter Selection

◆ T4IRDIS

__IOM uint32_t T4IRDIS

[12..12] Timer T4 Interrupt Disable

◆ T4M

__IOM uint32_t T4M

[5..3] Timer T4 Mode Control (Basic Operating Mode)

◆ T4R

__IOM uint32_t T4R

[6..6] Timer T4 Input Run Bit

◆ T4RC

__IOM uint32_t T4RC

[9..9] Timer T4 Remote Control

◆ T4RDIR

__IM uint32_t T4RDIR

[15..15] Timer T4 Rotation Direction

◆ T4UD

__IOM uint32_t T4UD

[7..7] Timer T4 Up/Down Control

◆ T4UDE

__IOM uint32_t T4UDE

[8..8] Timer T4 External Up/Down Enable

◆ T5 [1/2]

__IOM uint32_t T5

[15..0] Timer T5 Current Value

◆  [2/2]

union { ... } T5

◆ T5CLR

__IOM uint32_t T5CLR

[14..14] Timer T5 Clear Enable Bit

◆ 

union { ... } T5CON

◆ T5I

__IOM uint32_t T5I

[2..0] Timer T5 Input Parameter Selection

◆ T5M

__IOM uint32_t T5M

[4..3] Timer T5 Input Mode Control

◆ T5R

__IOM uint32_t T5R

[6..6] Timer T5 Run Bit

◆ T5RC

__IOM uint32_t T5RC

[9..9] Timer T5 Remote Control

◆ T5SC

__IOM uint32_t T5SC

[15..15] Timer T5 Capture Mode Enable

◆ T5UD

__IOM uint32_t T5UD

[7..7] Timer T5 Up/Down Control

◆ T5UDE

__IOM uint32_t T5UDE

[8..8] Timer T5 External Up/Down Enable

◆ T6 [1/2]

__IOM uint32_t T6

[15..0] Timer T6 Current Value

◆  [2/2]

union { ... } T6

◆ T6CLR

__IOM uint32_t T6CLR

[14..14] Timer T6 Clear Enable Bit

◆ 

union { ... } T6CON

◆ T6I

__IOM uint32_t T6I

[2..0] Timer T6 Input Parameter Selection

◆ T6M

__IOM uint32_t T6M

[5..3] Timer T6 Mode Control

◆ T6OE

__IOM uint32_t T6OE

[9..9] Overflow/Underflow Output Enable

◆ T6OTL

__IOM uint32_t T6OTL

[10..10] Timer T6 Overflow Toggle Latch

◆ T6R

__IOM uint32_t T6R

[6..6] Timer T6 Input Run Bit

◆ T6SR

__IOM uint32_t T6SR

[15..15] Timer T6 Reload Mode Enable

◆ T6UD

__IOM uint32_t T6UD

[7..7] Timer T6 Up/Down Control

◆ T6UDE

__IOM uint32_t T6UDE

[8..8] Timer T6 External Up/Down Enable


The documentation for this struct was generated from the following file: