Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
adc2.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
26 /*******************************************************************************
27 ** Author(s) Identity **
28 ********************************************************************************
29 ** **
30 ** Initials Name **
31 ** ---------------------------------------------------------------------------**
32 ** JO Julia Ott **
33 ** BG Blandine Guillot **
34 ** DM Daniel Mysliwitz **
35 *******************************************************************************/
36 
37 /*******************************************************************************
38 ** Revision Control History **
39 ********************************************************************************
40 ** V0.1.0: 2019-10-28, DM: Initial version **
41 ** V0.2.0: 2020-04-28, BG: Updated revision history format **
42 ** V0.3.0: 2020-09-04, BG: Added first functions **
43 ** V0.3.1: 2020-10-02, BG: Removed ADC2_setEndOfConvFailIntSts **
44 ** V0.3.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
45 ** V0.3.3: 2020-10-16, JO: EP-523: Updated parameter names **
46 ** V0.3.4: 2020-10-23, BG: EP-539: Considered the enable checkbox in CW in **
47 ** the initialization function **
48 ** V0.3.5: 2020-10-23, BG: Corrected check of return value in **
49 ** ADC2_getChResult_mV and ADC2_getChFiltResult_mV **
50 ** V0.3.6: 2020-10-27, BG: EP-560: Enabled VAREF in the initialization **
51 ** EP-560: Renamed split compare low/up bits **
52 ** V0.3.7: 2020-11-04, JO: EP-556: Removed functions that are related to **
53 ** ADC EOC Fail Interrupt **
54 ** V0.3.8: 2020-11-11, BG: EP-581: Declared variable i outside of for loop **
55 ** V0.3.9: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
56 ** avoid doxygen warning **
57 ** Added end of group for doxygen **
58 ** V0.4.0: 2020-11-16, BG: EP-597: Corrected reference voltage value **
59 ** EP-597: Removed enabling of VAREF since VREF1V2 **
60 ** is used as reference voltage for ADC2 **
61 ** V0.4.1: 2020-11-18, DM: EP-579: Filtout value fixed for postprocessing **
62 ** V0.4.2: 2020-11-20, BG: EP-610: Corrected MISRA 2012 errors **
63 ** The following rules are globally deactivated: **
64 ** - Info 774: Boolean within 'if' always evaluates **
65 ** to False/True **
66 ** V0.4.3: 2020-12-03, JO: EP-610: Fixed ARMCC v6 compiler warnings **
67 ** V0.4.4: 2020-12-18, BG: EP-652: Corrected name of error code variable **
68 ** V0.4.5: 2021-01-07, BG: EP-668: Corrected attenuator order in **
69 ** cu16_ADC2_analogInput_Att **
70 ** V0.4.6: 2021-02-10, JO: EP-696: Changed from anonymous to named typedefs **
71 ** to prevent MISRA warning **
72 ** V0.4.7: 2021-04-06, BG: EP-760: Replaced if instructions to check if the **
73 ** module is enabled with preprocessor directives to**
74 ** avoid compiler warnings **
75 ** V0.4.8: 2021-04-23, JO: EP-778: Corrected functions ADC2_startSequence, **
76 ** ADC2_getEndOfConvSts, ADC2_getSeqResult, **
77 ** ADC2_getSeqResult_mV **
78 ** V0.4.9: 2021-04-29, BG: EP-778: Corrected the number of seq. channels **
79 ** V0.5.0: 2021-07-07, NI: EP-773: Added missing else in param range check **
80 ** in ADC2_getChResult_mV, ADC2_getSeqResult, **
81 ** ADC2_getSeqResult_mV **
82 ** V0.5.1: 2021-07-08, JO: EP-873: Replaced __NOP by CMSIS_NOP **
83 ** V0.5.2: 2021-08-06, BG: EP-695: Removed the check of the VALID bit in **
84 ** ADC2_getChResult() **
85 ** Updated documentation for ADC2_getChResult() and **
86 ** ADC2_getChResult_mV() **
87 ** V0.5.3: 2021-11-12, JO: EP-937: Updated copyright and branding **
88 ** V0.5.4: 2021-12-13, BG: EP-980: Removed initialization of **
89 ** written-protected registers in ADC2_init() **
90 ** V0.5.5: 2022-04-25, JO: EP-1139: corrected MISRA violations **
91 ** V0.5.6: 2022-06-23, JO: EP-1150: Removed ARMCC V6.18 warnings **
92 ** V0.5.7: 2022-08-29, JO: EP-1244: Removed sequence running check from **
93 ** ADC2_startSequence **
94 ** V0.5.8: 2024-11-05, JO: EP-1494: Updated license **
95 *******************************************************************************/
96 
97 #ifndef _ADC2_H
98 #define _ADC2_H
99 
100 /*******************************************************************************
101 ** Includes **
102 *******************************************************************************/
103 
104 #include "types.h"
105 #include "tle989x.h"
106 #include "tle_variants.h"
107 #include "adc2_defines.h"
108 
109 /*******************************************************************************
110 ** Global Constant Declarations **
111 *******************************************************************************/
112 
113 /*******************************************************************************
114 ** Global Macro Declarations **
115 *******************************************************************************/
116 
118 #define ADC2_DCH_CNT (15u)
119 
121 #define ADC2_AI_CNT (15u)
122 
124 #define ADC2_FILT_CNT (8u)
125 
127 #define ADC2_SEQ_CNT (4u)
128 
130 #define ADC2_SLOT_CNT (4u)
131 
133 #define ADC2_FILT_CH_DIS (4u)
134 
136 #define ADC2_ALL_DCH_MSK (0xfffffu)
137 
139 #define ADC2_ALL_SQSTS_MSK (0xfffu)
140 
142 #define ADC2_ALL_FILTSTS_MSK (0xfu)
143 
145 #define ADC2_ALL_CMPSTS_MSK (0xff00ffu)
146 
148 #define ADC2_VAREF_mV (1211u)
149 
151 #define ADC2_MAX_RESOLUTION (0xfffu)
152 
154 #define ADC2_ATT_TYPE0 (12u)
155 
157 #define ADC2_ATT_TYPE1 (10u)
158 
160 #define ADC2_ATT_TYPE2 (6u)
161 
163 #define ADC2_ATT_TYPE3 (38u)
164 
166 #define ADC2_ATT_TYPE4 (58u)
167 
169 #define ADC2_ATT_DENOM (256u)
170 
172 #define ADC2_DCH0 (0u)
174 #define ADC2_DCH1 (1u)
176 #define ADC2_DCH2 (2u)
178 #define ADC2_DCH3 (3u)
180 #define ADC2_DCH4 (4u)
182 #define ADC2_DCH5 (5u)
184 #define ADC2_DCH6 (6u)
186 #define ADC2_DCH7 (7u)
188 #define ADC2_DCH8 (8u)
190 #define ADC2_DCH9 (9u)
192 #define ADC2_DCH10 (10u)
194 #define ADC2_DCH11 (11u)
196 #define ADC2_DCH12 (12u)
198 #define ADC2_DCH13 (13u)
200 #define ADC2_DCH14 (14u)
201 
203 #define ADC2_SEQ0 (0u)
205 #define ADC2_SEQ1 (1u)
207 #define ADC2_SEQ2 (2u)
209 #define ADC2_SEQ3 (3u)
210 
212 #define ADC2_SEQ_SLOT0 (0u)
214 #define ADC2_SEQ_SLOT1 (1u)
216 #define ADC2_SEQ_SLOT2 (2u)
218 #define ADC2_SEQ_SLOT3 (3u)
219 
221 #define ADC2_SW_TRIGGER (0u)
222 
223 /*******************************************************************************
224 ** Global Type Declarations **
225 *******************************************************************************/
226 
227 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
228  #pragma clang diagnostic push
229  #pragma clang diagnostic ignored "-Wpadded"
230 #endif
231 
232 typedef union ADC2_CHCFGx
233 {
234  uint32_t reg;
236  struct
237  {
238  uint32_t : 8;
239  uint32_t CHREP : 4;
240  uint32_t : 4;
241  uint32_t FILSEL : 3;
242  uint32_t CMPSEL : 3;
243  uint32_t CLASSEL : 2;
244  } bit;
246 
247 typedef union ADC2_SQCFGx
248 {
249  uint32_t reg;
251  struct
252  {
253  uint32_t SLOTS : 3;
254  uint32_t : 1;
255  uint32_t SQREP : 2;
256  uint32_t : 2;
257  uint32_t TRGSEL : 2;
258  uint32_t : 4;
259  uint32_t TRGSW : 1;
260  } bit;
262 
263 typedef union ADC2_CONVCFGx
264 {
265  uint32_t reg;
267  struct
268  {
269  uint32_t : 1;
270  uint32_t STC : 4;
271  } bit;
273 
274 typedef union ADC2_CMPCFGx
275 {
276  uint32_t reg;
278  struct
279  {
280  uint32_t LOWER : 8;
281  uint32_t INP_SEL : 1;
282  uint32_t : 3;
283  uint32_t HYST_LO : 2;
284  uint32_t : 2;
285  uint32_t UPPER : 8;
286  uint32_t BLANK_TIME : 3;
287  uint32_t RST_BLANK_TIME : 1;
288  uint32_t HYST_UP : 2;
289  uint32_t MODE : 2;
290  } bit;
292 
293 typedef union ADC2_SQSLOTx
294 {
295  uint32_t reg;
297  struct
298  {
299  uint32_t CHSEL0 : 4;
300  uint32_t : 4;
301  uint32_t CHSEL1 : 4;
302  uint32_t : 4;
303  uint32_t CHSEL2 : 4;
304  uint32_t : 4;
305  uint32_t CHSEL3 : 4;
306  } bit;
308 
309 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
310  #pragma clang diagnostic pop
311 #endif
312 
313 /*******************************************************************************
314 ** Global Function Declarations **
315 *******************************************************************************/
316 
317 sint8 ADC2_init(void);
318 sint8 ADC2_getChResult(uint16 *u16p_digValue, uint8 u8_channel);
319 sint8 ADC2_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel);
320 sint8 ADC2_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel);
321 sint8 ADC2_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel);
322 sint8 ADC2_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx);
323 sint8 ADC2_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx);
324 sint8 ADC2_startSequence(uint8 u8_seqIdx);
325 uint8 ADC2_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx);
326 INLINE void ADC2_enPower(void);
327 INLINE void ADC2_disPower(void);
328 INLINE void ADC2_enSuspend(void);
329 INLINE void ADC2_disSuspend(void);
330 INLINE void ADC2_setSuspendMode(uint8 u8_susMode);
335 INLINE void ADC2_setSeq1Slot0(uint8 u8_value);
343 INLINE void ADC2_clrSeq0IntSts(void);
344 INLINE void ADC2_clrSeq1IntSts(void);
345 INLINE void ADC2_clrSeq2IntSts(void);
346 INLINE void ADC2_clrSeq3IntSts(void);
413 INLINE void ADC2_clrFilt0Sts(void);
414 INLINE void ADC2_clrFilt1Sts(void);
415 INLINE void ADC2_clrFilt2Sts(void);
416 INLINE void ADC2_clrFilt3Sts(void);
417 INLINE void ADC2_clrFilt4Sts(void);
418 INLINE void ADC2_clrFilt5Sts(void);
419 INLINE void ADC2_clrFilt6Sts(void);
420 INLINE void ADC2_clrFilt7Sts(void);
491 INLINE void ADC2_clrCmp0UpIntSts(void);
492 INLINE void ADC2_clrCmp1UpIntSts(void);
493 INLINE void ADC2_clrCmp2UpIntSts(void);
494 INLINE void ADC2_clrCmp3UpIntSts(void);
495 INLINE void ADC2_clrCmp4UpIntSts(void);
496 INLINE void ADC2_clrCmp5UpIntSts(void);
497 INLINE void ADC2_clrCmp6UpIntSts(void);
498 INLINE void ADC2_clrCmp7UpIntSts(void);
499 INLINE void ADC2_clrCmp0UpThSts(void);
500 INLINE void ADC2_clrCmp1UpThSts(void);
501 INLINE void ADC2_clrCmp2UpThSts(void);
502 INLINE void ADC2_clrCmp3UpThSts(void);
503 INLINE void ADC2_clrCmp4UpThSts(void);
504 INLINE void ADC2_clrCmp5UpThSts(void);
505 INLINE void ADC2_clrCmp6UpThSts(void);
506 INLINE void ADC2_clrCmp7UpThSts(void);
507 INLINE void ADC2_clrCmp0LoIntSts(void);
508 INLINE void ADC2_clrCmp1LoIntSts(void);
509 INLINE void ADC2_clrCmp2LoIntSts(void);
510 INLINE void ADC2_clrCmp3LoIntSts(void);
511 INLINE void ADC2_clrCmp4LoIntSts(void);
512 INLINE void ADC2_clrCmp5LoIntSts(void);
513 INLINE void ADC2_clrCmp6LoIntSts(void);
514 INLINE void ADC2_clrCmp7LoIntSts(void);
515 INLINE void ADC2_clrCmp0LoThSts(void);
516 INLINE void ADC2_clrCmp1LoThSts(void);
517 INLINE void ADC2_clrCmp2LoThSts(void);
518 INLINE void ADC2_clrCmp3LoThSts(void);
519 INLINE void ADC2_clrCmp4LoThSts(void);
520 INLINE void ADC2_clrCmp5LoThSts(void);
521 INLINE void ADC2_clrCmp6LoThSts(void);
522 INLINE void ADC2_clrCmp7LoThSts(void);
523 INLINE void ADC2_enCmp0UpInt(void);
524 INLINE void ADC2_disCmp0UpInt(void);
525 INLINE void ADC2_enCmp1UpInt(void);
526 INLINE void ADC2_disCmp1UpInt(void);
527 INLINE void ADC2_enCmp2UpInt(void);
528 INLINE void ADC2_disCmp2UpInt(void);
529 INLINE void ADC2_enCmp3UpInt(void);
530 INLINE void ADC2_disCmp3UpInt(void);
531 INLINE void ADC2_enCmp4UpInt(void);
532 INLINE void ADC2_disCmp4UpInt(void);
533 INLINE void ADC2_enCmp5UpInt(void);
534 INLINE void ADC2_disCmp5UpInt(void);
535 INLINE void ADC2_enCmp6UpInt(void);
536 INLINE void ADC2_disCmp6UpInt(void);
537 INLINE void ADC2_enCmp7UpInt(void);
538 INLINE void ADC2_disCmp7UpInt(void);
539 INLINE void ADC2_enCmp0LoInt(void);
540 INLINE void ADC2_disCmp0LoInt(void);
541 INLINE void ADC2_enCmp1LoInt(void);
542 INLINE void ADC2_disCmp1LoInt(void);
543 INLINE void ADC2_enCmp2LoInt(void);
544 INLINE void ADC2_disCmp2LoInt(void);
545 INLINE void ADC2_enCmp3LoInt(void);
546 INLINE void ADC2_disCmp3LoInt(void);
547 INLINE void ADC2_enCmp4LoInt(void);
548 INLINE void ADC2_disCmp4LoInt(void);
549 INLINE void ADC2_enCmp5LoInt(void);
550 INLINE void ADC2_disCmp5LoInt(void);
551 INLINE void ADC2_enCmp6LoInt(void);
552 INLINE void ADC2_disCmp6LoInt(void);
553 INLINE void ADC2_enCmp7LoInt(void);
554 INLINE void ADC2_disCmp7LoInt(void);
555 INLINE void ADC2_enSeq0Int(void);
556 INLINE void ADC2_disSeq0Int(void);
557 INLINE void ADC2_enSeq1Int(void);
558 INLINE void ADC2_disSeq1Int(void);
559 INLINE void ADC2_enSeq2Int(void);
560 INLINE void ADC2_disSeq2Int(void);
561 INLINE void ADC2_enSeq3Int(void);
562 INLINE void ADC2_disSeq3Int(void);
563 INLINE void ADC2_enCh0Int(void);
564 INLINE void ADC2_disCh0Int(void);
565 INLINE void ADC2_enCh1Int(void);
566 INLINE void ADC2_disCh1Int(void);
567 INLINE void ADC2_enCh2Int(void);
568 INLINE void ADC2_disCh2Int(void);
569 INLINE void ADC2_enCh3Int(void);
570 INLINE void ADC2_disCh3Int(void);
571 INLINE void ADC2_enCh4Int(void);
572 INLINE void ADC2_disCh4Int(void);
573 INLINE void ADC2_enCh5Int(void);
574 INLINE void ADC2_disCh5Int(void);
575 INLINE void ADC2_enCh6Int(void);
576 INLINE void ADC2_disCh6Int(void);
577 INLINE void ADC2_enCh7Int(void);
578 INLINE void ADC2_disCh7Int(void);
579 INLINE void ADC2_enCh8Int(void);
580 INLINE void ADC2_disCh8Int(void);
581 INLINE void ADC2_enCh9Int(void);
582 INLINE void ADC2_disCh9Int(void);
583 INLINE void ADC2_enCh10Int(void);
584 INLINE void ADC2_disCh10Int(void);
585 INLINE void ADC2_enCh11Int(void);
586 INLINE void ADC2_disCh11Int(void);
587 INLINE void ADC2_enCh12Int(void);
588 INLINE void ADC2_disCh12Int(void);
589 INLINE void ADC2_enCh13Int(void);
590 INLINE void ADC2_disCh13Int(void);
591 INLINE void ADC2_enCh14Int(void);
592 INLINE void ADC2_disCh14Int(void);
593 
594 /*******************************************************************************
595 ** Deprecated Function Declarations **
596 *******************************************************************************/
597 
601 void ADC2_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
602 
606 void ADC2_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
607 
611 void ADC2_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
612 
616 void ADC2_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
617 
621 void ADC2_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
622 
626 void ADC2_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
627 
631 void ADC2_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
632 
636 void ADC2_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
637 
641 void ADC2_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
642 
646 void ADC2_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
647 
651 void ADC2_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
652 
656 void ADC2_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
657 
661 void ADC2_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
662 
666 void ADC2_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
667 
671 void ADC2_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
672 
676 void ADC2_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
677 
681 void ADC2_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
682 
686 void ADC2_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
687 
691 void ADC2_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
692 
696 void ADC2_setCmp4LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
697 
701 void ADC2_setCmp5LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
702 
706 void ADC2_setCmp6LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
707 
711 void ADC2_setCmp7LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
712 
716 void ADC2_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
717 
721 void ADC2_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
722 
726 void ADC2_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
727 
731 void ADC2_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
732 
736 void ADC2_setCmp4UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
737 
741 void ADC2_setCmp5UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
742 
746 void ADC2_setCmp6UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
747 
751 void ADC2_setCmp7UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
752 
756 void ADC2_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
757 
761 void ADC2_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
762 
766 void ADC2_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
767 
771 void ADC2_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
772 
773 /*******************************************************************************
774 ** Global Inline Function Definitions **
775 *******************************************************************************/
776 
780 {
781  ADC2->GLOBCONF.bit.EN = 1u;
782 }
783 
787 {
788  ADC2->GLOBCONF.bit.EN = 0u;
789 }
790 
794 {
795  ADC2->SUSCTR.bit.SUSEN = 1u;
796 }
797 
801 {
802  ADC2->SUSCTR.bit.SUSEN = 0u;
803 }
804 
810 {
811  ADC2->SUSCTR.bit.SUSMOD = u8_susMode;
812 }
813 
819 {
820  return (uint8)ADC2->SUSCTR.bit.SUSMOD;
821 }
822 
828 {
829  return (uint8)ADC2->SUSSTAT.bit.STAT;
830 }
831 
837 {
838  ADC2->SQCFG0.reg = (uint32)e_value.reg;
839 }
840 
846 {
847  ADC2->SQCFG1.reg = (uint32)e_value.reg;
848 }
849 
855 {
856  ADC2->SQSLOT1.bit.CHSEL0 = e_value;
857 }
858 
864 {
865  ADC2->SQCFG2.reg = (uint32)e_value.reg;
866 }
867 
873 {
874  ADC2->SQCFG3.reg = (uint32)e_value.reg;
875 }
876 
882 {
883  return (uint8)ADC2->SQSTAT.bit.SQ0;
884 }
885 
891 {
892  return (uint8)ADC2->SQSTAT.bit.SQ1;
893 }
894 
900 {
901  return (uint8)ADC2->SQSTAT.bit.SQ2;
902 }
903 
909 {
910  return (uint8)ADC2->SQSTAT.bit.SQ3;
911 }
912 
918 {
919  return (uint8)ADC2->SQSTAT.bit.SQNUM;
920 }
921 
925 {
926  ADC2->SQSTATCLR.bit.SQ0CLR = 1u;
927 }
928 
932 {
933  ADC2->SQSTATCLR.bit.SQ1CLR = 1u;
934 }
935 
939 {
940  ADC2->SQSTATCLR.bit.SQ2CLR = 1u;
941 }
942 
946 {
947  ADC2->SQSTATCLR.bit.SQ3CLR = 1u;
948 }
949 
955 {
956  ADC2->CHCFG0.reg = (uint32)e_value.reg;
957 }
958 
964 {
965  ADC2->CHCFG1.reg = (uint32)e_value.reg;
966 }
967 
973 {
974  ADC2->CHCFG2.reg = (uint32)e_value.reg;
975 }
976 
982 {
983  ADC2->CHCFG3.reg = (uint32)e_value.reg;
984 }
985 
991 {
992  ADC2->CHCFG4.reg = (uint32)e_value.reg;
993 }
994 
1000 {
1001  ADC2->CHCFG5.reg = (uint32)e_value.reg;
1002 }
1003 
1009 {
1010  ADC2->CHCFG6.reg = (uint32)e_value.reg;
1011 }
1012 
1018 {
1019  ADC2->CHCFG7.reg = (uint32)e_value.reg;
1020 }
1021 
1027 {
1028  ADC2->CHCFG8.reg = (uint32)e_value.reg;
1029 }
1030 
1036 {
1037  ADC2->CHCFG9.reg = (uint32)e_value.reg;
1038 }
1039 
1045 {
1046  ADC2->CHCFG10.reg = (uint32)e_value.reg;
1047 }
1048 
1054 {
1055  ADC2->CHCFG11.reg = (uint32)e_value.reg;
1056 }
1057 
1063 {
1064  ADC2->CHCFG12.reg = (uint32)e_value.reg;
1065 }
1066 
1072 {
1073  ADC2->CHCFG13.reg = (uint32)e_value.reg;
1074 }
1075 
1081 {
1082  ADC2->CHCFG14.reg = (uint32)e_value.reg;
1083 }
1084 
1090 {
1091  return (uint8)ADC2->CHSTAT.bit.CH0;
1092 }
1093 
1099 {
1100  return (uint8)ADC2->CHSTAT.bit.CH1;
1101 }
1102 
1108 {
1109  return (uint8)ADC2->CHSTAT.bit.CH2;
1110 }
1111 
1117 {
1118  return (uint8)ADC2->CHSTAT.bit.CH3;
1119 }
1120 
1126 {
1127  return (uint8)ADC2->CHSTAT.bit.CH4;
1128 }
1129 
1135 {
1136  return (uint8)ADC2->CHSTAT.bit.CH5;
1137 }
1138 
1144 {
1145  return (uint8)ADC2->CHSTAT.bit.CH6;
1146 }
1147 
1153 {
1154  return (uint8)ADC2->CHSTAT.bit.CH7;
1155 }
1156 
1162 {
1163  return (uint8)ADC2->CHSTAT.bit.CH8;
1164 }
1165 
1171 {
1172  return (uint8)ADC2->CHSTAT.bit.CH9;
1173 }
1174 
1180 {
1181  return (uint8)ADC2->CHSTAT.bit.CH10;
1182 }
1183 
1189 {
1190  return (uint8)ADC2->CHSTAT.bit.CH11;
1191 }
1192 
1198 {
1199  return (uint8)ADC2->CHSTAT.bit.CH12;
1200 }
1201 
1207 {
1208  return (uint8)ADC2->CHSTAT.bit.CH13;
1209 }
1210 
1216 {
1217  return (uint8)ADC2->CHSTAT.bit.CH14;
1218 }
1219 
1225 {
1226  return (uint8)ADC2->CHSTAT.bit.CHNUM;
1227 }
1228 
1232 {
1233  ADC2->CHSTATCLR.bit.CH0CLR = 1u;
1234 }
1235 
1239 {
1240  ADC2->CHSTATCLR.bit.CH1CLR = 1u;
1241 }
1242 
1246 {
1247  ADC2->CHSTATCLR.bit.CH2CLR = 1u;
1248 }
1249 
1253 {
1254  ADC2->CHSTATCLR.bit.CH3CLR = 1u;
1255 }
1256 
1260 {
1261  ADC2->CHSTATCLR.bit.CH4CLR = 1u;
1262 }
1263 
1267 {
1268  ADC2->CHSTATCLR.bit.CH5CLR = 1u;
1269 }
1270 
1274 {
1275  ADC2->CHSTATCLR.bit.CH6CLR = 1u;
1276 }
1277 
1281 {
1282  ADC2->CHSTATCLR.bit.CH7CLR = 1u;
1283 }
1284 
1288 {
1289  ADC2->CHSTATCLR.bit.CH8CLR = 1u;
1290 }
1291 
1295 {
1296  ADC2->CHSTATCLR.bit.CH9CLR = 1u;
1297 }
1298 
1302 {
1303  ADC2->CHSTATCLR.bit.CH10CLR = 1u;
1304 }
1305 
1309 {
1310  ADC2->CHSTATCLR.bit.CH11CLR = 1u;
1311 }
1312 
1316 {
1317  ADC2->CHSTATCLR.bit.CH12CLR = 1u;
1318 }
1319 
1323 {
1324  ADC2->CHSTATCLR.bit.CH13CLR = 1u;
1325 }
1326 
1330 {
1331  ADC2->CHSTATCLR.bit.CH14CLR = 1u;
1332 }
1333 
1339 {
1340  ADC2->CONVCFG0.reg = (uint32)e_value.reg;
1341 }
1342 
1348 {
1349  ADC2->CONVCFG1.reg = (uint32)e_value.reg;
1350 }
1351 
1357 {
1358  ADC2->CONVCFG2.reg = (uint32)e_value.reg;
1359 }
1360 
1366 {
1367  ADC2->CONVCFG3.reg = (uint32)e_value.reg;
1368 }
1369 
1375 {
1376  return (uint16)ADC2->FIL0.bit.FILRESULT;
1377 }
1378 
1384 {
1385  return (uint16)ADC2->FIL1.bit.FILRESULT;
1386 }
1387 
1393 {
1394  return (uint16)ADC2->FIL2.bit.FILRESULT;
1395 }
1396 
1402 {
1403  return (uint16)ADC2->FIL3.bit.FILRESULT;
1404 }
1405 
1411 {
1412  return (uint16)ADC2->FIL4.bit.FILRESULT;
1413 }
1414 
1420 {
1421  return (uint16)ADC2->FIL5.bit.FILRESULT;
1422 }
1423 
1429 {
1430  return (uint16)ADC2->FIL6.bit.FILRESULT;
1431 }
1432 
1438 {
1439  return (uint16)ADC2->FIL7.bit.FILRESULT;
1440 }
1441 
1447 {
1448  return (uint8)ADC2->FILSTAT.bit.FIL0;
1449 }
1450 
1456 {
1457  return (uint8)ADC2->FILSTAT.bit.FIL1;
1458 }
1459 
1465 {
1466  return (uint8)ADC2->FILSTAT.bit.FIL2;
1467 }
1468 
1474 {
1475  return (uint8)ADC2->FILSTAT.bit.FIL3;
1476 }
1477 
1483 {
1484  return (uint8)ADC2->FILSTAT.bit.FIL4;
1485 }
1486 
1492 {
1493  return (uint8)ADC2->FILSTAT.bit.FIL5;
1494 }
1495 
1501 {
1502  return (uint8)ADC2->FILSTAT.bit.FIL6;
1503 }
1504 
1510 {
1511  return (uint8)ADC2->FILSTAT.bit.FIL7;
1512 }
1513 
1517 {
1518  ADC2->FILSTATCLR.bit.FIL0CLR = 1u;
1519 }
1520 
1524 {
1525  ADC2->FILSTATCLR.bit.FIL1CLR = 1u;
1526 }
1527 
1531 {
1532  ADC2->FILSTATCLR.bit.FIL2CLR = 1u;
1533 }
1534 
1538 {
1539  ADC2->FILSTATCLR.bit.FIL3CLR = 1u;
1540 }
1541 
1545 {
1546  ADC2->FILSTATCLR.bit.FIL4CLR = 1u;
1547 }
1548 
1552 {
1553  ADC2->FILSTATCLR.bit.FIL5CLR = 1u;
1554 }
1555 
1559 {
1560  ADC2->FILSTATCLR.bit.FIL6CLR = 1u;
1561 }
1562 
1566 {
1567  ADC2->FILSTATCLR.bit.FIL7CLR = 1u;
1568 }
1569 
1575 {
1576  return (uint16)ADC2->RES0.bit.RESULT;
1577 }
1578 
1584 {
1585  return (uint8)ADC2->RES0.bit.VALID;
1586 }
1587 
1593 {
1594  return (uint16)ADC2->RES1.bit.RESULT;
1595 }
1596 
1602 {
1603  return (uint8)ADC2->RES1.bit.VALID;
1604 }
1605 
1611 {
1612  return (uint16)ADC2->RES2.bit.RESULT;
1613 }
1614 
1620 {
1621  return (uint8)ADC2->RES2.bit.VALID;
1622 }
1623 
1629 {
1630  return (uint16)ADC2->RES3.bit.RESULT;
1631 }
1632 
1638 {
1639  return (uint8)ADC2->RES3.bit.VALID;
1640 }
1641 
1647 {
1648  return (uint16)ADC2->RES4.bit.RESULT;
1649 }
1650 
1656 {
1657  return (uint8)ADC2->RES4.bit.VALID;
1658 }
1659 
1665 {
1666  return (uint16)ADC2->RES5.bit.RESULT;
1667 }
1668 
1674 {
1675  return (uint8)ADC2->RES5.bit.VALID;
1676 }
1677 
1683 {
1684  return (uint16)ADC2->RES6.bit.RESULT;
1685 }
1686 
1692 {
1693  return (uint8)ADC2->RES6.bit.VALID;
1694 }
1695 
1701 {
1702  return (uint16)ADC2->RES7.bit.RESULT;
1703 }
1704 
1710 {
1711  return (uint8)ADC2->RES7.bit.VALID;
1712 }
1713 
1719 {
1720  return (uint16)ADC2->RES8.bit.RESULT;
1721 }
1722 
1728 {
1729  return (uint8)ADC2->RES8.bit.VALID;
1730 }
1731 
1737 {
1738  return (uint16)ADC2->RES9.bit.RESULT;
1739 }
1740 
1746 {
1747  return (uint8)ADC2->RES9.bit.VALID;
1748 }
1749 
1755 {
1756  return (uint16)ADC2->RES10.bit.RESULT;
1757 }
1758 
1764 {
1765  return (uint8)ADC2->RES10.bit.VALID;
1766 }
1767 
1773 {
1774  return (uint16)ADC2->RES11.bit.RESULT;
1775 }
1776 
1782 {
1783  return (uint8)ADC2->RES11.bit.VALID;
1784 }
1785 
1791 {
1792  return (uint16)ADC2->RES12.bit.RESULT;
1793 }
1794 
1800 {
1801  return (uint8)ADC2->RES12.bit.VALID;
1802 }
1803 
1809 {
1810  return (uint16)ADC2->RES13.bit.RESULT;
1811 }
1812 
1818 {
1819  return (uint8)ADC2->RES13.bit.VALID;
1820 }
1821 
1827 {
1828  return (uint16)ADC2->RES14.bit.RESULT;
1829 }
1830 
1836 {
1837  return (uint8)ADC2->RES14.bit.VALID;
1838 }
1839 
1845 {
1846  ADC2->CMPCFG0.reg = (uint32)e_value.reg;
1847 }
1848 
1854 {
1855  ADC2->CMPCFG1.reg = (uint32)e_value.reg;
1856 }
1857 
1863 {
1864  ADC2->CMPCFG2.reg = (uint32)e_value.reg;
1865 }
1866 
1872 {
1873  ADC2->CMPCFG3.reg = (uint32)e_value.reg;
1874 }
1875 
1881 {
1882  ADC2->CMPCFG4.reg = (uint32)e_value.reg;
1883 }
1884 
1890 {
1891  ADC2->CMPCFG5.reg = (uint32)e_value.reg;
1892 }
1893 
1899 {
1900  ADC2->CMPCFG6.reg = (uint32)e_value.reg;
1901 }
1902 
1908 {
1909  ADC2->CMPCFG7.reg = (uint32)e_value.reg;
1910 }
1911 
1917 {
1918  return (uint8)ADC2->CMPSTAT.bit.CMP_UP0_IS;
1919 }
1920 
1926 {
1927  return (uint8)ADC2->CMPSTAT.bit.CMP_UP1_IS;
1928 }
1929 
1935 {
1936  return (uint8)ADC2->CMPSTAT.bit.CMP_UP2_IS;
1937 }
1938 
1944 {
1945  return (uint8)ADC2->CMPSTAT.bit.CMP_UP3_IS;
1946 }
1947 
1953 {
1954  return (uint8)ADC2->CMPSTAT.bit.CMP_UP4_IS;
1955 }
1956 
1962 {
1963  return (uint8)ADC2->CMPSTAT.bit.CMP_UP5_IS;
1964 }
1965 
1971 {
1972  return (uint8)ADC2->CMPSTAT.bit.CMP_UP6_IS;
1973 }
1974 
1980 {
1981  return (uint8)ADC2->CMPSTAT.bit.CMP_UP7_IS;
1982 }
1983 
1989 {
1990  return (uint8)ADC2->CMPSTAT.bit.CMP_UP0_STS;
1991 }
1992 
1998 {
1999  return (uint8)ADC2->CMPSTAT.bit.CMP_UP1_STS;
2000 }
2001 
2007 {
2008  return (uint8)ADC2->CMPSTAT.bit.CMP_UP2_STS;
2009 }
2010 
2016 {
2017  return (uint8)ADC2->CMPSTAT.bit.CMP_UP3_STS;
2018 }
2019 
2025 {
2026  return (uint8)ADC2->CMPSTAT.bit.CMP_UP4_STS;
2027 }
2028 
2034 {
2035  return (uint8)ADC2->CMPSTAT.bit.CMP_UP5_STS;
2036 }
2037 
2043 {
2044  return (uint8)ADC2->CMPSTAT.bit.CMP_UP6_STS;
2045 }
2046 
2052 {
2053  return (uint8)ADC2->CMPSTAT.bit.CMP_UP7_STS;
2054 }
2055 
2061 {
2062  return (uint8)ADC2->CMPSTAT.bit.CMP_LO0_IS;
2063 }
2064 
2070 {
2071  return (uint8)ADC2->CMPSTAT.bit.CMP_LO1_IS;
2072 }
2073 
2079 {
2080  return (uint8)ADC2->CMPSTAT.bit.CMP_LO2_IS;
2081 }
2082 
2088 {
2089  return (uint8)ADC2->CMPSTAT.bit.CMP_LO3_IS;
2090 }
2091 
2097 {
2098  return (uint8)ADC2->CMPSTAT.bit.CMP_LO4_IS;
2099 }
2100 
2106 {
2107  return (uint8)ADC2->CMPSTAT.bit.CMP_LO5_IS;
2108 }
2109 
2115 {
2116  return (uint8)ADC2->CMPSTAT.bit.CMP_LO6_IS;
2117 }
2118 
2124 {
2125  return (uint8)ADC2->CMPSTAT.bit.CMP_LO7_IS;
2126 }
2127 
2133 {
2134  return (uint8)ADC2->CMPSTAT.bit.CMP_LO0_STS;
2135 }
2136 
2142 {
2143  return (uint8)ADC2->CMPSTAT.bit.CMP_LO1_STS;
2144 }
2145 
2151 {
2152  return (uint8)ADC2->CMPSTAT.bit.CMP_LO2_STS;
2153 }
2154 
2160 {
2161  return (uint8)ADC2->CMPSTAT.bit.CMP_LO3_STS;
2162 }
2163 
2169 {
2170  return (uint8)ADC2->CMPSTAT.bit.CMP_LO4_STS;
2171 }
2172 
2178 {
2179  return (uint8)ADC2->CMPSTAT.bit.CMP_LO5_STS;
2180 }
2181 
2187 {
2188  return (uint8)ADC2->CMPSTAT.bit.CMP_LO6_STS;
2189 }
2190 
2196 {
2197  return (uint8)ADC2->CMPSTAT.bit.CMP_LO7_STS;
2198 }
2199 
2203 {
2204  ADC2->CMPSTATCLR.bit.CMP_UP0_ISCLR = 1u;
2205 }
2206 
2210 {
2211  ADC2->CMPSTATCLR.bit.CMP_UP1_ISCLR = 1u;
2212 }
2213 
2217 {
2218  ADC2->CMPSTATCLR.bit.CMP_UP2_ISCLR = 1u;
2219 }
2220 
2224 {
2225  ADC2->CMPSTATCLR.bit.CMP_UP3_ISCLR = 1u;
2226 }
2227 
2231 {
2232  ADC2->CMPSTATCLR.bit.CMP_UP4_ISCLR = 1u;
2233 }
2234 
2238 {
2239  ADC2->CMPSTATCLR.bit.CMP_UP5_ISCLR = 1u;
2240 }
2241 
2245 {
2246  ADC2->CMPSTATCLR.bit.CMP_UP6_ISCLR = 1u;
2247 }
2248 
2252 {
2253  ADC2->CMPSTATCLR.bit.CMP_UP7_ISCLR = 1u;
2254 }
2255 
2259 {
2260  ADC2->CMPSTATCLR.bit.CMP_UP0_STSCLR = 1u;
2261 }
2262 
2266 {
2267  ADC2->CMPSTATCLR.bit.CMP_UP1_STSCLR = 1u;
2268 }
2269 
2273 {
2274  ADC2->CMPSTATCLR.bit.CMP_UP2_STSCLR = 1u;
2275 }
2276 
2280 {
2281  ADC2->CMPSTATCLR.bit.CMP_UP3_STSCLR = 1u;
2282 }
2283 
2287 {
2288  ADC2->CMPSTATCLR.bit.CMP_UP4_STSCLR = 1u;
2289 }
2290 
2294 {
2295  ADC2->CMPSTATCLR.bit.CMP_UP5_STSCLR = 1u;
2296 }
2297 
2301 {
2302  ADC2->CMPSTATCLR.bit.CMP_UP6_STSCLR = 1u;
2303 }
2304 
2308 {
2309  ADC2->CMPSTATCLR.bit.CMP_UP7_STSCLR = 1u;
2310 }
2311 
2315 {
2316  ADC2->CMPSTATCLR.bit.CMP_LO0_ISCLR = 1u;
2317 }
2318 
2322 {
2323  ADC2->CMPSTATCLR.bit.CMP_LO1_ISCLR = 1u;
2324 }
2325 
2329 {
2330  ADC2->CMPSTATCLR.bit.CMP_LO2_ISCLR = 1u;
2331 }
2332 
2336 {
2337  ADC2->CMPSTATCLR.bit.CMP_LO3_ISCLR = 1u;
2338 }
2339 
2343 {
2344  ADC2->CMPSTATCLR.bit.CMP_LO4_ISCLR = 1u;
2345 }
2346 
2350 {
2351  ADC2->CMPSTATCLR.bit.CMP_LO5_ISCLR = 1u;
2352 }
2353 
2357 {
2358  ADC2->CMPSTATCLR.bit.CMP_LO6_ISCLR = 1u;
2359 }
2360 
2364 {
2365  ADC2->CMPSTATCLR.bit.CMP_LO7_ISCLR = 1u;
2366 }
2367 
2371 {
2372  ADC2->CMPSTATCLR.bit.CMP_LO0_STSCLR = 1u;
2373 }
2374 
2378 {
2379  ADC2->CMPSTATCLR.bit.CMP_LO1_STSCLR = 1u;
2380 }
2381 
2385 {
2386  ADC2->CMPSTATCLR.bit.CMP_LO2_STSCLR = 1u;
2387 }
2388 
2392 {
2393  ADC2->CMPSTATCLR.bit.CMP_LO3_STSCLR = 1u;
2394 }
2395 
2399 {
2400  ADC2->CMPSTATCLR.bit.CMP_LO4_STSCLR = 1u;
2401 }
2402 
2406 {
2407  ADC2->CMPSTATCLR.bit.CMP_LO5_STSCLR = 1u;
2408 }
2409 
2413 {
2414  ADC2->CMPSTATCLR.bit.CMP_LO6_STSCLR = 1u;
2415 }
2416 
2420 {
2421  ADC2->CMPSTATCLR.bit.CMP_LO7_STSCLR = 1u;
2422 }
2423 
2427 {
2428  ADC2->IEN1.bit.IEN_UP0 = 1u;
2429 }
2430 
2434 {
2435  ADC2->IEN1.bit.IEN_UP0 = 0u;
2436 }
2437 
2441 {
2442  ADC2->IEN1.bit.IEN_UP1 = 1u;
2443 }
2444 
2448 {
2449  ADC2->IEN1.bit.IEN_UP1 = 0u;
2450 }
2451 
2455 {
2456  ADC2->IEN1.bit.IEN_UP2 = 1u;
2457 }
2458 
2462 {
2463  ADC2->IEN1.bit.IEN_UP2 = 0u;
2464 }
2465 
2469 {
2470  ADC2->IEN1.bit.IEN_UP3 = 1u;
2471 }
2472 
2476 {
2477  ADC2->IEN1.bit.IEN_UP3 = 0u;
2478 }
2479 
2483 {
2484  ADC2->IEN1.bit.IEN_UP4 = 1u;
2485 }
2486 
2490 {
2491  ADC2->IEN1.bit.IEN_UP4 = 0u;
2492 }
2493 
2497 {
2498  ADC2->IEN1.bit.IEN_UP5 = 1u;
2499 }
2500 
2504 {
2505  ADC2->IEN1.bit.IEN_UP5 = 0u;
2506 }
2507 
2511 {
2512  ADC2->IEN1.bit.IEN_UP6 = 1u;
2513 }
2514 
2518 {
2519  ADC2->IEN1.bit.IEN_UP6 = 0u;
2520 }
2521 
2525 {
2526  ADC2->IEN1.bit.IEN_UP7 = 1u;
2527 }
2528 
2532 {
2533  ADC2->IEN1.bit.IEN_UP7 = 0u;
2534 }
2535 
2539 {
2540  ADC2->IEN1.bit.IEN_LO0 = 1u;
2541 }
2542 
2546 {
2547  ADC2->IEN1.bit.IEN_LO0 = 0u;
2548 }
2549 
2553 {
2554  ADC2->IEN1.bit.IEN_LO1 = 1u;
2555 }
2556 
2560 {
2561  ADC2->IEN1.bit.IEN_LO1 = 0u;
2562 }
2563 
2567 {
2568  ADC2->IEN1.bit.IEN_LO2 = 1u;
2569 }
2570 
2574 {
2575  ADC2->IEN1.bit.IEN_LO2 = 0u;
2576 }
2577 
2581 {
2582  ADC2->IEN1.bit.IEN_LO3 = 1u;
2583 }
2584 
2588 {
2589  ADC2->IEN1.bit.IEN_LO3 = 0u;
2590 }
2591 
2595 {
2596  ADC2->IEN1.bit.IEN_LO4 = 1u;
2597 }
2598 
2602 {
2603  ADC2->IEN1.bit.IEN_LO4 = 0u;
2604 }
2605 
2609 {
2610  ADC2->IEN1.bit.IEN_LO5 = 1u;
2611 }
2612 
2616 {
2617  ADC2->IEN1.bit.IEN_LO5 = 0u;
2618 }
2619 
2623 {
2624  ADC2->IEN1.bit.IEN_LO6 = 1u;
2625 }
2626 
2630 {
2631  ADC2->IEN1.bit.IEN_LO6 = 0u;
2632 }
2633 
2637 {
2638  ADC2->IEN1.bit.IEN_LO7 = 1u;
2639 }
2640 
2644 {
2645  ADC2->IEN1.bit.IEN_LO7 = 0u;
2646 }
2647 
2651 {
2652  ADC2->IEN1.bit.IEN_SQ0 = 1u;
2653 }
2654 
2658 {
2659  ADC2->IEN1.bit.IEN_SQ0 = 0u;
2660 }
2661 
2665 {
2666  ADC2->IEN1.bit.IEN_SQ1 = 1u;
2667 }
2668 
2672 {
2673  ADC2->IEN1.bit.IEN_SQ1 = 0u;
2674 }
2675 
2679 {
2680  ADC2->IEN1.bit.IEN_SQ2 = 1u;
2681 }
2682 
2686 {
2687  ADC2->IEN1.bit.IEN_SQ2 = 0u;
2688 }
2689 
2693 {
2694  ADC2->IEN1.bit.IEN_SQ3 = 1u;
2695 }
2696 
2700 {
2701  ADC2->IEN1.bit.IEN_SQ3 = 0u;
2702 }
2703 
2707 {
2708  ADC2->IEN0.bit.IEN_CH0 = 1u;
2709 }
2710 
2714 {
2715  ADC2->IEN0.bit.IEN_CH0 = 0u;
2716 }
2717 
2721 {
2722  ADC2->IEN0.bit.IEN_CH1 = 1u;
2723 }
2724 
2728 {
2729  ADC2->IEN0.bit.IEN_CH1 = 0u;
2730 }
2731 
2735 {
2736  ADC2->IEN0.bit.IEN_CH2 = 1u;
2737 }
2738 
2742 {
2743  ADC2->IEN0.bit.IEN_CH2 = 0u;
2744 }
2745 
2749 {
2750  ADC2->IEN0.bit.IEN_CH3 = 1u;
2751 }
2752 
2756 {
2757  ADC2->IEN0.bit.IEN_CH3 = 0u;
2758 }
2759 
2763 {
2764  ADC2->IEN0.bit.IEN_CH4 = 1u;
2765 }
2766 
2770 {
2771  ADC2->IEN0.bit.IEN_CH4 = 0u;
2772 }
2773 
2777 {
2778  ADC2->IEN0.bit.IEN_CH5 = 1u;
2779 }
2780 
2784 {
2785  ADC2->IEN0.bit.IEN_CH5 = 0u;
2786 }
2787 
2791 {
2792  ADC2->IEN0.bit.IEN_CH6 = 1u;
2793 }
2794 
2798 {
2799  ADC2->IEN0.bit.IEN_CH6 = 0u;
2800 }
2801 
2805 {
2806  ADC2->IEN0.bit.IEN_CH7 = 1u;
2807 }
2808 
2812 {
2813  ADC2->IEN0.bit.IEN_CH7 = 0u;
2814 }
2815 
2819 {
2820  ADC2->IEN0.bit.IEN_CH8 = 1u;
2821 }
2822 
2826 {
2827  ADC2->IEN0.bit.IEN_CH8 = 0u;
2828 }
2829 
2833 {
2834  ADC2->IEN0.bit.IEN_CH9 = 1u;
2835 }
2836 
2840 {
2841  ADC2->IEN0.bit.IEN_CH9 = 0u;
2842 }
2843 
2847 {
2848  ADC2->IEN0.bit.IEN_CH10 = 1u;
2849 }
2850 
2854 {
2855  ADC2->IEN0.bit.IEN_CH10 = 0u;
2856 }
2857 
2861 {
2862  ADC2->IEN0.bit.IEN_CH11 = 1u;
2863 }
2864 
2868 {
2869  ADC2->IEN0.bit.IEN_CH11 = 0u;
2870 }
2871 
2875 {
2876  ADC2->IEN0.bit.IEN_CH12 = 1u;
2877 }
2878 
2882 {
2883  ADC2->IEN0.bit.IEN_CH12 = 0u;
2884 }
2885 
2889 {
2890  ADC2->IEN0.bit.IEN_CH13 = 1u;
2891 }
2892 
2896 {
2897  ADC2->IEN0.bit.IEN_CH13 = 0u;
2898 }
2899 
2903 {
2904  ADC2->IEN0.bit.IEN_CH14 = 1u;
2905 }
2906 
2910 {
2911  ADC2->IEN0.bit.IEN_CH14 = 0u;
2912 }
2913 
2916 #endif /* _ADC2_H */
sint8 ADC2_getChResult(uint16 *u16p_digValue, uint8 u8_channel)
Get the 12-bit value of the ADC2 Result Register of the selected ADC2 channel and returns the validit...
Definition: adc2.c:170
sint8 ADC2_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel)
Get the value of the ADC2 Result Register of the selected ADC2 channel in millivolt (mV) and returns ...
Definition: adc2.c:224
void ADC2_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC2_setCh0Config(tADC2_CHCFGx e_value)
Set Channel 0 configuration.
Definition: adc2.h:954
INLINE void ADC2_clrCmp6UpThSts(void)
Clear Compare 6 Upper Threshold Status.
Definition: adc2.h:2300
INLINE void ADC2_disCh6Int(void)
Disable Channel 6 Interrupt.
Definition: adc2.h:2797
INLINE void ADC2_clrCmp2LoThSts(void)
Clear Compare 2 Lower Threshold Status.
Definition: adc2.h:2384
INLINE void ADC2_setCh1Config(tADC2_CHCFGx e_value)
Set Channel 1 configuration.
Definition: adc2.h:963
sint8 ADC2_startSequence(uint8 u8_seqIdx)
Start the conversion of a sequence by software.
Definition: adc2.c:591
INLINE void ADC2_clrCmp5UpThSts(void)
Clear Compare 5 Upper Threshold Status.
Definition: adc2.h:2293
INLINE void ADC2_clrCmp3UpThSts(void)
Clear Compare 3 Upper Threshold Status.
Definition: adc2.h:2279
INLINE void ADC2_disCmp2UpInt(void)
Disable Compare 2 Upper Threshold Interrupt.
Definition: adc2.h:2461
INLINE uint8 ADC2_getCh10ResultValidSts(void)
Get Channel 10 Result Valid Status.
Definition: adc2.h:1763
INLINE uint8 ADC2_getCh5EndOfConvSts(void)
Get Channel 5 End Of Conversion Status.
Definition: adc2.h:1134
sint8 ADC2_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 12-bit value of the ADC2 Result Register of the selected slot in the sequencer and returns th...
Definition: adc2.c:388
INLINE void ADC2_disSeq0Int(void)
Disable Sequence 0 Interrupt.
Definition: adc2.h:2657
INLINE void ADC2_setCh4Config(tADC2_CHCFGx e_value)
Set Channel 4 configuration.
Definition: adc2.h:990
INLINE uint8 ADC2_getFilt5Sts(void)
Get Filter 5 Event Status.
Definition: adc2.h:1491
INLINE uint8 ADC2_getFilt7Sts(void)
Get Filter 7 Event Status.
Definition: adc2.h:1509
INLINE void ADC2_disCh7Int(void)
Disable Channel 7 Interrupt.
Definition: adc2.h:2811
INLINE void ADC2_clrCmp1UpThSts(void)
Clear Compare 1 Upper Threshold Status.
Definition: adc2.h:2265
INLINE uint8 ADC2_getCmp6UpIntSts(void)
Get Compare 6 Upper Threshold Interrupt Status.
Definition: adc2.h:1970
INLINE void ADC2_enCmp4UpInt(void)
Enable Compare 4 Upper Threshold Interrupt.
Definition: adc2.h:2482
INLINE void ADC2_clrCh4EndOfConvSts(void)
Clear Channel 4 End Of Conversion Status.
Definition: adc2.h:1259
INLINE void ADC2_clrCmp3LoIntSts(void)
Clear Compare 3 Lower Threshold Interrupt Status.
Definition: adc2.h:2335
INLINE uint8 ADC2_getCmp7LoThSts(void)
Get Compare 7 Lower Threshold Status.
Definition: adc2.h:2195
INLINE void ADC2_disCh11Int(void)
Disable Channel 11 Interrupt.
Definition: adc2.h:2867
INLINE void ADC2_enCh1Int(void)
Enable Channel 1 Interrupt.
Definition: adc2.h:2720
INLINE void ADC2_setCh12Config(tADC2_CHCFGx e_value)
Set Channel 12 configuration.
Definition: adc2.h:1062
INLINE uint16 ADC2_getCh10Result(void)
Get Channel 10 Result Value.
Definition: adc2.h:1754
INLINE uint8 ADC2_getCh2ResultValidSts(void)
Get Channel 2 Result Valid Status.
Definition: adc2.h:1619
INLINE void ADC2_clrFilt0Sts(void)
Clear Filter 0 Event Status.
Definition: adc2.h:1516
INLINE void ADC2_enCh7Int(void)
Enable Channel 7 Interrupt.
Definition: adc2.h:2804
INLINE void ADC2_enCh8Int(void)
Enable Channel 8 Interrupt.
Definition: adc2.h:2818
INLINE void ADC2_enCh2Int(void)
Enable Channel 2 Interrupt.
Definition: adc2.h:2734
INLINE uint16 ADC2_getCh12Result(void)
Get Channel 12 Result Value.
Definition: adc2.h:1790
INLINE void ADC2_clrCmp4LoThSts(void)
Clear Compare 4 Lower Threshold Status.
Definition: adc2.h:2398
INLINE uint8 ADC2_getCh12ResultValidSts(void)
Get Channel 12 Result Valid Status.
Definition: adc2.h:1799
INLINE void ADC2_clrCmp4LoIntSts(void)
Clear Compare 4 Lower Threshold Interrupt Status.
Definition: adc2.h:2342
INLINE void ADC2_clrFilt3Sts(void)
Clear Filter 3 Event Status.
Definition: adc2.h:1537
INLINE void ADC2_setCh2Config(tADC2_CHCFGx e_value)
Set Channel 2 configuration.
Definition: adc2.h:972
INLINE uint16 ADC2_getCh5Result(void)
Get Channel 5 Result Value.
Definition: adc2.h:1664
INLINE void ADC2_clrSeq1IntSts(void)
Clear Sequence 1 Interrupt Status.
Definition: adc2.h:931
INLINE uint8 ADC2_getCh7EndOfConvSts(void)
Get Channel 7 End Of Conversion Status.
Definition: adc2.h:1152
INLINE void ADC2_clrSeq3IntSts(void)
Clear Sequence 3 Interrupt Status.
Definition: adc2.h:945
INLINE uint8 ADC2_getCmp5LoThSts(void)
Get Compare 5 Lower Threshold Status.
Definition: adc2.h:2177
INLINE uint8 ADC2_getCmp1UpThSts(void)
Get Compare 1 Upper Threshold Status.
Definition: adc2.h:1997
INLINE uint8 ADC2_getCh3ResultValidSts(void)
Get Channel 3 Result Valid Status.
Definition: adc2.h:1637
INLINE uint16 ADC2_getCh4Result(void)
Get Channel 4 Result Value.
Definition: adc2.h:1646
void ADC2_setCmp7LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint16 ADC2_getFilt7Res(void)
Get Result Value Filter 7.
Definition: adc2.h:1437
void ADC2_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 7 Interrupt Node Pointer.
INLINE uint16 ADC2_getFilt2Res(void)
Get Result Value Filter 2.
Definition: adc2.h:1392
INLINE void ADC2_clrCh13EndOfConvSts(void)
Clear Channel 13 End Of Conversion Status.
Definition: adc2.h:1322
INLINE void ADC2_setSeq1Config(tADC2_SQCFGx e_value)
Set Sequence 1 configuration.
Definition: adc2.h:845
INLINE void ADC2_disCmp1UpInt(void)
Disable Compare 1 Upper Threshold Interrupt.
Definition: adc2.h:2447
INLINE void ADC2_disCmp6LoInt(void)
Disable Compare 6 Lower Threshold Interrupt.
Definition: adc2.h:2629
INLINE uint8 ADC2_getCmp4LoThSts(void)
Get Compare 4 Lower Threshold Status.
Definition: adc2.h:2168
INLINE void ADC2_enCh14Int(void)
Enable Channel 14 Interrupt.
Definition: adc2.h:2902
INLINE void ADC2_clrCmp6LoThSts(void)
Clear Compare 6 Lower Threshold Status.
Definition: adc2.h:2412
INLINE uint8 ADC2_getCh4EndOfConvSts(void)
Get Channel 4 End Of Conversion Status.
Definition: adc2.h:1125
INLINE void ADC2_clrFilt4Sts(void)
Clear Filter 4 Event Status.
Definition: adc2.h:1544
INLINE uint16 ADC2_getCh13Result(void)
Get Channel 13 Result Value.
Definition: adc2.h:1808
INLINE void ADC2_setCh10Config(tADC2_CHCFGx e_value)
Set Channel 10 configuration.
Definition: adc2.h:1044
INLINE uint8 ADC2_getCurrChannel(void)
Get current channel under conversion.
Definition: adc2.h:1224
INLINE uint8 ADC2_getFilt4Sts(void)
Get Filter 4 Event Status.
Definition: adc2.h:1482
INLINE void ADC2_setCh3Config(tADC2_CHCFGx e_value)
Set Channel 3 configuration.
Definition: adc2.h:981
void ADC2_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 14 Interrupt Node Pointer.
void ADC2_setCmp5LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
void ADC2_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC2_setCh6Config(tADC2_CHCFGx e_value)
Set Channel 6 configuration.
Definition: adc2.h:1008
INLINE void ADC2_clrCmp6UpIntSts(void)
Clear Compare 6 Upper Threshold Interrupt Status.
Definition: adc2.h:2244
INLINE void ADC2_disSeq2Int(void)
Disable Sequence 2 Interrupt.
Definition: adc2.h:2685
INLINE uint8 ADC2_getCh13ResultValidSts(void)
Get Channel 13 Result Valid Status.
Definition: adc2.h:1817
INLINE void ADC2_enCmp2LoInt(void)
Enable Compare 2 Lower Threshold Interrupt.
Definition: adc2.h:2566
void ADC2_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC2_enCh13Int(void)
Enable Channel 13 Interrupt.
Definition: adc2.h:2888
INLINE void ADC2_enCh0Int(void)
Enable Channel 0 Interrupt.
Definition: adc2.h:2706
INLINE void ADC2_disCmp0LoInt(void)
Disable Compare 0 Lower Threshold Interrupt.
Definition: adc2.h:2545
INLINE void ADC2_disCh10Int(void)
Disable Channel 10 Interrupt.
Definition: adc2.h:2853
uint8 ADC2_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx)
Get End-of-Convertion status for selected sequence and slot.
Definition: adc2.c:653
INLINE uint8 ADC2_getCmp7LoIntSts(void)
Get Compare 7 Lower Threshold Interrupt Status.
Definition: adc2.h:2123
INLINE uint8 ADC2_getCmp3UpIntSts(void)
Get Compare 3 Upper Threshold Interrupt Status.
Definition: adc2.h:1943
INLINE void ADC2_enCmp0LoInt(void)
Enable Compare 0 Lower Threshold Interrupt.
Definition: adc2.h:2538
INLINE void ADC2_clrCmp0UpIntSts(void)
Clear Compare 0 Upper Threshold Interrupt Status.
Definition: adc2.h:2202
void ADC2_setCmp6UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
void ADC2_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 11 Interrupt Node Pointer.
INLINE void ADC2_disCmp3UpInt(void)
Disable Compare 3 Upper Threshold Interrupt.
Definition: adc2.h:2475
INLINE uint8 ADC2_getCmp3LoIntSts(void)
Get Compare 3 Lower Threshold Interrupt Status.
Definition: adc2.h:2087
INLINE void ADC2_enCh11Int(void)
Enable Channel 11 Interrupt.
Definition: adc2.h:2860
INLINE uint8 ADC2_getCmp4UpThSts(void)
Get Compare 4 Upper Threshold Status.
Definition: adc2.h:2024
INLINE uint8 ADC2_getCh6EndOfConvSts(void)
Get Channel 6 End Of Conversion Status.
Definition: adc2.h:1143
INLINE uint8 ADC2_getCmp6LoThSts(void)
Get Compare 6 Lower Threshold Status.
Definition: adc2.h:2186
INLINE uint8 ADC2_getCmp2LoThSts(void)
Get Compare 2 Lower Threshold Status.
Definition: adc2.h:2150
INLINE void ADC2_clrCmp2UpIntSts(void)
Clear Compare 2 Upper Threshold Interrupt Status.
Definition: adc2.h:2216
INLINE void ADC2_clrCmp4UpIntSts(void)
Clear Compare 4 Upper Threshold Interrupt Status.
Definition: adc2.h:2230
void ADC2_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 12 Interrupt Node Pointer.
INLINE uint8 ADC2_getCh13EndOfConvSts(void)
Get Channel 13 End Of Conversion Status.
Definition: adc2.h:1206
union ADC2_SQCFGx tADC2_SQCFGx
INLINE uint8 ADC2_getCh8ResultValidSts(void)
Get Channel 8 Result Valid Status.
Definition: adc2.h:1727
void ADC2_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC2_enCmp3UpInt(void)
Enable Compare 3 Upper Threshold Interrupt.
Definition: adc2.h:2468
union ADC2_CONVCFGx tADC2_CONVCFGx
INLINE void ADC2_disCmp5UpInt(void)
Disable Compare 5 Upper Threshold Interrupt.
Definition: adc2.h:2503
INLINE void ADC2_setCmp7Config(tADC2_CMPCFGx e_value)
Set Compare Channel 7 configuration.
Definition: adc2.h:1907
INLINE uint8 ADC2_getCh1EndOfConvSts(void)
Get Channel 1 End Of Conversion Status.
Definition: adc2.h:1098
void ADC2_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 9 Interrupt Node Pointer.
INLINE void ADC2_disCh0Int(void)
Disable Channel 0 Interrupt.
Definition: adc2.h:2713
void ADC2_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 10 Interrupt Node Pointer.
INLINE void ADC2_setCh7Config(tADC2_CHCFGx e_value)
Set Channel 7 configuration.
Definition: adc2.h:1017
INLINE uint8 ADC2_getCmp2LoIntSts(void)
Get Compare 2 Lower Threshold Interrupt Status.
Definition: adc2.h:2078
INLINE uint8 ADC2_getCmp0LoThSts(void)
Get Compare 0 Lower Threshold Status.
Definition: adc2.h:2132
INLINE void ADC2_disCmp4UpInt(void)
Disable Compare 4 Upper Threshold Interrupt.
Definition: adc2.h:2489
INLINE uint16 ADC2_getCh9Result(void)
Get Channel 9 Result Value.
Definition: adc2.h:1736
INLINE void ADC2_clrCmp5LoIntSts(void)
Clear Compare 5 Lower Threshold Interrupt Status.
Definition: adc2.h:2349
INLINE uint8 ADC2_getSeq0IntSts(void)
Get Sequence 0 Interrupt Status.
Definition: adc2.h:881
INLINE void ADC2_clrCmp2LoIntSts(void)
Clear Compare 2 Lower Threshold Interrupt Status.
Definition: adc2.h:2328
INLINE uint8 ADC2_getCh0ResultValidSts(void)
Get Channel 0 Result Valid Status.
Definition: adc2.h:1583
INLINE uint8 ADC2_getCmp5UpThSts(void)
Get Compare 5 Upper Threshold Status.
Definition: adc2.h:2033
INLINE void ADC2_enCh6Int(void)
Enable Channel 6 Interrupt.
Definition: adc2.h:2790
INLINE void ADC2_clrCh5EndOfConvSts(void)
Clear Channel 5 End Of Conversion Status.
Definition: adc2.h:1266
INLINE void ADC2_enCmp6LoInt(void)
Enable Compare 6 Lower Threshold Interrupt.
Definition: adc2.h:2622
INLINE uint8 ADC2_getCh1ResultValidSts(void)
Get Channel 1 Result Valid Status.
Definition: adc2.h:1601
INLINE uint8 ADC2_getCh10EndOfConvSts(void)
Get Channel 10 End Of Conversion Status.
Definition: adc2.h:1179
void ADC2_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC2_clrCmp5UpIntSts(void)
Clear Compare 5 Upper Threshold Interrupt Status.
Definition: adc2.h:2237
INLINE uint16 ADC2_getFilt5Res(void)
Get Result Value Filter 5.
Definition: adc2.h:1419
INLINE uint16 ADC2_getCh1Result(void)
Get Channel 1 Result Value.
Definition: adc2.h:1592
INLINE void ADC2_setCmp3Config(tADC2_CMPCFGx e_value)
Set Compare Channel 3 configuration.
Definition: adc2.h:1871
INLINE uint8 ADC2_getCh9ResultValidSts(void)
Get Channel 9 Result Valid Status.
Definition: adc2.h:1745
INLINE void ADC2_setSuspendMode(uint8 u8_susMode)
Set Suspend Mode.
Definition: adc2.h:809
sint8 ADC2_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel)
Get the 14-bit value of the ADC2 Filter Result Register of the selected ADC2 channel and returns the ...
Definition: adc2.c:279
INLINE void ADC2_setSeq2Config(tADC2_SQCFGx e_value)
Set Sequence 2 configuration.
Definition: adc2.h:863
INLINE uint8 ADC2_getCmp2UpIntSts(void)
Get Compare 2 Upper Threshold Interrupt Status.
Definition: adc2.h:1934
void ADC2_setCmp4UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC2_setSeq3Config(tADC2_SQCFGx e_value)
Set Sequence 3 configuration.
Definition: adc2.h:872
INLINE void ADC2_setCh13Config(tADC2_CHCFGx e_value)
Set Channel 13 configuration.
Definition: adc2.h:1071
INLINE uint8 ADC2_getCurrSeq(void)
Get Actual Sequence processed.
Definition: adc2.h:917
INLINE void ADC2_clrSeq2IntSts(void)
Clear Sequence 2 Interrupt Status.
Definition: adc2.h:938
void ADC2_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 0 Interrupt Node Pointer.
INLINE void ADC2_clrFilt2Sts(void)
Clear Filter 2 Event Status.
Definition: adc2.h:1530
INLINE void ADC2_disCh1Int(void)
Disable Channel 1 Interrupt.
Definition: adc2.h:2727
INLINE uint8 ADC2_getCmp1LoThSts(void)
Get Compare 1 Lower Threshold Status.
Definition: adc2.h:2141
INLINE void ADC2_enCh12Int(void)
Enable Channel 12 Interrupt.
Definition: adc2.h:2874
INLINE uint16 ADC2_getCh7Result(void)
Get Channel 7 Result Value.
Definition: adc2.h:1700
INLINE uint16 ADC2_getFilt0Res(void)
Get Result Value Filter 0.
Definition: adc2.h:1374
INLINE void ADC2_clrCh1EndOfConvSts(void)
Clear Channel 1 End Of Conversion Status.
Definition: adc2.h:1238
INLINE void ADC2_disCmp1LoInt(void)
Disable Compare 1 Lower Threshold Interrupt.
Definition: adc2.h:2559
INLINE uint16 ADC2_getCh6Result(void)
Get Channel 6 Result Value.
Definition: adc2.h:1682
void ADC2_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
void ADC2_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE uint8 ADC2_getFilt6Sts(void)
Get Filter 6 Event Status.
Definition: adc2.h:1500
INLINE void ADC2_enCh3Int(void)
Enable Channel 3 Interrupt.
Definition: adc2.h:2748
INLINE uint8 ADC2_getCmp6LoIntSts(void)
Get Compare 6 Lower Threshold Interrupt Status.
Definition: adc2.h:2114
INLINE void ADC2_enCmp1UpInt(void)
Enable Compare 1 Upper Threshold Interrupt.
Definition: adc2.h:2440
INLINE void ADC2_disPower(void)
Disable ADC2 Module.
Definition: adc2.h:786
INLINE void ADC2_setConvClass1Config(tADC2_CONVCFGx e_value)
Set Conversion Class 1.
Definition: adc2.h:1347
INLINE void ADC2_enCmp6UpInt(void)
Enable Compare 6 Upper Threshold Interrupt.
Definition: adc2.h:2510
union ADC2_CHCFGx tADC2_CHCFGx
INLINE void ADC2_enCh4Int(void)
Enable Channel 4 Interrupt.
Definition: adc2.h:2762
INLINE void ADC2_disCh5Int(void)
Disable Channel 5 Interrupt.
Definition: adc2.h:2783
INLINE uint8 ADC2_getCmp1UpIntSts(void)
Get Compare 1 Upper Threshold Interrupt Status.
Definition: adc2.h:1925
void ADC2_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 8 Interrupt Node Pointer.
INLINE void ADC2_disSeq3Int(void)
Disable Sequence 3 Interrupt.
Definition: adc2.h:2699
INLINE uint8 ADC2_getCmp0UpThSts(void)
Get Compare 0 Upper Threshold Status.
Definition: adc2.h:1988
INLINE uint8 ADC2_getCmp1LoIntSts(void)
Get Compare 1 Lower Threshold Interrupt Status.
Definition: adc2.h:2069
sint8 ADC2_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel)
Get the value of the ADC2 Result Filter Register of the selected ADC2 channel in millivolt (mV) and r...
Definition: adc2.c:334
INLINE void ADC2_clrCh6EndOfConvSts(void)
Clear Channel 6 End Of Conversion Status.
Definition: adc2.h:1273
INLINE void ADC2_clrCmp1LoIntSts(void)
Clear Compare 1 Lower Threshold Interrupt Status.
Definition: adc2.h:2321
INLINE void ADC2_setCh5Config(tADC2_CHCFGx e_value)
Set Channel 5 configuration.
Definition: adc2.h:999
INLINE uint8 ADC2_getCh6ResultValidSts(void)
Get Channel 6 Result Valid Status.
Definition: adc2.h:1691
INLINE uint8 ADC2_getCmp5UpIntSts(void)
Get Compare 5 Upper Threshold Interrupt Status.
Definition: adc2.h:1961
INLINE uint8 ADC2_getFilt0Sts(void)
Get Filter 0 Event Status.
Definition: adc2.h:1446
INLINE void ADC2_disCh14Int(void)
Disable Channel 14 Interrupt.
Definition: adc2.h:2909
INLINE uint8 ADC2_getSuspendMode(void)
Get Suspend Mode.
Definition: adc2.h:818
INLINE void ADC2_disSuspend(void)
Disable ADC2 Suspend.
Definition: adc2.h:800
INLINE uint8 ADC2_getCmp3LoThSts(void)
Get Compare 3 Lower Threshold Status.
Definition: adc2.h:2159
INLINE void ADC2_enSeq0Int(void)
Enable Sequence 0 Interrupt.
Definition: adc2.h:2650
INLINE void ADC2_enCmp3LoInt(void)
Enable Compare 3 Lower Threshold Interrupt.
Definition: adc2.h:2580
INLINE void ADC2_clrCh9EndOfConvSts(void)
Clear Channel 9 End Of Conversion Status.
Definition: adc2.h:1294
void ADC2_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC2_clrSeq0IntSts(void)
Clear Sequence 0 Interrupt Status.
Definition: adc2.h:924
INLINE uint8 ADC2_getSeq2IntSts(void)
Get Sequence 2 Interrupt Status.
Definition: adc2.h:899
INLINE uint8 ADC2_getCmp2UpThSts(void)
Get Compare 2 Upper Threshold Status.
Definition: adc2.h:2006
INLINE void ADC2_enCh10Int(void)
Enable Channel 10 Interrupt.
Definition: adc2.h:2846
void ADC2_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 13 Interrupt Node Pointer.
INLINE void ADC2_enCmp5UpInt(void)
Enable Compare 5 Upper Threshold Interrupt.
Definition: adc2.h:2496
INLINE uint8 ADC2_getCh8EndOfConvSts(void)
Get Channel 8 End Of Conversion Status.
Definition: adc2.h:1161
INLINE uint8 ADC2_getCmp7UpThSts(void)
Get Compare 7 Upper Threshold Status.
Definition: adc2.h:2051
INLINE void ADC2_setCmp0Config(tADC2_CMPCFGx e_value)
Set Compare Channel 0 configuration.
Definition: adc2.h:1844
INLINE void ADC2_enCmp5LoInt(void)
Enable Compare 5 Lower Threshold Interrupt.
Definition: adc2.h:2608
void ADC2_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 4 Interrupt Node Pointer.
INLINE void ADC2_clrCh3EndOfConvSts(void)
Clear Channel 3 End Of Conversion Status.
Definition: adc2.h:1252
INLINE void ADC2_enPower(void)
Enable ADC2 Module.
Definition: adc2.h:779
INLINE void ADC2_clrCmp2UpThSts(void)
Clear Compare 2 Upper Threshold Status.
Definition: adc2.h:2272
INLINE void ADC2_clrCmp7UpThSts(void)
Clear Compare 7 Upper Threshold Status.
Definition: adc2.h:2307
INLINE void ADC2_disCh13Int(void)
Disable Channel 13 Interrupt.
Definition: adc2.h:2895
INLINE void ADC2_disCmp3LoInt(void)
Disable Compare 3 Lower Threshold Interrupt.
Definition: adc2.h:2587
union ADC2_SQSLOTx tADC2_SQSLOTx
INLINE void ADC2_disCmp7LoInt(void)
Disable Compare 7 Lower Threshold Interrupt.
Definition: adc2.h:2643
INLINE uint8 ADC2_getCh4ResultValidSts(void)
Get Channel 4 Result Valid Status.
Definition: adc2.h:1655
INLINE uint8 ADC2_getFilt3Sts(void)
Get Filter 3 Event Status.
Definition: adc2.h:1473
void ADC2_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 2 Interrupt Node Pointer.
INLINE void ADC2_enCmp0UpInt(void)
Enable Compare 0 Upper Threshold Interrupt.
Definition: adc2.h:2426
INLINE void ADC2_setSeq1Slot0(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 0.
Definition: adc2.h:854
INLINE uint16 ADC2_getFilt3Res(void)
Get Result Value Filter 3.
Definition: adc2.h:1401
INLINE uint8 ADC2_getCmp0LoIntSts(void)
Get Compare 0 Lower Threshold Interrupt Status.
Definition: adc2.h:2060
INLINE void ADC2_enSuspend(void)
Enable ADC2 Suspend.
Definition: adc2.h:793
INLINE uint16 ADC2_getFilt4Res(void)
Get Result Value Filter 4.
Definition: adc2.h:1410
INLINE void ADC2_clrFilt5Sts(void)
Clear Filter 5 Event Status.
Definition: adc2.h:1551
void ADC2_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC2_clrCh12EndOfConvSts(void)
Clear Channel 12 End Of Conversion Status.
Definition: adc2.h:1315
INLINE void ADC2_clrCmp3UpIntSts(void)
Clear Compare 3 Upper Threshold Interrupt Status.
Definition: adc2.h:2223
INLINE void ADC2_setCmp4Config(tADC2_CMPCFGx e_value)
Set Compare Channel 4 configuration.
Definition: adc2.h:1880
INLINE uint8 ADC2_getCmp5LoIntSts(void)
Get Compare 5 Lower Threshold Interrupt Status.
Definition: adc2.h:2105
INLINE void ADC2_clrFilt1Sts(void)
Clear Filter 1 Event Status.
Definition: adc2.h:1523
INLINE uint8 ADC2_getSeq3IntSts(void)
Get Sequence 3 Interrupt Status.
Definition: adc2.h:908
INLINE void ADC2_setConvClass2Config(tADC2_CONVCFGx e_value)
Set Conversion Class 2.
Definition: adc2.h:1356
INLINE void ADC2_setCh9Config(tADC2_CHCFGx e_value)
Set Channel 9 configuration.
Definition: adc2.h:1035
INLINE void ADC2_enCmp2UpInt(void)
Enable Compare 2 Upper Threshold Interrupt.
Definition: adc2.h:2454
INLINE void ADC2_disCmp0UpInt(void)
Disable Compare 0 Upper Threshold Interrupt.
Definition: adc2.h:2433
INLINE void ADC2_disSeq1Int(void)
Disable Sequence 1 Interrupt.
Definition: adc2.h:2671
sint8 ADC2_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 12-bit value of the ADC2 Result Register in mV of the selected slot in the sequencer and retu...
Definition: adc2.c:490
INLINE uint8 ADC2_getSuspendSts(void)
Get Suspend Mode Status.
Definition: adc2.h:827
INLINE uint8 ADC2_getCh14ResultValidSts(void)
Get Channel 14 Result Valid Status.
Definition: adc2.h:1835
void ADC2_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 5 Interrupt Node Pointer.
INLINE uint16 ADC2_getCh2Result(void)
Get Channel 2 Result Value.
Definition: adc2.h:1610
INLINE void ADC2_clrCh10EndOfConvSts(void)
Clear Channel 10 End Of Conversion Status.
Definition: adc2.h:1301
void ADC2_setCmp5UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint16 ADC2_getCh0Result(void)
Get Channel 0 Result Value.
Definition: adc2.h:1574
INLINE void ADC2_setCmp2Config(tADC2_CMPCFGx e_value)
Set Compare Channel 2 configuration.
Definition: adc2.h:1862
INLINE uint8 ADC2_getCmp4LoIntSts(void)
Get Compare 4 Lower Threshold Interrupt Status.
Definition: adc2.h:2096
INLINE void ADC2_disCh3Int(void)
Disable Channel 3 Interrupt.
Definition: adc2.h:2755
INLINE void ADC2_clrCmp7LoIntSts(void)
Clear Compare 7 Lower Threshold Interrupt Status.
Definition: adc2.h:2363
INLINE uint8 ADC2_getCh11EndOfConvSts(void)
Get Channel 11 End Of Conversion Status.
Definition: adc2.h:1188
INLINE void ADC2_setCmp5Config(tADC2_CMPCFGx e_value)
Set Compare Channel 5 configuration.
Definition: adc2.h:1889
INLINE void ADC2_clrCmp0UpThSts(void)
Clear Compare 0 Upper Threshold Status.
Definition: adc2.h:2258
INLINE uint8 ADC2_getCh3EndOfConvSts(void)
Get Channel 3 End Of Conversion Status.
Definition: adc2.h:1116
union ADC2_CMPCFGx tADC2_CMPCFGx
INLINE uint8 ADC2_getCmp4UpIntSts(void)
Get Compare 4 Upper Threshold Interrupt Status.
Definition: adc2.h:1952
INLINE uint16 ADC2_getCh11Result(void)
Get Channel 11 Result Value.
Definition: adc2.h:1772
INLINE void ADC2_enCh5Int(void)
Enable Channel 5 Interrupt.
Definition: adc2.h:2776
INLINE void ADC2_disCmp6UpInt(void)
Disable Compare 6 Upper Threshold Interrupt.
Definition: adc2.h:2517
INLINE void ADC2_setCh11Config(tADC2_CHCFGx e_value)
Set Channel 11 configuration.
Definition: adc2.h:1053
void ADC2_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 1 Interrupt Node Pointer.
INLINE uint8 ADC2_getCmp7UpIntSts(void)
Get Compare 7 Upper Threshold Interrupt Status.
Definition: adc2.h:1979
INLINE void ADC2_clrCh7EndOfConvSts(void)
Clear Channel 7 End Of Conversion Status.
Definition: adc2.h:1280
INLINE uint8 ADC2_getCh2EndOfConvSts(void)
Get Channel 2 End Of Conversion Status.
Definition: adc2.h:1107
INLINE void ADC2_clrCmp7UpIntSts(void)
Clear Compare 7 Upper Threshold Interrupt Status.
Definition: adc2.h:2251
INLINE void ADC2_enCh9Int(void)
Enable Channel 9 Interrupt.
Definition: adc2.h:2832
void ADC2_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 3 Interrupt Node Pointer.
void ADC2_setCmp7UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
void ADC2_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 6 Interrupt Node Pointer.
INLINE uint8 ADC2_getFilt2Sts(void)
Get Filter 2 Event Status.
Definition: adc2.h:1464
void ADC2_setCmp6LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC2_clrCmp7LoThSts(void)
Clear Compare 7 Lower Threshold Status.
Definition: adc2.h:2419
sint8 ADC2_init(void)
Initialize all CW registers of the ADC2 module.
Definition: adc2.c:97
INLINE void ADC2_clrCh0EndOfConvSts(void)
Clear Channel 0 End Of Conversion Status.
Definition: adc2.h:1231
INLINE void ADC2_enCmp1LoInt(void)
Enable Compare 1 Lower Threshold Interrupt.
Definition: adc2.h:2552
INLINE uint8 ADC2_getCmp6UpThSts(void)
Get Compare 6 Upper Threshold Status.
Definition: adc2.h:2042
INLINE void ADC2_enSeq1Int(void)
Enable Sequence 1 Interrupt.
Definition: adc2.h:2664
INLINE void ADC2_clrCmp1UpIntSts(void)
Clear Compare 1 Upper Threshold Interrupt Status.
Definition: adc2.h:2209
INLINE void ADC2_enCmp7LoInt(void)
Enable Compare 7 Lower Threshold Interrupt.
Definition: adc2.h:2636
INLINE void ADC2_setConvClass3Config(tADC2_CONVCFGx e_value)
Set Conversion Class 3.
Definition: adc2.h:1365
INLINE void ADC2_clrFilt7Sts(void)
Clear Filter 7 Event Status.
Definition: adc2.h:1565
INLINE void ADC2_setCmp1Config(tADC2_CMPCFGx e_value)
Set Compare Channel 1 configuration.
Definition: adc2.h:1853
INLINE void ADC2_clrFilt6Sts(void)
Clear Filter 6 Event Status.
Definition: adc2.h:1558
INLINE uint8 ADC2_getCmp3UpThSts(void)
Get Compare 3 Upper Threshold Status.
Definition: adc2.h:2015
INLINE void ADC2_setConvClass0Config(tADC2_CONVCFGx e_value)
Set Conversion Class 0.
Definition: adc2.h:1338
INLINE void ADC2_disCh4Int(void)
Disable Channel 4 Interrupt.
Definition: adc2.h:2769
INLINE void ADC2_clrCh2EndOfConvSts(void)
Clear Channel 2 End Of Conversion Status.
Definition: adc2.h:1245
INLINE void ADC2_clrCh14EndOfConvSts(void)
Clear Channel 14 End Of Conversion Status.
Definition: adc2.h:1329
INLINE void ADC2_clrCmp5LoThSts(void)
Clear Compare 5 Lower Threshold Status.
Definition: adc2.h:2405
INLINE void ADC2_clrCmp1LoThSts(void)
Clear Compare 1 Lower Threshold Status.
Definition: adc2.h:2377
void ADC2_setCmp4LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint8 ADC2_getCh9EndOfConvSts(void)
Get Channel 9 End Of Conversion Status.
Definition: adc2.h:1170
INLINE void ADC2_setSeq0Config(tADC2_SQCFGx e_value)
Set Sequence 0 configuration.
Definition: adc2.h:836
INLINE void ADC2_enSeq3Int(void)
Enable Sequence 3 Interrupt.
Definition: adc2.h:2692
INLINE void ADC2_clrCmp4UpThSts(void)
Clear Compare 4 Upper Threshold Status.
Definition: adc2.h:2286
INLINE void ADC2_clrCmp3LoThSts(void)
Clear Compare 3 Lower Threshold Status.
Definition: adc2.h:2391
INLINE uint8 ADC2_getSeq1IntSts(void)
Get Sequence 1 Interrupt Status.
Definition: adc2.h:890
INLINE void ADC2_clrCmp0LoIntSts(void)
Clear Compare 0 Lower Threshold Interrupt Status.
Definition: adc2.h:2314
INLINE void ADC2_enSeq2Int(void)
Enable Sequence 2 Interrupt.
Definition: adc2.h:2678
void ADC2_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
void ADC2_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint16 ADC2_getCh3Result(void)
Get Channel 3 Result Value.
Definition: adc2.h:1628
INLINE void ADC2_enCmp4LoInt(void)
Enable Compare 4 Lower Threshold Interrupt.
Definition: adc2.h:2594
INLINE void ADC2_disCh9Int(void)
Disable Channel 9 Interrupt.
Definition: adc2.h:2839
INLINE void ADC2_disCh2Int(void)
Disable Channel 2 Interrupt.
Definition: adc2.h:2741
INLINE uint8 ADC2_getCh5ResultValidSts(void)
Get Channel 5 Result Valid Status.
Definition: adc2.h:1673
INLINE void ADC2_disCh12Int(void)
Disable Channel 12 Interrupt.
Definition: adc2.h:2881
INLINE void ADC2_setCmp6Config(tADC2_CMPCFGx e_value)
Set Compare Channel 6 configuration.
Definition: adc2.h:1898
INLINE void ADC2_clrCmp0LoThSts(void)
Clear Compare 0 Lower Threshold Status.
Definition: adc2.h:2370
INLINE uint16 ADC2_getFilt6Res(void)
Get Result Value Filter 6.
Definition: adc2.h:1428
INLINE uint16 ADC2_getFilt1Res(void)
Get Result Value Filter 1.
Definition: adc2.h:1383
INLINE uint8 ADC2_getCh12EndOfConvSts(void)
Get Channel 12 End Of Conversion Status.
Definition: adc2.h:1197
INLINE void ADC2_clrCh8EndOfConvSts(void)
Clear Channel 8 End Of Conversion Status.
Definition: adc2.h:1287
INLINE void ADC2_disCh8Int(void)
Disable Channel 8 Interrupt.
Definition: adc2.h:2825
INLINE uint8 ADC2_getCh0EndOfConvSts(void)
Get Channel 0 End Of Conversion Status.
Definition: adc2.h:1089
INLINE void ADC2_setCh8Config(tADC2_CHCFGx e_value)
Set Channel 8 configuration.
Definition: adc2.h:1026
INLINE uint8 ADC2_getFilt1Sts(void)
Get Filter 1 Event Status.
Definition: adc2.h:1455
INLINE void ADC2_enCmp7UpInt(void)
Enable Compare 7 Upper Threshold Interrupt.
Definition: adc2.h:2524
INLINE void ADC2_setCh14Config(tADC2_CHCFGx e_value)
Set Channel 14 configuration.
Definition: adc2.h:1080
INLINE void ADC2_clrCh11EndOfConvSts(void)
Clear Channel 11 End Of Conversion Status.
Definition: adc2.h:1308
INLINE uint8 ADC2_getCh7ResultValidSts(void)
Get Channel 7 Result Valid Status.
Definition: adc2.h:1709
INLINE uint8 ADC2_getCmp0UpIntSts(void)
Get Compare 0 Upper Threshold Interrupt Status.
Definition: adc2.h:1916
INLINE uint16 ADC2_getCh8Result(void)
Get Channel 8 Result Value.
Definition: adc2.h:1718
INLINE uint16 ADC2_getCh14Result(void)
Get Channel 14 Result Value.
Definition: adc2.h:1826
INLINE uint8 ADC2_getCh14EndOfConvSts(void)
Get Channel 14 End Of Conversion Status.
Definition: adc2.h:1215
INLINE uint8 ADC2_getCh11ResultValidSts(void)
Get Channel 11 Result Valid Status.
Definition: adc2.h:1781
INLINE void ADC2_clrCmp6LoIntSts(void)
Clear Compare 6 Lower Threshold Interrupt Status.
Definition: adc2.h:2356
INLINE void ADC2_disCmp4LoInt(void)
Disable Compare 4 Lower Threshold Interrupt.
Definition: adc2.h:2601
INLINE void ADC2_disCmp7UpInt(void)
Disable Compare 7 Upper Threshold Interrupt.
Definition: adc2.h:2531
INLINE void ADC2_disCmp5LoInt(void)
Disable Compare 5 Lower Threshold Interrupt.
Definition: adc2.h:2615
INLINE void ADC2_disCmp2LoInt(void)
Disable Compare 2 Lower Threshold Interrupt.
Definition: adc2.h:2573
void ADC2_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
#define ADC2
Definition: tle989x.h:24056
__attribute__((noreturn))
Definition: startup_tle989x.c:193
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:151
uint8_t uint8
8 bit unsigned value
Definition: types.h:204
int8_t sint8
8 bit signed value
Definition: types.h:209
uint16_t uint16
16 bit unsigned value
Definition: types.h:205
uint32_t uint32
32 bit unsigned value
Definition: types.h:206
Definition: adc2.h:233
uint32_t CMPSEL
Definition: adc2.h:242
uint32_t CLASSEL
Definition: adc2.h:243
uint32_t reg
Definition: adc2.h:234
uint32_t CHREP
Definition: adc2.h:239
struct ADC2_CHCFGx::@5 bit
uint32_t FILSEL
Definition: adc2.h:241
Definition: adc2.h:275
struct ADC2_CMPCFGx::@8 bit
uint32_t LOWER
Definition: adc2.h:280
uint32_t reg
Definition: adc2.h:276
uint32_t HYST_UP
Definition: adc2.h:288
uint32_t HYST_LO
Definition: adc2.h:283
uint32_t MODE
Definition: adc2.h:289
uint32_t RST_BLANK_TIME
Definition: adc2.h:287
uint32_t INP_SEL
Definition: adc2.h:281
uint32_t UPPER
Definition: adc2.h:285
uint32_t BLANK_TIME
Definition: adc2.h:286
Definition: adc2.h:264
uint32_t reg
Definition: adc2.h:265
struct ADC2_CONVCFGx::@7 bit
uint32_t STC
Definition: adc2.h:270
Definition: adc2.h:248
uint32_t SLOTS
Definition: adc2.h:253
uint32_t SQREP
Definition: adc2.h:255
uint32_t TRGSEL
Definition: adc2.h:257
uint32_t reg
Definition: adc2.h:249
uint32_t TRGSW
Definition: adc2.h:259
struct ADC2_SQCFGx::@6 bit
Definition: adc2.h:294
uint32_t CHSEL2
Definition: adc2.h:303
uint32_t reg
Definition: adc2.h:295
struct ADC2_SQSLOTx::@9 bit
uint32_t CHSEL3
Definition: adc2.h:305
uint32_t CHSEL0
Definition: adc2.h:299
uint32_t CHSEL1
Definition: adc2.h:301