Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
scu.h
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43 /*******************************************************************************
44 ** Author(s) Identity **
45 ********************************************************************************
46 ** Initials Name **
47 ** ---------------------------------------------------------------------------**
48 ** DM Daniel Mysliwitz **
49 ** BG Blandine Guillot **
50 ** JO Julia Ott **
51 *******************************************************************************/
52 
53 /*******************************************************************************
54 ** Revision Control History **
55 ********************************************************************************
56 ** V0.1.0: 2019-10-28, DM: Initial version **
57 ** V0.2.0: 2020-04-28, BG: Updated revision history format **
58 ** V0.2.1: 2020-09-28, JO: EP-477: Removed definition of variable **
59 ** u32_globtimestamp_ms from scu.c (defined in **
60 ** file isr_exceptions.c) **
61 ** V0.2.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
62 ** V0.2.3: 2020-10-20, BG: EP-532: Added missing function prototypes **
63 ** V0.3.0: 2020-10-20, JO: EP-524: Added parameter for SysTick reload value **
64 ** to function SCU_initSysTick **
65 ** V0.3.1: 2020-10-21, BG: EP-535: Corrected initialization of XTAL **
66 ** V0.3.2: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
67 ** avoid doxygen warning **
68 ** Added end of group for doxygen **
69 ** V0.3.3: 2020-11-16, JO: EP-582: Applied renaming of System_init to **
70 ** SystemInit, applied removal of return value of **
71 ** SystemInit **
72 ** V0.3.3: 2020-11-27, BG: EP-610: Corrected MISRA 2012 errors **
73 ** V0.3.4: 2020-12-04, JO: EP-626: Applied parameter change of function **
74 ** PMU_getWakeupSrc() **
75 ** Changed parameter type of SCU_enterSleepMode **
76 ** from tPMU_wakeupSrc to uint32 **
77 ** V0.3.5: 2020-12-18, BG: EP-652: Corrected name of error code variable **
78 ** V0.3.6: 2021-02-03, JO: EP-684: Fixed ARMCC v6 compiler warning about **
79 ** unused variables **
80 ** V0.3.7: 2021-03-04, BG: EP-717: Replaced the for-loop in the function **
81 ** SCU_enterSleepMode and removed the wake-up source**
82 ** as parameter (configured in the Config Wizard) **
83 ** Removed the return parameter for the functions: **
84 ** - SCU_enterDeepSleepMode **
85 ** - SCU_enterStopModeWithResetWakeup **
86 ** - SCU_enterStopModeWithoutResetWakeup **
87 ** - SCU_exitStopModeWithoutResetWakeup **
88 ** - SCU_enterSleepMode **
89 ** Removed the function to exit sleep mode **
90 ** V0.4.0: 2021-03-11, JO: EP-692: Added switch to HP40_Clk and disabling **
91 ** of PLL/XTAL at the beginning of SCU_initClk **
92 ** to support Reset in Debugger (don't reprogram **
93 ** PLL while using it) **
94 ** V0.4.1: 2021-04-09, JO: EP-753: Added Cache APIs **
95 ** V0.4.2: 2021-04-15, BG: EP-728: Removed the function to exit stop mode **
96 ** w/o reset SCU_exitStopModeWithoutResetWakeup and **
97 ** put the code at the end of the function **
98 ** SCU_enterStopModeWithoutResetWakeup **
99 ** Removed the function to exit stop mode with reset**
100 ** V0.4.3: 2021-07-07, JO: EP-873: Replaced intrinsics by CMSIS wrappers **
101 ** V0.4.4: 2021-07-27, BG: EP-852: Corrected initialization of SPCTR **
102 ** V0.4.5: 2021-07-27, BG: EP-814: Corrected the value to clear the register**
103 ** WAKE_STS_CLR **
104 ** V0.4.6: 2021-08-03, BG: EP-883: Removed SCU_exitFailSleepMode() as it is **
105 ** widely related to the application **
106 ** V0.4.7: 2021-08-18, JO: EP-914: Removed function CACHE_getCacheNCTBBits **
107 ** V0.4.8: 2021-08-18, JO: EP-806: Added functions SCU_GetXTALFailSts, **
108 ** SCU_GetPLL0LockSts, SCU_GetPLL1LockSts **
109 ** Use APIs in SCU_initClk **
110 ** V0.4.9: 2021-09-24, BG: EP-882: Updated SCU_enterStopModeWithResetWakeup,**
111 ** SCU_enterStopModeWithoutResetWakeup and **
112 ** SCU_enterSleepMode functions according to UM v0.2**
113 ** V0.5.0: 2021-09-29, BG: EP-881: Corrected wrong bitfield assignment in **
114 ** SCU_checkXTALDiagnosis() **
115 ** V0.5.1: 2021-10-20, JO: EP-770: Corrected function delay in case the **
116 ** current systick value is 0 or the reload value **
117 ** Updated local variable names **
118 ** V0.5.2: 2021-11-12, JO: EP-937: Updated copyright and branding **
119 ** V0.5.3: 2022-04-19, JO: EP-1002: Moved declaration of u32_currentTime_ms **
120 ** and u32_currentTime_ms to remove ARMCC V5 **
121 ** compiler warning **
122 ** V0.5.4: 2022-06-28, JO: EP-1021: Added timeout for PLL initialization **
123 ** V0.5.5: 2023-05-09, BG: EP-1428: To comply with the latest UM version: **
124 ** - Replaced the functions **
125 ** SCU_enterStopModeWithResetWakeup() and **
126 ** SCU_enterStopModeWithoutResetWakeup() with one **
127 ** single function SCU_enterStopMode() **
128 ** - Updated the function SCU_enterSleepMode() **
129 *******************************************************************************/
130 
131 #ifndef _SCU_H
132 #define _SCU_H
133 
134 /*******************************************************************************
135 ** Includes **
136 *******************************************************************************/
137 
138 #include "types.h"
139 #include "tle989x.h"
140 #include "tle_variants.h"
141 #include "system_tle989x.h"
142 #include "bdrv.h"
143 #include "csacsc.h"
144 #include "isr.h" /* for u32_globTimestamp_ms */
145 #include "pmu.h"
146 #include "isr_defines.h" /* for CPU_SYSTICK_RL */
147 #include "scu_defines.h"
148 
149 /*******************************************************************************
150 ** Global Constant Declarations **
151 *******************************************************************************/
152 
153 /*******************************************************************************
154 ** Global Type Declarations **
155 *******************************************************************************/
156 
157 /*******************************************************************************
158 ** Global Macro Declarations **
159 *******************************************************************************/
160 
162 #define MULTIPLIER_US_TO_TICKS SCU_fCPU_MHz
163 
164 /*******************************************************************************
165 ** Global Variable Declarations **
166 *******************************************************************************/
167 
169 extern sint8 e_xtalSts;
170 
171 /*******************************************************************************
172 ** Global Function Declarations **
173 *******************************************************************************/
174 
175 void SCU_init(void);
176 sint8 SCU_initClk(void);
178 void SCU_delay_us(uint32 u32_time_us);
179 void SCU_initSysTick(uint32 u32_value);
181 void SCU_enterDeepSleepMode(void);
183 void SCU_enterSleepMode(void);
189 INLINE void CACHE_setCleanAll(void);
190 INLINE void CACHE_setLockBlock(uint32 u32_value);
191 INLINE void CACHE_setTouchBlock(uint32 u32_value);
192 INLINE void CACHE_setUnlockBlock(uint32 u32_value);
193 INLINE void CACHE_setCleanSet(uint32 u32_value);
194 
195 /*******************************************************************************
196 ** Global Inline Function Definitions **
197 *******************************************************************************/
198 
204 {
205  return (uint8)SCU->XTALSTAT.bit.XTALFAIL;
206 }
207 
213 {
214  return (uint8)PLL->STAT.bit.LCK0;
215 }
216 
222 {
223  return (uint8)PLL->STAT.bit.LCK1;
224 }
225 
231 {
232  return (uint32)CPU->SYSTICK_CUR.bit.CURRENT;
233 }
234 
240 {
241  return (uint32)CPU->SYSTICK_RL.bit.RELOAD;
242 }
243 
247 {
248  CACHE->CACHE_AC.bit.Clean = 1u;
249 }
250 
256 {
257  CACHE->CACHE_BL.bit.ADDR = u32_value;
258 }
259 
265 {
266  CACHE->CACHE_BT.bit.ADDR = u32_value;
267 }
268 
274 {
275  CACHE->CACHE_BU.bit.ADDR = u32_value;
276 }
277 
283 {
284  CACHE->CACHE_SC.bit.ADDR = u32_value;
285 }
286 
289 #endif /* _SCU_H */
Bridge Driver low level access library.
CSACSC low level access library.
#define CACHE
Definition: tle989x.h:24059
#define PLL
Definition: tle989x.h:24073
#define CPU
Definition: tle989x.h:24067
#define SCU
Definition: tle989x.h:24075
INLINE uint8 SCU_GetPLL0LockSts(void)
Get the PLL0 Lock Status.
Definition: scu.h:212
INLINE uint8 SCU_GetPLL1LockSts(void)
Get the PLL1 Lock Status.
Definition: scu.h:221
sint8 SCU_checkXTALDiagnosis(void)
Check XTAL Diagnosis as describen in the User Manual.
Definition: scu.c:241
INLINE uint32 SCU_getSysTickCntVal(void)
Get the current SysTick Count Value.
Definition: scu.h:230
sint8 SCU_enSafeSwitchOffSeq(void)
Configure the Safe Switch-Off release sequence (SSO release sequence)
Definition: scu.c:398
sint8 SCU_enterStopMode(void)
Enter the Stop mode.
Definition: scu.c:440
INLINE uint8 SCU_GetXTALFailSts(void)
Get the XTAL Fail Status.
Definition: scu.h:203
INLINE void CACHE_setCleanAll(void)
Set Cache clean All.
Definition: scu.h:246
void SCU_init(void)
Initialize the SCU module.
Definition: scu.c:60
void SCU_initSysTick(uint32 u32_value)
Initialize the SysTick.
Definition: scu.c:380
void SCU_enterSleepMode(void)
Enter the Sleep mode.
Definition: scu.c:506
void SCU_enterDeepSleepMode(void)
Enter the Deep Sleep mode.
Definition: scu.c:422
INLINE void CACHE_setUnlockBlock(uint32 u32_value)
Set Address of Cache unlock Block.
Definition: scu.h:273
void SCU_delay_us(uint32 u32_time_us)
Delays the regular program execution by a given number of Microseconds.
Definition: scu.c:315
INLINE void CACHE_setTouchBlock(uint32 u32_value)
Set Address of Cache touch Block (load Block to Cache)
Definition: scu.h:264
sint8 e_xtalSts
XTAL status.
Definition: scu.c:48
INLINE uint32 SCU_getSysTickRelVal(void)
Get the current SysTick Reload Value.
Definition: scu.h:239
INLINE void CACHE_setLockBlock(uint32 u32_value)
Set Address of Cache lock Block.
Definition: scu.h:255
sint8 SCU_initClk(void)
Initialize the SCU clock.
Definition: scu.c:79
INLINE void CACHE_setCleanSet(uint32 u32_value)
Set Address of Cache clean Set.
Definition: scu.h:282
Interrupt Service Routines low level access library.
PMU low level access library.
System file for TLE989x.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:167
uint8_t uint8
8 bit unsigned value
Definition: types.h:220
int8_t sint8
8 bit signed value
Definition: types.h:225
uint32_t uint32
32 bit unsigned value
Definition: types.h:222