Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
adc1.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
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43 /* Generated by generate_functions_02_xlsx2func.py, version 1.0.1 on 09. Feb 2021
44  * from File 'adc1.xlsx', version 0.2.1
45  */
46 
47 /*******************************************************************************
48 ** Author(s) Identity **
49 ********************************************************************************
50 ** Initials Name **
51 ** ---------------------------------------------------------------------------**
52 ** JO Julia Ott **
53 ** BG Blandine Guillot **
54 ** DM Daniel Mysliwitz **
55 *******************************************************************************/
56 
57 /*******************************************************************************
58 ** Revision Control History **
59 ********************************************************************************
60 ** V0.1.0: 2020-05-26, DM: Initial version **
61 ** V0.1.1: 2020-08-11, JO: EP-449: Disabled compiler warnings for ARMCC v6 **
62 ** locally where violations can't be avoided **
63 ** V0.1.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
64 ** V0.2.0: 2020-10-16, JO: EP-523: Updated parameter names **
65 ** Added functions for sequence configuration **
66 ** Removed functions that access **
67 ** ADC1->GLOBCONF.bit.LOWSUP, DSCAL, CPCLK_HV_FAST, **
68 ** EN_CONV_TIMOUT (bits have been removed) **
69 ** V0.2.1: 2020-10-21, BG: EP-539: Considered the enable checkbox in CW in **
70 ** the initialization function **
71 ** V0.3.0: 2020-10-22, JO: EP-543: Corrected check of return value in **
72 ** ADC1_getChResult_mV and ADC1_getChFiltResult_mV **
73 ** V0.3.1: 2020-10-27, BG: EP-561: Renamed split compare up/low bits **
74 ** V0.3.2: 2020-11-04, JO: EP-556: Removed functions that are related to **
75 ** ADC EOC Fail Interrupt **
76 ** V0.3.3: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
77 ** avoid doxygen warning **
78 ** Updated stype of parameter of type pointer **
79 ** V0.3.4: 2020-11-17, BG: EP-598: Added VAREF-related functions **
80 ** V0.3.5: 2020-11-18, DM: EP-579: Fixed filtout value for postprocessing **
81 ** private function declaration removed from h-file **
82 ** V0.3.6: 2020-11-20, BG: EP-610: Corrected MISRA 2012 errors **
83 ** The following rules are globally deactivated: **
84 ** - Info 774: Boolean within 'if' always evaluates **
85 ** to False/True **
86 ** V0.3.7: 2020-12-03, JO: EP-610: Fixed ARMCC v6 compiler warnings **
87 ** V0.3.8: 2020-12-16, DM: EP-650: Replaced NOP loop in the ADC1_init() by **
88 ** wait for ADC1 ready **
89 ** V0.3.9: 2020-12-18, DM: EP-642: add separate seq. shadow transfer enable **
90 ** prior to trigger seq. shadow transfer **
91 ** V0.4.0: 2020-12-18, BG: EP-652: Corrected name of error code variable **
92 ** V0.4.1: 2021-02-09, JO: EP-696: Changed from anonymous to named typedefs **
93 ** to prevent MISRA warning **
94 ** V0.4.2: 2021-03-04, BG: EP-718: Added enums for trigger sources **
95 ** V0.4.3: 2021-04-06, BG: EP-760: Replaced if instructions to check if the **
96 ** module is enabled with preprocessor directives to**
97 ** avoid compiler warnings **
98 ** V0.4.4: 2021-04-23, NI: EP-706: Added function instead of direct field **
99 ** access in ADC1_init() **
100 ** Added missing elses for range check if() in **
101 ** several functions. **
102 ** V0.4.5: 2021-08-06, BG: EP-695: Removed the check of the VALID bit in **
103 ** ADC1_getChResult() **
104 ** Updated documentation for ADC1_getChResult() and **
105 ** ADC1_getChResult_mV() **
106 ** V0.4.6: 2021-11-12, JO: EP-937: Updated copyright and branding **
107 ** V0.4.7: 2022-06-23, JO: EP-1150: Removed ARMCC V6.18 warnings **
108 ** V0.4.8: 2022-08-29, JO: EP-1244: Removed sequence running check from **
109 ** ADC1_startSequence **
110 ** V0.4.9: 2022-11-17, JO: EP-1342: Updated enum documentation to remove **
111 ** doxygen warning **
112 ** V0.5.0: 2023-02-23, BG: EP-1279: Corrected Doxygen documentation for **
113 ** ADC1_getChFiltResult and ADC1_getChFiltResult_mV **
114 ** V0.6.0: 2024-06-03, JO: EP-1488: Added functions ADC1_setChxInsel **
115 *******************************************************************************/
116 
117 #ifndef _ADC1_H
118 #define _ADC1_H
119 
120 /*******************************************************************************
121 ** Includes **
122 *******************************************************************************/
123 
124 #include "tle_variants.h"
125 #include "types.h"
126 #include "adc1_defines.h"
127 #include "tle989x.h"
128 
129 /*******************************************************************************
130 ** Global Macro Declarations **
131 *******************************************************************************/
132 
134 #define ADC1_DCH_CNT (20u)
136 #define ADC1_AI_CNT (27u)
138 #define ADC1_FILT_CNT (4u)
140 #define ADC1_SEQ_CNT (4u)
142 #define ADC1_SLOT_CNT (4u)
144 #define ADC1_FILT_CH_DIS (4u)
146 #define ADC1_SHADOWTRANS_EN (0x00700000u)
148 #define ADC1_SHADOWTRANS_BY_SW (0x00770000u)
150 #define ADC1_ALL_DCH_MSK (0xFFFFFu)
152 #define ADC1_ALL_SQSTS_MSK (0xFFFu)
154 #define ADC1_ALL_FILTSTS_MSK (0xFu)
156 #define ADC1_ALL_CMPSTS_MSK (0xFF00FFu)
158 #define ADC1_VREF_5000mV (5000u)
160 #define ADC1_MAX_RESOLUTION (0x3FFFu)
162 #define ADC1_ATT_TYPE0 (102u)
164 #define ADC1_ATT_TYPE1 (72u)
166 #define ADC1_ATT_TYPE2 (512u)
168 #define ADC1_ATT_DENOM (512u)
170 #define ADC1_DCH0 (0u)
172 #define ADC1_DCH1 (1u)
174 #define ADC1_DCH2 (2u)
176 #define ADC1_DCH3 (3u)
178 #define ADC1_DCH4 (4u)
180 #define ADC1_DCH5 (5u)
182 #define ADC1_DCH6 (6u)
184 #define ADC1_DCH7 (7u)
186 #define ADC1_DCH8 (8u)
188 #define ADC1_DCH9 (9u)
190 #define ADC1_DCH10 (10u)
192 #define ADC1_DCH11 (11u)
194 #define ADC1_DCH12 (12u)
196 #define ADC1_DCH13 (13u)
198 #define ADC1_DCH14 (14u)
200 #define ADC1_DCH15 (15u)
202 #define ADC1_DCH16 (16u)
204 #define ADC1_DCH17 (17u)
206 #define ADC1_DCH18 (18u)
208 #define ADC1_DCH19 (19u)
209 
211 #define ADC1_SEQ0 (0u)
213 #define ADC1_SEQ1 (1u)
215 #define ADC1_SEQ2 (2u)
217 #define ADC1_SEQ3 (3u)
218 
220 #define ADC1_SEQ_SLOT0 (0u)
222 #define ADC1_SEQ_SLOT1 (1u)
224 #define ADC1_SEQ_SLOT2 (2u)
226 #define ADC1_SEQ_SLOT3 (3u)
227 
229 #define ADC1_SW_TRIGGER (0u)
230 
231 /*******************************************************************************
232 ** Global Type Declarations **
233 *******************************************************************************/
234 
235 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
236  #pragma clang diagnostic push
237  #pragma clang diagnostic ignored "-Wpadded"
238 #endif
239 
244 typedef enum ADC1_Seq0Trig
245 {
255 
260 typedef enum ADC1_Seq1Trig
261 {
272 
277 typedef enum ADC1_Seq2Trig
278 {
289 
294 typedef enum ADC1_Seq3Trig
295 {
305 
310 typedef enum tADC1_CHINSELx
311 {
321 #ifdef UC_FEATURE_64PIN
326 #endif
332 #ifdef UC_FEATURE_64PIN
334 #endif
339  ADC1_CHINSELx_P2_2 = 26
341 
345 typedef union ADC1_SQCFGx
346 {
348  struct
349  {
350  uint32 SLOTS : 3;
351  uint32 : 1;
352  uint32 SQREP : 2;
356  uint32 GTSEL : 2;
357  uint32 TRGSW : 1;
358  uint32 GTSW : 1;
359  } bit;
361 
365 typedef union ADC1_SQSLOTx
366 {
368  struct
369  {
371  uint32 : 3;
373  uint32 : 3;
375  uint32 : 3;
377  } bit;
379 
383 typedef union ADC1_CHCFGx
384 {
386  struct
387  {
388  uint32 INSEL : 5;
389  uint32 : 3;
390  uint32 CHREP : 4;
391  uint32 : 4;
395  } bit;
397 
401 typedef union ADC1_CONVCFGx
402 {
404  struct
405  {
406  uint32 TCONF : 2;
407  uint32 OVERS : 2;
408  uint32 STC : 4;
409  uint32 SESP : 1;
410  uint32 : 1;
411  uint32 MSBD : 1;
412  uint32 PCAL : 1;
413  uint32 BWD : 2;
415  } bit;
417 
421 typedef union ADC1_CMPCFGx
422 {
424  struct
425  {
426  uint32 LOWER : 8;
428  uint32 : 3;
430  uint32 : 2;
431  uint32 UPPER : 8;
435  uint32 MODE : 2;
436  } bit;
438 
439 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
440  #pragma clang diagnostic pop
441 #endif
442 
443 /*******************************************************************************
444 ** Global Function Declarations **
445 *******************************************************************************/
446 
447 sint8 ADC1_init(void);
448 sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel);
449 sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel);
450 sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel);
451 sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel);
452 sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx);
453 sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx);
454 sint8 ADC1_startSequence(uint8 u8_seqIdx);
455 uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx);
456 INLINE void ADC1_enPower(void);
457 INLINE void ADC1_disPower(void);
458 INLINE void ADC1_setClockDiv(uint8 u8_value);
460 INLINE void ADC1_enSuspend(void);
461 INLINE void ADC1_disSuspend(void);
462 INLINE void ADC1_setSuspendMode(uint8 u8_value);
467 INLINE void ADC1_setSeq0Repetition(uint8 u8_value);
471 INLINE void ADC1_enSeq0WaitForRead(void);
475 INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value);
477 INLINE void ADC1_enSeq0TriggerGate(void);
479 INLINE void ADC1_setSeq0Slot0(uint8 u8_value);
481 INLINE void ADC1_setSeq0Slot1(uint8 u8_value);
483 INLINE void ADC1_setSeq0Slot2(uint8 u8_value);
485 INLINE void ADC1_setSeq0Slot3(uint8 u8_value);
488 INLINE void ADC1_setSeq1Repetition(uint8 u8_value);
492 INLINE void ADC1_enSeq1WaitForRead(void);
496 INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value);
498 INLINE void ADC1_enSeq1TriggerGate(void);
500 INLINE void ADC1_setSeq1Slot0(uint8 u8_value);
502 INLINE void ADC1_setSeq1Slot1(uint8 u8_value);
504 INLINE void ADC1_setSeq1Slot2(uint8 u8_value);
506 INLINE void ADC1_setSeq1Slot3(uint8 u8_value);
509 INLINE void ADC1_setSeq2Repetition(uint8 u8_value);
513 INLINE void ADC1_enSeq2WaitForRead(void);
517 INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value);
519 INLINE void ADC1_enSeq2TriggerGate(void);
521 INLINE void ADC1_setSeq2Slot0(uint8 u8_value);
523 INLINE void ADC1_setSeq2Slot1(uint8 u8_value);
525 INLINE void ADC1_setSeq2Slot2(uint8 u8_value);
527 INLINE void ADC1_setSeq2Slot3(uint8 u8_value);
530 INLINE void ADC1_setSeq3Repetition(uint8 u8_value);
534 INLINE void ADC1_enSeq3WaitForRead(void);
538 INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value);
540 INLINE void ADC1_enSeq3TriggerGate(void);
542 INLINE void ADC1_setSeq3Slot0(uint8 u8_value);
544 INLINE void ADC1_setSeq3Slot1(uint8 u8_value);
546 INLINE void ADC1_setSeq3Slot2(uint8 u8_value);
548 INLINE void ADC1_setSeq3Slot3(uint8 u8_value);
567 INLINE void ADC1_clrSeq0CollSts(void);
568 INLINE void ADC1_clrSeq1CollSts(void);
569 INLINE void ADC1_clrSeq2CollSts(void);
570 INLINE void ADC1_clrSeq3CollSts(void);
571 INLINE void ADC1_clrSeq0IntSts(void);
572 INLINE void ADC1_clrSeq1IntSts(void);
573 INLINE void ADC1_clrSeq2IntSts(void);
574 INLINE void ADC1_clrSeq3IntSts(void);
579 INLINE void ADC1_setSeq0CollSts(void);
580 INLINE void ADC1_setSeq1CollSts(void);
581 INLINE void ADC1_setSeq2CollSts(void);
582 INLINE void ADC1_setSeq3CollSts(void);
583 INLINE void ADC1_setSeq0IntSts(void);
584 INLINE void ADC1_setSeq1IntSts(void);
585 INLINE void ADC1_setSeq2IntSts(void);
586 INLINE void ADC1_setSeq3IntSts(void);
692 INLINE void ADC1_enCalibCh0 (void);
693 INLINE void ADC1_disCalibCh0 (void);
694 INLINE void ADC1_enCalibCh1 (void);
695 INLINE void ADC1_disCalibCh1 (void);
696 INLINE void ADC1_enCalibCh2 (void);
697 INLINE void ADC1_disCalibCh2 (void);
698 INLINE void ADC1_enCalibCh3 (void);
699 INLINE void ADC1_disCalibCh3 (void);
700 INLINE void ADC1_enCalibCh4 (void);
701 INLINE void ADC1_disCalibCh4 (void);
702 INLINE void ADC1_enCalibCh5 (void);
703 INLINE void ADC1_disCalibCh5 (void);
704 INLINE void ADC1_enCalibCh6 (void);
705 INLINE void ADC1_disCalibCh6 (void);
706 INLINE void ADC1_enCalibCh7 (void);
707 INLINE void ADC1_disCalibCh7 (void);
708 INLINE void ADC1_enCalibCh8 (void);
709 INLINE void ADC1_disCalibCh8 (void);
710 INLINE void ADC1_enCalibCh9 (void);
711 INLINE void ADC1_disCalibCh9 (void);
712 INLINE void ADC1_enCalibCh10(void);
713 INLINE void ADC1_disCalibCh10(void);
714 INLINE void ADC1_enCalibCh11(void);
715 INLINE void ADC1_disCalibCh11(void);
716 INLINE void ADC1_enCalibCh12(void);
717 INLINE void ADC1_disCalibCh12(void);
718 INLINE void ADC1_enCalibCh13(void);
719 INLINE void ADC1_disCalibCh13(void);
720 INLINE void ADC1_enCalibCh14(void);
721 INLINE void ADC1_disCalibCh14(void);
722 INLINE void ADC1_enCalibCh15(void);
723 INLINE void ADC1_disCalibCh15(void);
724 INLINE void ADC1_enCalibCh16(void);
725 INLINE void ADC1_disCalibCh16(void);
726 INLINE void ADC1_enCalibCh17(void);
727 INLINE void ADC1_disCalibCh17(void);
728 INLINE void ADC1_enCalibCh18(void);
729 INLINE void ADC1_disCalibCh18(void);
730 INLINE void ADC1_enCalibCh19(void);
731 INLINE void ADC1_disCalibCh19(void);
732 INLINE void ADC1_enCalibCh20(void);
733 INLINE void ADC1_disCalibCh20(void);
734 INLINE void ADC1_enCalibCh21(void);
735 INLINE void ADC1_disCalibCh21(void);
736 INLINE void ADC1_enCalibCh22(void);
737 INLINE void ADC1_disCalibCh22(void);
738 INLINE void ADC1_enCalibCh23(void);
739 INLINE void ADC1_disCalibCh23(void);
740 INLINE void ADC1_enCalibCh24(void);
741 INLINE void ADC1_disCalibCh24(void);
742 INLINE void ADC1_enCalibCh25(void);
743 INLINE void ADC1_disCalibCh25(void);
744 INLINE void ADC1_enCalibCh26(void);
745 INLINE void ADC1_disCalibCh26(void);
746 INLINE void ADC1_enCalibProtCh0 (void);
747 INLINE void ADC1_disCalibProtCh0 (void);
748 INLINE void ADC1_enCalibProtCh1 (void);
749 INLINE void ADC1_disCalibProtCh1 (void);
750 INLINE void ADC1_enCalibProtCh2 (void);
751 INLINE void ADC1_disCalibProtCh2 (void);
752 INLINE void ADC1_enCalibProtCh3 (void);
753 INLINE void ADC1_disCalibProtCh3 (void);
754 INLINE void ADC1_enCalibProtCh4 (void);
755 INLINE void ADC1_disCalibProtCh4 (void);
756 INLINE void ADC1_enCalibProtCh5 (void);
757 INLINE void ADC1_disCalibProtCh5 (void);
758 INLINE void ADC1_enCalibProtCh6 (void);
759 INLINE void ADC1_disCalibProtCh6 (void);
760 INLINE void ADC1_enCalibProtCh7 (void);
761 INLINE void ADC1_disCalibProtCh7 (void);
762 INLINE void ADC1_enCalibProtCh8 (void);
763 INLINE void ADC1_disCalibProtCh8 (void);
764 INLINE void ADC1_enCalibProtCh9 (void);
765 INLINE void ADC1_disCalibProtCh9 (void);
766 INLINE void ADC1_enCalibProtCh10(void);
767 INLINE void ADC1_disCalibProtCh10(void);
768 INLINE void ADC1_enCalibProtCh11(void);
769 INLINE void ADC1_disCalibProtCh11(void);
770 INLINE void ADC1_enCalibProtCh12(void);
771 INLINE void ADC1_disCalibProtCh12(void);
772 INLINE void ADC1_enCalibProtCh13(void);
773 INLINE void ADC1_disCalibProtCh13(void);
774 INLINE void ADC1_enCalibProtCh14(void);
775 INLINE void ADC1_disCalibProtCh14(void);
776 INLINE void ADC1_enCalibProtCh15(void);
777 INLINE void ADC1_disCalibProtCh15(void);
778 INLINE void ADC1_enCalibProtCh16(void);
779 INLINE void ADC1_disCalibProtCh16(void);
780 INLINE void ADC1_enCalibProtCh17(void);
781 INLINE void ADC1_disCalibProtCh17(void);
782 INLINE void ADC1_enCalibProtCh18(void);
783 INLINE void ADC1_disCalibProtCh18(void);
784 INLINE void ADC1_enCalibProtCh19(void);
785 INLINE void ADC1_disCalibProtCh19(void);
786 INLINE void ADC1_enCalibProtCh20(void);
787 INLINE void ADC1_disCalibProtCh20(void);
788 INLINE void ADC1_enCalibProtCh21(void);
789 INLINE void ADC1_disCalibProtCh21(void);
790 INLINE void ADC1_enCalibProtCh22(void);
791 INLINE void ADC1_disCalibProtCh22(void);
792 INLINE void ADC1_enCalibProtCh23(void);
793 INLINE void ADC1_disCalibProtCh23(void);
794 INLINE void ADC1_enCalibProtCh24(void);
795 INLINE void ADC1_disCalibProtCh24(void);
796 INLINE void ADC1_enCalibProtCh25(void);
797 INLINE void ADC1_disCalibProtCh25(void);
798 INLINE void ADC1_enCalibProtCh26(void);
799 INLINE void ADC1_disCalibProtCh26(void);
800 INLINE void ADC1_setFilter0Coeff(uint8 u8_value);
802 INLINE void ADC1_setFilter1Coeff(uint8 u8_value);
804 INLINE void ADC1_setFilter2Coeff(uint8 u8_value);
806 INLINE void ADC1_setFilter3Coeff(uint8 u8_value);
816 INLINE void ADC1_clrFilter0Sts(void);
817 INLINE void ADC1_clrFilter1Sts(void);
818 INLINE void ADC1_clrFilter2Sts(void);
819 INLINE void ADC1_clrFilter3Sts(void);
820 INLINE void ADC1_setFilter0Sts(void);
821 INLINE void ADC1_setFilter1Sts(void);
822 INLINE void ADC1_setFilter2Sts(void);
823 INLINE void ADC1_setFilter3Sts(void);
884 INLINE void ADC1_clrCmp0UpIntSts(void);
885 INLINE void ADC1_clrCmp1UpIntSts(void);
886 INLINE void ADC1_clrCmp2UpIntSts(void);
887 INLINE void ADC1_clrCmp3UpIntSts(void);
888 INLINE void ADC1_clrCmp0UpThSts(void);
889 INLINE void ADC1_clrCmp1UpThSts(void);
890 INLINE void ADC1_clrCmp2UpThSts(void);
891 INLINE void ADC1_clrCmp3UpThSts(void);
892 INLINE void ADC1_clrCmp0LoIntSts(void);
893 INLINE void ADC1_clrCmp1LoIntSts(void);
894 INLINE void ADC1_clrCmp2LoIntSts(void);
895 INLINE void ADC1_clrCmp3LoIntSts(void);
896 INLINE void ADC1_clrCmp0LoThSts(void);
897 INLINE void ADC1_clrCmp1LoThSts(void);
898 INLINE void ADC1_clrCmp2LoThSts(void);
899 INLINE void ADC1_clrCmp3LoThSts(void);
900 INLINE void ADC1_setCmp0UpIntSts(void);
901 INLINE void ADC1_setCmp1UpIntSts(void);
902 INLINE void ADC1_setCmp2UpIntSts(void);
903 INLINE void ADC1_setCmp3UpIntSts(void);
904 INLINE void ADC1_setCmp0UpThSts(void);
905 INLINE void ADC1_setCmp1UpThSts(void);
906 INLINE void ADC1_setCmp2UpThSts(void);
907 INLINE void ADC1_setCmp3UpThSts(void);
908 INLINE void ADC1_setCmp0LoIntSts(void);
909 INLINE void ADC1_setCmp1LoIntSts(void);
910 INLINE void ADC1_setCmp2LoIntSts(void);
911 INLINE void ADC1_setCmp3LoIntSts(void);
912 INLINE void ADC1_setCmp0LoThSts(void);
913 INLINE void ADC1_setCmp1LoThSts(void);
914 INLINE void ADC1_setCmp2LoThSts(void);
915 INLINE void ADC1_setCmp3LoThSts(void);
916 INLINE void ADC1_enCmp0UpInt(void);
917 INLINE void ADC1_disCmp0UpInt(void);
918 INLINE void ADC1_enCmp1UpInt(void);
919 INLINE void ADC1_disCmp1UpInt(void);
920 INLINE void ADC1_enCmp2UpInt(void);
921 INLINE void ADC1_disCmp2UpInt(void);
922 INLINE void ADC1_enCmp3UpInt(void);
923 INLINE void ADC1_disCmp3UpInt(void);
924 INLINE void ADC1_enCmp0LoInt(void);
925 INLINE void ADC1_disCmp0LoInt(void);
926 INLINE void ADC1_enCmp1LoInt(void);
927 INLINE void ADC1_disCmp1LoInt(void);
928 INLINE void ADC1_enCmp2LoInt(void);
929 INLINE void ADC1_disCmp2LoInt(void);
930 INLINE void ADC1_enCmp3LoInt(void);
931 INLINE void ADC1_disCmp3LoInt(void);
932 INLINE void ADC1_enSeq0Int(void);
933 INLINE void ADC1_disSeq0Int(void);
934 INLINE void ADC1_enSeq1Int(void);
935 INLINE void ADC1_disSeq1Int(void);
936 INLINE void ADC1_enSeq2Int(void);
937 INLINE void ADC1_disSeq2Int(void);
938 INLINE void ADC1_enSeq3Int(void);
939 INLINE void ADC1_disSeq3Int(void);
940 INLINE void ADC1_enCh0Int(void);
941 INLINE void ADC1_disCh0Int(void);
942 INLINE void ADC1_enCh1Int(void);
943 INLINE void ADC1_disCh1Int(void);
944 INLINE void ADC1_enCh2Int(void);
945 INLINE void ADC1_disCh2Int(void);
946 INLINE void ADC1_enCh3Int(void);
947 INLINE void ADC1_disCh3Int(void);
948 INLINE void ADC1_enCh4Int(void);
949 INLINE void ADC1_disCh4Int(void);
950 INLINE void ADC1_enCh5Int(void);
951 INLINE void ADC1_disCh5Int(void);
952 INLINE void ADC1_enCh6Int(void);
953 INLINE void ADC1_disCh6Int(void);
954 INLINE void ADC1_enCh7Int(void);
955 INLINE void ADC1_disCh7Int(void);
956 INLINE void ADC1_enCh8Int(void);
957 INLINE void ADC1_disCh8Int(void);
958 INLINE void ADC1_enCh9Int(void);
959 INLINE void ADC1_disCh9Int(void);
960 INLINE void ADC1_enCh10Int(void);
961 INLINE void ADC1_disCh10Int(void);
962 INLINE void ADC1_enCh11Int(void);
963 INLINE void ADC1_disCh11Int(void);
964 INLINE void ADC1_enCh12Int(void);
965 INLINE void ADC1_disCh12Int(void);
966 INLINE void ADC1_enCh13Int(void);
967 INLINE void ADC1_disCh13Int(void);
968 INLINE void ADC1_enCh14Int(void);
969 INLINE void ADC1_disCh14Int(void);
970 INLINE void ADC1_enCh15Int(void);
971 INLINE void ADC1_disCh15Int(void);
972 INLINE void ADC1_enCh16Int(void);
973 INLINE void ADC1_disCh16Int(void);
974 INLINE void ADC1_enCh17Int(void);
975 INLINE void ADC1_disCh17Int(void);
976 INLINE void ADC1_enCh18Int(void);
977 INLINE void ADC1_disCh18Int(void);
978 INLINE void ADC1_enCh19Int(void);
979 INLINE void ADC1_disCh19Int(void);
988 INLINE void ADC1_enSeq0CollInt(void);
989 INLINE void ADC1_disSeq0CollInt(void);
990 INLINE void ADC1_enSeq1CollInt(void);
991 INLINE void ADC1_disSeq1CollInt(void);
992 INLINE void ADC1_enSeq2CollInt(void);
993 INLINE void ADC1_disSeq2CollInt(void);
994 INLINE void ADC1_enSeq3CollInt(void);
995 INLINE void ADC1_disSeq3CollInt(void);
1036 INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value);
1038 INLINE void ADC1_setTriggHwShadowTrans(uint8 u8_value);
1040 INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value);
1042 INLINE void ADC1_enSeqHwShadowTrans(void);
1043 INLINE void ADC1_disSeqHwShadowTrans(void);
1046 INLINE void ADC1_enGateHwShadowTrans(void);
1048 INLINE void ADC1_setSeqSwShadowTrans(void);
1054 INLINE void ADC1_enSeqSwShadowTrans(void);
1055 INLINE void ADC1_disSeqSwShadowTrans(void);
1058 INLINE void ADC1_enGateSwShadowTrans(void);
1060 INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value);
1062 INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value);
1064 INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value);
1066 INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value);
1068 INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value);
1070 INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value);
1072 INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value);
1074 INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value);
1076 INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value);
1078 INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value);
1080 INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value);
1082 INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value);
1084 INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value);
1086 INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value);
1088 INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value);
1090 INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value);
1092 INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value);
1094 INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value);
1096 INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value);
1098 INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value);
1100 INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value);
1102 INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value);
1104 INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value);
1106 INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value);
1108 INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value);
1110 INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value);
1112 INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value);
1114 INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value);
1116 INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value);
1118 INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value);
1120 INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value);
1122 INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value);
1124 INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value);
1126 INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value);
1128 INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value);
1130 INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value);
1132 INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value);
1134 INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value);
1136 INLINE void ARVG_enVAREF(void);
1137 INLINE void ARVG_disVAREF(void);
1144 
1145 
1146 /*******************************************************************************
1147 ** Deprecated Function Declarations **
1148 *******************************************************************************/
1149 
1153 void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1154 
1158 void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1159 
1163 void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1164 
1168 void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1169 
1173 void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1174 
1178 void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1179 
1183 void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1184 
1188 void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1189 
1193 void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1194 
1198 void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1199 
1203 void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1204 
1208 void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1209 
1213 void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1214 
1218 void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1219 
1223 void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1224 
1228 void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1229 
1233 void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1234 
1238 void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1239 
1243 void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1244 
1248 void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1249 
1253 void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1254 
1258 void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1259 
1263 void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1264 
1268 void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1269 
1273 void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1274 
1278 void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1279 
1283 void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1284 
1288 void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1289 
1293 void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1294 
1298 void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1299 
1303 void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1304 
1308 void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1309 
1313 void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1314 
1318 void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1319 
1323 void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1324 
1328 void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1329 
1333 void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1334 
1338 void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1339 
1343 void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1344 
1348 void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1349 
1350 
1351 /*******************************************************************************
1352 ** Global Inline Function Definitions **
1353 *******************************************************************************/
1354 
1358 {
1359  ADC1->GLOBCONF.bit.EN = 1u;
1360 }
1361 
1365 {
1366  ADC1->GLOBCONF.bit.EN = 0u;
1367 }
1368 
1374 {
1375  ADC1->CLKCON.bit.CLKDIV = u8_value;
1376 }
1377 
1383 {
1384  return (uint8)ADC1->CLKCON.bit.CLKDIV;
1385 }
1386 
1390 {
1391  ADC1->SUSCTR.bit.SUSEN = 1u;
1392 }
1393 
1397 {
1398  ADC1->SUSCTR.bit.SUSEN = 0u;
1399 }
1400 
1406 {
1407  ADC1->SUSCTR.bit.SUSMOD = u8_value;
1408 }
1409 
1415 {
1416  return (uint8)ADC1->SUSCTR.bit.SUSMOD;
1417 }
1418 
1424 {
1425  return (uint8)ADC1->SUSSTAT.bit.STAT;
1426 }
1427 
1433 {
1434  return (uint8)ADC1->SUSSTAT.bit.READY;
1435 }
1436 
1442 {
1443  ADC1->SQCFG0.reg = (uint32)s_value.reg;
1444 }
1445 
1451 {
1452  ADC1->SQCFG0.bit.SQREP = u8_value;
1453 }
1454 
1460 {
1461  return (uint8)ADC1->SQCFG0.bit.SQREP;
1462 }
1463 
1467 {
1468  ADC1->SQCFG0.bit.COLLCFG = 1u;
1469 }
1470 
1474 {
1475  ADC1->SQCFG0.bit.COLLCFG = 0u;
1476 }
1477 
1481 {
1482  ADC1->SQCFG0.bit.WFRCFG = 1u;
1483 }
1484 
1488 {
1489  ADC1->SQCFG0.bit.WFRCFG = 0u;
1490 }
1491 
1497 {
1498  ADC1->SQCFG0.bit.TRGSEL = (uint8)e_Seq0Trig;
1499 }
1500 
1506 {
1507  return ADC1->SQCFG0.bit.TRGSEL;
1508 }
1509 
1515 {
1516  ADC1->SQCFG0.bit.GTSEL = u8_value;
1517 }
1518 
1524 {
1525  return (uint8)ADC1->SQCFG0.bit.GTSEL;
1526 }
1527 
1531 {
1532  ADC1->SQCFG0.bit.GTSW = 1u;
1533 }
1534 
1538 {
1539  ADC1->SQCFG0.bit.GTSW = 0u;
1540 }
1541 
1547 {
1548  ADC1->SQSLOT0.bit.CHSEL0 = u8_value;
1549 }
1550 
1556 {
1557  return (uint8)ADC1->SQSLOT0.bit.CHSEL0;
1558 }
1559 
1565 {
1566  ADC1->SQSLOT0.bit.CHSEL1 = u8_value;
1567 }
1568 
1574 {
1575  return (uint8)ADC1->SQSLOT0.bit.CHSEL1;
1576 }
1577 
1583 {
1584  ADC1->SQSLOT0.bit.CHSEL2 = u8_value;
1585 }
1586 
1592 {
1593  return (uint8)ADC1->SQSLOT0.bit.CHSEL2;
1594 }
1595 
1601 {
1602  ADC1->SQSLOT0.bit.CHSEL3 = u8_value;
1603 }
1604 
1610 {
1611  return (uint8)ADC1->SQSLOT0.bit.CHSEL3;
1612 }
1613 
1619 {
1620  ADC1->SQCFG1.reg = (uint32)s_value.reg;
1621 }
1622 
1628 {
1629  ADC1->SQCFG1.bit.SQREP = u8_value;
1630 }
1631 
1637 {
1638  return (uint8)ADC1->SQCFG1.bit.SQREP;
1639 }
1640 
1644 {
1645  ADC1->SQCFG1.bit.COLLCFG = 1u;
1646 }
1647 
1651 {
1652  ADC1->SQCFG1.bit.COLLCFG = 0u;
1653 }
1654 
1658 {
1659  ADC1->SQCFG1.bit.WFRCFG = 1u;
1660 }
1661 
1665 {
1666  ADC1->SQCFG1.bit.WFRCFG = 0u;
1667 }
1668 
1674 {
1675  ADC1->SQCFG1.bit.TRGSEL = (uint8)e_Seq1Trig;
1676 }
1677 
1683 {
1684  return ADC1->SQCFG1.bit.TRGSEL;
1685 }
1686 
1692 {
1693  ADC1->SQCFG1.bit.GTSEL = u8_value;
1694 }
1695 
1701 {
1702  return (uint8)ADC1->SQCFG1.bit.GTSEL;
1703 }
1704 
1708 {
1709  ADC1->SQCFG1.bit.GTSW = 1u;
1710 }
1711 
1715 {
1716  ADC1->SQCFG1.bit.GTSW = 0u;
1717 }
1718 
1724 {
1725  ADC1->SQSLOT1.bit.CHSEL0 = u8_value;
1726 }
1727 
1733 {
1734  return (uint8)ADC1->SQSLOT1.bit.CHSEL0;
1735 }
1736 
1742 {
1743  ADC1->SQSLOT1.bit.CHSEL1 = u8_value;
1744 }
1745 
1751 {
1752  return (uint8)ADC1->SQSLOT1.bit.CHSEL1;
1753 }
1754 
1760 {
1761  ADC1->SQSLOT1.bit.CHSEL2 = u8_value;
1762 }
1763 
1769 {
1770  return (uint8)ADC1->SQSLOT1.bit.CHSEL2;
1771 }
1772 
1778 {
1779  ADC1->SQSLOT1.bit.CHSEL3 = u8_value;
1780 }
1781 
1787 {
1788  return (uint8)ADC1->SQSLOT1.bit.CHSEL3;
1789 }
1790 
1796 {
1797  ADC1->SQCFG2.reg = (uint32)s_value.reg;
1798 }
1799 
1805 {
1806  ADC1->SQCFG2.bit.SQREP = u8_value;
1807 }
1808 
1814 {
1815  return (uint8)ADC1->SQCFG2.bit.SQREP;
1816 }
1817 
1821 {
1822  ADC1->SQCFG2.bit.COLLCFG = 1u;
1823 }
1824 
1828 {
1829  ADC1->SQCFG2.bit.COLLCFG = 0u;
1830 }
1831 
1835 {
1836  ADC1->SQCFG2.bit.WFRCFG = 1u;
1837 }
1838 
1842 {
1843  ADC1->SQCFG2.bit.WFRCFG = 0u;
1844 }
1845 
1851 {
1852  ADC1->SQCFG2.bit.TRGSEL = (uint8)e_Seq2Trig;
1853 }
1854 
1860 {
1861  return ADC1->SQCFG2.bit.TRGSEL;
1862 }
1863 
1869 {
1870  ADC1->SQCFG2.bit.GTSEL = u8_value;
1871 }
1872 
1878 {
1879  return (uint8)ADC1->SQCFG2.bit.GTSEL;
1880 }
1881 
1885 {
1886  ADC1->SQCFG2.bit.GTSW = 1u;
1887 }
1888 
1892 {
1893  ADC1->SQCFG2.bit.GTSW = 0u;
1894 }
1895 
1901 {
1902  ADC1->SQSLOT2.bit.CHSEL0 = u8_value;
1903 }
1904 
1910 {
1911  return (uint8)ADC1->SQSLOT2.bit.CHSEL0;
1912 }
1913 
1919 {
1920  ADC1->SQSLOT2.bit.CHSEL1 = u8_value;
1921 }
1922 
1928 {
1929  return (uint8)ADC1->SQSLOT2.bit.CHSEL1;
1930 }
1931 
1937 {
1938  ADC1->SQSLOT2.bit.CHSEL2 = u8_value;
1939 }
1940 
1946 {
1947  return (uint8)ADC1->SQSLOT2.bit.CHSEL2;
1948 }
1949 
1955 {
1956  ADC1->SQSLOT2.bit.CHSEL3 = u8_value;
1957 }
1958 
1964 {
1965  return (uint8)ADC1->SQSLOT2.bit.CHSEL3;
1966 }
1967 
1973 {
1974  ADC1->SQCFG3.reg = (uint32)s_value.reg;
1975 }
1976 
1982 {
1983  ADC1->SQCFG3.bit.SQREP = u8_value;
1984 }
1985 
1991 {
1992  return (uint8)ADC1->SQCFG3.bit.SQREP;
1993 }
1994 
1998 {
1999  ADC1->SQCFG3.bit.COLLCFG = 1u;
2000 }
2001 
2005 {
2006  ADC1->SQCFG3.bit.COLLCFG = 0u;
2007 }
2008 
2012 {
2013  ADC1->SQCFG3.bit.WFRCFG = 1u;
2014 }
2015 
2019 {
2020  ADC1->SQCFG3.bit.WFRCFG = 0u;
2021 }
2022 
2028 {
2029  ADC1->SQCFG3.bit.TRGSEL = (uint8)e_Seq3Trig;
2030 }
2031 
2037 {
2038  return ADC1->SQCFG3.bit.TRGSEL;
2039 }
2040 
2046 {
2047  ADC1->SQCFG3.bit.GTSEL = u8_value;
2048 }
2049 
2055 {
2056  return (uint8)ADC1->SQCFG3.bit.GTSEL;
2057 }
2058 
2062 {
2063  ADC1->SQCFG3.bit.GTSW = 1u;
2064 }
2065 
2069 {
2070  ADC1->SQCFG3.bit.GTSW = 0u;
2071 }
2072 
2078 {
2079  ADC1->SQSLOT3.bit.CHSEL0 = u8_value;
2080 }
2081 
2087 {
2088  return (uint8)ADC1->SQSLOT3.bit.CHSEL0;
2089 }
2090 
2096 {
2097  ADC1->SQSLOT3.bit.CHSEL1 = u8_value;
2098 }
2099 
2105 {
2106  return (uint8)ADC1->SQSLOT3.bit.CHSEL1;
2107 }
2108 
2114 {
2115  ADC1->SQSLOT3.bit.CHSEL2 = u8_value;
2116 }
2117 
2123 {
2124  return (uint8)ADC1->SQSLOT3.bit.CHSEL2;
2125 }
2126 
2132 {
2133  ADC1->SQSLOT3.bit.CHSEL3 = u8_value;
2134 }
2135 
2141 {
2142  return (uint8)ADC1->SQSLOT3.bit.CHSEL3;
2143 }
2144 
2150 {
2151  return (uint8)ADC1->SQSTAT.bit.WFR0;
2152 }
2153 
2159 {
2160  return (uint8)ADC1->SQSTAT.bit.WFR1;
2161 }
2162 
2168 {
2169  return (uint8)ADC1->SQSTAT.bit.WFR2;
2170 }
2171 
2177 {
2178  return (uint8)ADC1->SQSTAT.bit.WFR3;
2179 }
2180 
2186 {
2187  return (uint8)ADC1->SQSTAT.bit.COLL0;
2188 }
2189 
2195 {
2196  return (uint8)ADC1->SQSTAT.bit.COLL1;
2197 }
2198 
2204 {
2205  return (uint8)ADC1->SQSTAT.bit.COLL2;
2206 }
2207 
2213 {
2214  return (uint8)ADC1->SQSTAT.bit.COLL3;
2215 }
2216 
2222 {
2223  return (uint8)ADC1->SQSTAT.bit.SQ0;
2224 }
2225 
2231 {
2232  return (uint8)ADC1->SQSTAT.bit.SQ1;
2233 }
2234 
2240 {
2241  return (uint8)ADC1->SQSTAT.bit.SQ2;
2242 }
2243 
2249 {
2250  return (uint8)ADC1->SQSTAT.bit.SQ3;
2251 }
2252 
2258 {
2259  return (uint8)ADC1->SQSTAT.bit.SQNUM;
2260 }
2261 
2265 {
2266  ADC1->SQSTATCLR.bit.WFR0CLR = 1u;
2267 }
2268 
2272 {
2273  ADC1->SQSTATCLR.bit.WFR1CLR = 1u;
2274 }
2275 
2279 {
2280  ADC1->SQSTATCLR.bit.WFR2CLR = 1u;
2281 }
2282 
2286 {
2287  ADC1->SQSTATCLR.bit.WFR3CLR = 1u;
2288 }
2289 
2293 {
2294  ADC1->SQSTATCLR.bit.COLL0CLR = 1u;
2295 }
2296 
2300 {
2301  ADC1->SQSTATCLR.bit.COLL1CLR = 1u;
2302 }
2303 
2307 {
2308  ADC1->SQSTATCLR.bit.COLL2CLR = 1u;
2309 }
2310 
2314 {
2315  ADC1->SQSTATCLR.bit.COLL3CLR = 1u;
2316 }
2317 
2321 {
2322  ADC1->SQSTATCLR.bit.SQ0CLR = 1u;
2323 }
2324 
2328 {
2329  ADC1->SQSTATCLR.bit.SQ1CLR = 1u;
2330 }
2331 
2335 {
2336  ADC1->SQSTATCLR.bit.SQ2CLR = 1u;
2337 }
2338 
2342 {
2343  ADC1->SQSTATCLR.bit.SQ3CLR = 1u;
2344 }
2345 
2349 {
2350  ADC1->SQSTATSET.bit.WFR0SET = 1u;
2351 }
2352 
2356 {
2357  ADC1->SQSTATSET.bit.WFR1SET = 1u;
2358 }
2359 
2363 {
2364  ADC1->SQSTATSET.bit.WFR2SET = 1u;
2365 }
2366 
2370 {
2371  ADC1->SQSTATSET.bit.WFR3SET = 1u;
2372 }
2373 
2377 {
2378  ADC1->SQSTATSET.bit.COLL0SET = 1u;
2379 }
2380 
2384 {
2385  ADC1->SQSTATSET.bit.COLL1SET = 1u;
2386 }
2387 
2391 {
2392  ADC1->SQSTATSET.bit.COLL2SET = 1u;
2393 }
2394 
2398 {
2399  ADC1->SQSTATSET.bit.COLL3SET = 1u;
2400 }
2401 
2405 {
2406  ADC1->SQSTATSET.bit.SQ0SET = 1u;
2407 }
2408 
2412 {
2413  ADC1->SQSTATSET.bit.SQ1SET = 1u;
2414 }
2415 
2419 {
2420  ADC1->SQSTATSET.bit.SQ2SET = 1u;
2421 }
2422 
2426 {
2427  ADC1->SQSTATSET.bit.SQ3SET = 1u;
2428 }
2429 
2435 {
2436  ADC1->CHCFG0.reg = (uint32)s_value.reg;
2437 }
2438 
2444 {
2445  ADC1->CHCFG1.reg = (uint32)s_value.reg;
2446 }
2447 
2453 {
2454  ADC1->CHCFG2.reg = (uint32)s_value.reg;
2455 }
2456 
2462 {
2463  ADC1->CHCFG3.reg = (uint32)s_value.reg;
2464 }
2465 
2471 {
2472  ADC1->CHCFG4.reg = (uint32)s_value.reg;
2473 }
2474 
2480 {
2481  ADC1->CHCFG5.reg = (uint32)s_value.reg;
2482 }
2483 
2489 {
2490  ADC1->CHCFG6.reg = (uint32)s_value.reg;
2491 }
2492 
2498 {
2499  ADC1->CHCFG7.reg = (uint32)s_value.reg;
2500 }
2501 
2507 {
2508  ADC1->CHCFG8.reg = (uint32)s_value.reg;
2509 }
2510 
2516 {
2517  ADC1->CHCFG9.reg = (uint32)s_value.reg;
2518 }
2519 
2525 {
2526  ADC1->CHCFG10.reg = (uint32)s_value.reg;
2527 }
2528 
2534 {
2535  ADC1->CHCFG11.reg = (uint32)s_value.reg;
2536 }
2537 
2543 {
2544  ADC1->CHCFG12.reg = (uint32)s_value.reg;
2545 }
2546 
2552 {
2553  ADC1->CHCFG13.reg = (uint32)s_value.reg;
2554 }
2555 
2561 {
2562  ADC1->CHCFG14.reg = (uint32)s_value.reg;
2563 }
2564 
2570 {
2571  ADC1->CHCFG15.reg = (uint32)s_value.reg;
2572 }
2573 
2579 {
2580  ADC1->CHCFG16.reg = (uint32)s_value.reg;
2581 }
2582 
2588 {
2589  ADC1->CHCFG17.reg = (uint32)s_value.reg;
2590 }
2591 
2597 {
2598  ADC1->CHCFG18.reg = (uint32)s_value.reg;
2599 }
2600 
2606 {
2607  ADC1->CHCFG19.reg = (uint32)s_value.reg;
2608 }
2609 
2615 {
2616  ADC1->CHCFG0.bit.INSEL = (uint8)e_value;
2617 }
2618 
2624 {
2625  ADC1->CHCFG1.bit.INSEL = (uint8)e_value;
2626 }
2627 
2633 {
2634  ADC1->CHCFG2.bit.INSEL = (uint8)e_value;
2635 }
2636 
2642 {
2643  ADC1->CHCFG3.bit.INSEL = (uint8)e_value;
2644 }
2645 
2651 {
2652  ADC1->CHCFG4.bit.INSEL = (uint8)e_value;
2653 }
2654 
2660 {
2661  ADC1->CHCFG5.bit.INSEL = (uint8)e_value;
2662 }
2663 
2669 {
2670  ADC1->CHCFG6.bit.INSEL = (uint8)e_value;
2671 }
2672 
2678 {
2679  ADC1->CHCFG7.bit.INSEL = (uint8)e_value;
2680 }
2681 
2687 {
2688  ADC1->CHCFG8.bit.INSEL = (uint8)e_value;
2689 }
2690 
2696 {
2697  ADC1->CHCFG9.bit.INSEL = (uint8)e_value;
2698 }
2699 
2705 {
2706  ADC1->CHCFG10.bit.INSEL = (uint8)e_value;
2707 }
2708 
2714 {
2715  ADC1->CHCFG11.bit.INSEL = (uint8)e_value;
2716 }
2717 
2723 {
2724  ADC1->CHCFG12.bit.INSEL = (uint8)e_value;
2725 }
2726 
2732 {
2733  ADC1->CHCFG13.bit.INSEL = (uint8)e_value;
2734 }
2735 
2741 {
2742  ADC1->CHCFG14.bit.INSEL = (uint8)e_value;
2743 }
2744 
2750 {
2751  ADC1->CHCFG15.bit.INSEL = (uint8)e_value;
2752 }
2753 
2759 {
2760  ADC1->CHCFG16.bit.INSEL = (uint8)e_value;
2761 }
2762 
2768 {
2769  ADC1->CHCFG17.bit.INSEL = (uint8)e_value;
2770 }
2771 
2777 {
2778  ADC1->CHCFG18.bit.INSEL = (uint8)e_value;
2779 }
2780 
2786 {
2787  ADC1->CHCFG19.bit.INSEL = (uint8)e_value;
2788 }
2789 
2795 {
2796  return (uint8)ADC1->CHSTAT.bit.CH0;
2797 }
2798 
2804 {
2805  return (uint8)ADC1->CHSTAT.bit.CH1;
2806 }
2807 
2813 {
2814  return (uint8)ADC1->CHSTAT.bit.CH2;
2815 }
2816 
2822 {
2823  return (uint8)ADC1->CHSTAT.bit.CH3;
2824 }
2825 
2831 {
2832  return (uint8)ADC1->CHSTAT.bit.CH4;
2833 }
2834 
2840 {
2841  return (uint8)ADC1->CHSTAT.bit.CH5;
2842 }
2843 
2849 {
2850  return (uint8)ADC1->CHSTAT.bit.CH6;
2851 }
2852 
2858 {
2859  return (uint8)ADC1->CHSTAT.bit.CH7;
2860 }
2861 
2867 {
2868  return (uint8)ADC1->CHSTAT.bit.CH8;
2869 }
2870 
2876 {
2877  return (uint8)ADC1->CHSTAT.bit.CH9;
2878 }
2879 
2885 {
2886  return (uint8)ADC1->CHSTAT.bit.CH10;
2887 }
2888 
2894 {
2895  return (uint8)ADC1->CHSTAT.bit.CH11;
2896 }
2897 
2903 {
2904  return (uint8)ADC1->CHSTAT.bit.CH12;
2905 }
2906 
2912 {
2913  return (uint8)ADC1->CHSTAT.bit.CH13;
2914 }
2915 
2921 {
2922  return (uint8)ADC1->CHSTAT.bit.CH14;
2923 }
2924 
2930 {
2931  return (uint8)ADC1->CHSTAT.bit.CH15;
2932 }
2933 
2939 {
2940  return (uint8)ADC1->CHSTAT.bit.CH16;
2941 }
2942 
2948 {
2949  return (uint8)ADC1->CHSTAT.bit.CH17;
2950 }
2951 
2957 {
2958  return (uint8)ADC1->CHSTAT.bit.CH18;
2959 }
2960 
2966 {
2967  return (uint8)ADC1->CHSTAT.bit.CH19;
2968 }
2969 
2975 {
2976  return (uint8)ADC1->CHSTAT.bit.CHNUM;
2977 }
2978 
2982 {
2983  ADC1->CHSTATCLR.bit.CH0CLR = 1u;
2984 }
2985 
2989 {
2990  ADC1->CHSTATCLR.bit.CH1CLR = 1u;
2991 }
2992 
2996 {
2997  ADC1->CHSTATCLR.bit.CH2CLR = 1u;
2998 }
2999 
3003 {
3004  ADC1->CHSTATCLR.bit.CH3CLR = 1u;
3005 }
3006 
3010 {
3011  ADC1->CHSTATCLR.bit.CH4CLR = 1u;
3012 }
3013 
3017 {
3018  ADC1->CHSTATCLR.bit.CH5CLR = 1u;
3019 }
3020 
3024 {
3025  ADC1->CHSTATCLR.bit.CH6CLR = 1u;
3026 }
3027 
3031 {
3032  ADC1->CHSTATCLR.bit.CH7CLR = 1u;
3033 }
3034 
3038 {
3039  ADC1->CHSTATCLR.bit.CH8CLR = 1u;
3040 }
3041 
3045 {
3046  ADC1->CHSTATCLR.bit.CH9CLR = 1u;
3047 }
3048 
3052 {
3053  ADC1->CHSTATCLR.bit.CH10CLR = 1u;
3054 }
3055 
3059 {
3060  ADC1->CHSTATCLR.bit.CH11CLR = 1u;
3061 }
3062 
3066 {
3067  ADC1->CHSTATCLR.bit.CH12CLR = 1u;
3068 }
3069 
3073 {
3074  ADC1->CHSTATCLR.bit.CH13CLR = 1u;
3075 }
3076 
3080 {
3081  ADC1->CHSTATCLR.bit.CH14CLR = 1u;
3082 }
3083 
3087 {
3088  ADC1->CHSTATCLR.bit.CH15CLR = 1u;
3089 }
3090 
3094 {
3095  ADC1->CHSTATCLR.bit.CH16CLR = 1u;
3096 }
3097 
3101 {
3102  ADC1->CHSTATCLR.bit.CH17CLR = 1u;
3103 }
3104 
3108 {
3109  ADC1->CHSTATCLR.bit.CH18CLR = 1u;
3110 }
3111 
3115 {
3116  ADC1->CHSTATCLR.bit.CH19CLR = 1u;
3117 }
3118 
3122 {
3123  ADC1->CHSTATSET.bit.CH0SET = 1u;
3124 }
3125 
3129 {
3130  ADC1->CHSTATSET.bit.CH1SET = 1u;
3131 }
3132 
3136 {
3137  ADC1->CHSTATSET.bit.CH2SET = 1u;
3138 }
3139 
3143 {
3144  ADC1->CHSTATSET.bit.CH3SET = 1u;
3145 }
3146 
3150 {
3151  ADC1->CHSTATSET.bit.CH4SET = 1u;
3152 }
3153 
3157 {
3158  ADC1->CHSTATSET.bit.CH5SET = 1u;
3159 }
3160 
3164 {
3165  ADC1->CHSTATSET.bit.CH6SET = 1u;
3166 }
3167 
3171 {
3172  ADC1->CHSTATSET.bit.CH7SET = 1u;
3173 }
3174 
3178 {
3179  ADC1->CHSTATSET.bit.CH8SET = 1u;
3180 }
3181 
3185 {
3186  ADC1->CHSTATSET.bit.CH9SET = 1u;
3187 }
3188 
3192 {
3193  ADC1->CHSTATSET.bit.CH10SET = 1u;
3194 }
3195 
3199 {
3200  ADC1->CHSTATSET.bit.CH11SET = 1u;
3201 }
3202 
3206 {
3207  ADC1->CHSTATSET.bit.CH12SET = 1u;
3208 }
3209 
3213 {
3214  ADC1->CHSTATSET.bit.CH13SET = 1u;
3215 }
3216 
3220 {
3221  ADC1->CHSTATSET.bit.CH14SET = 1u;
3222 }
3223 
3227 {
3228  ADC1->CHSTATSET.bit.CH15SET = 1u;
3229 }
3230 
3234 {
3235  ADC1->CHSTATSET.bit.CH16SET = 1u;
3236 }
3237 
3241 {
3242  ADC1->CHSTATSET.bit.CH17SET = 1u;
3243 }
3244 
3248 {
3249  ADC1->CHSTATSET.bit.CH18SET = 1u;
3250 }
3251 
3255 {
3256  ADC1->CHSTATSET.bit.CH19SET = 1u;
3257 }
3258 
3264 {
3265  ADC1->CONVCFG0.reg = (uint32)s_value.reg;
3266 }
3267 
3273 {
3274  ADC1->CONVCFG1.reg = (uint32)s_value.reg;
3275 }
3276 
3282 {
3283  ADC1->CONVCFG2.reg = (uint32)s_value.reg;
3284 }
3285 
3291 {
3292  ADC1->CONVCFG3.reg = (uint32)s_value.reg;
3293 }
3294 
3298 {
3299  ADC1->CALEN.bit.CALEN0 = 1u;
3300 }
3301 
3305 {
3306  ADC1->CALEN.bit.CALEN0 = 0u;
3307 }
3308 
3312 {
3313  ADC1->CALEN.bit.CALEN1 = 1u;
3314 }
3315 
3319 {
3320  ADC1->CALEN.bit.CALEN1 = 0u;
3321 }
3322 
3326 {
3327  ADC1->CALEN.bit.CALEN2 = 1u;
3328 }
3329 
3333 {
3334  ADC1->CALEN.bit.CALEN2 = 0u;
3335 }
3336 
3340 {
3341  ADC1->CALEN.bit.CALEN3 = 1u;
3342 }
3343 
3347 {
3348  ADC1->CALEN.bit.CALEN3 = 0u;
3349 }
3350 
3354 {
3355  ADC1->CALEN.bit.CALEN4 = 1u;
3356 }
3357 
3361 {
3362  ADC1->CALEN.bit.CALEN4 = 0u;
3363 }
3364 
3368 {
3369  ADC1->CALEN.bit.CALEN5 = 1u;
3370 }
3371 
3375 {
3376  ADC1->CALEN.bit.CALEN5 = 0u;
3377 }
3378 
3382 {
3383  ADC1->CALEN.bit.CALEN6 = 1u;
3384 }
3385 
3389 {
3390  ADC1->CALEN.bit.CALEN6 = 0u;
3391 }
3392 
3396 {
3397  ADC1->CALEN.bit.CALEN7 = 1u;
3398 }
3399 
3403 {
3404  ADC1->CALEN.bit.CALEN7 = 0u;
3405 }
3406 
3410 {
3411  ADC1->CALEN.bit.CALEN8 = 1u;
3412 }
3413 
3417 {
3418  ADC1->CALEN.bit.CALEN8 = 0u;
3419 }
3420 
3424 {
3425  ADC1->CALEN.bit.CALEN9 = 1u;
3426 }
3427 
3431 {
3432  ADC1->CALEN.bit.CALEN9 = 0u;
3433 }
3434 
3438 {
3439  ADC1->CALEN.bit.CALEN10 = 1u;
3440 }
3441 
3445 {
3446  ADC1->CALEN.bit.CALEN10 = 0u;
3447 }
3448 
3452 {
3453  ADC1->CALEN.bit.CALEN11 = 1u;
3454 }
3455 
3459 {
3460  ADC1->CALEN.bit.CALEN11 = 0u;
3461 }
3462 
3466 {
3467  ADC1->CALEN.bit.CALEN12 = 1u;
3468 }
3469 
3473 {
3474  ADC1->CALEN.bit.CALEN12 = 0u;
3475 }
3476 
3480 {
3481  ADC1->CALEN.bit.CALEN13 = 1u;
3482 }
3483 
3487 {
3488  ADC1->CALEN.bit.CALEN13 = 0u;
3489 }
3490 
3494 {
3495  ADC1->CALEN.bit.CALEN14 = 1u;
3496 }
3497 
3501 {
3502  ADC1->CALEN.bit.CALEN14 = 0u;
3503 }
3504 
3508 {
3509  ADC1->CALEN.bit.CALEN15 = 1u;
3510 }
3511 
3515 {
3516  ADC1->CALEN.bit.CALEN15 = 0u;
3517 }
3518 
3522 {
3523  ADC1->CALEN.bit.CALEN16 = 1u;
3524 }
3525 
3529 {
3530  ADC1->CALEN.bit.CALEN16 = 0u;
3531 }
3532 
3536 {
3537  ADC1->CALEN.bit.CALEN17 = 1u;
3538 }
3539 
3543 {
3544  ADC1->CALEN.bit.CALEN17 = 0u;
3545 }
3546 
3550 {
3551  ADC1->CALEN.bit.CALEN18 = 1u;
3552 }
3553 
3557 {
3558  ADC1->CALEN.bit.CALEN18 = 0u;
3559 }
3560 
3564 {
3565  ADC1->CALEN.bit.CALEN19 = 1u;
3566 }
3567 
3571 {
3572  ADC1->CALEN.bit.CALEN19 = 0u;
3573 }
3574 
3578 {
3579  ADC1->CALEN.bit.CALEN20 = 1u;
3580 }
3581 
3585 {
3586  ADC1->CALEN.bit.CALEN20 = 0u;
3587 }
3588 
3592 {
3593  ADC1->CALEN.bit.CALEN21 = 1u;
3594 }
3595 
3599 {
3600  ADC1->CALEN.bit.CALEN21 = 0u;
3601 }
3602 
3606 {
3607  ADC1->CALEN.bit.CALEN22 = 1u;
3608 }
3609 
3613 {
3614  ADC1->CALEN.bit.CALEN22 = 0u;
3615 }
3616 
3620 {
3621  ADC1->CALEN.bit.CALEN23 = 1u;
3622 }
3623 
3627 {
3628  ADC1->CALEN.bit.CALEN23 = 0u;
3629 }
3630 
3634 {
3635  ADC1->CALEN.bit.CALEN24 = 1u;
3636 }
3637 
3641 {
3642  ADC1->CALEN.bit.CALEN24 = 0u;
3643 }
3644 
3648 {
3649  ADC1->CALEN.bit.CALEN25 = 1u;
3650 }
3651 
3655 {
3656  ADC1->CALEN.bit.CALEN25 = 0u;
3657 }
3658 
3662 {
3663  ADC1->CALEN.bit.CALEN26 = 1u;
3664 }
3665 
3669 {
3670  ADC1->CALEN.bit.CALEN26 = 0u;
3671 }
3672 
3676 {
3677  ADC1->CALPEN.bit.CALPEN0 = 1u;
3678 }
3679 
3683 {
3684  ADC1->CALPEN.bit.CALPEN0 = 0u;
3685 }
3686 
3690 {
3691  ADC1->CALPEN.bit.CALPEN1 = 1u;
3692 }
3693 
3697 {
3698  ADC1->CALPEN.bit.CALPEN1 = 0u;
3699 }
3700 
3704 {
3705  ADC1->CALPEN.bit.CALPEN2 = 1u;
3706 }
3707 
3711 {
3712  ADC1->CALPEN.bit.CALPEN2 = 0u;
3713 }
3714 
3718 {
3719  ADC1->CALPEN.bit.CALPEN3 = 1u;
3720 }
3721 
3725 {
3726  ADC1->CALPEN.bit.CALPEN3 = 0u;
3727 }
3728 
3732 {
3733  ADC1->CALPEN.bit.CALPEN4 = 1u;
3734 }
3735 
3739 {
3740  ADC1->CALPEN.bit.CALPEN4 = 0u;
3741 }
3742 
3746 {
3747  ADC1->CALPEN.bit.CALPEN5 = 1u;
3748 }
3749 
3753 {
3754  ADC1->CALPEN.bit.CALPEN5 = 0u;
3755 }
3756 
3760 {
3761  ADC1->CALPEN.bit.CALPEN6 = 1u;
3762 }
3763 
3767 {
3768  ADC1->CALPEN.bit.CALPEN6 = 0u;
3769 }
3770 
3774 {
3775  ADC1->CALPEN.bit.CALPEN7 = 1u;
3776 }
3777 
3781 {
3782  ADC1->CALPEN.bit.CALPEN7 = 0u;
3783 }
3784 
3788 {
3789  ADC1->CALPEN.bit.CALPEN8 = 1u;
3790 }
3791 
3795 {
3796  ADC1->CALPEN.bit.CALPEN8 = 0u;
3797 }
3798 
3802 {
3803  ADC1->CALPEN.bit.CALPEN9 = 1u;
3804 }
3805 
3809 {
3810  ADC1->CALPEN.bit.CALPEN9 = 0u;
3811 }
3812 
3816 {
3817  ADC1->CALPEN.bit.CALPEN10 = 1u;
3818 }
3819 
3823 {
3824  ADC1->CALPEN.bit.CALPEN10 = 0u;
3825 }
3826 
3830 {
3831  ADC1->CALPEN.bit.CALPEN11 = 1u;
3832 }
3833 
3837 {
3838  ADC1->CALPEN.bit.CALPEN11 = 0u;
3839 }
3840 
3844 {
3845  ADC1->CALPEN.bit.CALPEN12 = 1u;
3846 }
3847 
3851 {
3852  ADC1->CALPEN.bit.CALPEN12 = 0u;
3853 }
3854 
3858 {
3859  ADC1->CALPEN.bit.CALPEN13 = 1u;
3860 }
3861 
3865 {
3866  ADC1->CALPEN.bit.CALPEN13 = 0u;
3867 }
3868 
3872 {
3873  ADC1->CALPEN.bit.CALPEN14 = 1u;
3874 }
3875 
3879 {
3880  ADC1->CALPEN.bit.CALPEN14 = 0u;
3881 }
3882 
3886 {
3887  ADC1->CALPEN.bit.CALPEN15 = 1u;
3888 }
3889 
3893 {
3894  ADC1->CALPEN.bit.CALPEN15 = 0u;
3895 }
3896 
3900 {
3901  ADC1->CALPEN.bit.CALPEN16 = 1u;
3902 }
3903 
3907 {
3908  ADC1->CALPEN.bit.CALPEN16 = 0u;
3909 }
3910 
3914 {
3915  ADC1->CALPEN.bit.CALPEN17 = 1u;
3916 }
3917 
3921 {
3922  ADC1->CALPEN.bit.CALPEN17 = 0u;
3923 }
3924 
3928 {
3929  ADC1->CALPEN.bit.CALPEN18 = 1u;
3930 }
3931 
3935 {
3936  ADC1->CALPEN.bit.CALPEN18 = 0u;
3937 }
3938 
3942 {
3943  ADC1->CALPEN.bit.CALPEN19 = 1u;
3944 }
3945 
3949 {
3950  ADC1->CALPEN.bit.CALPEN19 = 0u;
3951 }
3952 
3956 {
3957  ADC1->CALPEN.bit.CALPEN20 = 1u;
3958 }
3959 
3963 {
3964  ADC1->CALPEN.bit.CALPEN20 = 0u;
3965 }
3966 
3970 {
3971  ADC1->CALPEN.bit.CALPEN21 = 1u;
3972 }
3973 
3977 {
3978  ADC1->CALPEN.bit.CALPEN21 = 0u;
3979 }
3980 
3984 {
3985  ADC1->CALPEN.bit.CALPEN22 = 1u;
3986 }
3987 
3991 {
3992  ADC1->CALPEN.bit.CALPEN22 = 0u;
3993 }
3994 
3998 {
3999  ADC1->CALPEN.bit.CALPEN23 = 1u;
4000 }
4001 
4005 {
4006  ADC1->CALPEN.bit.CALPEN23 = 0u;
4007 }
4008 
4012 {
4013  ADC1->CALPEN.bit.CALPEN24 = 1u;
4014 }
4015 
4019 {
4020  ADC1->CALPEN.bit.CALPEN24 = 0u;
4021 }
4022 
4026 {
4027  ADC1->CALPEN.bit.CALPEN25 = 1u;
4028 }
4029 
4033 {
4034  ADC1->CALPEN.bit.CALPEN25 = 0u;
4035 }
4036 
4040 {
4041  ADC1->CALPEN.bit.CALPEN26 = 1u;
4042 }
4043 
4047 {
4048  ADC1->CALPEN.bit.CALPEN26 = 0u;
4049 }
4050 
4056 {
4057  ADC1->FILTCFG.bit.COEF_A0 = u8_value;
4058 }
4059 
4065 {
4066  return (uint8)ADC1->FILTCFG.bit.COEF_A0;
4067 }
4068 
4074 {
4075  ADC1->FILTCFG.bit.COEF_A1 = u8_value;
4076 }
4077 
4083 {
4084  return (uint8)ADC1->FILTCFG.bit.COEF_A1;
4085 }
4086 
4092 {
4093  ADC1->FILTCFG.bit.COEF_A2 = u8_value;
4094 }
4095 
4101 {
4102  return (uint8)ADC1->FILTCFG.bit.COEF_A2;
4103 }
4104 
4110 {
4111  ADC1->FILTCFG.bit.COEF_A3 = u8_value;
4112 }
4113 
4119 {
4120  return (uint8)ADC1->FILTCFG.bit.COEF_A3;
4121 }
4122 
4128 {
4129  return (uint16)ADC1->FIL0.bit.FILRESULT;
4130 }
4131 
4137 {
4138  return (uint16)ADC1->FIL1.bit.FILRESULT;
4139 }
4140 
4146 {
4147  return (uint16)ADC1->FIL2.bit.FILRESULT;
4148 }
4149 
4155 {
4156  return (uint16)ADC1->FIL3.bit.FILRESULT;
4157 }
4158 
4164 {
4165  return (uint8)ADC1->FILSTAT.bit.FIL0;
4166 }
4167 
4173 {
4174  return (uint8)ADC1->FILSTAT.bit.FIL1;
4175 }
4176 
4182 {
4183  return (uint8)ADC1->FILSTAT.bit.FIL2;
4184 }
4185 
4191 {
4192  return (uint8)ADC1->FILSTAT.bit.FIL3;
4193 }
4194 
4198 {
4199  ADC1->FILSTATCLR.bit.FIL0CLR = 1u;
4200 }
4201 
4205 {
4206  ADC1->FILSTATCLR.bit.FIL1CLR = 1u;
4207 }
4208 
4212 {
4213  ADC1->FILSTATCLR.bit.FIL2CLR = 1u;
4214 }
4215 
4219 {
4220  ADC1->FILSTATCLR.bit.FIL3CLR = 1u;
4221 }
4222 
4226 {
4227  ADC1->FILSTATSET.bit.FIL0SET = 1u;
4228 }
4229 
4233 {
4234  ADC1->FILSTATSET.bit.FIL1SET = 1u;
4235 }
4236 
4240 {
4241  ADC1->FILSTATSET.bit.FIL2SET = 1u;
4242 }
4243 
4247 {
4248  ADC1->FILSTATSET.bit.FIL3SET = 1u;
4249 }
4250 
4256 {
4257  return (uint16)ADC1->RES0.bit.RESULT;
4258 }
4259 
4265 {
4266  return (uint8)ADC1->RES0.bit.VALID;
4267 }
4268 
4274 {
4275  return (uint16)ADC1->RES1.bit.RESULT;
4276 }
4277 
4283 {
4284  return (uint8)ADC1->RES1.bit.VALID;
4285 }
4286 
4292 {
4293  return (uint16)ADC1->RES2.bit.RESULT;
4294 }
4295 
4301 {
4302  return (uint8)ADC1->RES2.bit.VALID;
4303 }
4304 
4310 {
4311  return (uint16)ADC1->RES3.bit.RESULT;
4312 }
4313 
4319 {
4320  return (uint8)ADC1->RES3.bit.VALID;
4321 }
4322 
4328 {
4329  return (uint16)ADC1->RES4.bit.RESULT;
4330 }
4331 
4337 {
4338  return (uint8)ADC1->RES4.bit.VALID;
4339 }
4340 
4346 {
4347  return (uint16)ADC1->RES5.bit.RESULT;
4348 }
4349 
4355 {
4356  return (uint8)ADC1->RES5.bit.VALID;
4357 }
4358 
4364 {
4365  return (uint16)ADC1->RES6.bit.RESULT;
4366 }
4367 
4373 {
4374  return (uint8)ADC1->RES6.bit.VALID;
4375 }
4376 
4382 {
4383  return (uint16)ADC1->RES7.bit.RESULT;
4384 }
4385 
4391 {
4392  return (uint8)ADC1->RES7.bit.VALID;
4393 }
4394 
4400 {
4401  return (uint16)ADC1->RES8.bit.RESULT;
4402 }
4403 
4409 {
4410  return (uint8)ADC1->RES8.bit.VALID;
4411 }
4412 
4418 {
4419  return (uint16)ADC1->RES9.bit.RESULT;
4420 }
4421 
4427 {
4428  return (uint8)ADC1->RES9.bit.VALID;
4429 }
4430 
4436 {
4437  return (uint16)ADC1->RES10.bit.RESULT;
4438 }
4439 
4445 {
4446  return (uint8)ADC1->RES10.bit.VALID;
4447 }
4448 
4454 {
4455  return (uint16)ADC1->RES11.bit.RESULT;
4456 }
4457 
4463 {
4464  return (uint8)ADC1->RES11.bit.VALID;
4465 }
4466 
4472 {
4473  return (uint16)ADC1->RES12.bit.RESULT;
4474 }
4475 
4481 {
4482  return (uint8)ADC1->RES12.bit.VALID;
4483 }
4484 
4490 {
4491  return (uint16)ADC1->RES13.bit.RESULT;
4492 }
4493 
4499 {
4500  return (uint8)ADC1->RES13.bit.VALID;
4501 }
4502 
4508 {
4509  return (uint16)ADC1->RES14.bit.RESULT;
4510 }
4511 
4517 {
4518  return (uint8)ADC1->RES14.bit.VALID;
4519 }
4520 
4526 {
4527  return (uint16)ADC1->RES15.bit.RESULT;
4528 }
4529 
4535 {
4536  return (uint8)ADC1->RES15.bit.VALID;
4537 }
4538 
4544 {
4545  return (uint16)ADC1->RES16.bit.RESULT;
4546 }
4547 
4553 {
4554  return (uint8)ADC1->RES16.bit.VALID;
4555 }
4556 
4562 {
4563  return (uint16)ADC1->RES17.bit.RESULT;
4564 }
4565 
4571 {
4572  return (uint8)ADC1->RES17.bit.VALID;
4573 }
4574 
4580 {
4581  return (uint16)ADC1->RES18.bit.RESULT;
4582 }
4583 
4589 {
4590  return (uint8)ADC1->RES18.bit.VALID;
4591 }
4592 
4598 {
4599  return (uint16)ADC1->RES19.bit.RESULT;
4600 }
4601 
4607 {
4608  return (uint8)ADC1->RES19.bit.VALID;
4609 }
4610 
4616 {
4617  ADC1->CMPCFG0.reg = (uint32)s_value.reg;
4618 }
4619 
4625 {
4626  ADC1->CMPCFG1.reg = (uint32)s_value.reg;
4627 }
4628 
4634 {
4635  ADC1->CMPCFG2.reg = (uint32)s_value.reg;
4636 }
4637 
4643 {
4644  ADC1->CMPCFG3.reg = (uint32)s_value.reg;
4645 }
4646 
4652 {
4653  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_IS;
4654 }
4655 
4661 {
4662  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_IS;
4663 }
4664 
4670 {
4671  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_IS;
4672 }
4673 
4679 {
4680  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_IS;
4681 }
4682 
4688 {
4689  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_STS;
4690 }
4691 
4697 {
4698  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_STS;
4699 }
4700 
4706 {
4707  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_STS;
4708 }
4709 
4715 {
4716  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_STS;
4717 }
4718 
4724 {
4725  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_IS;
4726 }
4727 
4733 {
4734  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_IS;
4735 }
4736 
4742 {
4743  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_IS;
4744 }
4745 
4751 {
4752  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_IS;
4753 }
4754 
4760 {
4761  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_STS;
4762 }
4763 
4769 {
4770  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_STS;
4771 }
4772 
4778 {
4779  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_STS;
4780 }
4781 
4787 {
4788  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_STS;
4789 }
4790 
4794 {
4795  ADC1->CMPSTATCLR.bit.CMP_UP0_ISCLR = 1u;
4796 }
4797 
4801 {
4802  ADC1->CMPSTATCLR.bit.CMP_UP1_ISCLR = 1u;
4803 }
4804 
4808 {
4809  ADC1->CMPSTATCLR.bit.CMP_UP2_ISCLR = 1u;
4810 }
4811 
4815 {
4816  ADC1->CMPSTATCLR.bit.CMP_UP3_ISCLR = 1u;
4817 }
4818 
4822 {
4823  ADC1->CMPSTATCLR.bit.CMP_UP0_STSCLR = 1u;
4824 }
4825 
4829 {
4830  ADC1->CMPSTATCLR.bit.CMP_UP1_STSCLR = 1u;
4831 }
4832 
4836 {
4837  ADC1->CMPSTATCLR.bit.CMP_UP2_STSCLR = 1u;
4838 }
4839 
4843 {
4844  ADC1->CMPSTATCLR.bit.CMP_UP3_STSCLR = 1u;
4845 }
4846 
4850 {
4851  ADC1->CMPSTATCLR.bit.CMP_LO0_ISCLR = 1u;
4852 }
4853 
4857 {
4858  ADC1->CMPSTATCLR.bit.CMP_LO1_ISCLR = 1u;
4859 }
4860 
4864 {
4865  ADC1->CMPSTATCLR.bit.CMP_LO2_ISCLR = 1u;
4866 }
4867 
4871 {
4872  ADC1->CMPSTATCLR.bit.CMP_LO3_ISCLR = 1u;
4873 }
4874 
4878 {
4879  ADC1->CMPSTATCLR.bit.CMP_LO0_STSCLR = 1u;
4880 }
4881 
4885 {
4886  ADC1->CMPSTATCLR.bit.CMP_LO1_STSCLR = 1u;
4887 }
4888 
4892 {
4893  ADC1->CMPSTATCLR.bit.CMP_LO2_STSCLR = 1u;
4894 }
4895 
4899 {
4900  ADC1->CMPSTATCLR.bit.CMP_LO3_STSCLR = 1u;
4901 }
4902 
4906 {
4907  ADC1->CMPSTATSET.bit.CMP_UP0_ISSET = 1u;
4908 }
4909 
4913 {
4914  ADC1->CMPSTATSET.bit.CMP_UP1_ISSET = 1u;
4915 }
4916 
4920 {
4921  ADC1->CMPSTATSET.bit.CMP_UP2_ISSET = 1u;
4922 }
4923 
4927 {
4928  ADC1->CMPSTATSET.bit.CMP_UP3_ISSET = 1u;
4929 }
4930 
4934 {
4935  ADC1->CMPSTATSET.bit.CMP_UP0_STSSET = 1u;
4936 }
4937 
4941 {
4942  ADC1->CMPSTATSET.bit.CMP_UP1_STSSET = 1u;
4943 }
4944 
4948 {
4949  ADC1->CMPSTATSET.bit.CMP_UP2_STSSET = 1u;
4950 }
4951 
4955 {
4956  ADC1->CMPSTATSET.bit.CMP_UP3_STSSET = 1u;
4957 }
4958 
4962 {
4963  ADC1->CMPSTATSET.bit.CMP_LO0_ISSET = 1u;
4964 }
4965 
4969 {
4970  ADC1->CMPSTATSET.bit.CMP_LO1_ISSET = 1u;
4971 }
4972 
4976 {
4977  ADC1->CMPSTATSET.bit.CMP_LO2_ISSET = 1u;
4978 }
4979 
4983 {
4984  ADC1->CMPSTATSET.bit.CMP_LO3_ISSET = 1u;
4985 }
4986 
4990 {
4991  ADC1->CMPSTATSET.bit.CMP_LO0_STSSET = 1u;
4992 }
4993 
4997 {
4998  ADC1->CMPSTATSET.bit.CMP_LO1_STSSET = 1u;
4999 }
5000 
5004 {
5005  ADC1->CMPSTATSET.bit.CMP_LO2_STSSET = 1u;
5006 }
5007 
5011 {
5012  ADC1->CMPSTATSET.bit.CMP_LO3_STSSET = 1u;
5013 }
5014 
5018 {
5019  ADC1->IEN0.bit.IEN_UP0 = 1u;
5020 }
5021 
5025 {
5026  ADC1->IEN0.bit.IEN_UP0 = 0u;
5027 }
5028 
5032 {
5033  ADC1->IEN0.bit.IEN_UP1 = 1u;
5034 }
5035 
5039 {
5040  ADC1->IEN0.bit.IEN_UP1 = 0u;
5041 }
5042 
5046 {
5047  ADC1->IEN0.bit.IEN_UP2 = 1u;
5048 }
5049 
5053 {
5054  ADC1->IEN0.bit.IEN_UP2 = 0u;
5055 }
5056 
5060 {
5061  ADC1->IEN0.bit.IEN_UP3 = 1u;
5062 }
5063 
5067 {
5068  ADC1->IEN0.bit.IEN_UP3 = 0u;
5069 }
5070 
5074 {
5075  ADC1->IEN0.bit.IEN_LO0 = 1u;
5076 }
5077 
5081 {
5082  ADC1->IEN0.bit.IEN_LO0 = 0u;
5083 }
5084 
5088 {
5089  ADC1->IEN0.bit.IEN_LO1 = 1u;
5090 }
5091 
5095 {
5096  ADC1->IEN0.bit.IEN_LO1 = 0u;
5097 }
5098 
5102 {
5103  ADC1->IEN0.bit.IEN_LO2 = 1u;
5104 }
5105 
5109 {
5110  ADC1->IEN0.bit.IEN_LO2 = 0u;
5111 }
5112 
5116 {
5117  ADC1->IEN0.bit.IEN_LO3 = 1u;
5118 }
5119 
5123 {
5124  ADC1->IEN0.bit.IEN_LO3 = 0u;
5125 }
5126 
5130 {
5131  ADC1->IEN0.bit.IEN_SQ0 = 1u;
5132 }
5133 
5137 {
5138  ADC1->IEN0.bit.IEN_SQ0 = 0u;
5139 }
5140 
5144 {
5145  ADC1->IEN0.bit.IEN_SQ1 = 1u;
5146 }
5147 
5151 {
5152  ADC1->IEN0.bit.IEN_SQ1 = 0u;
5153 }
5154 
5158 {
5159  ADC1->IEN0.bit.IEN_SQ2 = 1u;
5160 }
5161 
5165 {
5166  ADC1->IEN0.bit.IEN_SQ2 = 0u;
5167 }
5168 
5172 {
5173  ADC1->IEN0.bit.IEN_SQ3 = 1u;
5174 }
5175 
5179 {
5180  ADC1->IEN0.bit.IEN_SQ3 = 0u;
5181 }
5182 
5186 {
5187  ADC1->IEN0.bit.IEN_CH0 = 1u;
5188 }
5189 
5193 {
5194  ADC1->IEN0.bit.IEN_CH0 = 0u;
5195 }
5196 
5200 {
5201  ADC1->IEN0.bit.IEN_CH1 = 1u;
5202 }
5203 
5207 {
5208  ADC1->IEN0.bit.IEN_CH1 = 0u;
5209 }
5210 
5214 {
5215  ADC1->IEN0.bit.IEN_CH2 = 1u;
5216 }
5217 
5221 {
5222  ADC1->IEN0.bit.IEN_CH2 = 0u;
5223 }
5224 
5228 {
5229  ADC1->IEN0.bit.IEN_CH3 = 1u;
5230 }
5231 
5235 {
5236  ADC1->IEN0.bit.IEN_CH3 = 0u;
5237 }
5238 
5242 {
5243  ADC1->IEN0.bit.IEN_CH4 = 1u;
5244 }
5245 
5249 {
5250  ADC1->IEN0.bit.IEN_CH4 = 0u;
5251 }
5252 
5256 {
5257  ADC1->IEN0.bit.IEN_CH5 = 1u;
5258 }
5259 
5263 {
5264  ADC1->IEN0.bit.IEN_CH5 = 0u;
5265 }
5266 
5270 {
5271  ADC1->IEN0.bit.IEN_CH6 = 1u;
5272 }
5273 
5277 {
5278  ADC1->IEN0.bit.IEN_CH6 = 0u;
5279 }
5280 
5284 {
5285  ADC1->IEN0.bit.IEN_CH7 = 1u;
5286 }
5287 
5291 {
5292  ADC1->IEN0.bit.IEN_CH7 = 0u;
5293 }
5294 
5298 {
5299  ADC1->IEN0.bit.IEN_CH8 = 1u;
5300 }
5301 
5305 {
5306  ADC1->IEN0.bit.IEN_CH8 = 0u;
5307 }
5308 
5312 {
5313  ADC1->IEN0.bit.IEN_CH9 = 1u;
5314 }
5315 
5319 {
5320  ADC1->IEN0.bit.IEN_CH9 = 0u;
5321 }
5322 
5326 {
5327  ADC1->IEN0.bit.IEN_CH10 = 1u;
5328 }
5329 
5333 {
5334  ADC1->IEN0.bit.IEN_CH10 = 0u;
5335 }
5336 
5340 {
5341  ADC1->IEN0.bit.IEN_CH11 = 1u;
5342 }
5343 
5347 {
5348  ADC1->IEN0.bit.IEN_CH11 = 0u;
5349 }
5350 
5354 {
5355  ADC1->IEN0.bit.IEN_CH12 = 1u;
5356 }
5357 
5361 {
5362  ADC1->IEN0.bit.IEN_CH12 = 0u;
5363 }
5364 
5368 {
5369  ADC1->IEN0.bit.IEN_CH13 = 1u;
5370 }
5371 
5375 {
5376  ADC1->IEN0.bit.IEN_CH13 = 0u;
5377 }
5378 
5382 {
5383  ADC1->IEN0.bit.IEN_CH14 = 1u;
5384 }
5385 
5389 {
5390  ADC1->IEN0.bit.IEN_CH14 = 0u;
5391 }
5392 
5396 {
5397  ADC1->IEN0.bit.IEN_CH15 = 1u;
5398 }
5399 
5403 {
5404  ADC1->IEN0.bit.IEN_CH15 = 0u;
5405 }
5406 
5410 {
5411  ADC1->IEN0.bit.IEN_CH16 = 1u;
5412 }
5413 
5417 {
5418  ADC1->IEN0.bit.IEN_CH16 = 0u;
5419 }
5420 
5424 {
5425  ADC1->IEN0.bit.IEN_CH17 = 1u;
5426 }
5427 
5431 {
5432  ADC1->IEN0.bit.IEN_CH17 = 0u;
5433 }
5434 
5438 {
5439  ADC1->IEN0.bit.IEN_CH18 = 1u;
5440 }
5441 
5445 {
5446  ADC1->IEN0.bit.IEN_CH18 = 0u;
5447 }
5448 
5452 {
5453  ADC1->IEN0.bit.IEN_CH19 = 1u;
5454 }
5455 
5459 {
5460  ADC1->IEN0.bit.IEN_CH19 = 0u;
5461 }
5462 
5466 {
5467  ADC1->IEN1.bit.IEN_WFR0 = 1u;
5468 }
5469 
5473 {
5474  ADC1->IEN1.bit.IEN_WFR0 = 0u;
5475 }
5476 
5480 {
5481  ADC1->IEN1.bit.IEN_WFR1 = 1u;
5482 }
5483 
5487 {
5488  ADC1->IEN1.bit.IEN_WFR1 = 0u;
5489 }
5490 
5494 {
5495  ADC1->IEN1.bit.IEN_WFR2 = 1u;
5496 }
5497 
5501 {
5502  ADC1->IEN1.bit.IEN_WFR2 = 0u;
5503 }
5504 
5508 {
5509  ADC1->IEN1.bit.IEN_WFR3 = 1u;
5510 }
5511 
5515 {
5516  ADC1->IEN1.bit.IEN_WFR3 = 0u;
5517 }
5518 
5522 {
5523  ADC1->IEN1.bit.IEN_COLL0 = 1u;
5524 }
5525 
5529 {
5530  ADC1->IEN1.bit.IEN_COLL0 = 0u;
5531 }
5532 
5536 {
5537  ADC1->IEN1.bit.IEN_COLL1 = 1u;
5538 }
5539 
5543 {
5544  ADC1->IEN1.bit.IEN_COLL1 = 0u;
5545 }
5546 
5550 {
5551  ADC1->IEN1.bit.IEN_COLL2 = 1u;
5552 }
5553 
5557 {
5558  ADC1->IEN1.bit.IEN_COLL2 = 0u;
5559 }
5560 
5564 {
5565  ADC1->IEN1.bit.IEN_COLL3 = 1u;
5566 }
5567 
5571 {
5572  ADC1->IEN1.bit.IEN_COLL3 = 0u;
5573 }
5574 
5580 {
5581  return (uint8)ADC1->INP0.bit.INP_CH0;
5582 }
5583 
5589 {
5590  return (uint8)ADC1->INP0.bit.INP_CH1;
5591 }
5592 
5598 {
5599  return (uint8)ADC1->INP0.bit.INP_CH2;
5600 }
5601 
5607 {
5608  return (uint8)ADC1->INP0.bit.INP_CH3;
5609 }
5610 
5616 {
5617  return (uint8)ADC1->INP0.bit.INP_CH4;
5618 }
5619 
5625 {
5626  return (uint8)ADC1->INP0.bit.INP_CH5;
5627 }
5628 
5634 {
5635  return (uint8)ADC1->INP0.bit.INP_CH6;
5636 }
5637 
5643 {
5644  return (uint8)ADC1->INP0.bit.INP_CH7;
5645 }
5646 
5652 {
5653  return (uint8)ADC1->INP0.bit.INP_CH8;
5654 }
5655 
5661 {
5662  return (uint8)ADC1->INP0.bit.INP_CH9;
5663 }
5664 
5670 {
5671  return (uint8)ADC1->INP0.bit.INP_CH10;
5672 }
5673 
5679 {
5680  return (uint8)ADC1->INP0.bit.INP_CH11;
5681 }
5682 
5688 {
5689  return (uint8)ADC1->INP0.bit.INP_CH12;
5690 }
5691 
5697 {
5698  return (uint8)ADC1->INP0.bit.INP_CH13;
5699 }
5700 
5706 {
5707  return (uint8)ADC1->INP0.bit.INP_CH14;
5708 }
5709 
5715 {
5716  return (uint8)ADC1->INP0.bit.INP_CH15;
5717 }
5718 
5724 {
5725  return (uint8)ADC1->INP1.bit.INP_CH16;
5726 }
5727 
5733 {
5734  return (uint8)ADC1->INP1.bit.INP_CH17;
5735 }
5736 
5742 {
5743  return (uint8)ADC1->INP1.bit.INP_CH18;
5744 }
5745 
5751 {
5752  return (uint8)ADC1->INP1.bit.INP_CH19;
5753 }
5754 
5760 {
5761  return (uint8)ADC1->INP2.bit.INP_CMP_LO0;
5762 }
5763 
5769 {
5770  return (uint8)ADC1->INP2.bit.INP_CMP_LO1;
5771 }
5772 
5778 {
5779  return (uint8)ADC1->INP2.bit.INP_CMP_LO2;
5780 }
5781 
5787 {
5788  return (uint8)ADC1->INP2.bit.INP_CMP_LO3;
5789 }
5790 
5796 {
5797  return (uint8)ADC1->INP2.bit.INP_CMP_UP0;
5798 }
5799 
5805 {
5806  return (uint8)ADC1->INP2.bit.INP_CMP_UP1;
5807 }
5808 
5814 {
5815  return (uint8)ADC1->INP2.bit.INP_CMP_UP2;
5816 }
5817 
5823 {
5824  return (uint8)ADC1->INP2.bit.INP_CMP_UP3;
5825 }
5826 
5832 {
5833  return (uint8)ADC1->INP3.bit.INP_SQ0;
5834 }
5835 
5841 {
5842  return (uint8)ADC1->INP3.bit.INP_SQ1;
5843 }
5844 
5850 {
5851  return (uint8)ADC1->INP3.bit.INP_SQ2;
5852 }
5853 
5859 {
5860  return (uint8)ADC1->INP3.bit.INP_SQ3;
5861 }
5862 
5868 {
5869  return (uint8)ADC1->INP3.bit.INP_COLL0;
5870 }
5871 
5877 {
5878  return (uint8)ADC1->INP3.bit.INP_COLL1;
5879 }
5880 
5886 {
5887  return (uint8)ADC1->INP3.bit.INP_COLL2;
5888 }
5889 
5895 {
5896  return (uint8)ADC1->INP3.bit.INP_COLL3;
5897 }
5898 
5904 {
5905  return (uint8)ADC1->INP3.bit.INP_WFR0;
5906 }
5907 
5913 {
5914  return (uint8)ADC1->INP3.bit.INP_WFR1;
5915 }
5916 
5922 {
5923  return (uint8)ADC1->INP3.bit.INP_WFR2;
5924 }
5925 
5931 {
5932  return (uint8)ADC1->INP3.bit.INP_WFR3;
5933 }
5934 
5940 {
5941  ADC1->SHDCTR.bit.ST_SQSEL = u8_value;
5942 }
5943 
5949 {
5950  return (uint8)ADC1->SHDCTR.bit.ST_SQSEL;
5951 }
5952 
5958 {
5959  ADC1->SHDCTR.bit.ST_TRGSEL = u8_value;
5960 }
5961 
5967 {
5968  return (uint8)ADC1->SHDCTR.bit.ST_TRGSEL;
5969 }
5970 
5976 {
5977  ADC1->SHDCTR.bit.ST_GTGSEL = u8_value;
5978 }
5979 
5985 {
5986  return (uint8)ADC1->SHDCTR.bit.ST_GTGSEL;
5987 }
5988 
5992 {
5993  ADC1->SHDCTR.bit.STE_SQSEL = 1u;
5994 }
5995 
5999 {
6000  ADC1->SHDCTR.bit.STE_SQSEL = 0u;
6001 }
6002 
6006 {
6007  ADC1->SHDCTR.bit.STE_TRGSEL = 1u;
6008 }
6009 
6013 {
6014  ADC1->SHDCTR.bit.STE_TRGSEL = 0u;
6015 }
6016 
6020 {
6021  ADC1->SHDCTR.bit.STE_GTGSEL = 1u;
6022 }
6023 
6027 {
6028  ADC1->SHDCTR.bit.STE_GTGSEL = 0u;
6029 }
6030 
6034 {
6035  ADC1->SHDCTR.bit.ST_SQSW = 1u;
6036 }
6037 
6043 {
6044  return (uint8)ADC1->SHDCTR.bit.ST_SQSW;
6045 }
6046 
6050 {
6051  ADC1->SHDCTR.bit.ST_TRGSW = 1u;
6052 }
6053 
6059 {
6060  return (uint8)ADC1->SHDCTR.bit.ST_TRGSW;
6061 }
6062 
6066 {
6067  ADC1->SHDCTR.bit.ST_GTGSW = 1u;
6068 }
6069 
6075 {
6076  return (uint8)ADC1->SHDCTR.bit.ST_GTGSW;
6077 }
6078 
6082 {
6083  ADC1->SHDCTR.bit.STE_SQ = 1u;
6084 }
6085 
6089 {
6090  ADC1->SHDCTR.bit.STE_SQ = 0u;
6091 }
6092 
6096 {
6097  ADC1->SHDCTR.bit.STE_TRG = 1u;
6098 }
6099 
6103 {
6104  ADC1->SHDCTR.bit.STE_TRG = 0u;
6105 }
6106 
6110 {
6111  ADC1->SHDCTR.bit.STE_GTG = 1u;
6112 }
6113 
6117 {
6118  ADC1->SHDCTR.bit.STE_GTG = 0u;
6119 }
6120 
6126 {
6127  ADC1->CALAI1.bit.CALOFFS = u8_value;
6128 }
6129 
6135 {
6136  return (uint8)ADC1->CALAI1.bit.CALOFFS;
6137 }
6138 
6144 {
6145  ADC1->CALAI1.bit.CALGAIN = u16_value;
6146 }
6147 
6153 {
6154  return (uint16)ADC1->CALAI1.bit.CALGAIN;
6155 }
6156 
6162 {
6163  ADC1->CALAI3.bit.CALOFFS = u8_value;
6164 }
6165 
6171 {
6172  return (uint8)ADC1->CALAI3.bit.CALOFFS;
6173 }
6174 
6180 {
6181  ADC1->CALAI3.bit.CALGAIN = u16_value;
6182 }
6183 
6189 {
6190  return (uint16)ADC1->CALAI3.bit.CALGAIN;
6191 }
6192 
6198 {
6199  ADC1->CALAI5.bit.CALOFFS = u8_value;
6200 }
6201 
6207 {
6208  return (uint8)ADC1->CALAI5.bit.CALOFFS;
6209 }
6210 
6216 {
6217  ADC1->CALAI5.bit.CALGAIN = u16_value;
6218 }
6219 
6225 {
6226  return (uint16)ADC1->CALAI5.bit.CALGAIN;
6227 }
6228 
6234 {
6235  ADC1->CALAI7.bit.CALOFFS = u8_value;
6236 }
6237 
6243 {
6244  return (uint8)ADC1->CALAI7.bit.CALOFFS;
6245 }
6246 
6252 {
6253  ADC1->CALAI7.bit.CALGAIN = u16_value;
6254 }
6255 
6261 {
6262  return (uint16)ADC1->CALAI7.bit.CALGAIN;
6263 }
6264 
6270 {
6271  ADC1->CALAI9.bit.CALOFFS = u8_value;
6272 }
6273 
6279 {
6280  return (uint8)ADC1->CALAI9.bit.CALOFFS;
6281 }
6282 
6288 {
6289  ADC1->CALAI9.bit.CALGAIN = u16_value;
6290 }
6291 
6297 {
6298  return (uint16)ADC1->CALAI9.bit.CALGAIN;
6299 }
6300 
6306 {
6307  ADC1->CALAI11.bit.CALOFFS = u8_value;
6308 }
6309 
6315 {
6316  return (uint8)ADC1->CALAI11.bit.CALOFFS;
6317 }
6318 
6324 {
6325  ADC1->CALAI11.bit.CALGAIN = u16_value;
6326 }
6327 
6333 {
6334  return (uint16)ADC1->CALAI11.bit.CALGAIN;
6335 }
6336 
6342 {
6343  ADC1->CALAI13.bit.CALOFFS = u8_value;
6344 }
6345 
6351 {
6352  return (uint8)ADC1->CALAI13.bit.CALOFFS;
6353 }
6354 
6360 {
6361  ADC1->CALAI13.bit.CALGAIN = u16_value;
6362 }
6363 
6369 {
6370  return (uint16)ADC1->CALAI13.bit.CALGAIN;
6371 }
6372 
6378 {
6379  ADC1->CALAI15.bit.CALOFFS = u8_value;
6380 }
6381 
6387 {
6388  return (uint8)ADC1->CALAI15.bit.CALOFFS;
6389 }
6390 
6396 {
6397  ADC1->CALAI15.bit.CALGAIN = u16_value;
6398 }
6399 
6405 {
6406  return (uint16)ADC1->CALAI15.bit.CALGAIN;
6407 }
6408 
6414 {
6415  ADC1->CALAI16.bit.CALOFFS = u8_value;
6416 }
6417 
6423 {
6424  return (uint8)ADC1->CALAI16.bit.CALOFFS;
6425 }
6426 
6432 {
6433  ADC1->CALAI16.bit.CALGAIN = u16_value;
6434 }
6435 
6441 {
6442  return (uint16)ADC1->CALAI16.bit.CALGAIN;
6443 }
6444 
6450 {
6451  ADC1->CALAI17.bit.CALOFFS = u8_value;
6452 }
6453 
6459 {
6460  return (uint8)ADC1->CALAI17.bit.CALOFFS;
6461 }
6462 
6468 {
6469  ADC1->CALAI17.bit.CALGAIN = u16_value;
6470 }
6471 
6477 {
6478  return (uint16)ADC1->CALAI17.bit.CALGAIN;
6479 }
6480 
6486 {
6487  ADC1->CALAI18.bit.CALOFFS = u8_value;
6488 }
6489 
6495 {
6496  return (uint8)ADC1->CALAI18.bit.CALOFFS;
6497 }
6498 
6504 {
6505  ADC1->CALAI18.bit.CALGAIN = u16_value;
6506 }
6507 
6513 {
6514  return (uint16)ADC1->CALAI18.bit.CALGAIN;
6515 }
6516 
6522 {
6523  ADC1->CALAI19.bit.CALOFFS = u8_value;
6524 }
6525 
6531 {
6532  return (uint8)ADC1->CALAI19.bit.CALOFFS;
6533 }
6534 
6540 {
6541  ADC1->CALAI19.bit.CALGAIN = u16_value;
6542 }
6543 
6549 {
6550  return (uint16)ADC1->CALAI19.bit.CALGAIN;
6551 }
6552 
6558 {
6559  ADC1->CALAI20.bit.CALOFFS = u8_value;
6560 }
6561 
6567 {
6568  return (uint8)ADC1->CALAI20.bit.CALOFFS;
6569 }
6570 
6576 {
6577  ADC1->CALAI20.bit.CALGAIN = u16_value;
6578 }
6579 
6585 {
6586  return (uint16)ADC1->CALAI20.bit.CALGAIN;
6587 }
6588 
6594 {
6595  ADC1->CALAI21.bit.CALOFFS = u8_value;
6596 }
6597 
6603 {
6604  return (uint8)ADC1->CALAI21.bit.CALOFFS;
6605 }
6606 
6612 {
6613  ADC1->CALAI21.bit.CALGAIN = u16_value;
6614 }
6615 
6621 {
6622  return (uint16)ADC1->CALAI21.bit.CALGAIN;
6623 }
6624 
6630 {
6631  ADC1->CALAI22.bit.CALOFFS = u8_value;
6632 }
6633 
6639 {
6640  return (uint8)ADC1->CALAI22.bit.CALOFFS;
6641 }
6642 
6648 {
6649  ADC1->CALAI22.bit.CALGAIN = u16_value;
6650 }
6651 
6657 {
6658  return (uint16)ADC1->CALAI22.bit.CALGAIN;
6659 }
6660 
6666 {
6667  ADC1->CALAI23.bit.CALOFFS = u8_value;
6668 }
6669 
6675 {
6676  return (uint8)ADC1->CALAI23.bit.CALOFFS;
6677 }
6678 
6684 {
6685  ADC1->CALAI23.bit.CALGAIN = u16_value;
6686 }
6687 
6693 {
6694  return (uint16)ADC1->CALAI23.bit.CALGAIN;
6695 }
6696 
6702 {
6703  ADC1->CALAI24.bit.CALOFFS = u8_value;
6704 }
6705 
6711 {
6712  return (uint8)ADC1->CALAI24.bit.CALOFFS;
6713 }
6714 
6720 {
6721  ADC1->CALAI24.bit.CALGAIN = u16_value;
6722 }
6723 
6729 {
6730  return (uint16)ADC1->CALAI24.bit.CALGAIN;
6731 }
6732 
6738 {
6739  ADC1->CALAI25.bit.CALOFFS = u8_value;
6740 }
6741 
6747 {
6748  return (uint8)ADC1->CALAI25.bit.CALOFFS;
6749 }
6750 
6756 {
6757  ADC1->CALAI25.bit.CALGAIN = u16_value;
6758 }
6759 
6765 {
6766  return (uint16)ADC1->CALAI25.bit.CALGAIN;
6767 }
6768 
6774 {
6775  ADC1->CALAI26.bit.CALOFFS = u8_value;
6776 }
6777 
6783 {
6784  return (uint8)ADC1->CALAI26.bit.CALOFFS;
6785 }
6786 
6792 {
6793  ADC1->CALAI26.bit.CALGAIN = u16_value;
6794 }
6795 
6801 {
6802  return (uint16)ADC1->CALAI26.bit.CALGAIN;
6803 }
6804 
6808 {
6809  ARVG->VAREF_CTRL.bit.EN = 1u;
6810 }
6811 
6815 {
6816  ARVG->VAREF_CTRL.bit.EN = 0u;
6817 }
6818 
6822 {
6823  ARVG->VAREF_IEN.bit.OC_IEN = 1u;
6824 }
6825 
6829 {
6830  ARVG->VAREF_IEN.bit.OC_IEN = 0u;
6831 }
6832 
6838 {
6839  return (uint8)ARVG->VAREF_IRQ.bit.OC_IS;
6840 }
6841 
6847 {
6848  return (uint8)ARVG->VAREF_IRQ.bit.OC_STS;
6849 }
6850 
6854 {
6855  ARVG->VAREF_IRQ_CLR.bit.OC_IS_CLR = 1u;
6856 }
6857 
6861 {
6862  ARVG->VAREF_IRQ_CLR.bit.OC_STS_CLR = 1u;
6863 }
6864 
6867 #endif /* _ADC1_H */
6868 
INLINE uint8 ADC1_getSeq3IntSts(void)
Get Sequence 3 Interrupt Status.
Definition: adc1.h:2248
tADC1_CHINSELx
Definition: adc1.h:311
INLINE uint16 ADC1_getCalibGainAnaIn1(void)
Get Calibration Gain analog input 1.
Definition: adc1.h:6152
INLINE uint8 ADC1_getCh0IntNodePtr(void)
Get Channel 0 Interrupt Node Pointer.
Definition: adc1.h:5579
INLINE void ADC1_clrCh1EndOfConvSts(void)
Clear Channel 1 End Of Conversion Status.
Definition: adc1.h:2988
INLINE void ADC1_disCalibProtCh24(void)
Disable Calibration Protection Channel 24.
Definition: adc1.h:4018
INLINE void ADC1_disCmp1LoInt(void)
Disable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:5094
INLINE void ADC1_clrFilter1Sts(void)
Clear Filter 1 Event flag.
Definition: adc1.h:4204
INLINE uint8 ADC1_getCh9ResultValidSts(void)
Get Result Valid Flag Channel 9.
Definition: adc1.h:4426
INLINE void ADC1_clrCmp0UpThSts(void)
Clear Compare 0 Upper Threshold Status.
Definition: adc1.h:4821
INLINE uint8 ADC1_getCh9IntNodePtr(void)
Get Channel 9 Interrupt Node Pointer.
Definition: adc1.h:5660
INLINE uint8 ADC1_getSeq1Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1636
INLINE uint8 ADC1_getCmp3UpThSts(void)
Get Compare 3 Upper Threshold Status.
Definition: adc1.h:4714
INLINE void ADC1_setCmp2LoThSts(void)
Set Compare 2 Lower Threshold Status.
Definition: adc1.h:5003
INLINE uint8 ADC1_getSeq2IntSts(void)
Get Sequence 2 Interrupt Status.
Definition: adc1.h:2239
INLINE void ADC1_clrCh5EndOfConvSts(void)
Clear Channel 5 End Of Conversion Status.
Definition: adc1.h:3016
INLINE uint8 ADC1_getCh6EndOfConvSts(void)
Get Channel 6 End Of Conversion Status.
Definition: adc1.h:2848
INLINE uint8 ADC1_getCalibOffsAnaIn22(void)
Get Calibration Offset analog input 22.
Definition: adc1.h:6638
INLINE void ADC1_disCalibProtCh25(void)
Disable Calibration Protection Channel 25.
Definition: adc1.h:4032
INLINE void ADC1_setCh13Insel(tADC1_CHINSELx e_value)
Set Channel 13 input selection.
Definition: adc1.h:2731
INLINE uint8 ADC1_getCh12IntNodePtr(void)
Get Channel 12 Interrupt Node Pointer.
Definition: adc1.h:5687
INLINE void ADC1_disCh6Int(void)
Disable Channel 6 Interrupt.
Definition: adc1.h:5276
INLINE uint8 ADC1_getCh5ResultValidSts(void)
Get Result Valid Flag Channel 5.
Definition: adc1.h:4354
INLINE uint16 ADC1_getCalibGainAnaIn23(void)
Get Calibration Gain analog input 23.
Definition: adc1.h:6692
INLINE void ADC1_setSeq1Slot3(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1777
INLINE void ADC1_enCh3Int(void)
Enable Channel 3 Interrupt.
Definition: adc1.h:5227
INLINE uint16 ADC1_getCalibGainAnaIn3(void)
Get Calibration Gain analog input 3.
Definition: adc1.h:6188
INLINE uint16 ADC1_getCalibGainAnaIn17(void)
Get Calibration Gain analog input 17.
Definition: adc1.h:6476
union ADC1_CONVCFGx tADC1_CONVCFGx
INLINE void ADC1_enSeq1CollInt(void)
Enable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5535
INLINE void ADC1_disSeq2Int(void)
Disable Sequence 2 Interrupt.
Definition: adc1.h:5164
INLINE uint16 ADC1_getCalibGainAnaIn20(void)
Get Calibration Gain analog input 20.
Definition: adc1.h:6584
INLINE void ADC1_enSeq3Int(void)
Enable Sequence 3 Interrupt.
Definition: adc1.h:5171
INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value)
Set Calibration Gain analog input 25.
Definition: adc1.h:6755
INLINE uint8 ADC1_getCh18ResultValidSts(void)
Get Result Valid Flag Channel 18.
Definition: adc1.h:4588
INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value)
Set Calibration Gain analog input 11.
Definition: adc1.h:6323
INLINE void ADC1_clrCmp3UpIntSts(void)
Clear Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4814
INLINE uint8 ADC1_getSeq3Slot3(void)
Get Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2140
INLINE void ADC1_clrSeq0CollSts(void)
Clear Sequence 0 Collision Status.
Definition: adc1.h:2292
INLINE uint8 ADC1_getCmp0UpThSts(void)
Get Compare 0 Upper Threshold Status.
Definition: adc1.h:4687
INLINE void ADC1_enCh15Int(void)
Enable Channel 15 Interrupt.
Definition: adc1.h:5395
INLINE void ADC1_enCalibCh16(void)
Enable Calibration Channel 16.
Definition: adc1.h:3521
INLINE uint8 ADC1_getSeq3Slot2(void)
Get Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2122
INLINE uint8 ADC1_getSeq2WaitForRead(void)
Get Sequence 2 Wait for Read Status.
Definition: adc1.h:2167
INLINE void ADC1_setFilter3Sts(void)
Set Filter 3 Event flag.
Definition: adc1.h:4246
INLINE void ADC1_clrCmp1LoIntSts(void)
Clear Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4856
INLINE void ADC1_disSeq0CollInt(void)
Disable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5528
INLINE uint8 ADC1_getCalibOffsAnaIn7(void)
Get Calibration Offset analog input 7.
Definition: adc1.h:6242
INLINE uint8 ADC1_getCh2ResultValidSts(void)
Get Result Valid Flag Channel 2.
Definition: adc1.h:4300
INLINE void ADC1_disCalibCh20(void)
Disable Calibration Channel 20.
Definition: adc1.h:3584
INLINE void ADC1_enTriggSwShadowTrans(void)
Enable Trigger Shadow Transfer.
Definition: adc1.h:6095
INLINE void ADC1_disSeq1CollInt(void)
Disable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5542
INLINE void ARVG_disVAREF(void)
Disable VAREF.
Definition: adc1.h:6814
void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 18 Interrupt Node Pointer.
INLINE void ADC1_enCmp3UpInt(void)
Enable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:5059
INLINE uint16 ADC1_getCh4Result(void)
Get Result Value Channel 4.
Definition: adc1.h:4327
INLINE void ADC1_setTriggSwShadowTrans(void)
Set Trigger Software Shadow Transfer.
Definition: adc1.h:6049
void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 17 Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1459
INLINE void ADC1_disCalibCh14(void)
Disable Calibration Channel 14.
Definition: adc1.h:3500
INLINE void ADC1_setCh3Insel(tADC1_CHINSELx e_value)
Set Channel 3 input selection.
Definition: adc1.h:2641
INLINE uint8 ADC1_getSeq3WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5930
INLINE void ADC1_setCh8EndOfConvSts(void)
Set Channel 8 End Of Conversion Status.
Definition: adc1.h:3177
INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value)
Set Calibration Offset analog input 22.
Definition: adc1.h:6629
INLINE void ADC1_setSeq3TriggerSelect(tADC1_Seq3Trig e_Seq3Trig)
Set Trigger Select.
Definition: adc1.h:2027
void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 16 Interrupt Node Pointer.
void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh18(void)
Disable Calibration Protection Channel 18.
Definition: adc1.h:3934
INLINE void ADC1_disSeq1CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1650
INLINE uint8 ARVG_getVAREFOvercurrentSts(void)
Get VAREF Overcurrent Status.
Definition: adc1.h:6846
INLINE void ADC1_clrCh6EndOfConvSts(void)
Clear Channel 6 End Of Conversion Status.
Definition: adc1.h:3023
sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel)
Get the 16-bit value of the ADC1 Filter Result Register of the selected ADC1 channel and returns the ...
Definition: adc1.c:374
INLINE uint8 ADC1_getCalibOffsAnaIn1(void)
Get Calibration Offset analog input 1.
Definition: adc1.h:6134
INLINE uint8 ADC1_getCh16EndOfConvSts(void)
Get Channel 16 End Of Conversion Status.
Definition: adc1.h:2938
INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value)
Set Calibration Offset analog input 21.
Definition: adc1.h:6593
INLINE void ADC1_clrCmp1LoThSts(void)
Clear Compare 1 Lower Threshold Status.
Definition: adc1.h:4884
INLINE void ADC1_setSeq2Slot3(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1954
INLINE void ADC1_enSeq0WaitForReadInt(void)
Enable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5465
INLINE void ADC1_setCmp2UpIntSts(void)
Set Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4919
INLINE void ADC1_disCalibCh18(void)
Disable Calibration Channel 18.
Definition: adc1.h:3556
INLINE void ADC1_enCalibCh25(void)
Enable Calibration Channel 25.
Definition: adc1.h:3647
INLINE uint8 ADC1_getCh15IntNodePtr(void)
Get Channel 15 Interrupt Node Pointer.
Definition: adc1.h:5714
INLINE uint8 ADC1_getSeq0IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5831
INLINE void ADC1_enCmp2LoInt(void)
Enable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:5101
INLINE void ADC1_setCh3EndOfConvSts(void)
Set Channel 3 End Of Conversion Status.
Definition: adc1.h:3142
INLINE uint8 ARVG_getVAREFOvercurrentIntSts(void)
Get VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6837
INLINE uint8 ADC1_getCalibOffsAnaIn24(void)
Get Calibration Offset analog input 24.
Definition: adc1.h:6710
INLINE uint8 ADC1_getCh13ResultValidSts(void)
Get Result Valid Flag Channel 13.
Definition: adc1.h:4498
INLINE uint8 ADC1_getCalibOffsAnaIn11(void)
Get Calibration Offset analog input 11.
Definition: adc1.h:6314
INLINE uint8 ADC1_getCalibOffsAnaIn15(void)
Get Calibration Offset analog input 15.
Definition: adc1.h:6386
INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value)
Set Calibration Offset analog input 16.
Definition: adc1.h:6413
INLINE void ADC1_enSeq2WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1834
INLINE void ADC1_disCalibProtCh2(void)
Disable Calibration Protection Channel 2.
Definition: adc1.h:3710
INLINE uint8 ADC1_getCh0ResultValidSts(void)
Get Result Valid Flag Channel 0.
Definition: adc1.h:4264
INLINE void ADC1_disCalibCh10(void)
Disable Calibration Channel 10.
Definition: adc1.h:3444
INLINE void ADC1_disPower(void)
Disable ADC1 Module.
Definition: adc1.h:1364
INLINE void ADC1_setSeqSwShadowTrans(void)
Set Sequence Software Shadow Transfer.
Definition: adc1.h:6033
INLINE void ADC1_disCmp2UpInt(void)
Disable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:5052
INLINE void ADC1_setSeq0Slot0(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1546
INLINE void ADC1_enCalibProtCh13(void)
Enable Calibration Protection Channel 13.
Definition: adc1.h:3857
INLINE uint8 ADC1_getSeq2TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1859
INLINE void ADC1_setSeq3IntSts(void)
Set Sequence 3 Interrupt Status.
Definition: adc1.h:2425
INLINE void ADC1_setSeq3Slot2(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2113
INLINE void ADC1_clrCh7EndOfConvSts(void)
Clear Channel 7 End Of Conversion Status.
Definition: adc1.h:3030
INLINE void ADC1_setSeq0Slot1(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1564
INLINE void ADC1_clrCh18EndOfConvSts(void)
Clear Channel 18 End Of Conversion Status.
Definition: adc1.h:3107
INLINE void ADC1_enCalibProtCh21(void)
Enable Calibration Protection Channel 21.
Definition: adc1.h:3969
INLINE uint16 ADC1_getCh10Result(void)
Get Result Value Channel 10.
Definition: adc1.h:4435
INLINE void ADC1_setCh15Config(tADC1_CHCFGx s_value)
Set Channel 15 configuration.
Definition: adc1.h:2569
INLINE void ADC1_enPower(void)
Enable ADC1 Module.
Definition: adc1.h:1357
INLINE void ADC1_disCh5Int(void)
Disable Channel 5 Interrupt.
Definition: adc1.h:5262
INLINE uint8 ADC1_getTriggHwShadowTrans(void)
Get Trigger Shadow Transfer Selection.
Definition: adc1.h:5966
INLINE void ADC1_enCh13Int(void)
Enable Channel 13 Interrupt.
Definition: adc1.h:5367
INLINE void ADC1_disCalibProtCh9(void)
Disable Calibration Protection Channel 9.
Definition: adc1.h:3808
INLINE void ADC1_disSeq0Int(void)
Disable Sequence 0 Interrupt.
Definition: adc1.h:5136
INLINE uint8 ADC1_getCalibOffsAnaIn17(void)
Get Calibration Offset analog input 17.
Definition: adc1.h:6458
INLINE void ADC1_enCalibCh6(void)
Enable Calibration Channel 6.
Definition: adc1.h:3381
INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value)
Set Calibration Offset analog input 9.
Definition: adc1.h:6269
INLINE uint8 ADC1_getSeq2CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5885
INLINE uint8 ADC1_getCmp0UpIntSts(void)
Get Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4651
INLINE void ADC1_disCmp3LoInt(void)
Disable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:5122
INLINE void ADC1_setFilter3Coeff(uint8 u8_value)
Set Filter 3 Coefficient.
Definition: adc1.h:4109
INLINE void ADC1_setCh2Insel(tADC1_CHINSELx e_value)
Set Channel 2 input selection.
Definition: adc1.h:2632
INLINE uint8 ADC1_getCmp2LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5777
INLINE void ADC1_setCh1Config(tADC1_CHCFGx s_value)
Set Channel 1 configuration.
Definition: adc1.h:2443
INLINE uint8 ADC1_getCh11IntNodePtr(void)
Get Channel 11 Interrupt Node Pointer.
Definition: adc1.h:5678
INLINE void ADC1_enSeq2CollInt(void)
Enable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5549
INLINE void ADC1_setFilter1Sts(void)
Set Filter 1 Event flag.
Definition: adc1.h:4232
INLINE void ADC1_enCalibCh3(void)
Enable Calibration Channel 3.
Definition: adc1.h:3339
INLINE void ADC1_disCalibCh22(void)
Disable Calibration Channel 22.
Definition: adc1.h:3612
INLINE void ADC1_enCalibCh13(void)
Enable Calibration Channel 13.
Definition: adc1.h:3479
INLINE void ADC1_disCalibCh7(void)
Disable Calibration Channel 7.
Definition: adc1.h:3402
INLINE uint8 ADC1_getCh4EndOfConvSts(void)
Get Channel 4 End Of Conversion Status.
Definition: adc1.h:2830
INLINE void ADC1_disCalibCh16(void)
Disable Calibration Channel 16.
Definition: adc1.h:3528
INLINE uint8 ADC1_getCh16ResultValidSts(void)
Get Result Valid Flag Channel 16.
Definition: adc1.h:4552
INLINE void ADC1_setCh19Config(tADC1_CHCFGx s_value)
Set Channel 19 configuration.
Definition: adc1.h:2605
INLINE uint8 ADC1_getFilter0Coeff(void)
Get Filter 0 Coefficient.
Definition: adc1.h:4064
INLINE uint8 ADC1_getCh14ResultValidSts(void)
Get Result Valid Flag Channel 14.
Definition: adc1.h:4516
INLINE uint8 ADC1_getSeq1IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5840
INLINE void ADC1_enSeq0WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1480
INLINE void ADC1_enCh4Int(void)
Enable Channel 4 Interrupt.
Definition: adc1.h:5241
INLINE void ADC1_disCalibCh5(void)
Disable Calibration Channel 5.
Definition: adc1.h:3374
INLINE uint16 ADC1_getCh7Result(void)
Get Result Value Channel 7.
Definition: adc1.h:4381
INLINE void ADC1_setCh5EndOfConvSts(void)
Set Channel 5 End Of Conversion Status.
Definition: adc1.h:3156
INLINE void ADC1_setSeq2TriggerSelect(tADC1_Seq2Trig e_Seq2Trig)
Set Trigger Select.
Definition: adc1.h:1850
void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 19 Interrupt Node Pointer.
void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getCh4ResultValidSts(void)
Get Result Valid Flag Channel 4.
Definition: adc1.h:4336
INLINE void ADC1_enCalibCh24(void)
Enable Calibration Channel 24.
Definition: adc1.h:3633
INLINE void ADC1_enCmp2UpInt(void)
Enable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:5045
INLINE void ADC1_setCmp3UpIntSts(void)
Set Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4926
INLINE uint8 ADC1_getCalibOffsAnaIn20(void)
Get Calibration Offset analog input 20.
Definition: adc1.h:6566
INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value)
Set Calibration Gain analog input 20.
Definition: adc1.h:6575
INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value)
Set Calibration Offset analog input 19.
Definition: adc1.h:6521
INLINE uint8 ADC1_getCh1EndOfConvSts(void)
Get Channel 1 End Of Conversion Status.
Definition: adc1.h:2803
INLINE uint8 ADC1_getCmp3LoThSts(void)
Get Compare 3 Lower Threshold Status.
Definition: adc1.h:4786
INLINE void ADC1_clrCmp0LoThSts(void)
Clear Compare 0 Lower Threshold Status.
Definition: adc1.h:4877
INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value)
Set Calibration Gain analog input 15.
Definition: adc1.h:6395
INLINE void ADC1_setCmp3UpThSts(void)
Set Compare 3 Upper Threshold Status.
Definition: adc1.h:4954
INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value)
Set Calibration Offset analog input 7.
Definition: adc1.h:6233
INLINE void ADC1_disCalibProtCh0(void)
Disable Calibration Protection Channel 0.
Definition: adc1.h:3682
INLINE void ADC1_clrCh3EndOfConvSts(void)
Clear Channel 3 End Of Conversion Status.
Definition: adc1.h:3002
INLINE void ADC1_disCmp1UpInt(void)
Disable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:5038
INLINE void ADC1_enCalibProtCh16(void)
Enable Calibration Protection Channel 16.
Definition: adc1.h:3899
INLINE void ADC1_setSeq2CollSts(void)
Set Sequence 2 Collision Status.
Definition: adc1.h:2390
INLINE void ADC1_enCh5Int(void)
Enable Channel 5 Interrupt.
Definition: adc1.h:5255
INLINE void ADC1_clrCmp3UpThSts(void)
Clear Compare 3 Upper Threshold Status.
Definition: adc1.h:4842
INLINE void ADC1_disSeq1WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1664
ADC1_Seq0Trig
Enumeration for the trigger source of the sequence 0.
Definition: adc1.h:245
INLINE void ADC1_disCh7Int(void)
Disable Channel 7 Interrupt.
Definition: adc1.h:5290
INLINE void ADC1_enCalibCh18(void)
Enable Calibration Channel 18.
Definition: adc1.h:3549
INLINE void ADC1_disSuspend(void)
Disable ADC1 Suspend.
Definition: adc1.h:1396
INLINE void ADC1_clrCmp3LoIntSts(void)
Clear Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4870
INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value)
Set Calibration Offset analog input 3.
Definition: adc1.h:6161
INLINE void ADC1_disSeq2WaitForReadInt(void)
Disable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5500
sint8 ADC1_init(void)
Initialize all CW registers of the ADC1 module.
Definition: adc1.c:128
INLINE void ADC1_setSeq3Slot3(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2131
INLINE void ADC1_enCalibProtCh20(void)
Enable Calibration Protection Channel 20.
Definition: adc1.h:3955
INLINE uint8 ADC1_getSeq0CollSts(void)
Get Sequence 0 Collision Status.
Definition: adc1.h:2185
INLINE uint8 ADC1_getCmp1UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5804
INLINE void ADC1_enSeq0TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1530
INLINE void ADC1_enCh6Int(void)
Enable Channel 6 Interrupt.
Definition: adc1.h:5269
INLINE uint8 ADC1_getSeq3TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:2036
INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value)
Set Calibration Offset analog input 17.
Definition: adc1.h:6449
INLINE void ADC1_setGateSwShadowTrans(void)
Set Gating Software Shadow Transfer.
Definition: adc1.h:6065
INLINE uint8 ADC1_getSeq3Slot0(void)
Get Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2086
INLINE void ADC1_enCmp3LoInt(void)
Enable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:5115
INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value)
Set Calibration Gain analog input 17.
Definition: adc1.h:6467
INLINE uint8 ADC1_getCh11ResultValidSts(void)
Get Result Valid Flag Channel 11.
Definition: adc1.h:4462
INLINE void ADC1_clrCh10EndOfConvSts(void)
Clear Channel 10 End Of Conversion Status.
Definition: adc1.h:3051
INLINE void ADC1_setSeq3Slot0(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2077
INLINE uint8 ADC1_getCh13EndOfConvSts(void)
Get Channel 13 End Of Conversion Status.
Definition: adc1.h:2911
INLINE void ADC1_setCh0Config(tADC1_CHCFGx s_value)
Set Channel 0 configuration.
Definition: adc1.h:2434
void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint8 ADC1_getCmp1LoThSts(void)
Get Compare 1 Lower Threshold Status.
Definition: adc1.h:4768
INLINE void ADC1_enCalibProtCh4(void)
Enable Calibration Protection Channel 4.
Definition: adc1.h:3731
INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value)
Set Calibration Offset analog input 15.
Definition: adc1.h:6377
INLINE void ADC1_clrSeq2IntSts(void)
Clear Sequence 2 Interrupt Status.
Definition: adc1.h:2334
INLINE uint16 ADC1_getCalibGainAnaIn7(void)
Get Calibration Gain analog input 7.
Definition: adc1.h:6260
INLINE void ADC1_disCalibProtCh4(void)
Disable Calibration Protection Channel 4.
Definition: adc1.h:3738
INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value)
Set Calibration Gain analog input 23.
Definition: adc1.h:6683
INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value)
Set Calibration Offset analog input 11.
Definition: adc1.h:6305
INLINE uint8 ADC1_getCh5IntNodePtr(void)
Get Channel 5 Interrupt Node Pointer.
Definition: adc1.h:5624
INLINE void ADC1_enCh17Int(void)
Enable Channel 17 Interrupt.
Definition: adc1.h:5423
INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value)
Set Calibration Gain analog input 22.
Definition: adc1.h:6647
INLINE void ADC1_enCh12Int(void)
Enable Channel 12 Interrupt.
Definition: adc1.h:5353
INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value)
Set Calibration Gain analog input 3.
Definition: adc1.h:6179
void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint16 ADC1_getCh1Result(void)
Get Result Value Channel 1.
Definition: adc1.h:4273
INLINE void ADC1_setSeq2Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1804
INLINE uint16 ADC1_getCalibGainAnaIn18(void)
Get Calibration Gain analog input 18.
Definition: adc1.h:6512
INLINE void ADC1_enCalibProtCh9(void)
Enable Calibration Protection Channel 9.
Definition: adc1.h:3801
INLINE void ADC1_enCalibCh21(void)
Enable Calibration Channel 21.
Definition: adc1.h:3591
INLINE void ADC1_enCalibProtCh14(void)
Enable Calibration Protection Channel 14.
Definition: adc1.h:3871
INLINE uint8 ADC1_getCh1ResultValidSts(void)
Get Result Valid Flag Channel 1.
Definition: adc1.h:4282
INLINE void ADC1_setCh8Insel(tADC1_CHINSELx e_value)
Set Channel 8 input selection.
Definition: adc1.h:2686
INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value)
Set Calibration Offset analog input 23.
Definition: adc1.h:6665
INLINE void ADC1_enSeqSwShadowTrans(void)
Enable Sequence Shadow Transfer.
Definition: adc1.h:6081
uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx)
Get End-of-Convertion status for selected sequence and slot.
Definition: adc1.c:762
INLINE uint8 ADC1_getSeq1TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1682
INLINE uint8 ADC1_getCmp3LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5786
INLINE uint8 ADC1_getCalibOffsAnaIn18(void)
Get Calibration Offset analog input 18.
Definition: adc1.h:6494
INLINE uint8 ADC1_getCmp2LoThSts(void)
Get Compare 2 Lower Threshold Status.
Definition: adc1.h:4777
INLINE void ADC1_setSeq2Slot1(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1918
INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value)
Set Calibration Gain analog input 26.
Definition: adc1.h:6791
INLINE uint8 ADC1_getCh10EndOfConvSts(void)
Get Channel 10 End Of Conversion Status.
Definition: adc1.h:2884
INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value)
Set Calibration Gain analog input 5.
Definition: adc1.h:6215
INLINE uint8 ADC1_getCmp2UpIntSts(void)
Get Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4669
INLINE void ADC1_enCalibCh4(void)
Enable Calibration Channel 4.
Definition: adc1.h:3353
void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq1Slot1(void)
Get Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1750
INLINE uint8 ADC1_getCh7EndOfConvSts(void)
Get Channel 7 End Of Conversion Status.
Definition: adc1.h:2857
void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_disCalibCh12(void)
Disable Calibration Channel 12.
Definition: adc1.h:3472
INLINE void ADC1_setCh6Config(tADC1_CHCFGx s_value)
Set Channel 6 configuration.
Definition: adc1.h:2488
INLINE void ADC1_clrSeq3CollSts(void)
Clear Sequence 3 Collision Status.
Definition: adc1.h:2313
INLINE uint8 ADC1_getCurrChannel(void)
Get Current Channel under conversion.
Definition: adc1.h:2974
INLINE uint8 ADC1_getCh9EndOfConvSts(void)
Get Channel 9 End Of Conversion Status.
Definition: adc1.h:2875
INLINE uint16 ADC1_getCalibGainAnaIn16(void)
Get Calibration Gain analog input 16.
Definition: adc1.h:6440
INLINE void ADC1_setSeq3Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1981
INLINE uint8 ADC1_getFilter1Sts(void)
Get Filter 1 Event flag.
Definition: adc1.h:4172
INLINE void ADC1_clrCh17EndOfConvSts(void)
Clear Channel 17 End Of Conversion Status.
Definition: adc1.h:3100
INLINE void ADC1_setSeq0Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1450
INLINE void ADC1_enCalibProtCh10(void)
Enable Calibration Protection Channel 10.
Definition: adc1.h:3815
ADC1_Seq3Trig
Enumeration for the trigger source of the sequence 3.
Definition: adc1.h:295
INLINE uint8 ADC1_getCh15EndOfConvSts(void)
Get Channel 15 End Of Conversion Status.
Definition: adc1.h:2929
INLINE void ADC1_enSuspend(void)
Enable ADC1 Suspend.
Definition: adc1.h:1389
INLINE void ADC1_setFilter2Coeff(uint8 u8_value)
Set Filter 2 Coefficient.
Definition: adc1.h:4091
INLINE void ADC1_enCalibCh19(void)
Enable Calibration Channel 19.
Definition: adc1.h:3563
INLINE void ADC1_disCalibCh13(void)
Disable Calibration Channel 13.
Definition: adc1.h:3486
INLINE uint8 ADC1_getGateHwShadowTrans(void)
Get Gating Shadow Transfer Selection.
Definition: adc1.h:5984
INLINE void ADC1_enCh9Int(void)
Enable Channel 9 Interrupt.
Definition: adc1.h:5311
INLINE void ADC1_setCh14Config(tADC1_CHCFGx s_value)
Set Channel 14 configuration.
Definition: adc1.h:2560
INLINE void ADC1_disCalibCh26(void)
Disable Calibration Channel 26.
Definition: adc1.h:3668
INLINE void ADC1_enCalibProtCh19(void)
Enable Calibration Protection Channel 19.
Definition: adc1.h:3941
INLINE uint16 ADC1_getCh11Result(void)
Get Result Value Channel 11.
Definition: adc1.h:4453
INLINE void ADC1_disSeq1Int(void)
Disable Sequence 1 Interrupt.
Definition: adc1.h:5150
INLINE void ADC1_enCalibCh14(void)
Enable Calibration Channel 14.
Definition: adc1.h:3493
INLINE void ADC1_setFilter2Sts(void)
Set Filter 2 Event flag.
Definition: adc1.h:4239
INLINE uint8 ADC1_getSeq1Slot2(void)
Get Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1768
INLINE uint8 ADC1_getSeq3CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5894
INLINE void ADC1_disSeq0TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1537
INLINE void ADC1_disCalibProtCh3(void)
Disable Calibration Protection Channel 3.
Definition: adc1.h:3724
INLINE void ADC1_setCh17Config(tADC1_CHCFGx s_value)
Set Channel 17 configuration.
Definition: adc1.h:2587
INLINE void ADC1_disCh4Int(void)
Disable Channel 4 Interrupt.
Definition: adc1.h:5248
INLINE void ADC1_enCalibProtCh23(void)
Enable Calibration Protection Channel 23.
Definition: adc1.h:3997
INLINE uint8 ADC1_getGateSwShadowTrans(void)
Get Gating Software Shadow Transfer.
Definition: adc1.h:6074
INLINE void ADC1_enCalibProtCh24(void)
Enable Calibration Protection Channel 24.
Definition: adc1.h:4011
INLINE uint8 ADC1_getSeq3Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1990
INLINE void ADC1_disCalibProtCh1(void)
Disable Calibration Protection Channel 1.
Definition: adc1.h:3696
INLINE void ADC1_enSeq1WaitForReadInt(void)
Enable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5479
void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE uint8 ADC1_getFilter2Coeff(void)
Get Filter 2 Coefficient.
Definition: adc1.h:4100
INLINE void ADC1_disCh18Int(void)
Disable Channel 18 Interrupt.
Definition: adc1.h:5444
INLINE uint8 ADC1_getSeqSwShadowTrans(void)
Get Sequence Software Shadow Transfer.
Definition: adc1.h:6042
INLINE void ADC1_setSeq0WaitForRead(void)
Set Sequence 0 Wait for Read Status.
Definition: adc1.h:2348
INLINE void ADC1_enSeq3WaitForReadInt(void)
Enable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5507
INLINE void ADC1_enSeq0CollInt(void)
Enable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5521
INLINE uint16 ADC1_getCh15Result(void)
Get Result Value Channel 15.
Definition: adc1.h:4525
INLINE void ADC1_disSeq3CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:2004
INLINE void ADC1_disCh3Int(void)
Disable Channel 3 Interrupt.
Definition: adc1.h:5234
INLINE uint8 ADC1_getSeq2IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5849
void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_disSeqHwShadowTrans(void)
Disable Sequence Shadow Transfer Selection.
Definition: adc1.h:5998
INLINE void ADC1_disCalibCh2(void)
Disable Calibration Channel 2.
Definition: adc1.h:3332
INLINE uint16 ADC1_getCalibGainAnaIn13(void)
Get Calibration Gain analog input 13.
Definition: adc1.h:6368
INLINE uint8 ADC1_getFilter3Sts(void)
Get Filter 3 Event flag.
Definition: adc1.h:4190
INLINE uint16 ADC1_getCh6Result(void)
Get Result Value Channel 6.
Definition: adc1.h:4363
INLINE uint8 ADC1_getSeq1Slot3(void)
Get Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1786
INLINE void ADC1_disSeq2TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1891
INLINE uint8 ADC1_getFilter0Sts(void)
Get Filter 0 Event flag.
Definition: adc1.h:4163
enum ADC1_Seq1Trig tADC1_Seq1Trig
INLINE uint8 ADC1_getCh3IntNodePtr(void)
Get Channel 3 Interrupt Node Pointer.
Definition: adc1.h:5606
INLINE void ADC1_disCalibProtCh12(void)
Disable Calibration Protection Channel 12.
Definition: adc1.h:3850
void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 12 Interrupt Node Pointer.
INLINE uint16 ADC1_getCalibGainAnaIn19(void)
Get Calibration Gain analog input 19.
Definition: adc1.h:6548
INLINE void ADC1_setCh13Config(tADC1_CHCFGx s_value)
Set Channel 13 configuration.
Definition: adc1.h:2551
INLINE uint8 ADC1_getSeq2GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1877
void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 0 Interrupt Node Pointer.
INLINE void ADC1_setCmp1UpIntSts(void)
Set Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4912
INLINE uint8 ADC1_getSeq1IntSts(void)
Get Sequence 1 Interrupt Status.
Definition: adc1.h:2230
INLINE uint8 ADC1_getSeq1CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5876
INLINE uint8 ADC1_getCh2IntNodePtr(void)
Get Channel 2 Interrupt Node Pointer.
Definition: adc1.h:5597
INLINE void ADC1_setCmp2Config(tADC1_CMPCFGx s_value)
Set Compare Channel 2 configuration.
Definition: adc1.h:4633
INLINE uint8 ADC1_getSeq3CollSts(void)
Get Sequence 3 Collision Status.
Definition: adc1.h:2212
INLINE void ADC1_enCh11Int(void)
Enable Channel 11 Interrupt.
Definition: adc1.h:5339
INLINE uint8 ADC1_getCmp2UpThSts(void)
Get Compare 2 Upper Threshold Status.
Definition: adc1.h:4705
INLINE uint8 ADC1_getSeq0Slot0(void)
Get Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1555
INLINE void ADC1_enCalibProtCh25(void)
Enable Calibration Protection Channel 25.
Definition: adc1.h:4025
enum ADC1_Seq2Trig tADC1_Seq2Trig
INLINE void ADC1_setCh1EndOfConvSts(void)
Set Channel 1 End Of Conversion Status.
Definition: adc1.h:3128
INLINE void ADC1_enCh14Int(void)
Enable Channel 14 Interrupt.
Definition: adc1.h:5381
INLINE void ADC1_disCh19Int(void)
Disable Channel 19 Interrupt.
Definition: adc1.h:5458
INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value)
Set Calibration Offset analog input 25.
Definition: adc1.h:6737
INLINE void ADC1_disCalibProtCh17(void)
Disable Calibration Protection Channel 17.
Definition: adc1.h:3920
INLINE void ADC1_disCmp0UpInt(void)
Disable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:5024
void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh6(void)
Disable Calibration Protection Channel 6.
Definition: adc1.h:3766
INLINE void ADC1_disCalibCh9(void)
Disable Calibration Channel 9.
Definition: adc1.h:3430
INLINE uint8 ADC1_getSuspendMode(void)
Get Suspend Mode.
Definition: adc1.h:1414
INLINE uint16 ADC1_getCh8Result(void)
Get Result Value Channel 8.
Definition: adc1.h:4399
void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 11 Interrupt Node Pointer.
void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0IntSts(void)
Get Sequence 0 Interrupt Status.
Definition: adc1.h:2221
INLINE void ADC1_disCmp2LoInt(void)
Disable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:5108
INLINE void ADC1_enCh1Int(void)
Enable Channel 1 Interrupt.
Definition: adc1.h:5199
INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value)
Set Calibration Gain analog input 1.
Definition: adc1.h:6143
INLINE void ADC1_enCalibCh17(void)
Enable Calibration Channel 17.
Definition: adc1.h:3535
INLINE void ADC1_setCh9Config(tADC1_CHCFGx s_value)
Set Channel 9 configuration.
Definition: adc1.h:2515
INLINE void ADC1_setCh10Config(tADC1_CHCFGx s_value)
Set Channel 10 configuration.
Definition: adc1.h:2524
INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value)
Set Calibration Gain analog input 19.
Definition: adc1.h:6539
INLINE void ADC1_enCalibProtCh5(void)
Enable Calibration Protection Channel 5.
Definition: adc1.h:3745
INLINE uint8 ADC1_getSeq3IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5858
INLINE void ADC1_clrCmp2LoThSts(void)
Clear Compare 2 Lower Threshold Status.
Definition: adc1.h:4891
INLINE uint16 ADC1_getCh0Result(void)
Get Result Value Channel 0.
Definition: adc1.h:4255
INLINE void ADC1_enCalibCh9(void)
Enable Calibration Channel 9.
Definition: adc1.h:3423
INLINE uint16 ADC1_getCh17Result(void)
Get Result Value Channel 17.
Definition: adc1.h:4561
INLINE void ADC1_disCalibCh23(void)
Disable Calibration Channel 23.
Definition: adc1.h:3626
INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value)
Set Calibration Offset analog input 24.
Definition: adc1.h:6701
INLINE uint8 ADC1_getSeq2Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1813
INLINE void ADC1_enCalibCh8(void)
Enable Calibration Channel 8.
Definition: adc1.h:3409
INLINE uint8 ADC1_getCalibOffsAnaIn3(void)
Get Calibration Offset analog input 3.
Definition: adc1.h:6170
INLINE void ADC1_clrFilter2Sts(void)
Clear Filter 2 Event flag.
Definition: adc1.h:4211
INLINE void ADC1_disCalibCh3(void)
Disable Calibration Channel 3.
Definition: adc1.h:3346
INLINE void ADC1_setCh11Config(tADC1_CHCFGx s_value)
Set Channel 11 configuration.
Definition: adc1.h:2533
INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value)
Set Gating Shadow Transfer Selection.
Definition: adc1.h:5975
INLINE uint16 ADC1_getCalibGainAnaIn26(void)
Get Calibration Gain analog input 26.
Definition: adc1.h:6800
INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1691
INLINE uint8 ADC1_getCalibOffsAnaIn9(void)
Get Calibration Offset analog input 9.
Definition: adc1.h:6278
INLINE void ADC1_setSeq1TriggerSelect(tADC1_Seq1Trig e_Seq1Trig)
Set Trigger Select.
Definition: adc1.h:1673
INLINE void ADC1_setCh11Insel(tADC1_CHINSELx e_value)
Set Channel 11 input selection.
Definition: adc1.h:2713
INLINE uint8 ADC1_getCmp0LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5759
void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 2 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh16(void)
Disable Calibration Protection Channel 16.
Definition: adc1.h:3906
INLINE void ADC1_enCalibProtCh0(void)
Enable Calibration Protection Channel 0.
Definition: adc1.h:3675
INLINE void ADC1_clrSeq0WaitForRead(void)
Clear Sequence 0 Wait for Read Status.
Definition: adc1.h:2264
INLINE void ADC1_setCh9EndOfConvSts(void)
Set Channel 9 End Of Conversion Status.
Definition: adc1.h:3184
INLINE void ADC1_setSeq1Slot0(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1723
INLINE uint8 ADC1_getSeq1WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5912
INLINE uint16 ADC1_getFilter2Result(void)
Get Result Value Filter 2.
Definition: adc1.h:4145
INLINE void ADC1_setFilter0Coeff(uint8 u8_value)
Set Filter 0 Coefficient.
Definition: adc1.h:4055
INLINE void ADC1_clrSeq1CollSts(void)
Clear Sequence 1 Collision Status.
Definition: adc1.h:2299
INLINE void ADC1_clrSeq2WaitForRead(void)
Clear Sequence 2 Wait for Read Status.
Definition: adc1.h:2278
INLINE uint8 ADC1_getCh5EndOfConvSts(void)
Get Channel 5 End Of Conversion Status.
Definition: adc1.h:2839
INLINE void ADC1_disSeq3CollInt(void)
Disable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5570
INLINE void ADC1_disSeq3WaitForReadInt(void)
Disable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5514
INLINE uint8 ADC1_getCh10ResultValidSts(void)
Get Result Valid Flag Channel 10.
Definition: adc1.h:4444
INLINE void ADC1_setCmp2UpThSts(void)
Set Compare 2 Upper Threshold Status.
Definition: adc1.h:4947
INLINE void ADC1_setTriggHwShadowTrans(uint8 u8_value)
Set Trigger Shadow Transfer Selection.
Definition: adc1.h:5957
INLINE void ADC1_disCalibProtCh8(void)
Disable Calibration Protection Channel 8.
Definition: adc1.h:3794
sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register in mV of the selected slot in the sequencer and retu...
Definition: adc1.c:597
INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value)
Set Calibration Gain analog input 21.
Definition: adc1.h:6611
INLINE void ADC1_enSeq2CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1820
INLINE void ADC1_setCh18EndOfConvSts(void)
Set Channel 18 End Of Conversion Status.
Definition: adc1.h:3247
INLINE void ADC1_setCh2EndOfConvSts(void)
Set Channel 2 End Of Conversion Status.
Definition: adc1.h:3135
void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1514
INLINE uint16 ADC1_getCh2Result(void)
Get Result Value Channel 2.
Definition: adc1.h:4291
INLINE void ADC1_enCh18Int(void)
Enable Channel 18 Interrupt.
Definition: adc1.h:5437
INLINE uint8 ADC1_getCh8EndOfConvSts(void)
Get Channel 8 End Of Conversion Status.
Definition: adc1.h:2866
INLINE void ADC1_disCh14Int(void)
Disable Channel 14 Interrupt.
Definition: adc1.h:5388
INLINE uint8 ADC1_getSeq0Slot1(void)
Get Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1573
INLINE void ADC1_setCh7Insel(tADC1_CHINSELx e_value)
Set Channel 7 input selection.
Definition: adc1.h:2677
INLINE uint8 ADC1_getCh12EndOfConvSts(void)
Get Channel 12 End Of Conversion Status.
Definition: adc1.h:2902
void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_setConvClass2Config(tADC1_CONVCFGx s_value)
Set Conversion Class 2.
Definition: adc1.h:3281
INLINE void ARVG_enVAREFOvercurrentInt(void)
Enable VAREF Overcurrent Interrupt.
Definition: adc1.h:6821
INLINE void ADC1_clrCh8EndOfConvSts(void)
Clear Channel 8 End Of Conversion Status.
Definition: adc1.h:3037
INLINE void ADC1_clrCmp3LoThSts(void)
Clear Compare 3 Lower Threshold Status.
Definition: adc1.h:4898
INLINE void ADC1_setCh12Config(tADC1_CHCFGx s_value)
Set Channel 12 configuration.
Definition: adc1.h:2542
INLINE void ADC1_disSeq0WaitForReadInt(void)
Disable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5472
INLINE void ADC1_setSeq1WaitForRead(void)
Set Sequence 1 Wait for Read Status.
Definition: adc1.h:2355
union ADC1_SQSLOTx tADC1_SQSLOTx
INLINE void ADC1_setCmp1LoThSts(void)
Set Compare 1 Lower Threshold Status.
Definition: adc1.h:4996
INLINE void ADC1_clrCh4EndOfConvSts(void)
Clear Channel 4 End Of Conversion Status.
Definition: adc1.h:3009
INLINE uint8 ADC1_getCmp3UpIntSts(void)
Get Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4678
INLINE void ADC1_setCmp1Config(tADC1_CMPCFGx s_value)
Set Compare Channel 1 configuration.
Definition: adc1.h:4624
INLINE void ADC1_setCmp2LoIntSts(void)
Set Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4975
INLINE uint8 ADC1_getSeq3WaitForRead(void)
Get Sequence 3 Wait for Read Status.
Definition: adc1.h:2176
INLINE void ADC1_disSeq3TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:2068
INLINE uint8 ADC1_getCalibOffsAnaIn5(void)
Get Calibration Offset analog input 5.
Definition: adc1.h:6206
INLINE uint8 ADC1_getCh19IntNodePtr(void)
Get Channel 19 Interrupt Node Pointer.
Definition: adc1.h:5750
INLINE uint8 ADC1_getCh16IntNodePtr(void)
Get Channel 16 Interrupt Node Pointer.
Definition: adc1.h:5723
INLINE uint8 ADC1_getCh8IntNodePtr(void)
Get Channel 8 Interrupt Node Pointer.
Definition: adc1.h:5651
INLINE uint8 ADC1_getSeq2CollSts(void)
Get Sequence 2 Collision Status.
Definition: adc1.h:2203
INLINE uint8 ADC1_getCalibOffsAnaIn26(void)
Get Calibration Offset analog input 26.
Definition: adc1.h:6782
INLINE uint8 ADC1_getCh3ResultValidSts(void)
Get Result Valid Flag Channel 3.
Definition: adc1.h:4318
INLINE void ADC1_clrFilter3Sts(void)
Clear Filter 3 Event flag.
Definition: adc1.h:4218
INLINE void ADC1_setSeq2Slot2(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1936
INLINE uint8 ADC1_getCh19EndOfConvSts(void)
Get Channel 19 End Of Conversion Status.
Definition: adc1.h:2965
INLINE void ADC1_enCmp1UpInt(void)
Enable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:5031
INLINE void ADC1_disCmp3UpInt(void)
Disable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:5066
INLINE void ADC1_enSeq3WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:2011
INLINE uint8 ADC1_getCalibOffsAnaIn13(void)
Get Calibration Offset analog input 13.
Definition: adc1.h:6350
INLINE void ADC1_setSeq1CollSts(void)
Set Sequence 1 Collision Status.
Definition: adc1.h:2383
INLINE uint8 ADC1_getCh0EndOfConvSts(void)
Get Channel 0 End Of Conversion Status.
Definition: adc1.h:2794
INLINE void ADC1_setCh11EndOfConvSts(void)
Set Channel 11 End Of Conversion Status.
Definition: adc1.h:3198
INLINE void ADC1_enCalibProtCh11(void)
Enable Calibration Protection Channel 11.
Definition: adc1.h:3829
INLINE void ADC1_enCmp0LoInt(void)
Enable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:5073
INLINE uint8 ADC1_getSeq1WaitForRead(void)
Get Sequence 1 Wait for Read Status.
Definition: adc1.h:2158
INLINE void ADC1_disCalibCh1(void)
Disable Calibration Channel 1.
Definition: adc1.h:3318
INLINE void ADC1_setCh16Insel(tADC1_CHINSELx e_value)
Set Channel 16 input selection.
Definition: adc1.h:2758
INLINE void ADC1_enCalibCh23(void)
Enable Calibration Channel 23.
Definition: adc1.h:3619
INLINE void ADC1_enCh16Int(void)
Enable Channel 16 Interrupt.
Definition: adc1.h:5409
INLINE uint8 ADC1_getCh11EndOfConvSts(void)
Get Channel 11 End Of Conversion Status.
Definition: adc1.h:2893
INLINE uint16 ADC1_getCh14Result(void)
Get Result Value Channel 14.
Definition: adc1.h:4507
INLINE void ADC1_enCalibProtCh26(void)
Enable Calibration Protection Channel 26.
Definition: adc1.h:4039
INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value)
Set Calibration Offset analog input 1.
Definition: adc1.h:6125
INLINE void ADC1_setSeq0Slot3(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1600
INLINE void ADC1_enCalibProtCh8(void)
Enable Calibration Protection Channel 8.
Definition: adc1.h:3787
INLINE uint8 ADC1_getSeq0WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5903
INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value)
Set Calibration Gain analog input 18.
Definition: adc1.h:6503
INLINE void ADC1_setCmp0Config(tADC1_CMPCFGx s_value)
Set Compare Channel 0 configuration.
Definition: adc1.h:4615
INLINE uint8 ADC1_getSeq3Slot1(void)
Get Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2104
INLINE void ADC1_enSeq3CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1997
INLINE void ADC1_enCalibProtCh15(void)
Enable Calibration Protection Channel 15.
Definition: adc1.h:3885
INLINE void ADC1_disSeqSwShadowTrans(void)
Disable Sequence Shadow Transfer.
Definition: adc1.h:6088
void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_setCh7EndOfConvSts(void)
Set Channel 7 End Of Conversion Status.
Definition: adc1.h:3170
INLINE void ADC1_clrSeq1WaitForRead(void)
Clear Sequence 1 Wait for Read Status.
Definition: adc1.h:2271
INLINE void ADC1_enCmp1LoInt(void)
Enable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:5087
INLINE void ADC1_disCalibProtCh14(void)
Disable Calibration Protection Channel 14.
Definition: adc1.h:3878
INLINE void ADC1_clrCmp1UpIntSts(void)
Clear Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4800
INLINE void ADC1_disCh1Int(void)
Disable Channel 1 Interrupt.
Definition: adc1.h:5206
INLINE uint16 ADC1_getCalibGainAnaIn9(void)
Get Calibration Gain analog input 9.
Definition: adc1.h:6296
INLINE void ADC1_enSeq1CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1643
INLINE uint8 ADC1_getCh17ResultValidSts(void)
Get Result Valid Flag Channel 17.
Definition: adc1.h:4570
INLINE uint16 ADC1_getFilter1Result(void)
Get Result Value Filter 1.
Definition: adc1.h:4136
INLINE uint16 ADC1_getCalibGainAnaIn15(void)
Get Calibration Gain analog input 15.
Definition: adc1.h:6404
INLINE void ADC1_setFilter0Sts(void)
Set Filter 0 Event flag.
Definition: adc1.h:4225
INLINE void ADC1_disSeq1TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1714
INLINE uint8 ADC1_getCh10IntNodePtr(void)
Get Channel 10 Interrupt Node Pointer.
Definition: adc1.h:5669
INLINE void ADC1_setSeq1Slot2(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1759
INLINE uint16 ADC1_getCh9Result(void)
Get Result Value Channel 9.
Definition: adc1.h:4417
INLINE uint8 ADC1_getCh18EndOfConvSts(void)
Get Channel 18 End Of Conversion Status.
Definition: adc1.h:2956
INLINE uint8 ADC1_getSeq2Slot1(void)
Get Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1927
sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel)
Get the value of the ADC1 Filter Result Register of the selected ADC1 channel in millivolt (mV) and r...
Definition: adc1.c:429
INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value)
Set Calibration Offset analog input 13.
Definition: adc1.h:6341
INLINE void ADC1_disCalibProtCh21(void)
Disable Calibration Protection Channel 21.
Definition: adc1.h:3976
INLINE uint8 ADC1_getCh19ResultValidSts(void)
Get Result Valid Flag Channel 19.
Definition: adc1.h:4606
ADC1_Seq2Trig
Enumeration for the trigger source of the sequence 2.
Definition: adc1.h:278
INLINE void ADC1_disCh12Int(void)
Disable Channel 12 Interrupt.
Definition: adc1.h:5360
INLINE void ADC1_disCh17Int(void)
Disable Channel 17 Interrupt.
Definition: adc1.h:5430
INLINE void ADC1_setCh18Config(tADC1_CHCFGx s_value)
Set Channel 18 configuration.
Definition: adc1.h:2596
INLINE void ADC1_enSeq2TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1884
void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 9 Interrupt Node Pointer.
INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value)
Set Calibration Gain analog input 13.
Definition: adc1.h:6359
INLINE uint8 ADC1_getCmp1LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5768
INLINE uint16 ADC1_getCalibGainAnaIn5(void)
Get Calibration Gain analog input 5.
Definition: adc1.h:6224
INLINE void ADC1_setCh6EndOfConvSts(void)
Set Channel 6 End Of Conversion Status.
Definition: adc1.h:3163
INLINE void ADC1_clrCh0EndOfConvSts(void)
Clear Channel 0 End Of Conversion Status.
Definition: adc1.h:2981
INLINE void ADC1_disSeq3Int(void)
Disable Sequence 3 Interrupt.
Definition: adc1.h:5178
INLINE void ADC1_enSeq0CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1466
INLINE uint8 ADC1_getSeq0GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1523
INLINE void ADC1_setCh12EndOfConvSts(void)
Set Channel 12 End Of Conversion Status.
Definition: adc1.h:3205
INLINE void ADC1_disTriggSwShadowTrans(void)
Disable Trigger Shadow Transfer.
Definition: adc1.h:6102
INLINE void ADC1_disCalibProtCh26(void)
Disable Calibration Protection Channel 26.
Definition: adc1.h:4046
INLINE uint8 ADC1_getCalibOffsAnaIn21(void)
Get Calibration Offset analog input 21.
Definition: adc1.h:6602
INLINE void ADC1_enCmp0UpInt(void)
Enable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:5017
INLINE void ADC1_clrCh11EndOfConvSts(void)
Clear Channel 11 End Of Conversion Status.
Definition: adc1.h:3058
INLINE void ADC1_enCalibCh11(void)
Enable Calibration Channel 11.
Definition: adc1.h:3451
INLINE void ARVG_enVAREF(void)
Enable VAREF.
Definition: adc1.h:6807
INLINE void ADC1_setCmp3LoIntSts(void)
Set Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4982
INLINE void ADC1_disCalibCh4(void)
Disable Calibration Channel 4.
Definition: adc1.h:3360
INLINE void ARVG_clrVAREFOvercurrentIntSts(void)
Clear VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6853
INLINE void ADC1_enGateSwShadowTrans(void)
Enable Gating Shadow Transfer.
Definition: adc1.h:6109
INLINE void ADC1_disCh2Int(void)
Disable Channel 2 Interrupt.
Definition: adc1.h:5220
INLINE uint8 ADC1_getCmp0LoIntSts(void)
Get Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4723
INLINE uint16 ADC1_getCalibGainAnaIn21(void)
Get Calibration Gain analog input 21.
Definition: adc1.h:6620
INLINE void ADC1_setCh5Config(tADC1_CHCFGx s_value)
Set Channel 5 configuration.
Definition: adc1.h:2479
INLINE void ADC1_enCalibCh7(void)
Enable Calibration Channel 7.
Definition: adc1.h:3395
INLINE uint16 ADC1_getCalibGainAnaIn22(void)
Get Calibration Gain analog input 22.
Definition: adc1.h:6656
INLINE void ADC1_setCh15Insel(tADC1_CHINSELx e_value)
Set Channel 15 input selection.
Definition: adc1.h:2749
INLINE void ADC1_enCalibCh12(void)
Enable Calibration Channel 12.
Definition: adc1.h:3465
INLINE uint8 ADC1_getCh17EndOfConvSts(void)
Get Channel 17 End Of Conversion Status.
Definition: adc1.h:2947
INLINE uint8 ADC1_getCh4IntNodePtr(void)
Get Channel 4 Interrupt Node Pointer.
Definition: adc1.h:5615
INLINE void ADC1_setCh4Insel(tADC1_CHINSELx e_value)
Set Channel 4 input selection.
Definition: adc1.h:2650
INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value)
Set Calibration Gain analog input 24.
Definition: adc1.h:6719
INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value)
Set Calibration Gain analog input 16.
Definition: adc1.h:6431
INLINE uint8 ADC1_getSeq2Slot0(void)
Get Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1909
INLINE void ADC1_disCalibCh17(void)
Disable Calibration Channel 17.
Definition: adc1.h:3542
INLINE void ADC1_disCalibProtCh11(void)
Disable Calibration Protection Channel 11.
Definition: adc1.h:3836
INLINE void ADC1_setClockDiv(uint8 u8_value)
Set Clock Divider Settings.
Definition: adc1.h:1373
INLINE void ADC1_setSeq1Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1627
INLINE void ADC1_disCalibCh24(void)
Disable Calibration Channel 24.
Definition: adc1.h:3640
INLINE uint16 ADC1_getCh5Result(void)
Get Result Value Channel 5.
Definition: adc1.h:4345
INLINE void ADC1_clrCh12EndOfConvSts(void)
Clear Channel 12 End Of Conversion Status.
Definition: adc1.h:3065
INLINE uint8 ADC1_getSeq2Slot3(void)
Get Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1963
INLINE void ADC1_enCalibCh22(void)
Enable Calibration Channel 22.
Definition: adc1.h:3605
void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCh16Int(void)
Disable Channel 16 Interrupt.
Definition: adc1.h:5416
INLINE uint8 ADC1_getClockDiv(void)
Get Clock Divider Settings.
Definition: adc1.h:1382
INLINE uint8 ADC1_getFilter2Sts(void)
Get Filter 2 Event flag.
Definition: adc1.h:4181
INLINE uint8 ADC1_getCh1IntNodePtr(void)
Get Channel 1 Interrupt Node Pointer.
Definition: adc1.h:5588
INLINE void ADC1_clrCh13EndOfConvSts(void)
Clear Channel 13 End Of Conversion Status.
Definition: adc1.h:3072
INLINE void ADC1_clrSeq3IntSts(void)
Clear Sequence 3 Interrupt Status.
Definition: adc1.h:2341
void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
enum ADC1_Seq3Trig tADC1_Seq3Trig
INLINE void ADC1_disTriggHwShadowTrans(void)
Disable Trigger Shadow Transfer Selection.
Definition: adc1.h:6012
INLINE void ADC1_disCalibCh25(void)
Disable Calibration Channel 25.
Definition: adc1.h:3654
void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCalibCh11(void)
Disable Calibration Channel 11.
Definition: adc1.h:3458
INLINE void ADC1_setCh10Insel(tADC1_CHINSELx e_value)
Set Channel 10 input selection.
Definition: adc1.h:2704
INLINE void ADC1_clrCmp2LoIntSts(void)
Clear Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4863
INLINE void ADC1_setSeq3Slot1(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2095
INLINE uint8 ADC1_getSeq0Slot3(void)
Get Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1609
INLINE void ADC1_disCalibProtCh15(void)
Disable Calibration Protection Channel 15.
Definition: adc1.h:3892
INLINE void ADC1_setCmp1UpThSts(void)
Set Compare 1 Upper Threshold Status.
Definition: adc1.h:4940
INLINE void ADC1_disGateHwShadowTrans(void)
Disable Gating Shadow Transfer Selection.
Definition: adc1.h:6026
void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 3 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh17(void)
Enable Calibration Protection Channel 17.
Definition: adc1.h:3913
INLINE void ADC1_setCmp0LoThSts(void)
Set Compare 0 Lower Threshold Status.
Definition: adc1.h:4989
INLINE void ADC1_setCmp3Config(tADC1_CMPCFGx s_value)
Set Compare Channel 3 configuration.
Definition: adc1.h:4642
INLINE void ADC1_clrCh2EndOfConvSts(void)
Clear Channel 2 End Of Conversion Status.
Definition: adc1.h:2995
INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value)
Set Calibration Gain analog input 9.
Definition: adc1.h:6287
INLINE uint8 ADC1_getSeq1CollSts(void)
Get Sequence 1 Collision Status.
Definition: adc1.h:2194
INLINE void ADC1_setSeq2WaitForRead(void)
Set Sequence 2 Wait for Read Status.
Definition: adc1.h:2362
INLINE uint16 ADC1_getCh12Result(void)
Get Result Value Channel 12.
Definition: adc1.h:4471
INLINE void ADC1_clrCmp2UpIntSts(void)
Clear Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4807
INLINE void ADC1_setSeq2Config(tADC1_SQCFGx s_value)
Set Sequence 2 configuration.
Definition: adc1.h:1795
INLINE void ADC1_clrCh16EndOfConvSts(void)
Clear Channel 16 End Of Conversion Status.
Definition: adc1.h:3093
void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 5 Interrupt Node Pointer.
INLINE uint8 ADC1_getCh2EndOfConvSts(void)
Get Channel 2 End Of Conversion Status.
Definition: adc1.h:2812
INLINE void ADC1_disCh0Int(void)
Disable Channel 0 Interrupt.
Definition: adc1.h:5192
sint8 ADC1_startSequence(uint8 u8_seqIdx)
Start the conversion of a sequence by software.
Definition: adc1.c:698
INLINE void ADC1_clrCmp0UpIntSts(void)
Clear Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4793
INLINE void ADC1_disSeq1WaitForReadInt(void)
Disable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5486
INLINE uint8 ADC1_getCmp1UpIntSts(void)
Get Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4660
INLINE uint8 ADC1_getSeq0Slot2(void)
Get Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1591
INLINE uint8 ADC1_getFilter1Coeff(void)
Get Filter 1 Coefficient.
Definition: adc1.h:4082
INLINE void ADC1_enSeq3CollInt(void)
Enable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5563
INLINE void ADC1_setCh16Config(tADC1_CHCFGx s_value)
Set Channel 16 configuration.
Definition: adc1.h:2578
INLINE uint8 ADC1_getSeq0CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5867
INLINE void ADC1_enSeq2WaitForReadInt(void)
Enable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5493
INLINE void ADC1_disCh15Int(void)
Disable Channel 15 Interrupt.
Definition: adc1.h:5402
INLINE void ADC1_setSeq0TriggerSelect(tADC1_Seq0Trig e_Seq0Trig)
Set Trigger Select.
Definition: adc1.h:1496
INLINE void ADC1_enSeq3TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:2061
INLINE void ADC1_setCmp3LoThSts(void)
Set Compare 3 Lower Threshold Status.
Definition: adc1.h:5010
INLINE void ADC1_clrCh19EndOfConvSts(void)
Clear Channel 19 End Of Conversion Status.
Definition: adc1.h:3114
INLINE void ADC1_enCalibProtCh7(void)
Enable Calibration Protection Channel 7.
Definition: adc1.h:3773
INLINE uint8 ADC1_getCmp1UpThSts(void)
Get Compare 1 Upper Threshold Status.
Definition: adc1.h:4696
INLINE uint8 ADC1_getSuspendSts(void)
Get Suspend Mode Status.
Definition: adc1.h:1423
INLINE uint8 ADC1_getCh18IntNodePtr(void)
Get Channel 18 Interrupt Node Pointer.
Definition: adc1.h:5741
INLINE void ADC1_setCh16EndOfConvSts(void)
Set Channel 16 End Of Conversion Status.
Definition: adc1.h:3233
void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 13 Interrupt Node Pointer.
void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 10 Interrupt Node Pointer.
ADC1_Seq1Trig
Enumeration for the trigger source of the sequence 1.
Definition: adc1.h:261
union ADC1_SQCFGx tADC1_SQCFGx
INLINE void ADC1_disCalibProtCh20(void)
Disable Calibration Protection Channel 20.
Definition: adc1.h:3962
INLINE uint8 ADC1_getCurrSeq(void)
Get Actual Sequence processed.
Definition: adc1.h:2257
INLINE void ADC1_setSeq1Config(tADC1_SQCFGx s_value)
Set Sequence 1 configuration.
Definition: adc1.h:1618
INLINE void ADC1_enCh2Int(void)
Enable Channel 2 Interrupt.
Definition: adc1.h:5213
INLINE void ADC1_disCh9Int(void)
Disable Channel 9 Interrupt.
Definition: adc1.h:5318
INLINE uint8 ADC1_getCalibOffsAnaIn16(void)
Get Calibration Offset analog input 16.
Definition: adc1.h:6422
INLINE void ADC1_clrFilter0Sts(void)
Clear Filter 0 Event flag.
Definition: adc1.h:4197
INLINE void ADC1_setFilter1Coeff(uint8 u8_value)
Set Filter 1 Coefficient.
Definition: adc1.h:4073
INLINE uint8 ADC1_getCh8ResultValidSts(void)
Get Result Valid Flag Channel 8.
Definition: adc1.h:4408
INLINE uint8 ADC1_getCmp2UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5813
INLINE void ADC1_setCh14Insel(tADC1_CHINSELx e_value)
Set Channel 14 input selection.
Definition: adc1.h:2740
INLINE uint8 ADC1_getCh13IntNodePtr(void)
Get Channel 13 Interrupt Node Pointer.
Definition: adc1.h:5696
INLINE void ADC1_setCh14EndOfConvSts(void)
Set Channel 14 End Of Conversion Status.
Definition: adc1.h:3219
INLINE void ADC1_setSuspendMode(uint8 u8_value)
Set Suspend Mode.
Definition: adc1.h:1405
INLINE void ADC1_setCh7Config(tADC1_CHCFGx s_value)
Set Channel 7 configuration.
Definition: adc1.h:2497
sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register of the selected slot in the sequencer and returns th...
Definition: adc1.c:495
INLINE uint16 ADC1_getFilter0Result(void)
Get Result Value Filter 0.
Definition: adc1.h:4127
INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1868
INLINE void ADC1_clrSeq0IntSts(void)
Clear Sequence 0 Interrupt Status.
Definition: adc1.h:2320
INLINE void ADC1_enCh8Int(void)
Enable Channel 8 Interrupt.
Definition: adc1.h:5297
INLINE void ADC1_clrCh15EndOfConvSts(void)
Clear Channel 15 End Of Conversion Status.
Definition: adc1.h:3086
INLINE void ADC1_enCh0Int(void)
Enable Channel 0 Interrupt.
Definition: adc1.h:5185
enum ADC1_Seq0Trig tADC1_Seq0Trig
INLINE void ADC1_setConvClass3Config(tADC1_CONVCFGx s_value)
Set Conversion Class 3.
Definition: adc1.h:3290
INLINE void ADC1_setCh6Insel(tADC1_CHINSELx e_value)
Set Channel 6 input selection.
Definition: adc1.h:2668
INLINE void ADC1_setSeq0Config(tADC1_SQCFGx s_value)
Set Sequence 0 configuration.
Definition: adc1.h:1441
INLINE void ADC1_disCh8Int(void)
Disable Channel 8 Interrupt.
Definition: adc1.h:5304
INLINE void ADC1_setCh4Config(tADC1_CHCFGx s_value)
Set Channel 4 configuration.
Definition: adc1.h:2470
INLINE void ADC1_enCalibCh0(void)
Enable Calibration Channel 0.
Definition: adc1.h:3297
INLINE void ADC1_disCalibCh19(void)
Disable Calibration Channel 19.
Definition: adc1.h:3570
void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 8 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh7(void)
Disable Calibration Protection Channel 7.
Definition: adc1.h:3780
INLINE void ADC1_enCalibProtCh22(void)
Enable Calibration Protection Channel 22.
Definition: adc1.h:3983
INLINE void ADC1_disSeq3WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:2018
INLINE void ADC1_enCalibProtCh2(void)
Enable Calibration Protection Channel 2.
Definition: adc1.h:3703
INLINE void ADC1_setCh1Insel(tADC1_CHINSELx e_value)
Set Channel 1 input selection.
Definition: adc1.h:2623
sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel)
Get the value of the ADC1 Result Register of the selected ADC1 channel in millivolt (mV)
Definition: adc1.c:307
INLINE uint16 ADC1_getCh18Result(void)
Get Result Value Channel 18.
Definition: adc1.h:4579
INLINE void ADC1_setSeq1Slot1(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1741
INLINE uint8 ADC1_getCh6IntNodePtr(void)
Get Channel 6 Interrupt Node Pointer.
Definition: adc1.h:5633
INLINE void ADC1_setCh19Insel(tADC1_CHINSELx e_value)
Set Channel 19 input selection.
Definition: adc1.h:2785
INLINE void ADC1_disSeq2CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1827
INLINE uint8 ADC1_getCalibOffsAnaIn25(void)
Get Calibration Offset analog input 25.
Definition: adc1.h:6746
INLINE void ADC1_setCh0Insel(tADC1_CHINSELx e_value)
Set Channel 0 input selection.
Definition: adc1.h:2614
INLINE void ADC1_disGateSwShadowTrans(void)
Disable Gating Shadow Transfer.
Definition: adc1.h:6116
INLINE void ADC1_setCmp0UpThSts(void)
Set Compare 0 Upper Threshold Status.
Definition: adc1.h:4933
void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:2045
INLINE void ADC1_setSeq3WaitForRead(void)
Set Sequence 3 Wait for Read Status.
Definition: adc1.h:2369
INLINE void ADC1_enCalibProtCh3(void)
Enable Calibration Protection Channel 3.
Definition: adc1.h:3717
INLINE void ADC1_disCalibProtCh19(void)
Disable Calibration Protection Channel 19.
Definition: adc1.h:3948
INLINE void ADC1_clrSeq2CollSts(void)
Clear Sequence 2 Collision Status.
Definition: adc1.h:2306
INLINE uint8 ADC1_getCh14IntNodePtr(void)
Get Channel 14 Interrupt Node Pointer.
Definition: adc1.h:5705
INLINE void ADC1_setSeq1IntSts(void)
Set Sequence 1 Interrupt Status.
Definition: adc1.h:2411
INLINE void ADC1_disSeq0CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1473
INLINE uint16 ADC1_getCh13Result(void)
Get Result Value Channel 13.
Definition: adc1.h:4489
INLINE void ADC1_enGateHwShadowTrans(void)
Enable Gating Shadow Transfer Selection.
Definition: adc1.h:6019
INLINE uint8 ADC1_getSeq0TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1505
INLINE void ADC1_clrCmp0LoIntSts(void)
Clear Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4849
INLINE uint16 ADC1_getCalibGainAnaIn11(void)
Get Calibration Gain analog input 11.
Definition: adc1.h:6332
INLINE uint8 ADC1_getSeq1Slot0(void)
Get Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1732
INLINE void ADC1_enCalibCh15(void)
Enable Calibration Channel 15.
Definition: adc1.h:3507
INLINE void ADC1_enCalibCh26(void)
Enable Calibration Channel 26.
Definition: adc1.h:3661
INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value)
Set Calibration Offset analog input 18.
Definition: adc1.h:6485
INLINE uint16 ADC1_getFilter3Result(void)
Get Result Value Filter 3.
Definition: adc1.h:4154
INLINE void ADC1_setCh5Insel(tADC1_CHINSELx e_value)
Set Channel 5 input selection.
Definition: adc1.h:2659
INLINE uint16 ADC1_getCh16Result(void)
Get Result Value Channel 16.
Definition: adc1.h:4543
INLINE uint8 ADC1_getReady(void)
Get Module Ready.
Definition: adc1.h:1432
INLINE void ADC1_setCmp0LoIntSts(void)
Set Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4961
INLINE void ADC1_disCalibCh21(void)
Disable Calibration Channel 21.
Definition: adc1.h:3598
INLINE void ADC1_enCalibProtCh6(void)
Enable Calibration Protection Channel 6.
Definition: adc1.h:3759
INLINE void ADC1_disCalibProtCh22(void)
Disable Calibration Protection Channel 22.
Definition: adc1.h:3990
INLINE void ADC1_disSeq0WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1487
INLINE void ADC1_setCh3Config(tADC1_CHCFGx s_value)
Set Channel 3 configuration.
Definition: adc1.h:2461
INLINE uint16 ADC1_getCh19Result(void)
Get Result Value Channel 19.
Definition: adc1.h:4597
sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel)
Get the 14-bit value of the ADC1 Result Register of the selected ADC1 channel.
Definition: adc1.c:253
INLINE void ADC1_enCalibProtCh18(void)
Enable Calibration Protection Channel 18.
Definition: adc1.h:3927
INLINE void ADC1_enSeqHwShadowTrans(void)
Enable Sequence Shadow Transfer Selection.
Definition: adc1.h:5991
INLINE void ADC1_disCalibProtCh13(void)
Disable Calibration Protection Channel 13.
Definition: adc1.h:3864
INLINE void ADC1_setCh4EndOfConvSts(void)
Set Channel 4 End Of Conversion Status.
Definition: adc1.h:3149
INLINE void ADC1_clrCh9EndOfConvSts(void)
Clear Channel 9 End Of Conversion Status.
Definition: adc1.h:3044
INLINE uint8 ADC1_getCh6ResultValidSts(void)
Get Result Valid Flag Channel 6.
Definition: adc1.h:4372
INLINE void ADC1_disCalibProtCh10(void)
Disable Calibration Protection Channel 10.
Definition: adc1.h:3822
INLINE void ARVG_clrVAREFOvercurrentSts(void)
Clear VAREF Overcurrent Status.
Definition: adc1.h:6860
INLINE void ADC1_enSeq0Int(void)
Enable Sequence 0 Interrupt.
Definition: adc1.h:5129
INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value)
Set Calibration Offset analog input 20.
Definition: adc1.h:6557
INLINE uint8 ADC1_getCalibOffsAnaIn23(void)
Get Calibration Offset analog input 23.
Definition: adc1.h:6674
INLINE void ADC1_disCh11Int(void)
Disable Channel 11 Interrupt.
Definition: adc1.h:5346
INLINE void ADC1_setCh8Config(tADC1_CHCFGx s_value)
Set Channel 8 configuration.
Definition: adc1.h:2506
INLINE void ADC1_enCh10Int(void)
Enable Channel 10 Interrupt.
Definition: adc1.h:5325
INLINE void ADC1_enSeq1Int(void)
Enable Sequence 1 Interrupt.
Definition: adc1.h:5143
INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value)
Set Sequence Shadow Transfer Selection.
Definition: adc1.h:5939
INLINE void ADC1_enSeq2Int(void)
Enable Sequence 2 Interrupt.
Definition: adc1.h:5157
INLINE uint8 ADC1_getCh14EndOfConvSts(void)
Get Channel 14 End Of Conversion Status.
Definition: adc1.h:2920
INLINE uint8 ADC1_getSeq0WaitForRead(void)
Get Sequence 0 Wait for Read Status.
Definition: adc1.h:2149
INLINE void ADC1_setSeq3Config(tADC1_SQCFGx s_value)
Set Sequence 3 configuration.
Definition: adc1.h:1972
INLINE void ADC1_disSeq2WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1841
INLINE void ADC1_setConvClass1Config(tADC1_CONVCFGx s_value)
Set Conversion Class 1.
Definition: adc1.h:3272
void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 6 Interrupt Node Pointer.
INLINE void ARVG_disVAREFOvercurrentInt(void)
Disable VAREF Overcurrent Interrupt.
Definition: adc1.h:6828
INLINE uint8 ADC1_getCalibOffsAnaIn19(void)
Get Calibration Offset analog input 19.
Definition: adc1.h:6530
INLINE void ADC1_setCh2Config(tADC1_CHCFGx s_value)
Set Channel 2 configuration.
Definition: adc1.h:2452
INLINE void ADC1_enCalibCh5(void)
Enable Calibration Channel 5.
Definition: adc1.h:3367
INLINE void ADC1_disCalibProtCh23(void)
Disable Calibration Protection Channel 23.
Definition: adc1.h:4004
INLINE uint8 ADC1_getTriggSwShadowTrans(void)
Get Trigger Software Shadow Transfer.
Definition: adc1.h:6058
INLINE uint8 ADC1_getCh17IntNodePtr(void)
Get Channel 17 Interrupt Node Pointer.
Definition: adc1.h:5732
INLINE uint8 ADC1_getFilter3Coeff(void)
Get Filter 3 Coefficient.
Definition: adc1.h:4118
INLINE void ADC1_enCh7Int(void)
Enable Channel 7 Interrupt.
Definition: adc1.h:5283
union ADC1_CMPCFGx tADC1_CMPCFGx
INLINE uint8 ADC1_getSeqHwShadowTrans(void)
Get Sequence Shadow Transfer Selection.
Definition: adc1.h:5948
INLINE void ADC1_setCh19EndOfConvSts(void)
Set Channel 19 End Of Conversion Status.
Definition: adc1.h:3254
INLINE void ADC1_disCalibCh8(void)
Disable Calibration Channel 8.
Definition: adc1.h:3416
void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 15 Interrupt Node Pointer.
INLINE void ADC1_setCh15EndOfConvSts(void)
Set Channel 15 End Of Conversion Status.
Definition: adc1.h:3226
INLINE void ADC1_disCh13Int(void)
Disable Channel 13 Interrupt.
Definition: adc1.h:5374
INLINE void ADC1_clrCmp2UpThSts(void)
Clear Compare 2 Upper Threshold Status.
Definition: adc1.h:4835
INLINE void ADC1_disCalibCh6(void)
Disable Calibration Channel 6.
Definition: adc1.h:3388
void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq2WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5921
INLINE uint8 ADC1_getCh7ResultValidSts(void)
Get Result Valid Flag Channel 7.
Definition: adc1.h:4390
INLINE void ADC1_clrCh14EndOfConvSts(void)
Clear Channel 14 End Of Conversion Status.
Definition: adc1.h:3079
INLINE uint8 ADC1_getCmp1LoIntSts(void)
Get Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4732
INLINE uint8 ADC1_getCmp0LoThSts(void)
Get Compare 0 Lower Threshold Status.
Definition: adc1.h:4759
INLINE void ADC1_setConvClass0Config(tADC1_CONVCFGx s_value)
Set Conversion Class 0.
Definition: adc1.h:3263
INLINE void ADC1_enCalibCh2(void)
Enable Calibration Channel 2.
Definition: adc1.h:3325
INLINE void ADC1_setCmp1LoIntSts(void)
Set Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4968
INLINE void ADC1_setCmp0UpIntSts(void)
Set Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4905
INLINE void ADC1_clrSeq3WaitForRead(void)
Clear Sequence 3 Wait for Read Status.
Definition: adc1.h:2285
INLINE uint8 ADC1_getCmp2LoIntSts(void)
Get Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4741
INLINE uint8 ADC1_getSeq1GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1700
INLINE uint8 ADC1_getCh12ResultValidSts(void)
Get Result Valid Flag Channel 12.
Definition: adc1.h:4480
INLINE void ADC1_setCh18Insel(tADC1_CHINSELx e_value)
Set Channel 18 input selection.
Definition: adc1.h:2776
INLINE uint8 ADC1_getCmp3LoIntSts(void)
Get Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4750
INLINE void ADC1_clrSeq1IntSts(void)
Clear Sequence 1 Interrupt Status.
Definition: adc1.h:2327
INLINE void ADC1_setCh0EndOfConvSts(void)
Set Channel 0 End Of Conversion Status.
Definition: adc1.h:3121
INLINE void ADC1_setSeq0Slot2(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1582
void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 7 Interrupt Node Pointer.
INLINE void ADC1_setSeq2IntSts(void)
Set Sequence 2 Interrupt Status.
Definition: adc1.h:2418
INLINE void ADC1_disCh10Int(void)
Disable Channel 10 Interrupt.
Definition: adc1.h:5332
void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 4 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh1(void)
Enable Calibration Protection Channel 1.
Definition: adc1.h:3689
INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value)
Set Calibration Offset analog input 5.
Definition: adc1.h:6197
INLINE uint8 ADC1_getCh3EndOfConvSts(void)
Get Channel 3 End Of Conversion Status.
Definition: adc1.h:2821
INLINE uint8 ADC1_getCh15ResultValidSts(void)
Get Result Valid Flag Channel 15.
Definition: adc1.h:4534
INLINE uint16 ADC1_getCh3Result(void)
Get Result Value Channel 3.
Definition: adc1.h:4309
INLINE void ADC1_setCh13EndOfConvSts(void)
Set Channel 13 End Of Conversion Status.
Definition: adc1.h:3212
INLINE void ADC1_setCh10EndOfConvSts(void)
Set Channel 10 End Of Conversion Status.
Definition: adc1.h:3191
INLINE void ADC1_enCalibProtCh12(void)
Enable Calibration Protection Channel 12.
Definition: adc1.h:3843
INLINE void ADC1_setSeq0IntSts(void)
Set Sequence 0 Interrupt Status.
Definition: adc1.h:2404
INLINE void ADC1_enCalibCh1(void)
Enable Calibration Channel 1.
Definition: adc1.h:3311
INLINE void ADC1_disSeq2CollInt(void)
Disable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5556
void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_enCalibCh20(void)
Enable Calibration Channel 20.
Definition: adc1.h:3577
INLINE void ADC1_setCh12Insel(tADC1_CHINSELx e_value)
Set Channel 12 input selection.
Definition: adc1.h:2722
INLINE void ADC1_enSeq1TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1707
INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value)
Set Calibration Offset analog input 26.
Definition: adc1.h:6773
INLINE void ADC1_disCalibCh0(void)
Disable Calibration Channel 0.
Definition: adc1.h:3304
union ADC1_CHCFGx tADC1_CHCFGx
INLINE uint16 ADC1_getCalibGainAnaIn25(void)
Get Calibration Gain analog input 25.
Definition: adc1.h:6764
INLINE uint8 ADC1_getSeq3GatingSelect(void)
Get Gating Select.
Definition: adc1.h:2054
INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value)
Set Calibration Gain analog input 7.
Definition: adc1.h:6251
INLINE void ADC1_setCh17EndOfConvSts(void)
Set Channel 17 End Of Conversion Status.
Definition: adc1.h:3240
INLINE void ADC1_enSeq1WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1657
INLINE uint8 ADC1_getCmp0UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5795
INLINE void ADC1_disCalibProtCh5(void)
Disable Calibration Protection Channel 5.
Definition: adc1.h:3752
INLINE void ADC1_setCh17Insel(tADC1_CHINSELx e_value)
Set Channel 17 input selection.
Definition: adc1.h:2767
INLINE void ADC1_setSeq2Slot0(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1900
INLINE void ADC1_disCalibCh15(void)
Disable Calibration Channel 15.
Definition: adc1.h:3514
void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_enTriggHwShadowTrans(void)
Enable Trigger Shadow Transfer Selection.
Definition: adc1.h:6005
INLINE uint8 ADC1_getCh7IntNodePtr(void)
Get Channel 7 Interrupt Node Pointer.
Definition: adc1.h:5642
INLINE void ADC1_clrCmp1UpThSts(void)
Clear Compare 1 Upper Threshold Status.
Definition: adc1.h:4828
INLINE void ADC1_disCmp0LoInt(void)
Disable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:5080
INLINE uint8 ADC1_getCmp3UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5822
INLINE uint8 ADC1_getSeq2Slot2(void)
Get Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1945
INLINE void ADC1_setSeq0CollSts(void)
Set Sequence 0 Collision Status.
Definition: adc1.h:2376
INLINE uint16 ADC1_getCalibGainAnaIn24(void)
Get Calibration Gain analog input 24.
Definition: adc1.h:6728
void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 1 Interrupt Node Pointer.
INLINE void ADC1_enCalibCh10(void)
Enable Calibration Channel 10.
Definition: adc1.h:3437
INLINE void ADC1_enCh19Int(void)
Enable Channel 19 Interrupt.
Definition: adc1.h:5451
INLINE void ADC1_setSeq3CollSts(void)
Set Sequence 3 Collision Status.
Definition: adc1.h:2397
INLINE void ADC1_setCh9Insel(tADC1_CHINSELx e_value)
Set Channel 9 input selection.
Definition: adc1.h:2695
void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 14 Interrupt Node Pointer.
@ ADC1_CHINSELx_P2_6
Definition: adc1.h:338
@ ADC1_CHINSELx_MON2_3V_25V
Definition: adc1.h:322
@ ADC1_CHINSELx_VDH_3V_25V
Definition: adc1.h:314
@ ADC1_CHINSELx_P2_0
Definition: adc1.h:330
@ ADC1_CHINSELx_VDDEXT
Definition: adc1.h:328
@ ADC1_CHINSELx_P2_4
Definition: adc1.h:336
@ ADC1_CHINSELx_VS_3V_25V
Definition: adc1.h:312
@ ADC1_CHINSELx_SH2
Definition: adc1.h:317
@ ADC1_CHINSELx_P2_7
Definition: adc1.h:333
@ ADC1_CHINSELx_REF_VOLT_1V2
Definition: adc1.h:327
@ ADC1_CHINSELx_SH3
Definition: adc1.h:318
@ ADC1_CHINSELx_SH1
Definition: adc1.h:316
@ ADC1_CHINSELx_MON3_3V_25V
Definition: adc1.h:324
@ ADC1_CHINSELx_VDH_3V_35V
Definition: adc1.h:315
@ ADC1_CHINSELx_MON1_3V_35V
Definition: adc1.h:320
@ ADC1_CHINSELx_MON1_3V_25V
Definition: adc1.h:319
@ ADC1_CHINSELx_CSA
Definition: adc1.h:329
@ ADC1_CHINSELx_P2_2
Definition: adc1.h:339
@ ADC1_CHINSELx_MON3_3V_35V
Definition: adc1.h:325
@ ADC1_CHINSELx_P2_5
Definition: adc1.h:337
@ ADC1_CHINSELx_VS_3V_35V
Definition: adc1.h:313
@ ADC1_CHINSELx_MON2_3V_35V
Definition: adc1.h:323
@ ADC1_CHINSELx_P2_3
Definition: adc1.h:335
@ ADC1_CHINSELx_P2_1
Definition: adc1.h:331
@ ADC1_Seq0Trig_Seq0Complete
Definition: adc1.h:252
@ ADC1_Seq0Trig_T12ZM
Definition: adc1.h:247
@ ADC1_Seq0Trig_T13PM
Definition: adc1.h:249
@ ADC1_Seq0Trig_T16CM
Definition: adc1.h:250
@ ADC1_Seq0Trig_HallCorrect
Definition: adc1.h:251
@ ADC1_Seq0Trig_T12PM
Definition: adc1.h:248
@ ADC1_Seq0Trig_SW
Definition: adc1.h:246
@ ADC1_Seq0Trig_Seq3Complete
Definition: adc1.h:253
@ ADC1_SQ3Trig_Seq3Complete
Definition: adc1.h:302
@ ADC1_SQ3Trig_SW
Definition: adc1.h:296
@ ADC1_SQ3Trig_T12CC72ACM
Definition: adc1.h:298
@ ADC1_SQ3Trig_T12C71BCM
Definition: adc1.h:299
@ ADC1_SQ3Trig_T12ZM
Definition: adc1.h:297
@ ADC1_SQ3Trig_T16PM
Definition: adc1.h:300
@ ADC1_SQ3Trig_Seq2Complete
Definition: adc1.h:303
@ ADC1_SQ3Trig_T15CM
Definition: adc1.h:301
@ ADC1_Seq2Trig_T12C70BCM
Definition: adc1.h:282
@ ADC1_Seq2Trig_T12CC71ACM
Definition: adc1.h:281
@ ADC1_Seq2Trig_T12ZM
Definition: adc1.h:280
@ ADC1_Seq2Trig_T15PM
Definition: adc1.h:283
@ ADC1_Seq2Trig_GPT2
Definition: adc1.h:285
@ ADC1_Seq2Trig_Seq2Complete
Definition: adc1.h:286
@ ADC1_Seq2Trig_SW
Definition: adc1.h:279
@ ADC1_Seq2Trig_T14CM
Definition: adc1.h:284
@ ADC1_Seq2Trig_Seq1Complete
Definition: adc1.h:287
@ ADC1_Seq1Trig_T12ZM
Definition: adc1.h:263
@ ADC1_Seq1Trig_Seq0Complete
Definition: adc1.h:270
@ ADC1_Seq1Trig_T14PM
Definition: adc1.h:266
@ ADC1_Seq1Trig_SW
Definition: adc1.h:262
@ ADC1_Seq1Trig_GPT1
Definition: adc1.h:268
@ ADC1_Seq1Trig_T12CC70ACM
Definition: adc1.h:264
@ ADC1_Seq1Trig_Seq1Complete
Definition: adc1.h:269
@ ADC1_Seq1Trig_T13CM
Definition: adc1.h:267
@ ADC1_Seq1Trig_T12C72BCM
Definition: adc1.h:265
#define ARVG
Definition: tle989x.h:24057
#define ADC1
Definition: tle989x.h:24055
__attribute__((noreturn))
Definition: startup_tle989x.c:208
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Compare Channel 0 Control Register.
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Sequence Configuration Register.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:167
uint8_t uint8
8 bit unsigned value
Definition: types.h:220
int8_t sint8
8 bit signed value
Definition: types.h:225
uint16_t uint16
16 bit unsigned value
Definition: types.h:221
uint32_t uint32
32 bit unsigned value
Definition: types.h:222
Definition: adc1.h:384
uint32 CMPSEL
Definition: adc1.h:393
uint32 CLASSEL
Definition: adc1.h:394
uint32 INSEL
Definition: adc1.h:388
uint32 FILSEL
Definition: adc1.h:392
uint32 reg
Definition: adc1.h:385
struct ADC1_CHCFGx::@2 bit
uint32 CHREP
Definition: adc1.h:390
Definition: adc1.h:422
uint32 LOWER
Definition: adc1.h:426
uint32 HYST_LO
Definition: adc1.h:429
uint32 RST_BLANK_TIME
Definition: adc1.h:433
uint32 BLANK_TIME
Definition: adc1.h:432
uint32 MODE
Definition: adc1.h:435
struct ADC1_CMPCFGx::@4 bit
uint32 INP_SEL
Definition: adc1.h:427
uint32 reg
Definition: adc1.h:423
uint32 HYST_UP
Definition: adc1.h:434
uint32 UPPER
Definition: adc1.h:431
Definition: adc1.h:402
uint32 STC
Definition: adc1.h:408
uint32 SESP
Definition: adc1.h:409
uint32 BWD
Definition: adc1.h:413
uint32 TCONF
Definition: adc1.h:406
uint32 PCAL
Definition: adc1.h:412
uint32 OVERS
Definition: adc1.h:407
struct ADC1_CONVCFGx::@3 bit
uint32 BWD_HI_CUR
Definition: adc1.h:414
uint32 MSBD
Definition: adc1.h:411
uint32 reg
Definition: adc1.h:403
Definition: adc1.h:346
uint32 TRGSEL
Definition: adc1.h:355
struct ADC1_SQCFGx::@0 bit
uint32 GTSW
Definition: adc1.h:358
uint32 GTSEL
Definition: adc1.h:356
uint32 WFRCFG
Definition: adc1.h:354
uint32 COLLCFG
Definition: adc1.h:353
uint32 SLOTS
Definition: adc1.h:350
uint32 TRGSW
Definition: adc1.h:357
uint32 reg
Definition: adc1.h:347
uint32 SQREP
Definition: adc1.h:352
Definition: adc1.h:366
uint32 CHSEL3
Definition: adc1.h:376
uint32 CHSEL2
Definition: adc1.h:374
uint32 CHSEL0
Definition: adc1.h:370
struct ADC1_SQSLOTx::@1 bit
uint32 CHSEL1
Definition: adc1.h:372
uint32 reg
Definition: adc1.h:367