Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
Data Fields
ARVG_Type Struct Reference

Detailed Description

ARVG (ARVG)

#include <tle989x.h>

Data Fields

union {
   __IM uint32_t   reg
 
   struct {
      __IM uint32_t   VREF1V2_UP: 1
 
      uint32_t   __pad0__: 31
 
   }   bit
 
CFU_STS
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   OC_IS: 1
 
      uint32_t   __pad0__: 15
 
      __IOM uint32_t   OC_STS: 1
 
      uint32_t   __pad1__: 15
 
   }   bit
 
VAREF_IRQ
 
union {
   __IOM uint32_t   reg
 
   struct {
      __OM uint32_t   OC_IS_SET: 1
 
      uint32_t   __pad0__: 15
 
      __OM uint32_t   OC_STS_SET: 1
 
      uint32_t   __pad1__: 15
 
   }   bit
 
VAREF_IRQ_SET
 
union {
   __IOM uint32_t   reg
 
   struct {
      __OM uint32_t   OC_IS_CLR: 1
 
      uint32_t   __pad0__: 15
 
      __OM uint32_t   OC_STS_CLR: 1
 
      uint32_t   __pad1__: 15
 
   }   bit
 
VAREF_IRQ_CLR
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   OC_IEN: 1
 
      uint32_t   __pad0__: 31
 
   }   bit
 
VAREF_IEN
 
__IM uint32_t RESERVED
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   EN: 1
 
      uint32_t   __pad0__: 31
 
   }   bit
 
VAREF_CTRL
 

Field Documentation

◆ __pad0__

uint32_t __pad0__

◆ __pad1__

uint32_t __pad1__

◆  [1/6]

struct { ... } bit

◆  [2/6]

struct { ... } bit

◆  [3/6]

struct { ... } bit

◆  [4/6]

struct { ... } bit

◆  [5/6]

struct { ... } bit

◆  [6/6]

struct { ... } bit

◆ 

union { ... } CFU_STS

◆ EN

__IOM uint32_t EN

[0..0] VAREF enable bit

◆ OC_IEN

__IOM uint32_t OC_IEN

[0..0] VAREF Overcurrent (undervoltage) Interrupt Enable

◆ OC_IS

__IOM uint32_t OC_IS

[0..0] VAREF overcurrent (undervoltage) interrupt.

◆ OC_IS_CLR

__OM uint32_t OC_IS_CLR

[0..0] VAREF overcurrent (undervoltage) interrupt clear

◆ OC_IS_SET

__OM uint32_t OC_IS_SET

[0..0] VAREF overcurrent (undervoltage) interrupt set

◆ OC_STS

__IOM uint32_t OC_STS

[16..16] VAREF overcurrent (undervoltage) status flag. The detection circuit monitors VAREF voltage.

◆ OC_STS_CLR

__OM uint32_t OC_STS_CLR

[16..16] VAREF overcurrent (undervoltage) status flag clear

◆ OC_STS_SET

__OM uint32_t OC_STS_SET

[16..16] VAREF overcurrent (undervoltage) status flag set. Setting this bit will trigger a VAREF switch off.

◆ reg [1/2]

__IM uint32_t reg

(@ 0x00000000) CFU status register

◆ reg [2/2]

__IOM uint32_t reg

(@ 0x00000004) VAREF Interrupt Status Register

(@ 0x00000008) VAREF Interrupt Set Register

(@ 0x0000000C) VAREF Interrupt Clear Register

(@ 0x00000010) VAREF Interrupt Enable Register

(@ 0x00000018) VAREF control register

◆ RESERVED

__IM uint32_t RESERVED

◆ 

union { ... } VAREF_CTRL

◆ 

union { ... } VAREF_IEN

◆ 

union { ... } VAREF_IRQ

◆ 

union { ... } VAREF_IRQ_CLR

◆ 

union { ... } VAREF_IRQ_SET

◆ VREF1V2_UP

__IM uint32_t VREF1V2_UP

[0..0] Reference voltage status


The documentation for this struct was generated from the following file: