Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
startup_tle989x.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
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8  * following conditions are met:
9  *
10  * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
11  * disclaimer.
12  *
13  * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the
14  * following disclaimer in the documentation and/or other materials provided with the distribution.
15  *
16  * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
17  * products derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
20  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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23  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24  * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
25  * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27  **********************************************************************************************************************/
39 /*******************************************************************************
40 ** Author(s) Identity **
41 ********************************************************************************
42 ** Initials Name **
43 ** ---------------------------------------------------------------------------**
44 ** JO Julia Ott **
45 ** PS Patrik Schwarz **
46 ** VO Vanessa Ongaro **
47 *******************************************************************************/
48 
49 /*******************************************************************************
50 ** Revision Control History **
51 ********************************************************************************
52 ** V0.1.0: 2022-08-18, JO: EP-1235: Initial version of startup file in C **
53 ** V0.1.1: 2023-05-15, PS: EP-1441: Update c startup file and linker file **
54 ** for IAR to use sections **
55 ** V0.1.2: 2023-08-10, VO: EP-1464: Put debug_entry also in deprecated VTOR **
56 ** Fixed location of ER_NVM0_DEBUG_CONNECT **
57 ** in sct files **
58 ** V0.1.3: 2023-11-29, VO: EP-1465: Added chache enable to reset handler **
59 ** V0.1.4: 2024-05-06, VO: EP-1510: Removed 'Todo' comments **
60 *******************************************************************************/
61 
62 /* Work instructions:
63  When using this startup file, the project needs a linker script.
64  The linker script is has already been copied to the
65  RTE/Device/--devicename-- folder of this project and
66  needs to be added to the project manually.
67  Keil:
68  'Options for target'
69  --> 'Linker' tab
70  --> uncheck 'Use Memory Layout from Rarget Dialog'
71  --> Scatter file: '...'
72  --> add the linker file mentioned above (tle9881_91.sct or tle9883_93.sct)
73 */
74 
75 #include "tle989x.h"
76 #include "bootrom.h"
77 #include "tle_variants.h"
78 #include "bsl_defines.h"
79 #include "scu_defines.h"
80 
81 /*---------------------------------------------------------------------------
82  External References
83  *---------------------------------------------------------------------------*/
84 extern uint32_t __INITIAL_SP;
85 extern uint32_t __STACK_LIMIT;
86 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
87  extern uint32_t __STACK_SEAL;
88 #endif
89 
93 typedef void(*VECTOR_TABLE_Type)(void);
94 
95 extern __NO_RETURN void __PROGRAM_START(void);
96 
97 #if defined(__ARMCC_VERSION)
98  /* Arm Compiler V5 and V6 */
99  __attribute__((noreturn)) static void debug_entry(void) __attribute__((section("sec_NVM0_DEBUG_CONNECT"), used));
100 #elif defined(__IAR_SYSTEMS_ICC__)
101  /* IAR compiler */
102  __attribute__((noreturn)) static void debug_entry(void) @ "sec_NVM0_DEBUG_CONNECT";
103 #elif defined(UNIT_TESTING_OCN)
104  __attribute__((noreturn)) static void debug_entry(void);
105 #endif
106 
107 /*---------------------------------------------------------------------------
108  Internal References
109  *---------------------------------------------------------------------------*/
110 __NO_RETURN void Reset_Handler (void);
111 __NO_RETURN void Default_Handler(void);
112 __NO_RETURN static void debug_entry(void);
113 
114 /*---------------------------------------------------------------------------
115  Exception / Interrupt Handler
116  *---------------------------------------------------------------------------*/
117 /* Exceptions */
118 void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
119 void HardFault_Handler (void) __attribute__ ((weak));
120 void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
121 void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
122 void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
123 //void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
124 void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
125 void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
126 void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
127 void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler")));
128 
129 void NVIC_IRQ0_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 0: PMU, BDRV, CSC, ARVG
130 void NVIC_IRQ1_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 1: PMU, BDRV, CSC, ARVG
131 void NVIC_IRQ2_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 2: CCU7
132 void NVIC_IRQ3_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 3: CCU7
133 void NVIC_IRQ4_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 4: CCU7
134 void NVIC_IRQ5_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 5: CCU7
135 //0x000000c1 // 6: MEMCTRL
136 void NVIC_IRQ7_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 7: GPT12E
137 void NVIC_IRQ8_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 8: GPT12E
138 void NVIC_IRQ9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); // 9: Timer2
139 void NVIC_IRQ10_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 10: ADC2
140 void NVIC_IRQ11_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 11: ADC2
141 void NVIC_IRQ12_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 12: MON
142 void NVIC_IRQ13_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 13: MON
143 void NVIC_IRQ14_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 14: ADC1
144 void NVIC_IRQ15_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 15: ADC1
145 void NVIC_IRQ16_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 16: ADC1
146 void NVIC_IRQ17_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 17: ADC1
147 void NVIC_IRQ18_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 18: BEMF, SDADC
148 void NVIC_IRQ19_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 19: BEMF, SDADC
149 void NVIC_IRQ20_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 20: EXTINT
150 void NVIC_IRQ21_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 21: EXTINT
151 void NVIC_IRQ22_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 22: UART0/1, LIN
152 void NVIC_IRQ23_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 23: UART0/1, LIN
153 void NVIC_IRQ24_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 24: SSC0/1
154 void NVIC_IRQ25_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 25: SSC0/1
155 void NVIC_IRQ26_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 26: MultiCAN
156 void NVIC_IRQ27_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 27: MultiCAN
157 void NVIC_IRQ28_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 28: MultiCAN
158 void NVIC_IRQ29_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 29: DMA
159 void NVIC_IRQ30_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 30: DMA
160 void NVIC_IRQ31_Handler(void) __attribute__ ((weak, alias("Default_Handler"))); // 31: Timer21
161 
162 /*----------------------------------------------------------------------------
163  Exception / Interrupt Vector table
164  *----------------------------------------------------------------------------*/
165 
166 #if defined ( __GNUC__ )
167  #pragma GCC diagnostic push
168  #pragma GCC diagnostic ignored "-Wpedantic"
169 #endif
170 
171 #if defined(__ARMCC_VERSION)
172  /* Arm Compiler V5 and V6 */
173  static const uint32 u32_flash0_page0[11] __attribute__((section("sec_NVM0_BOOTCFG"), used)) =
174 #elif defined(__IAR_SYSTEMS_ICC__)
175  /* IAR compiler */
176  __root const uint32 u32_flash0_page0[11] @ "sec_NVM0_BOOTCFG" =
177 #elif defined(UNIT_TESTING_OCN)
178  const uint32 u32_flash0_page0[11] =
179 #endif
180 {
181  (uint32)BSL_NAD_NAC, /* 0x00: NAC,NAD */
182  0xFFFFFFFF, /* 0x04: reserved */
183  0xFFFFFFFF, /* 0x08: Secure Boot Hash */
184  0xFFFFFFFF, /* 0x0C: Secure Boot Hash */
185  0xFFFFFFFF, /* 0x10: Secure Boot Hash */
186  0xFFFFFFFF, /* 0x14: Secure Boot Hash */
187  0xFFFFFFFF, /* 0x18: reserved */
188  0xFFFFFFFF, /* 0x1C: reserved */
189  0xFFFFFFFF, /* 0x20: reserved */
190  0xFFFFFFFF, /* 0x24: User BSL Code Size */
191  0xFFFFFFFF, /* 0x28: Secure Key ID */
192 };
193 
194 #if defined(__ARMCC_VERSION)
195  /* Arm Compiler V5 and V6 */
196  static const VECTOR_TABLE_Type vt_vectab_deprecated[2] __attribute__((section("sec_NVM0_VECTAB_DEPRECATED"), used)) =
197 #elif defined(__IAR_SYSTEMS_ICC__)
198  /* IAR compiler: __root needed so that the variable is not optimized away */
199  __root const VECTOR_TABLE_Type vt_vectab_deprecated[2] @ "sec_NVM0_VECTAB_DEPRECATED" =
200 #elif defined(UNIT_TESTING_OCN)
201  static const VECTOR_TABLE_Type vt_vectab_deprecated[2] =
202 #endif
203 {
204  (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
205  debug_entry, /* Reset Handler */
206 };
207 
208 __attribute__((noreturn)) static void debug_entry(void)
209 {
210 #define SCU_BOOT_CFG_LATCH_ADDR 0x480040BC
211 #define SCU_BOOT_CFG_LATCH_TMS_MASK 0x00000001
212 #define SCU_BOOT_CFG_LATCH_P00_MASK 0x00000002
213 #define CPU_DHCSR_ADDR 0xE000EDF0
214 #define CPU_DHCSR_C_DEBUGEN_MASK 0x00000001
215  uint32 u32_boot_cfg_latch;
216  uint32 u32_dhcsr_c_debugen;
217  u32_boot_cfg_latch = *(uint32 *)SCU_BOOT_CFG_LATCH_ADDR;
218 
220  {
221  do
222  {
223  u32_dhcsr_c_debugen = (*(uint32 *)CPU_DHCSR_ADDR) & CPU_DHCSR_C_DEBUGEN_MASK;
224  }
225  while (u32_dhcsr_c_debugen == 0);
226  }
227 
228  Reset_Handler();
229 }
230 
232 
233 #if defined(__ARMCC_VERSION)
234 /* Arm Compiler V5 and V6 */
235 const VECTOR_TABLE_Type __VECTOR_TABLE[48] __VECTOR_TABLE_ATTRIBUTE =
236 {
237 #elif defined(__IAR_SYSTEMS_ICC__)
238 /* IAR compiler */
239 const VECTOR_TABLE_Type __VECTOR_TABLE[48] @ "sec_NVM0_VECTAB" = {
240 #elif defined(UNIT_TESTING_OCN)
241 const VECTOR_TABLE_Type __VECTOR_TABLE[48] = {
242 #endif
243  (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */
244  debug_entry, /* Reset Handler */
245  NMI_Handler, /* -14 NMI Handler */
246  HardFault_Handler, /* -13 Hard Fault Handler */
247  MemManage_Handler, /* -12 MPU Fault Handler */
248  BusFault_Handler, /* -11 Bus Fault Handler */
249  UsageFault_Handler, /* -10 Usage Fault Handler */
250  0, /* -9 Secure Fault Handler */
251  0, /* Reserved */
252  0, /* Reserved */
253  0, /* Reserved */
254  SVC_Handler, /* -5 SVCall Handler */
255  DebugMon_Handler, /* -4 Debug Monitor Handler */
256  0, /* Reserved */
257  PendSV_Handler, /* -2 PendSV Handler */
258  SysTick_Handler, /* -1 SysTick Handler */
259 
260  /* Interrupts */
261  NVIC_IRQ0_Handler, // 0: PMU, BDRV, CSC, ARVG
262  NVIC_IRQ1_Handler, // 1: PMU, BDRV, CSC, ARVG
263  NVIC_IRQ2_Handler, // 2: CCU7
264  NVIC_IRQ3_Handler, // 3: CCU7
265  NVIC_IRQ4_Handler, // 4: CCU7
266  NVIC_IRQ5_Handler, // 5: CCU7
267  (VECTOR_TABLE_Type)0x000000c1, // 6: MEMCTRL
268  NVIC_IRQ7_Handler, // 7: GPT12E
269  NVIC_IRQ8_Handler, // 8: GPT12E
270  NVIC_IRQ9_Handler, // 9: Timer2
271  NVIC_IRQ10_Handler, // 10: ADC2
272  NVIC_IRQ11_Handler, // 11: ADC2
273  NVIC_IRQ12_Handler, // 12: MON
274  NVIC_IRQ13_Handler, // 13: MON
275  NVIC_IRQ14_Handler, // 14: ADC1
276  NVIC_IRQ15_Handler, // 15: ADC1
277  NVIC_IRQ16_Handler, // 16: ADC1
278  NVIC_IRQ17_Handler, // 17: ADC1
279  NVIC_IRQ18_Handler, // 18: BEMF, SDADC
280  NVIC_IRQ19_Handler, // 19: BEMF, SDADC
281  NVIC_IRQ20_Handler, // 20: EXTINT
282  NVIC_IRQ21_Handler, // 21: EXTINT
283  NVIC_IRQ22_Handler, // 22: UART0/1, LIN
284  NVIC_IRQ23_Handler, // 23: UART0/1, LIN
285  NVIC_IRQ24_Handler, // 24: SSC0/1
286  NVIC_IRQ25_Handler, // 25: SSC0/1
287  NVIC_IRQ26_Handler, // 26: MultiCAN
288  NVIC_IRQ27_Handler, // 27: MultiCAN
289  NVIC_IRQ28_Handler, // 28: MultiCAN
290  NVIC_IRQ29_Handler, // 29: DMA
291  NVIC_IRQ30_Handler, // 30: DMA
292  NVIC_IRQ31_Handler // 31: Timer21
293 };
294 
295 #if defined ( __GNUC__ )
296 #pragma GCC diagnostic pop
297 #endif
298 
299 /*---------------------------------------------------------------------------
300  Reset Handler called on controller reset
301  *---------------------------------------------------------------------------*/
302 __NO_RETURN void Reset_Handler(void)
303 {
304  __set_PSP((uint32_t)(&__INITIAL_SP));
305 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
306  __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL));
307 #endif
308 
309  /* Enable Flash1 caching according to CW setting */
310  if(FLASH1_CACHE_EN == 1)
311  {
313  }
314 
315  SystemInit(); /* CMSIS System Initialization */
316  __PROGRAM_START(); /* Enter PreMain (C library entry point) */
317 }
318 
319 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
320 #pragma clang diagnostic push
321 #pragma clang diagnostic ignored "-Wmissing-noreturn"
322 #endif
323 
324 /*---------------------------------------------------------------------------
325  Hard Fault Handler
326  *---------------------------------------------------------------------------*/
327 void HardFault_Handler(void)
328 {
329  while (1);
330 }
331 
332 /*---------------------------------------------------------------------------
333  Default Handler for Exceptions / Interrupts
334  *---------------------------------------------------------------------------*/
335 void Default_Handler(void)
336 {
337  while (1);
338 }
339 
340 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
341 #pragma clang diagnostic pop
342 #endif
BootROM low level access library.
#define user_cache_operation
This user API function provides an alternative to writing to cache registers in addition to direct re...
Definition: bootrom.h:791
@ CACHE_OP_EN
Cache enable operation.
Definition: bootrom.h:272
void(* VECTOR_TABLE_Type)(void)
Exception / Interrupt Handler Function Prototype.
Definition: startup_tle989x.h:93
() VECTOR_TABLE_Type NVIC_IRQ17_Handler
Definition: startup_tle989x.h:278
() VECTOR_TABLE_Type NVIC_IRQ30_Handler
Definition: startup_tle989x.h:291
() VECTOR_TABLE_Type NVIC_IRQ27_Handler
Definition: startup_tle989x.h:288
() VECTOR_TABLE_Type SysTick_Handler
Definition: startup_tle989x.h:258
__NO_RETURN void Reset_Handler(void)
Definition: startup_tle989x.h:302
() VECTOR_TABLE_Type NVIC_IRQ4_Handler
Definition: startup_tle989x.h:265
() VECTOR_TABLE_Type NVIC_IRQ5_Handler
Definition: startup_tle989x.h:266
() VECTOR_TABLE_Type UsageFault_Handler
Definition: startup_tle989x.h:249
() VECTOR_TABLE_Type NVIC_IRQ12_Handler
Definition: startup_tle989x.h:273
__attribute__((noreturn)) static void debug_entry(void)
Definition: startup_tle989x.h:208
() VECTOR_TABLE_Type NMI_Handler
Definition: startup_tle989x.h:245
() VECTOR_TABLE_Type NVIC_IRQ0_Handler
Definition: startup_tle989x.h:261
#define CPU_DHCSR_ADDR
() VECTOR_TABLE_Type BusFault_Handler
Definition: startup_tle989x.h:248
() VECTOR_TABLE_Type NVIC_IRQ9_Handler
Definition: startup_tle989x.h:270
() VECTOR_TABLE_Type debug_entry
Definition: startup_tle989x.h:244
() VECTOR_TABLE_Type NVIC_IRQ10_Handler
Definition: startup_tle989x.h:271
() VECTOR_TABLE_Type NVIC_IRQ31_Handler
Definition: startup_tle989x.h:293
() VECTOR_TABLE_Type NVIC_IRQ14_Handler
Definition: startup_tle989x.h:275
() VECTOR_TABLE_Type NVIC_IRQ15_Handler
Definition: startup_tle989x.h:276
() VECTOR_TABLE_Type MemManage_Handler
Definition: startup_tle989x.h:247
() VECTOR_TABLE_Type HardFault_Handler
Definition: startup_tle989x.h:246
() VECTOR_TABLE_Type NVIC_IRQ7_Handler
Definition: startup_tle989x.h:268
const VECTOR_TABLE_Type __VECTOR_TABLE[48]
() VECTOR_TABLE_Type NVIC_IRQ11_Handler
Definition: startup_tle989x.h:272
() VECTOR_TABLE_Type NVIC_IRQ21_Handler
Definition: startup_tle989x.h:282
() VECTOR_TABLE_Type NVIC_IRQ8_Handler
Definition: startup_tle989x.h:269
__NO_RETURN void Default_Handler(void)
Definition: startup_tle989x.h:335
() VECTOR_TABLE_Type PendSV_Handler
Definition: startup_tle989x.h:256
() VECTOR_TABLE_Type NVIC_IRQ20_Handler
Definition: startup_tle989x.h:281
#define SCU_BOOT_CFG_LATCH_TMS_MASK
() VECTOR_TABLE_Type DebugMon_Handler
Definition: startup_tle989x.h:255
() VECTOR_TABLE_Type NVIC_IRQ16_Handler
Definition: startup_tle989x.h:277
() VECTOR_TABLE_Type NVIC_IRQ18_Handler
Definition: startup_tle989x.h:279
() VECTOR_TABLE_Type NVIC_IRQ28_Handler
Definition: startup_tle989x.h:289
() VECTOR_TABLE_Type NVIC_IRQ1_Handler
Definition: startup_tle989x.h:262
#define SCU_BOOT_CFG_LATCH_P00_MASK
#define CPU_DHCSR_C_DEBUGEN_MASK
() VECTOR_TABLE_Type SVC_Handler
Definition: startup_tle989x.h:250
() VECTOR_TABLE_Type NVIC_IRQ19_Handler
Definition: startup_tle989x.h:280
() VECTOR_TABLE_Type NVIC_IRQ2_Handler
Definition: startup_tle989x.h:263
() VECTOR_TABLE_Type NVIC_IRQ24_Handler
Definition: startup_tle989x.h:285
() VECTOR_TABLE_Type NVIC_IRQ3_Handler
Definition: startup_tle989x.h:264
#define SCU_BOOT_CFG_LATCH_ADDR
void alias("Default_Handler")))
uint32_t __STACK_LIMIT
__NO_RETURN void __PROGRAM_START(void)
() VECTOR_TABLE_Type NVIC_IRQ22_Handler
Definition: startup_tle989x.h:283
uint32_t __INITIAL_SP
Definition: startup_tle989x.h:243
() VECTOR_TABLE_Type NVIC_IRQ23_Handler
Definition: startup_tle989x.h:284
() VECTOR_TABLE_Type NVIC_IRQ26_Handler
Definition: startup_tle989x.h:287
() VECTOR_TABLE_Type NVIC_IRQ29_Handler
Definition: startup_tle989x.h:290
() VECTOR_TABLE_Type NVIC_IRQ25_Handler
Definition: startup_tle989x.h:286
() VECTOR_TABLE_Type NVIC_IRQ13_Handler
Definition: startup_tle989x.h:274
void SystemInit(void)
Initialize the system.
Definition: system_tle988x.c:46
Device specific memory layout defines and features.
#define UC_FLASH1_START
Definition: tle_variants.h:338
uint32_t uint32
32 bit unsigned value
Definition: types.h:222