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Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
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CAN Node FD (CANNODEFD)
#include <tle989x.h>
Data Fields | |
__IM uint32_t | RESERVED [128] |
union { | |
__IOM uint32_t reg | |
struct { | |
__IOM uint32_t BRP: 6 | |
uint32_t __pad0__: 2 | |
__IOM uint32_t SJW: 4 | |
uint32_t __pad1__: 3 | |
__IOM uint32_t DIV8: 1 | |
__IOM uint32_t TSEG2: 5 | |
uint32_t __pad2__: 1 | |
__IOM uint32_t TSEG1: 6 | |
uint32_t __pad3__: 4 | |
} bit | |
} | CAN_NBTEVR0 |
__IM uint32_t | RESERVED1 [9] |
union { | |
__IOM uint32_t reg | |
struct { | |
__IOM uint32_t FBRP: 6 | |
__IOM uint32_t FSJW: 2 | |
__IOM uint32_t FTSEG1: 4 | |
__IOM uint32_t FTSEG2: 3 | |
uint32_t __pad0__: 17 | |
} bit | |
} | CAN_FNBTR0 |
union { | |
__IOM uint32_t reg | |
struct { | |
__IM uint32_t TDCV: 6 | |
uint32_t __pad0__: 2 | |
__IOM uint32_t TDCO: 4 | |
uint32_t __pad1__: 3 | |
__IOM uint32_t TDC: 1 | |
uint32_t __pad2__: 16 | |
} bit | |
} | CAN_NTDCR0 |
union { | |
__IOM uint32_t reg | |
struct { | |
__IOM uint32_t BRP: 6 | |
uint32_t __pad0__: 2 | |
__IOM uint32_t SJW: 4 | |
uint32_t __pad1__: 3 | |
__IOM uint32_t DIV8: 1 | |
__IOM uint32_t TSEG2: 5 | |
uint32_t __pad2__: 1 | |
__IOM uint32_t TSEG1: 6 | |
uint32_t __pad3__: 4 | |
} bit | |
} | CAN_NBTEVR0 |
union { | |
__IOM uint32_t reg | |
struct { | |
__IOM uint32_t FBRP: 6 | |
__IOM uint32_t FSJW: 2 | |
__IOM uint32_t FTSEG1: 4 | |
__IOM uint32_t FTSEG2: 3 | |
uint32_t __pad0__: 17 | |
} bit | |
} | CAN_FNBTR0 |
union { | |
__IOM uint32_t reg | |
struct { | |
__IM uint32_t TDCV: 6 | |
uint32_t __pad0__: 2 | |
__IOM uint32_t TDCO: 4 | |
uint32_t __pad1__: 3 | |
__IOM uint32_t TDC: 1 | |
uint32_t __pad2__: 16 | |
} bit | |
} | CAN_NTDCR0 |
uint32_t __pad0__ |
uint32_t __pad1__ |
uint32_t __pad2__ |
uint32_t __pad3__ |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
__IOM uint32_t BRP |
[5..0] Baud Rate Prescaler
union { ... } CAN_FNBTR0 |
union { ... } CAN_FNBTR0 |
union { ... } CAN_NBTEVR0 |
union { ... } CAN_NBTEVR0 |
union { ... } CAN_NTDCR0 |
union { ... } CAN_NTDCR0 |
__IOM uint32_t DIV8 |
[15..15] Divide Prescaler Clock by 8
__IOM uint32_t FBRP |
[5..0] Fast Baud Rate Prescaler
__IOM uint32_t FSJW |
[7..6] Fast (Re) Synchronization Jump Width
__IOM uint32_t FTSEG1 |
[11..8] Fast Time Segment Before Sample Point
__IOM uint32_t FTSEG2 |
[14..12] Fast Time Segment After Sample Point
__IOM uint32_t reg |
(@ 0x00000200) Node 0 Bit Timing Extended View Register
(@ 0x00000228) Fast Node 0 Bit Timing Register
(@ 0x0000022C) Node 0 Transmitter Delay Compensation Register
__IM uint32_t RESERVED |
__IM uint32_t RESERVED1 |
__IOM uint32_t SJW |
[11..8] (Re) Synchronization Jump Width
__IOM uint32_t TDC |
[15..15] Transmitter Delay Compensation Enable
__IOM uint32_t TDCO |
[11..8] Transmitter Delay Compensation Offset
__IM uint32_t TDCV |
[5..0] Transmitter Delay Compensation Value
__IOM uint32_t TSEG1 |
[27..22] Time Segment Before Sample Point
__IOM uint32_t TSEG2 |
[20..16] Time Segment After Sample Point