Infineon MOTIX™ MCU TLE988x/9x Device Family SDK
adc1.h
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1 /*
2  ***********************************************************************************************************************
3  *
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43 /* Generated by generate_functions_02_xlsx2func.py, version 1.0.1 on 09. Feb 2021
44  * from File 'adc1.xlsx', version 0.2.1
45  */
46 
47 /*******************************************************************************
48 ** Author(s) Identity **
49 ********************************************************************************
50 ** Initials Name **
51 ** ---------------------------------------------------------------------------**
52 ** JO Julia Ott **
53 ** BG Blandine Guillot **
54 ** DM Daniel Mysliwitz **
55 *******************************************************************************/
56 
57 /*******************************************************************************
58 ** Revision Control History **
59 ********************************************************************************
60 ** V0.1.0: 2020-05-26, DM: Initial version **
61 ** V0.1.1: 2020-08-11, JO: EP-449: Disabled compiler warnings for ARMCC v6 **
62 ** locally where violations can't be avoided **
63 ** V0.1.2: 2020-10-06, BG: EP-492: Removed MISRA 2012 errors **
64 ** V0.2.0: 2020-10-16, JO: EP-523: Updated parameter names **
65 ** Added functions for sequence configuration **
66 ** Removed functions that access **
67 ** ADC1->GLOBCONF.bit.LOWSUP, DSCAL, CPCLK_HV_FAST, **
68 ** EN_CONV_TIMOUT (bits have been removed) **
69 ** V0.2.1: 2020-10-21, BG: EP-539: Considered the enable checkbox in CW in **
70 ** the initialization function **
71 ** V0.3.0: 2020-10-22, JO: EP-543: Corrected check of return value in **
72 ** ADC1_getChResult_mV and ADC1_getChFiltResult_mV **
73 ** V0.3.1: 2020-10-27, BG: EP-561: Renamed split compare up/low bits **
74 ** V0.3.2: 2020-11-04, JO: EP-556: Removed functions that are related to **
75 ** ADC EOC Fail Interrupt **
76 ** V0.3.3: 2020-11-12, JO: EP-590: Removed \param none and \return none to **
77 ** avoid doxygen warning **
78 ** Updated stype of parameter of type pointer **
79 ** V0.3.4: 2020-11-17, BG: EP-598: Added VAREF-related functions **
80 ** V0.3.5: 2020-11-18, DM: EP-579: Fixed filtout value for postprocessing **
81 ** private function declaration removed from h-file **
82 ** V0.3.6: 2020-11-20, BG: EP-610: Corrected MISRA 2012 errors **
83 ** The following rules are globally deactivated: **
84 ** - Info 774: Boolean within 'if' always evaluates **
85 ** to False/True **
86 ** V0.3.7: 2020-12-03, JO: EP-610: Fixed ARMCC v6 compiler warnings **
87 ** V0.3.8: 2020-12-16, DM: EP-650: Replaced NOP loop in the ADC1_init() by **
88 ** wait for ADC1 ready **
89 ** V0.3.9: 2020-12-18, DM: EP-642: add separate seq. shadow transfer enable **
90 ** prior to trigger seq. shadow transfer **
91 ** V0.4.0: 2020-12-18, BG: EP-652: Corrected name of error code variable **
92 ** V0.4.1: 2021-02-09, JO: EP-696: Changed from anonymous to named typedefs **
93 ** to prevent MISRA warning **
94 ** V0.4.2: 2021-03-04, BG: EP-718: Added enums for trigger sources **
95 ** V0.4.3: 2021-04-06, BG: EP-760: Replaced if instructions to check if the **
96 ** module is enabled with preprocessor directives to**
97 ** avoid compiler warnings **
98 ** V0.4.4: 2021-04-23, NI: EP-706: Added function instead of direct field **
99 ** access in ADC1_init() **
100 ** Added missing elses for range check if() in **
101 ** several functions. **
102 ** V0.4.5: 2021-08-06, BG: EP-695: Removed the check of the VALID bit in **
103 ** ADC1_getChResult() **
104 ** Updated documentation for ADC1_getChResult() and **
105 ** ADC1_getChResult_mV() **
106 ** V0.4.6: 2021-11-12, JO: EP-937: Updated copyright and branding **
107 ** V0.4.7: 2022-06-23, JO: EP-1150: Removed ARMCC V6.18 warnings **
108 ** V0.4.8: 2022-08-29, JO: EP-1244: Removed sequence running check from **
109 ** ADC1_startSequence **
110 ** V0.4.9: 2022-11-17, JO: EP-1342: Updated enum documentation to remove **
111 ** doxygen warning **
112 ** V0.5.0: 2023-02-23, BG: EP-1279: Corrected Doxygen documentation for **
113 ** ADC1_getChFiltResult and ADC1_getChFiltResult_mV **
114 *******************************************************************************/
115 
116 #ifndef _ADC1_H
117 #define _ADC1_H
118 
119 /*******************************************************************************
120 ** Includes **
121 *******************************************************************************/
122 
123 #include "tle_variants.h"
124 #include "types.h"
125 #include "adc1_defines.h"
126 #include "tle989x.h"
127 
128 /*******************************************************************************
129 ** Global Macro Declarations **
130 *******************************************************************************/
131 
133 #define ADC1_DCH_CNT (20u)
135 #define ADC1_AI_CNT (27u)
137 #define ADC1_FILT_CNT (4u)
139 #define ADC1_SEQ_CNT (4u)
141 #define ADC1_SLOT_CNT (4u)
143 #define ADC1_FILT_CH_DIS (4u)
145 #define ADC1_SHADOWTRANS_EN (0x00700000u)
147 #define ADC1_SHADOWTRANS_BY_SW (0x00770000u)
149 #define ADC1_ALL_DCH_MSK (0xFFFFFu)
151 #define ADC1_ALL_SQSTS_MSK (0xFFFu)
153 #define ADC1_ALL_FILTSTS_MSK (0xFu)
155 #define ADC1_ALL_CMPSTS_MSK (0xFF00FFu)
157 #define ADC1_VREF_5000mV (5000u)
159 #define ADC1_MAX_RESOLUTION (0x3FFFu)
161 #define ADC1_ATT_TYPE0 (102u)
163 #define ADC1_ATT_TYPE1 (72u)
165 #define ADC1_ATT_TYPE2 (512u)
167 #define ADC1_ATT_DENOM (512u)
169 #define ADC1_DCH0 (0u)
171 #define ADC1_DCH1 (1u)
173 #define ADC1_DCH2 (2u)
175 #define ADC1_DCH3 (3u)
177 #define ADC1_DCH4 (4u)
179 #define ADC1_DCH5 (5u)
181 #define ADC1_DCH6 (6u)
183 #define ADC1_DCH7 (7u)
185 #define ADC1_DCH8 (8u)
187 #define ADC1_DCH9 (9u)
189 #define ADC1_DCH10 (10u)
191 #define ADC1_DCH11 (11u)
193 #define ADC1_DCH12 (12u)
195 #define ADC1_DCH13 (13u)
197 #define ADC1_DCH14 (14u)
199 #define ADC1_DCH15 (15u)
201 #define ADC1_DCH16 (16u)
203 #define ADC1_DCH17 (17u)
205 #define ADC1_DCH18 (18u)
207 #define ADC1_DCH19 (19u)
208 
210 #define ADC1_SEQ0 (0u)
212 #define ADC1_SEQ1 (1u)
214 #define ADC1_SEQ2 (2u)
216 #define ADC1_SEQ3 (3u)
217 
219 #define ADC1_SEQ_SLOT0 (0u)
221 #define ADC1_SEQ_SLOT1 (1u)
223 #define ADC1_SEQ_SLOT2 (2u)
225 #define ADC1_SEQ_SLOT3 (3u)
226 
228 #define ADC1_SW_TRIGGER (0u)
229 
230 /*******************************************************************************
231 ** Global Type Declarations **
232 *******************************************************************************/
233 
234 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
235  #pragma clang diagnostic push
236  #pragma clang diagnostic ignored "-Wpadded"
237 #endif
238 
243 typedef enum ADC1_Seq0Trig
244 {
254 
259 typedef enum ADC1_Seq1Trig
260 {
271 
276 typedef enum ADC1_Seq2Trig
277 {
288 
293 typedef enum ADC1_Seq3Trig
294 {
304 
308 typedef union ADC1_SQCFGx
309 {
311  struct
312  {
313  uint32 SLOTS : 3;
314  uint32 : 1;
315  uint32 SQREP : 2;
319  uint32 GTSEL : 2;
320  uint32 TRGSW : 1;
321  uint32 GTSW : 1;
322  } bit;
324 
328 typedef union ADC1_SQSLOTx
329 {
331  struct
332  {
334  uint32 : 3;
336  uint32 : 3;
338  uint32 : 3;
340  } bit;
342 
346 typedef union ADC1_CHCFGx
347 {
349  struct
350  {
351  uint32 INSEL : 5;
352  uint32 : 3;
353  uint32 CHREP : 4;
354  uint32 : 4;
358  } bit;
360 
364 typedef union ADC1_CONVCFGx
365 {
367  struct
368  {
369  uint32 TCONF : 2;
370  uint32 OVERS : 2;
371  uint32 STC : 4;
372  uint32 SESP : 1;
373  uint32 : 1;
374  uint32 MSBD : 1;
375  uint32 PCAL : 1;
376  uint32 BWD : 2;
378  } bit;
380 
384 typedef union ADC1_CMPCFGx
385 {
387  struct
388  {
389  uint32 LOWER : 8;
391  uint32 : 3;
393  uint32 : 2;
394  uint32 UPPER : 8;
398  uint32 MODE : 2;
399  } bit;
401 
402 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
403  #pragma clang diagnostic pop
404 #endif
405 
406 /*******************************************************************************
407 ** Global Function Declarations **
408 *******************************************************************************/
409 
410 sint8 ADC1_init(void);
411 sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel);
412 sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel);
413 sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel);
414 sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel);
415 sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx);
416 sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx);
417 sint8 ADC1_startSequence(uint8 u8_seqIdx);
418 uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx);
419 INLINE void ADC1_enPower(void);
420 INLINE void ADC1_disPower(void);
421 INLINE void ADC1_setClockDiv(uint8 u8_value);
423 INLINE void ADC1_enSuspend(void);
424 INLINE void ADC1_disSuspend(void);
425 INLINE void ADC1_setSuspendMode(uint8 u8_value);
430 INLINE void ADC1_setSeq0Repetition(uint8 u8_value);
434 INLINE void ADC1_enSeq0WaitForRead(void);
438 INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value);
440 INLINE void ADC1_enSeq0TriggerGate(void);
442 INLINE void ADC1_setSeq0Slot0(uint8 u8_value);
444 INLINE void ADC1_setSeq0Slot1(uint8 u8_value);
446 INLINE void ADC1_setSeq0Slot2(uint8 u8_value);
448 INLINE void ADC1_setSeq0Slot3(uint8 u8_value);
451 INLINE void ADC1_setSeq1Repetition(uint8 u8_value);
455 INLINE void ADC1_enSeq1WaitForRead(void);
459 INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value);
461 INLINE void ADC1_enSeq1TriggerGate(void);
463 INLINE void ADC1_setSeq1Slot0(uint8 u8_value);
465 INLINE void ADC1_setSeq1Slot1(uint8 u8_value);
467 INLINE void ADC1_setSeq1Slot2(uint8 u8_value);
469 INLINE void ADC1_setSeq1Slot3(uint8 u8_value);
472 INLINE void ADC1_setSeq2Repetition(uint8 u8_value);
476 INLINE void ADC1_enSeq2WaitForRead(void);
480 INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value);
482 INLINE void ADC1_enSeq2TriggerGate(void);
484 INLINE void ADC1_setSeq2Slot0(uint8 u8_value);
486 INLINE void ADC1_setSeq2Slot1(uint8 u8_value);
488 INLINE void ADC1_setSeq2Slot2(uint8 u8_value);
490 INLINE void ADC1_setSeq2Slot3(uint8 u8_value);
493 INLINE void ADC1_setSeq3Repetition(uint8 u8_value);
497 INLINE void ADC1_enSeq3WaitForRead(void);
501 INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value);
503 INLINE void ADC1_enSeq3TriggerGate(void);
505 INLINE void ADC1_setSeq3Slot0(uint8 u8_value);
507 INLINE void ADC1_setSeq3Slot1(uint8 u8_value);
509 INLINE void ADC1_setSeq3Slot2(uint8 u8_value);
511 INLINE void ADC1_setSeq3Slot3(uint8 u8_value);
530 INLINE void ADC1_clrSeq0CollSts(void);
531 INLINE void ADC1_clrSeq1CollSts(void);
532 INLINE void ADC1_clrSeq2CollSts(void);
533 INLINE void ADC1_clrSeq3CollSts(void);
534 INLINE void ADC1_clrSeq0IntSts(void);
535 INLINE void ADC1_clrSeq1IntSts(void);
536 INLINE void ADC1_clrSeq2IntSts(void);
537 INLINE void ADC1_clrSeq3IntSts(void);
542 INLINE void ADC1_setSeq0CollSts(void);
543 INLINE void ADC1_setSeq1CollSts(void);
544 INLINE void ADC1_setSeq2CollSts(void);
545 INLINE void ADC1_setSeq3CollSts(void);
546 INLINE void ADC1_setSeq0IntSts(void);
547 INLINE void ADC1_setSeq1IntSts(void);
548 INLINE void ADC1_setSeq2IntSts(void);
549 INLINE void ADC1_setSeq3IntSts(void);
635 INLINE void ADC1_enCalibCh0 (void);
636 INLINE void ADC1_disCalibCh0 (void);
637 INLINE void ADC1_enCalibCh1 (void);
638 INLINE void ADC1_disCalibCh1 (void);
639 INLINE void ADC1_enCalibCh2 (void);
640 INLINE void ADC1_disCalibCh2 (void);
641 INLINE void ADC1_enCalibCh3 (void);
642 INLINE void ADC1_disCalibCh3 (void);
643 INLINE void ADC1_enCalibCh4 (void);
644 INLINE void ADC1_disCalibCh4 (void);
645 INLINE void ADC1_enCalibCh5 (void);
646 INLINE void ADC1_disCalibCh5 (void);
647 INLINE void ADC1_enCalibCh6 (void);
648 INLINE void ADC1_disCalibCh6 (void);
649 INLINE void ADC1_enCalibCh7 (void);
650 INLINE void ADC1_disCalibCh7 (void);
651 INLINE void ADC1_enCalibCh8 (void);
652 INLINE void ADC1_disCalibCh8 (void);
653 INLINE void ADC1_enCalibCh9 (void);
654 INLINE void ADC1_disCalibCh9 (void);
655 INLINE void ADC1_enCalibCh10(void);
656 INLINE void ADC1_disCalibCh10(void);
657 INLINE void ADC1_enCalibCh11(void);
658 INLINE void ADC1_disCalibCh11(void);
659 INLINE void ADC1_enCalibCh12(void);
660 INLINE void ADC1_disCalibCh12(void);
661 INLINE void ADC1_enCalibCh13(void);
662 INLINE void ADC1_disCalibCh13(void);
663 INLINE void ADC1_enCalibCh14(void);
664 INLINE void ADC1_disCalibCh14(void);
665 INLINE void ADC1_enCalibCh15(void);
666 INLINE void ADC1_disCalibCh15(void);
667 INLINE void ADC1_enCalibCh16(void);
668 INLINE void ADC1_disCalibCh16(void);
669 INLINE void ADC1_enCalibCh17(void);
670 INLINE void ADC1_disCalibCh17(void);
671 INLINE void ADC1_enCalibCh18(void);
672 INLINE void ADC1_disCalibCh18(void);
673 INLINE void ADC1_enCalibCh19(void);
674 INLINE void ADC1_disCalibCh19(void);
675 INLINE void ADC1_enCalibCh20(void);
676 INLINE void ADC1_disCalibCh20(void);
677 INLINE void ADC1_enCalibCh21(void);
678 INLINE void ADC1_disCalibCh21(void);
679 INLINE void ADC1_enCalibCh22(void);
680 INLINE void ADC1_disCalibCh22(void);
681 INLINE void ADC1_enCalibCh23(void);
682 INLINE void ADC1_disCalibCh23(void);
683 INLINE void ADC1_enCalibCh24(void);
684 INLINE void ADC1_disCalibCh24(void);
685 INLINE void ADC1_enCalibCh25(void);
686 INLINE void ADC1_disCalibCh25(void);
687 INLINE void ADC1_enCalibCh26(void);
688 INLINE void ADC1_disCalibCh26(void);
689 INLINE void ADC1_enCalibProtCh0 (void);
690 INLINE void ADC1_disCalibProtCh0 (void);
691 INLINE void ADC1_enCalibProtCh1 (void);
692 INLINE void ADC1_disCalibProtCh1 (void);
693 INLINE void ADC1_enCalibProtCh2 (void);
694 INLINE void ADC1_disCalibProtCh2 (void);
695 INLINE void ADC1_enCalibProtCh3 (void);
696 INLINE void ADC1_disCalibProtCh3 (void);
697 INLINE void ADC1_enCalibProtCh4 (void);
698 INLINE void ADC1_disCalibProtCh4 (void);
699 INLINE void ADC1_enCalibProtCh5 (void);
700 INLINE void ADC1_disCalibProtCh5 (void);
701 INLINE void ADC1_enCalibProtCh6 (void);
702 INLINE void ADC1_disCalibProtCh6 (void);
703 INLINE void ADC1_enCalibProtCh7 (void);
704 INLINE void ADC1_disCalibProtCh7 (void);
705 INLINE void ADC1_enCalibProtCh8 (void);
706 INLINE void ADC1_disCalibProtCh8 (void);
707 INLINE void ADC1_enCalibProtCh9 (void);
708 INLINE void ADC1_disCalibProtCh9 (void);
709 INLINE void ADC1_enCalibProtCh10(void);
710 INLINE void ADC1_disCalibProtCh10(void);
711 INLINE void ADC1_enCalibProtCh11(void);
712 INLINE void ADC1_disCalibProtCh11(void);
713 INLINE void ADC1_enCalibProtCh12(void);
714 INLINE void ADC1_disCalibProtCh12(void);
715 INLINE void ADC1_enCalibProtCh13(void);
716 INLINE void ADC1_disCalibProtCh13(void);
717 INLINE void ADC1_enCalibProtCh14(void);
718 INLINE void ADC1_disCalibProtCh14(void);
719 INLINE void ADC1_enCalibProtCh15(void);
720 INLINE void ADC1_disCalibProtCh15(void);
721 INLINE void ADC1_enCalibProtCh16(void);
722 INLINE void ADC1_disCalibProtCh16(void);
723 INLINE void ADC1_enCalibProtCh17(void);
724 INLINE void ADC1_disCalibProtCh17(void);
725 INLINE void ADC1_enCalibProtCh18(void);
726 INLINE void ADC1_disCalibProtCh18(void);
727 INLINE void ADC1_enCalibProtCh19(void);
728 INLINE void ADC1_disCalibProtCh19(void);
729 INLINE void ADC1_enCalibProtCh20(void);
730 INLINE void ADC1_disCalibProtCh20(void);
731 INLINE void ADC1_enCalibProtCh21(void);
732 INLINE void ADC1_disCalibProtCh21(void);
733 INLINE void ADC1_enCalibProtCh22(void);
734 INLINE void ADC1_disCalibProtCh22(void);
735 INLINE void ADC1_enCalibProtCh23(void);
736 INLINE void ADC1_disCalibProtCh23(void);
737 INLINE void ADC1_enCalibProtCh24(void);
738 INLINE void ADC1_disCalibProtCh24(void);
739 INLINE void ADC1_enCalibProtCh25(void);
740 INLINE void ADC1_disCalibProtCh25(void);
741 INLINE void ADC1_enCalibProtCh26(void);
742 INLINE void ADC1_disCalibProtCh26(void);
743 INLINE void ADC1_setFilter0Coeff(uint8 u8_value);
745 INLINE void ADC1_setFilter1Coeff(uint8 u8_value);
747 INLINE void ADC1_setFilter2Coeff(uint8 u8_value);
749 INLINE void ADC1_setFilter3Coeff(uint8 u8_value);
759 INLINE void ADC1_clrFilter0Sts(void);
760 INLINE void ADC1_clrFilter1Sts(void);
761 INLINE void ADC1_clrFilter2Sts(void);
762 INLINE void ADC1_clrFilter3Sts(void);
763 INLINE void ADC1_setFilter0Sts(void);
764 INLINE void ADC1_setFilter1Sts(void);
765 INLINE void ADC1_setFilter2Sts(void);
766 INLINE void ADC1_setFilter3Sts(void);
827 INLINE void ADC1_clrCmp0UpIntSts(void);
828 INLINE void ADC1_clrCmp1UpIntSts(void);
829 INLINE void ADC1_clrCmp2UpIntSts(void);
830 INLINE void ADC1_clrCmp3UpIntSts(void);
831 INLINE void ADC1_clrCmp0UpThSts(void);
832 INLINE void ADC1_clrCmp1UpThSts(void);
833 INLINE void ADC1_clrCmp2UpThSts(void);
834 INLINE void ADC1_clrCmp3UpThSts(void);
835 INLINE void ADC1_clrCmp0LoIntSts(void);
836 INLINE void ADC1_clrCmp1LoIntSts(void);
837 INLINE void ADC1_clrCmp2LoIntSts(void);
838 INLINE void ADC1_clrCmp3LoIntSts(void);
839 INLINE void ADC1_clrCmp0LoThSts(void);
840 INLINE void ADC1_clrCmp1LoThSts(void);
841 INLINE void ADC1_clrCmp2LoThSts(void);
842 INLINE void ADC1_clrCmp3LoThSts(void);
843 INLINE void ADC1_setCmp0UpIntSts(void);
844 INLINE void ADC1_setCmp1UpIntSts(void);
845 INLINE void ADC1_setCmp2UpIntSts(void);
846 INLINE void ADC1_setCmp3UpIntSts(void);
847 INLINE void ADC1_setCmp0UpThSts(void);
848 INLINE void ADC1_setCmp1UpThSts(void);
849 INLINE void ADC1_setCmp2UpThSts(void);
850 INLINE void ADC1_setCmp3UpThSts(void);
851 INLINE void ADC1_setCmp0LoIntSts(void);
852 INLINE void ADC1_setCmp1LoIntSts(void);
853 INLINE void ADC1_setCmp2LoIntSts(void);
854 INLINE void ADC1_setCmp3LoIntSts(void);
855 INLINE void ADC1_setCmp0LoThSts(void);
856 INLINE void ADC1_setCmp1LoThSts(void);
857 INLINE void ADC1_setCmp2LoThSts(void);
858 INLINE void ADC1_setCmp3LoThSts(void);
859 INLINE void ADC1_enCmp0UpInt(void);
860 INLINE void ADC1_disCmp0UpInt(void);
861 INLINE void ADC1_enCmp1UpInt(void);
862 INLINE void ADC1_disCmp1UpInt(void);
863 INLINE void ADC1_enCmp2UpInt(void);
864 INLINE void ADC1_disCmp2UpInt(void);
865 INLINE void ADC1_enCmp3UpInt(void);
866 INLINE void ADC1_disCmp3UpInt(void);
867 INLINE void ADC1_enCmp0LoInt(void);
868 INLINE void ADC1_disCmp0LoInt(void);
869 INLINE void ADC1_enCmp1LoInt(void);
870 INLINE void ADC1_disCmp1LoInt(void);
871 INLINE void ADC1_enCmp2LoInt(void);
872 INLINE void ADC1_disCmp2LoInt(void);
873 INLINE void ADC1_enCmp3LoInt(void);
874 INLINE void ADC1_disCmp3LoInt(void);
875 INLINE void ADC1_enSeq0Int(void);
876 INLINE void ADC1_disSeq0Int(void);
877 INLINE void ADC1_enSeq1Int(void);
878 INLINE void ADC1_disSeq1Int(void);
879 INLINE void ADC1_enSeq2Int(void);
880 INLINE void ADC1_disSeq2Int(void);
881 INLINE void ADC1_enSeq3Int(void);
882 INLINE void ADC1_disSeq3Int(void);
883 INLINE void ADC1_enCh0Int(void);
884 INLINE void ADC1_disCh0Int(void);
885 INLINE void ADC1_enCh1Int(void);
886 INLINE void ADC1_disCh1Int(void);
887 INLINE void ADC1_enCh2Int(void);
888 INLINE void ADC1_disCh2Int(void);
889 INLINE void ADC1_enCh3Int(void);
890 INLINE void ADC1_disCh3Int(void);
891 INLINE void ADC1_enCh4Int(void);
892 INLINE void ADC1_disCh4Int(void);
893 INLINE void ADC1_enCh5Int(void);
894 INLINE void ADC1_disCh5Int(void);
895 INLINE void ADC1_enCh6Int(void);
896 INLINE void ADC1_disCh6Int(void);
897 INLINE void ADC1_enCh7Int(void);
898 INLINE void ADC1_disCh7Int(void);
899 INLINE void ADC1_enCh8Int(void);
900 INLINE void ADC1_disCh8Int(void);
901 INLINE void ADC1_enCh9Int(void);
902 INLINE void ADC1_disCh9Int(void);
903 INLINE void ADC1_enCh10Int(void);
904 INLINE void ADC1_disCh10Int(void);
905 INLINE void ADC1_enCh11Int(void);
906 INLINE void ADC1_disCh11Int(void);
907 INLINE void ADC1_enCh12Int(void);
908 INLINE void ADC1_disCh12Int(void);
909 INLINE void ADC1_enCh13Int(void);
910 INLINE void ADC1_disCh13Int(void);
911 INLINE void ADC1_enCh14Int(void);
912 INLINE void ADC1_disCh14Int(void);
913 INLINE void ADC1_enCh15Int(void);
914 INLINE void ADC1_disCh15Int(void);
915 INLINE void ADC1_enCh16Int(void);
916 INLINE void ADC1_disCh16Int(void);
917 INLINE void ADC1_enCh17Int(void);
918 INLINE void ADC1_disCh17Int(void);
919 INLINE void ADC1_enCh18Int(void);
920 INLINE void ADC1_disCh18Int(void);
921 INLINE void ADC1_enCh19Int(void);
922 INLINE void ADC1_disCh19Int(void);
931 INLINE void ADC1_enSeq0CollInt(void);
932 INLINE void ADC1_disSeq0CollInt(void);
933 INLINE void ADC1_enSeq1CollInt(void);
934 INLINE void ADC1_disSeq1CollInt(void);
935 INLINE void ADC1_enSeq2CollInt(void);
936 INLINE void ADC1_disSeq2CollInt(void);
937 INLINE void ADC1_enSeq3CollInt(void);
938 INLINE void ADC1_disSeq3CollInt(void);
979 INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value);
983 INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value);
1001 INLINE void ADC1_enGateSwShadowTrans(void);
1003 INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value);
1005 INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value);
1007 INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value);
1009 INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value);
1011 INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value);
1013 INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value);
1015 INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value);
1017 INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value);
1019 INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value);
1021 INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value);
1023 INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value);
1025 INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value);
1027 INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value);
1029 INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value);
1031 INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value);
1033 INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value);
1035 INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value);
1037 INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value);
1039 INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value);
1041 INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value);
1043 INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value);
1045 INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value);
1047 INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value);
1049 INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value);
1051 INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value);
1053 INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value);
1055 INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value);
1057 INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value);
1059 INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value);
1061 INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value);
1063 INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value);
1065 INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value);
1067 INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value);
1069 INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value);
1071 INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value);
1073 INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value);
1075 INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value);
1077 INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value);
1079 INLINE void ARVG_enVAREF(void);
1080 INLINE void ARVG_disVAREF(void);
1087 
1088 
1089 /*******************************************************************************
1090 ** Deprecated Function Declarations **
1091 *******************************************************************************/
1092 
1096 void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1097 
1101 void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1102 
1106 void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1107 
1111 void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1112 
1116 void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1117 
1121 void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1122 
1126 void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1127 
1131 void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1132 
1136 void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1137 
1141 void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1142 
1146 void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1147 
1151 void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1152 
1156 void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1157 
1161 void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1162 
1166 void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1167 
1171 void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1172 
1176 void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1177 
1181 void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1182 
1186 void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1187 
1191 void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1192 
1196 void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1197 
1201 void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1202 
1206 void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1207 
1211 void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1212 
1216 void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1217 
1221 void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1222 
1226 void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1227 
1231 void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1232 
1236 void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1237 
1241 void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1242 
1246 void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1247 
1251 void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1252 
1256 void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1257 
1261 void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1262 
1266 void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1267 
1271 void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1272 
1276 void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1277 
1281 void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1282 
1286 void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1287 
1291 void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime, use the ConfigWizard to configure this feature!")));
1292 
1293 
1294 /*******************************************************************************
1295 ** Global Inline Function Definitions **
1296 *******************************************************************************/
1297 
1301 {
1302  ADC1->GLOBCONF.bit.EN = 1u;
1303 }
1304 
1308 {
1309  ADC1->GLOBCONF.bit.EN = 0u;
1310 }
1311 
1317 {
1318  ADC1->CLKCON.bit.CLKDIV = u8_value;
1319 }
1320 
1326 {
1327  return (uint8)ADC1->CLKCON.bit.CLKDIV;
1328 }
1329 
1333 {
1334  ADC1->SUSCTR.bit.SUSEN = 1u;
1335 }
1336 
1340 {
1341  ADC1->SUSCTR.bit.SUSEN = 0u;
1342 }
1343 
1349 {
1350  ADC1->SUSCTR.bit.SUSMOD = u8_value;
1351 }
1352 
1358 {
1359  return (uint8)ADC1->SUSCTR.bit.SUSMOD;
1360 }
1361 
1367 {
1368  return (uint8)ADC1->SUSSTAT.bit.STAT;
1369 }
1370 
1376 {
1377  return (uint8)ADC1->SUSSTAT.bit.READY;
1378 }
1379 
1385 {
1386  ADC1->SQCFG0.reg = (uint32)s_value.reg;
1387 }
1388 
1394 {
1395  ADC1->SQCFG0.bit.SQREP = u8_value;
1396 }
1397 
1403 {
1404  return (uint8)ADC1->SQCFG0.bit.SQREP;
1405 }
1406 
1410 {
1411  ADC1->SQCFG0.bit.COLLCFG = 1u;
1412 }
1413 
1417 {
1418  ADC1->SQCFG0.bit.COLLCFG = 0u;
1419 }
1420 
1424 {
1425  ADC1->SQCFG0.bit.WFRCFG = 1u;
1426 }
1427 
1431 {
1432  ADC1->SQCFG0.bit.WFRCFG = 0u;
1433 }
1434 
1440 {
1441  ADC1->SQCFG0.bit.TRGSEL = (uint8)e_Seq0Trig;
1442 }
1443 
1449 {
1450  return ADC1->SQCFG0.bit.TRGSEL;
1451 }
1452 
1458 {
1459  ADC1->SQCFG0.bit.GTSEL = u8_value;
1460 }
1461 
1467 {
1468  return (uint8)ADC1->SQCFG0.bit.GTSEL;
1469 }
1470 
1474 {
1475  ADC1->SQCFG0.bit.GTSW = 1u;
1476 }
1477 
1481 {
1482  ADC1->SQCFG0.bit.GTSW = 0u;
1483 }
1484 
1490 {
1491  ADC1->SQSLOT0.bit.CHSEL0 = u8_value;
1492 }
1493 
1499 {
1500  return (uint8)ADC1->SQSLOT0.bit.CHSEL0;
1501 }
1502 
1508 {
1509  ADC1->SQSLOT0.bit.CHSEL1 = u8_value;
1510 }
1511 
1517 {
1518  return (uint8)ADC1->SQSLOT0.bit.CHSEL1;
1519 }
1520 
1526 {
1527  ADC1->SQSLOT0.bit.CHSEL2 = u8_value;
1528 }
1529 
1535 {
1536  return (uint8)ADC1->SQSLOT0.bit.CHSEL2;
1537 }
1538 
1544 {
1545  ADC1->SQSLOT0.bit.CHSEL3 = u8_value;
1546 }
1547 
1553 {
1554  return (uint8)ADC1->SQSLOT0.bit.CHSEL3;
1555 }
1556 
1562 {
1563  ADC1->SQCFG1.reg = (uint32)s_value.reg;
1564 }
1565 
1571 {
1572  ADC1->SQCFG1.bit.SQREP = u8_value;
1573 }
1574 
1580 {
1581  return (uint8)ADC1->SQCFG1.bit.SQREP;
1582 }
1583 
1587 {
1588  ADC1->SQCFG1.bit.COLLCFG = 1u;
1589 }
1590 
1594 {
1595  ADC1->SQCFG1.bit.COLLCFG = 0u;
1596 }
1597 
1601 {
1602  ADC1->SQCFG1.bit.WFRCFG = 1u;
1603 }
1604 
1608 {
1609  ADC1->SQCFG1.bit.WFRCFG = 0u;
1610 }
1611 
1617 {
1618  ADC1->SQCFG1.bit.TRGSEL = (uint8)e_Seq1Trig;
1619 }
1620 
1626 {
1627  return ADC1->SQCFG1.bit.TRGSEL;
1628 }
1629 
1635 {
1636  ADC1->SQCFG1.bit.GTSEL = u8_value;
1637 }
1638 
1644 {
1645  return (uint8)ADC1->SQCFG1.bit.GTSEL;
1646 }
1647 
1651 {
1652  ADC1->SQCFG1.bit.GTSW = 1u;
1653 }
1654 
1658 {
1659  ADC1->SQCFG1.bit.GTSW = 0u;
1660 }
1661 
1667 {
1668  ADC1->SQSLOT1.bit.CHSEL0 = u8_value;
1669 }
1670 
1676 {
1677  return (uint8)ADC1->SQSLOT1.bit.CHSEL0;
1678 }
1679 
1685 {
1686  ADC1->SQSLOT1.bit.CHSEL1 = u8_value;
1687 }
1688 
1694 {
1695  return (uint8)ADC1->SQSLOT1.bit.CHSEL1;
1696 }
1697 
1703 {
1704  ADC1->SQSLOT1.bit.CHSEL2 = u8_value;
1705 }
1706 
1712 {
1713  return (uint8)ADC1->SQSLOT1.bit.CHSEL2;
1714 }
1715 
1721 {
1722  ADC1->SQSLOT1.bit.CHSEL3 = u8_value;
1723 }
1724 
1730 {
1731  return (uint8)ADC1->SQSLOT1.bit.CHSEL3;
1732 }
1733 
1739 {
1740  ADC1->SQCFG2.reg = (uint32)s_value.reg;
1741 }
1742 
1748 {
1749  ADC1->SQCFG2.bit.SQREP = u8_value;
1750 }
1751 
1757 {
1758  return (uint8)ADC1->SQCFG2.bit.SQREP;
1759 }
1760 
1764 {
1765  ADC1->SQCFG2.bit.COLLCFG = 1u;
1766 }
1767 
1771 {
1772  ADC1->SQCFG2.bit.COLLCFG = 0u;
1773 }
1774 
1778 {
1779  ADC1->SQCFG2.bit.WFRCFG = 1u;
1780 }
1781 
1785 {
1786  ADC1->SQCFG2.bit.WFRCFG = 0u;
1787 }
1788 
1794 {
1795  ADC1->SQCFG2.bit.TRGSEL = (uint8)e_Seq2Trig;
1796 }
1797 
1803 {
1804  return ADC1->SQCFG2.bit.TRGSEL;
1805 }
1806 
1812 {
1813  ADC1->SQCFG2.bit.GTSEL = u8_value;
1814 }
1815 
1821 {
1822  return (uint8)ADC1->SQCFG2.bit.GTSEL;
1823 }
1824 
1828 {
1829  ADC1->SQCFG2.bit.GTSW = 1u;
1830 }
1831 
1835 {
1836  ADC1->SQCFG2.bit.GTSW = 0u;
1837 }
1838 
1844 {
1845  ADC1->SQSLOT2.bit.CHSEL0 = u8_value;
1846 }
1847 
1853 {
1854  return (uint8)ADC1->SQSLOT2.bit.CHSEL0;
1855 }
1856 
1862 {
1863  ADC1->SQSLOT2.bit.CHSEL1 = u8_value;
1864 }
1865 
1871 {
1872  return (uint8)ADC1->SQSLOT2.bit.CHSEL1;
1873 }
1874 
1880 {
1881  ADC1->SQSLOT2.bit.CHSEL2 = u8_value;
1882 }
1883 
1889 {
1890  return (uint8)ADC1->SQSLOT2.bit.CHSEL2;
1891 }
1892 
1898 {
1899  ADC1->SQSLOT2.bit.CHSEL3 = u8_value;
1900 }
1901 
1907 {
1908  return (uint8)ADC1->SQSLOT2.bit.CHSEL3;
1909 }
1910 
1916 {
1917  ADC1->SQCFG3.reg = (uint32)s_value.reg;
1918 }
1919 
1925 {
1926  ADC1->SQCFG3.bit.SQREP = u8_value;
1927 }
1928 
1934 {
1935  return (uint8)ADC1->SQCFG3.bit.SQREP;
1936 }
1937 
1941 {
1942  ADC1->SQCFG3.bit.COLLCFG = 1u;
1943 }
1944 
1948 {
1949  ADC1->SQCFG3.bit.COLLCFG = 0u;
1950 }
1951 
1955 {
1956  ADC1->SQCFG3.bit.WFRCFG = 1u;
1957 }
1958 
1962 {
1963  ADC1->SQCFG3.bit.WFRCFG = 0u;
1964 }
1965 
1971 {
1972  ADC1->SQCFG3.bit.TRGSEL = (uint8)e_Seq3Trig;
1973 }
1974 
1980 {
1981  return ADC1->SQCFG3.bit.TRGSEL;
1982 }
1983 
1989 {
1990  ADC1->SQCFG3.bit.GTSEL = u8_value;
1991 }
1992 
1998 {
1999  return (uint8)ADC1->SQCFG3.bit.GTSEL;
2000 }
2001 
2005 {
2006  ADC1->SQCFG3.bit.GTSW = 1u;
2007 }
2008 
2012 {
2013  ADC1->SQCFG3.bit.GTSW = 0u;
2014 }
2015 
2021 {
2022  ADC1->SQSLOT3.bit.CHSEL0 = u8_value;
2023 }
2024 
2030 {
2031  return (uint8)ADC1->SQSLOT3.bit.CHSEL0;
2032 }
2033 
2039 {
2040  ADC1->SQSLOT3.bit.CHSEL1 = u8_value;
2041 }
2042 
2048 {
2049  return (uint8)ADC1->SQSLOT3.bit.CHSEL1;
2050 }
2051 
2057 {
2058  ADC1->SQSLOT3.bit.CHSEL2 = u8_value;
2059 }
2060 
2066 {
2067  return (uint8)ADC1->SQSLOT3.bit.CHSEL2;
2068 }
2069 
2075 {
2076  ADC1->SQSLOT3.bit.CHSEL3 = u8_value;
2077 }
2078 
2084 {
2085  return (uint8)ADC1->SQSLOT3.bit.CHSEL3;
2086 }
2087 
2093 {
2094  return (uint8)ADC1->SQSTAT.bit.WFR0;
2095 }
2096 
2102 {
2103  return (uint8)ADC1->SQSTAT.bit.WFR1;
2104 }
2105 
2111 {
2112  return (uint8)ADC1->SQSTAT.bit.WFR2;
2113 }
2114 
2120 {
2121  return (uint8)ADC1->SQSTAT.bit.WFR3;
2122 }
2123 
2129 {
2130  return (uint8)ADC1->SQSTAT.bit.COLL0;
2131 }
2132 
2138 {
2139  return (uint8)ADC1->SQSTAT.bit.COLL1;
2140 }
2141 
2147 {
2148  return (uint8)ADC1->SQSTAT.bit.COLL2;
2149 }
2150 
2156 {
2157  return (uint8)ADC1->SQSTAT.bit.COLL3;
2158 }
2159 
2165 {
2166  return (uint8)ADC1->SQSTAT.bit.SQ0;
2167 }
2168 
2174 {
2175  return (uint8)ADC1->SQSTAT.bit.SQ1;
2176 }
2177 
2183 {
2184  return (uint8)ADC1->SQSTAT.bit.SQ2;
2185 }
2186 
2192 {
2193  return (uint8)ADC1->SQSTAT.bit.SQ3;
2194 }
2195 
2201 {
2202  return (uint8)ADC1->SQSTAT.bit.SQNUM;
2203 }
2204 
2208 {
2209  ADC1->SQSTATCLR.bit.WFR0CLR = 1u;
2210 }
2211 
2215 {
2216  ADC1->SQSTATCLR.bit.WFR1CLR = 1u;
2217 }
2218 
2222 {
2223  ADC1->SQSTATCLR.bit.WFR2CLR = 1u;
2224 }
2225 
2229 {
2230  ADC1->SQSTATCLR.bit.WFR3CLR = 1u;
2231 }
2232 
2236 {
2237  ADC1->SQSTATCLR.bit.COLL0CLR = 1u;
2238 }
2239 
2243 {
2244  ADC1->SQSTATCLR.bit.COLL1CLR = 1u;
2245 }
2246 
2250 {
2251  ADC1->SQSTATCLR.bit.COLL2CLR = 1u;
2252 }
2253 
2257 {
2258  ADC1->SQSTATCLR.bit.COLL3CLR = 1u;
2259 }
2260 
2264 {
2265  ADC1->SQSTATCLR.bit.SQ0CLR = 1u;
2266 }
2267 
2271 {
2272  ADC1->SQSTATCLR.bit.SQ1CLR = 1u;
2273 }
2274 
2278 {
2279  ADC1->SQSTATCLR.bit.SQ2CLR = 1u;
2280 }
2281 
2285 {
2286  ADC1->SQSTATCLR.bit.SQ3CLR = 1u;
2287 }
2288 
2292 {
2293  ADC1->SQSTATSET.bit.WFR0SET = 1u;
2294 }
2295 
2299 {
2300  ADC1->SQSTATSET.bit.WFR1SET = 1u;
2301 }
2302 
2306 {
2307  ADC1->SQSTATSET.bit.WFR2SET = 1u;
2308 }
2309 
2313 {
2314  ADC1->SQSTATSET.bit.WFR3SET = 1u;
2315 }
2316 
2320 {
2321  ADC1->SQSTATSET.bit.COLL0SET = 1u;
2322 }
2323 
2327 {
2328  ADC1->SQSTATSET.bit.COLL1SET = 1u;
2329 }
2330 
2334 {
2335  ADC1->SQSTATSET.bit.COLL2SET = 1u;
2336 }
2337 
2341 {
2342  ADC1->SQSTATSET.bit.COLL3SET = 1u;
2343 }
2344 
2348 {
2349  ADC1->SQSTATSET.bit.SQ0SET = 1u;
2350 }
2351 
2355 {
2356  ADC1->SQSTATSET.bit.SQ1SET = 1u;
2357 }
2358 
2362 {
2363  ADC1->SQSTATSET.bit.SQ2SET = 1u;
2364 }
2365 
2369 {
2370  ADC1->SQSTATSET.bit.SQ3SET = 1u;
2371 }
2372 
2378 {
2379  ADC1->CHCFG0.reg = (uint32)s_value.reg;
2380 }
2381 
2387 {
2388  ADC1->CHCFG1.reg = (uint32)s_value.reg;
2389 }
2390 
2396 {
2397  ADC1->CHCFG2.reg = (uint32)s_value.reg;
2398 }
2399 
2405 {
2406  ADC1->CHCFG3.reg = (uint32)s_value.reg;
2407 }
2408 
2414 {
2415  ADC1->CHCFG4.reg = (uint32)s_value.reg;
2416 }
2417 
2423 {
2424  ADC1->CHCFG5.reg = (uint32)s_value.reg;
2425 }
2426 
2432 {
2433  ADC1->CHCFG6.reg = (uint32)s_value.reg;
2434 }
2435 
2441 {
2442  ADC1->CHCFG7.reg = (uint32)s_value.reg;
2443 }
2444 
2450 {
2451  ADC1->CHCFG8.reg = (uint32)s_value.reg;
2452 }
2453 
2459 {
2460  ADC1->CHCFG9.reg = (uint32)s_value.reg;
2461 }
2462 
2468 {
2469  ADC1->CHCFG10.reg = (uint32)s_value.reg;
2470 }
2471 
2477 {
2478  ADC1->CHCFG11.reg = (uint32)s_value.reg;
2479 }
2480 
2486 {
2487  ADC1->CHCFG12.reg = (uint32)s_value.reg;
2488 }
2489 
2495 {
2496  ADC1->CHCFG13.reg = (uint32)s_value.reg;
2497 }
2498 
2504 {
2505  ADC1->CHCFG14.reg = (uint32)s_value.reg;
2506 }
2507 
2513 {
2514  ADC1->CHCFG15.reg = (uint32)s_value.reg;
2515 }
2516 
2522 {
2523  ADC1->CHCFG16.reg = (uint32)s_value.reg;
2524 }
2525 
2531 {
2532  ADC1->CHCFG17.reg = (uint32)s_value.reg;
2533 }
2534 
2540 {
2541  ADC1->CHCFG18.reg = (uint32)s_value.reg;
2542 }
2543 
2549 {
2550  ADC1->CHCFG19.reg = (uint32)s_value.reg;
2551 }
2552 
2558 {
2559  return (uint8)ADC1->CHSTAT.bit.CH0;
2560 }
2561 
2567 {
2568  return (uint8)ADC1->CHSTAT.bit.CH1;
2569 }
2570 
2576 {
2577  return (uint8)ADC1->CHSTAT.bit.CH2;
2578 }
2579 
2585 {
2586  return (uint8)ADC1->CHSTAT.bit.CH3;
2587 }
2588 
2594 {
2595  return (uint8)ADC1->CHSTAT.bit.CH4;
2596 }
2597 
2603 {
2604  return (uint8)ADC1->CHSTAT.bit.CH5;
2605 }
2606 
2612 {
2613  return (uint8)ADC1->CHSTAT.bit.CH6;
2614 }
2615 
2621 {
2622  return (uint8)ADC1->CHSTAT.bit.CH7;
2623 }
2624 
2630 {
2631  return (uint8)ADC1->CHSTAT.bit.CH8;
2632 }
2633 
2639 {
2640  return (uint8)ADC1->CHSTAT.bit.CH9;
2641 }
2642 
2648 {
2649  return (uint8)ADC1->CHSTAT.bit.CH10;
2650 }
2651 
2657 {
2658  return (uint8)ADC1->CHSTAT.bit.CH11;
2659 }
2660 
2666 {
2667  return (uint8)ADC1->CHSTAT.bit.CH12;
2668 }
2669 
2675 {
2676  return (uint8)ADC1->CHSTAT.bit.CH13;
2677 }
2678 
2684 {
2685  return (uint8)ADC1->CHSTAT.bit.CH14;
2686 }
2687 
2693 {
2694  return (uint8)ADC1->CHSTAT.bit.CH15;
2695 }
2696 
2702 {
2703  return (uint8)ADC1->CHSTAT.bit.CH16;
2704 }
2705 
2711 {
2712  return (uint8)ADC1->CHSTAT.bit.CH17;
2713 }
2714 
2720 {
2721  return (uint8)ADC1->CHSTAT.bit.CH18;
2722 }
2723 
2729 {
2730  return (uint8)ADC1->CHSTAT.bit.CH19;
2731 }
2732 
2738 {
2739  return (uint8)ADC1->CHSTAT.bit.CHNUM;
2740 }
2741 
2745 {
2746  ADC1->CHSTATCLR.bit.CH0CLR = 1u;
2747 }
2748 
2752 {
2753  ADC1->CHSTATCLR.bit.CH1CLR = 1u;
2754 }
2755 
2759 {
2760  ADC1->CHSTATCLR.bit.CH2CLR = 1u;
2761 }
2762 
2766 {
2767  ADC1->CHSTATCLR.bit.CH3CLR = 1u;
2768 }
2769 
2773 {
2774  ADC1->CHSTATCLR.bit.CH4CLR = 1u;
2775 }
2776 
2780 {
2781  ADC1->CHSTATCLR.bit.CH5CLR = 1u;
2782 }
2783 
2787 {
2788  ADC1->CHSTATCLR.bit.CH6CLR = 1u;
2789 }
2790 
2794 {
2795  ADC1->CHSTATCLR.bit.CH7CLR = 1u;
2796 }
2797 
2801 {
2802  ADC1->CHSTATCLR.bit.CH8CLR = 1u;
2803 }
2804 
2808 {
2809  ADC1->CHSTATCLR.bit.CH9CLR = 1u;
2810 }
2811 
2815 {
2816  ADC1->CHSTATCLR.bit.CH10CLR = 1u;
2817 }
2818 
2822 {
2823  ADC1->CHSTATCLR.bit.CH11CLR = 1u;
2824 }
2825 
2829 {
2830  ADC1->CHSTATCLR.bit.CH12CLR = 1u;
2831 }
2832 
2836 {
2837  ADC1->CHSTATCLR.bit.CH13CLR = 1u;
2838 }
2839 
2843 {
2844  ADC1->CHSTATCLR.bit.CH14CLR = 1u;
2845 }
2846 
2850 {
2851  ADC1->CHSTATCLR.bit.CH15CLR = 1u;
2852 }
2853 
2857 {
2858  ADC1->CHSTATCLR.bit.CH16CLR = 1u;
2859 }
2860 
2864 {
2865  ADC1->CHSTATCLR.bit.CH17CLR = 1u;
2866 }
2867 
2871 {
2872  ADC1->CHSTATCLR.bit.CH18CLR = 1u;
2873 }
2874 
2878 {
2879  ADC1->CHSTATCLR.bit.CH19CLR = 1u;
2880 }
2881 
2885 {
2886  ADC1->CHSTATSET.bit.CH0SET = 1u;
2887 }
2888 
2892 {
2893  ADC1->CHSTATSET.bit.CH1SET = 1u;
2894 }
2895 
2899 {
2900  ADC1->CHSTATSET.bit.CH2SET = 1u;
2901 }
2902 
2906 {
2907  ADC1->CHSTATSET.bit.CH3SET = 1u;
2908 }
2909 
2913 {
2914  ADC1->CHSTATSET.bit.CH4SET = 1u;
2915 }
2916 
2920 {
2921  ADC1->CHSTATSET.bit.CH5SET = 1u;
2922 }
2923 
2927 {
2928  ADC1->CHSTATSET.bit.CH6SET = 1u;
2929 }
2930 
2934 {
2935  ADC1->CHSTATSET.bit.CH7SET = 1u;
2936 }
2937 
2941 {
2942  ADC1->CHSTATSET.bit.CH8SET = 1u;
2943 }
2944 
2948 {
2949  ADC1->CHSTATSET.bit.CH9SET = 1u;
2950 }
2951 
2955 {
2956  ADC1->CHSTATSET.bit.CH10SET = 1u;
2957 }
2958 
2962 {
2963  ADC1->CHSTATSET.bit.CH11SET = 1u;
2964 }
2965 
2969 {
2970  ADC1->CHSTATSET.bit.CH12SET = 1u;
2971 }
2972 
2976 {
2977  ADC1->CHSTATSET.bit.CH13SET = 1u;
2978 }
2979 
2983 {
2984  ADC1->CHSTATSET.bit.CH14SET = 1u;
2985 }
2986 
2990 {
2991  ADC1->CHSTATSET.bit.CH15SET = 1u;
2992 }
2993 
2997 {
2998  ADC1->CHSTATSET.bit.CH16SET = 1u;
2999 }
3000 
3004 {
3005  ADC1->CHSTATSET.bit.CH17SET = 1u;
3006 }
3007 
3011 {
3012  ADC1->CHSTATSET.bit.CH18SET = 1u;
3013 }
3014 
3018 {
3019  ADC1->CHSTATSET.bit.CH19SET = 1u;
3020 }
3021 
3027 {
3028  ADC1->CONVCFG0.reg = (uint32)s_value.reg;
3029 }
3030 
3036 {
3037  ADC1->CONVCFG1.reg = (uint32)s_value.reg;
3038 }
3039 
3045 {
3046  ADC1->CONVCFG2.reg = (uint32)s_value.reg;
3047 }
3048 
3054 {
3055  ADC1->CONVCFG3.reg = (uint32)s_value.reg;
3056 }
3057 
3061 {
3062  ADC1->CALEN.bit.CALEN0 = 1u;
3063 }
3064 
3068 {
3069  ADC1->CALEN.bit.CALEN0 = 0u;
3070 }
3071 
3075 {
3076  ADC1->CALEN.bit.CALEN1 = 1u;
3077 }
3078 
3082 {
3083  ADC1->CALEN.bit.CALEN1 = 0u;
3084 }
3085 
3089 {
3090  ADC1->CALEN.bit.CALEN2 = 1u;
3091 }
3092 
3096 {
3097  ADC1->CALEN.bit.CALEN2 = 0u;
3098 }
3099 
3103 {
3104  ADC1->CALEN.bit.CALEN3 = 1u;
3105 }
3106 
3110 {
3111  ADC1->CALEN.bit.CALEN3 = 0u;
3112 }
3113 
3117 {
3118  ADC1->CALEN.bit.CALEN4 = 1u;
3119 }
3120 
3124 {
3125  ADC1->CALEN.bit.CALEN4 = 0u;
3126 }
3127 
3131 {
3132  ADC1->CALEN.bit.CALEN5 = 1u;
3133 }
3134 
3138 {
3139  ADC1->CALEN.bit.CALEN5 = 0u;
3140 }
3141 
3145 {
3146  ADC1->CALEN.bit.CALEN6 = 1u;
3147 }
3148 
3152 {
3153  ADC1->CALEN.bit.CALEN6 = 0u;
3154 }
3155 
3159 {
3160  ADC1->CALEN.bit.CALEN7 = 1u;
3161 }
3162 
3166 {
3167  ADC1->CALEN.bit.CALEN7 = 0u;
3168 }
3169 
3173 {
3174  ADC1->CALEN.bit.CALEN8 = 1u;
3175 }
3176 
3180 {
3181  ADC1->CALEN.bit.CALEN8 = 0u;
3182 }
3183 
3187 {
3188  ADC1->CALEN.bit.CALEN9 = 1u;
3189 }
3190 
3194 {
3195  ADC1->CALEN.bit.CALEN9 = 0u;
3196 }
3197 
3201 {
3202  ADC1->CALEN.bit.CALEN10 = 1u;
3203 }
3204 
3208 {
3209  ADC1->CALEN.bit.CALEN10 = 0u;
3210 }
3211 
3215 {
3216  ADC1->CALEN.bit.CALEN11 = 1u;
3217 }
3218 
3222 {
3223  ADC1->CALEN.bit.CALEN11 = 0u;
3224 }
3225 
3229 {
3230  ADC1->CALEN.bit.CALEN12 = 1u;
3231 }
3232 
3236 {
3237  ADC1->CALEN.bit.CALEN12 = 0u;
3238 }
3239 
3243 {
3244  ADC1->CALEN.bit.CALEN13 = 1u;
3245 }
3246 
3250 {
3251  ADC1->CALEN.bit.CALEN13 = 0u;
3252 }
3253 
3257 {
3258  ADC1->CALEN.bit.CALEN14 = 1u;
3259 }
3260 
3264 {
3265  ADC1->CALEN.bit.CALEN14 = 0u;
3266 }
3267 
3271 {
3272  ADC1->CALEN.bit.CALEN15 = 1u;
3273 }
3274 
3278 {
3279  ADC1->CALEN.bit.CALEN15 = 0u;
3280 }
3281 
3285 {
3286  ADC1->CALEN.bit.CALEN16 = 1u;
3287 }
3288 
3292 {
3293  ADC1->CALEN.bit.CALEN16 = 0u;
3294 }
3295 
3299 {
3300  ADC1->CALEN.bit.CALEN17 = 1u;
3301 }
3302 
3306 {
3307  ADC1->CALEN.bit.CALEN17 = 0u;
3308 }
3309 
3313 {
3314  ADC1->CALEN.bit.CALEN18 = 1u;
3315 }
3316 
3320 {
3321  ADC1->CALEN.bit.CALEN18 = 0u;
3322 }
3323 
3327 {
3328  ADC1->CALEN.bit.CALEN19 = 1u;
3329 }
3330 
3334 {
3335  ADC1->CALEN.bit.CALEN19 = 0u;
3336 }
3337 
3341 {
3342  ADC1->CALEN.bit.CALEN20 = 1u;
3343 }
3344 
3348 {
3349  ADC1->CALEN.bit.CALEN20 = 0u;
3350 }
3351 
3355 {
3356  ADC1->CALEN.bit.CALEN21 = 1u;
3357 }
3358 
3362 {
3363  ADC1->CALEN.bit.CALEN21 = 0u;
3364 }
3365 
3369 {
3370  ADC1->CALEN.bit.CALEN22 = 1u;
3371 }
3372 
3376 {
3377  ADC1->CALEN.bit.CALEN22 = 0u;
3378 }
3379 
3383 {
3384  ADC1->CALEN.bit.CALEN23 = 1u;
3385 }
3386 
3390 {
3391  ADC1->CALEN.bit.CALEN23 = 0u;
3392 }
3393 
3397 {
3398  ADC1->CALEN.bit.CALEN24 = 1u;
3399 }
3400 
3404 {
3405  ADC1->CALEN.bit.CALEN24 = 0u;
3406 }
3407 
3411 {
3412  ADC1->CALEN.bit.CALEN25 = 1u;
3413 }
3414 
3418 {
3419  ADC1->CALEN.bit.CALEN25 = 0u;
3420 }
3421 
3425 {
3426  ADC1->CALEN.bit.CALEN26 = 1u;
3427 }
3428 
3432 {
3433  ADC1->CALEN.bit.CALEN26 = 0u;
3434 }
3435 
3439 {
3440  ADC1->CALPEN.bit.CALPEN0 = 1u;
3441 }
3442 
3446 {
3447  ADC1->CALPEN.bit.CALPEN0 = 0u;
3448 }
3449 
3453 {
3454  ADC1->CALPEN.bit.CALPEN1 = 1u;
3455 }
3456 
3460 {
3461  ADC1->CALPEN.bit.CALPEN1 = 0u;
3462 }
3463 
3467 {
3468  ADC1->CALPEN.bit.CALPEN2 = 1u;
3469 }
3470 
3474 {
3475  ADC1->CALPEN.bit.CALPEN2 = 0u;
3476 }
3477 
3481 {
3482  ADC1->CALPEN.bit.CALPEN3 = 1u;
3483 }
3484 
3488 {
3489  ADC1->CALPEN.bit.CALPEN3 = 0u;
3490 }
3491 
3495 {
3496  ADC1->CALPEN.bit.CALPEN4 = 1u;
3497 }
3498 
3502 {
3503  ADC1->CALPEN.bit.CALPEN4 = 0u;
3504 }
3505 
3509 {
3510  ADC1->CALPEN.bit.CALPEN5 = 1u;
3511 }
3512 
3516 {
3517  ADC1->CALPEN.bit.CALPEN5 = 0u;
3518 }
3519 
3523 {
3524  ADC1->CALPEN.bit.CALPEN6 = 1u;
3525 }
3526 
3530 {
3531  ADC1->CALPEN.bit.CALPEN6 = 0u;
3532 }
3533 
3537 {
3538  ADC1->CALPEN.bit.CALPEN7 = 1u;
3539 }
3540 
3544 {
3545  ADC1->CALPEN.bit.CALPEN7 = 0u;
3546 }
3547 
3551 {
3552  ADC1->CALPEN.bit.CALPEN8 = 1u;
3553 }
3554 
3558 {
3559  ADC1->CALPEN.bit.CALPEN8 = 0u;
3560 }
3561 
3565 {
3566  ADC1->CALPEN.bit.CALPEN9 = 1u;
3567 }
3568 
3572 {
3573  ADC1->CALPEN.bit.CALPEN9 = 0u;
3574 }
3575 
3579 {
3580  ADC1->CALPEN.bit.CALPEN10 = 1u;
3581 }
3582 
3586 {
3587  ADC1->CALPEN.bit.CALPEN10 = 0u;
3588 }
3589 
3593 {
3594  ADC1->CALPEN.bit.CALPEN11 = 1u;
3595 }
3596 
3600 {
3601  ADC1->CALPEN.bit.CALPEN11 = 0u;
3602 }
3603 
3607 {
3608  ADC1->CALPEN.bit.CALPEN12 = 1u;
3609 }
3610 
3614 {
3615  ADC1->CALPEN.bit.CALPEN12 = 0u;
3616 }
3617 
3621 {
3622  ADC1->CALPEN.bit.CALPEN13 = 1u;
3623 }
3624 
3628 {
3629  ADC1->CALPEN.bit.CALPEN13 = 0u;
3630 }
3631 
3635 {
3636  ADC1->CALPEN.bit.CALPEN14 = 1u;
3637 }
3638 
3642 {
3643  ADC1->CALPEN.bit.CALPEN14 = 0u;
3644 }
3645 
3649 {
3650  ADC1->CALPEN.bit.CALPEN15 = 1u;
3651 }
3652 
3656 {
3657  ADC1->CALPEN.bit.CALPEN15 = 0u;
3658 }
3659 
3663 {
3664  ADC1->CALPEN.bit.CALPEN16 = 1u;
3665 }
3666 
3670 {
3671  ADC1->CALPEN.bit.CALPEN16 = 0u;
3672 }
3673 
3677 {
3678  ADC1->CALPEN.bit.CALPEN17 = 1u;
3679 }
3680 
3684 {
3685  ADC1->CALPEN.bit.CALPEN17 = 0u;
3686 }
3687 
3691 {
3692  ADC1->CALPEN.bit.CALPEN18 = 1u;
3693 }
3694 
3698 {
3699  ADC1->CALPEN.bit.CALPEN18 = 0u;
3700 }
3701 
3705 {
3706  ADC1->CALPEN.bit.CALPEN19 = 1u;
3707 }
3708 
3712 {
3713  ADC1->CALPEN.bit.CALPEN19 = 0u;
3714 }
3715 
3719 {
3720  ADC1->CALPEN.bit.CALPEN20 = 1u;
3721 }
3722 
3726 {
3727  ADC1->CALPEN.bit.CALPEN20 = 0u;
3728 }
3729 
3733 {
3734  ADC1->CALPEN.bit.CALPEN21 = 1u;
3735 }
3736 
3740 {
3741  ADC1->CALPEN.bit.CALPEN21 = 0u;
3742 }
3743 
3747 {
3748  ADC1->CALPEN.bit.CALPEN22 = 1u;
3749 }
3750 
3754 {
3755  ADC1->CALPEN.bit.CALPEN22 = 0u;
3756 }
3757 
3761 {
3762  ADC1->CALPEN.bit.CALPEN23 = 1u;
3763 }
3764 
3768 {
3769  ADC1->CALPEN.bit.CALPEN23 = 0u;
3770 }
3771 
3775 {
3776  ADC1->CALPEN.bit.CALPEN24 = 1u;
3777 }
3778 
3782 {
3783  ADC1->CALPEN.bit.CALPEN24 = 0u;
3784 }
3785 
3789 {
3790  ADC1->CALPEN.bit.CALPEN25 = 1u;
3791 }
3792 
3796 {
3797  ADC1->CALPEN.bit.CALPEN25 = 0u;
3798 }
3799 
3803 {
3804  ADC1->CALPEN.bit.CALPEN26 = 1u;
3805 }
3806 
3810 {
3811  ADC1->CALPEN.bit.CALPEN26 = 0u;
3812 }
3813 
3819 {
3820  ADC1->FILTCFG.bit.COEF_A0 = u8_value;
3821 }
3822 
3828 {
3829  return (uint8)ADC1->FILTCFG.bit.COEF_A0;
3830 }
3831 
3837 {
3838  ADC1->FILTCFG.bit.COEF_A1 = u8_value;
3839 }
3840 
3846 {
3847  return (uint8)ADC1->FILTCFG.bit.COEF_A1;
3848 }
3849 
3855 {
3856  ADC1->FILTCFG.bit.COEF_A2 = u8_value;
3857 }
3858 
3864 {
3865  return (uint8)ADC1->FILTCFG.bit.COEF_A2;
3866 }
3867 
3873 {
3874  ADC1->FILTCFG.bit.COEF_A3 = u8_value;
3875 }
3876 
3882 {
3883  return (uint8)ADC1->FILTCFG.bit.COEF_A3;
3884 }
3885 
3891 {
3892  return (uint16)ADC1->FIL0.bit.FILRESULT;
3893 }
3894 
3900 {
3901  return (uint16)ADC1->FIL1.bit.FILRESULT;
3902 }
3903 
3909 {
3910  return (uint16)ADC1->FIL2.bit.FILRESULT;
3911 }
3912 
3918 {
3919  return (uint16)ADC1->FIL3.bit.FILRESULT;
3920 }
3921 
3927 {
3928  return (uint8)ADC1->FILSTAT.bit.FIL0;
3929 }
3930 
3936 {
3937  return (uint8)ADC1->FILSTAT.bit.FIL1;
3938 }
3939 
3945 {
3946  return (uint8)ADC1->FILSTAT.bit.FIL2;
3947 }
3948 
3954 {
3955  return (uint8)ADC1->FILSTAT.bit.FIL3;
3956 }
3957 
3961 {
3962  ADC1->FILSTATCLR.bit.FIL0CLR = 1u;
3963 }
3964 
3968 {
3969  ADC1->FILSTATCLR.bit.FIL1CLR = 1u;
3970 }
3971 
3975 {
3976  ADC1->FILSTATCLR.bit.FIL2CLR = 1u;
3977 }
3978 
3982 {
3983  ADC1->FILSTATCLR.bit.FIL3CLR = 1u;
3984 }
3985 
3989 {
3990  ADC1->FILSTATSET.bit.FIL0SET = 1u;
3991 }
3992 
3996 {
3997  ADC1->FILSTATSET.bit.FIL1SET = 1u;
3998 }
3999 
4003 {
4004  ADC1->FILSTATSET.bit.FIL2SET = 1u;
4005 }
4006 
4010 {
4011  ADC1->FILSTATSET.bit.FIL3SET = 1u;
4012 }
4013 
4019 {
4020  return (uint16)ADC1->RES0.bit.RESULT;
4021 }
4022 
4028 {
4029  return (uint8)ADC1->RES0.bit.VALID;
4030 }
4031 
4037 {
4038  return (uint16)ADC1->RES1.bit.RESULT;
4039 }
4040 
4046 {
4047  return (uint8)ADC1->RES1.bit.VALID;
4048 }
4049 
4055 {
4056  return (uint16)ADC1->RES2.bit.RESULT;
4057 }
4058 
4064 {
4065  return (uint8)ADC1->RES2.bit.VALID;
4066 }
4067 
4073 {
4074  return (uint16)ADC1->RES3.bit.RESULT;
4075 }
4076 
4082 {
4083  return (uint8)ADC1->RES3.bit.VALID;
4084 }
4085 
4091 {
4092  return (uint16)ADC1->RES4.bit.RESULT;
4093 }
4094 
4100 {
4101  return (uint8)ADC1->RES4.bit.VALID;
4102 }
4103 
4109 {
4110  return (uint16)ADC1->RES5.bit.RESULT;
4111 }
4112 
4118 {
4119  return (uint8)ADC1->RES5.bit.VALID;
4120 }
4121 
4127 {
4128  return (uint16)ADC1->RES6.bit.RESULT;
4129 }
4130 
4136 {
4137  return (uint8)ADC1->RES6.bit.VALID;
4138 }
4139 
4145 {
4146  return (uint16)ADC1->RES7.bit.RESULT;
4147 }
4148 
4154 {
4155  return (uint8)ADC1->RES7.bit.VALID;
4156 }
4157 
4163 {
4164  return (uint16)ADC1->RES8.bit.RESULT;
4165 }
4166 
4172 {
4173  return (uint8)ADC1->RES8.bit.VALID;
4174 }
4175 
4181 {
4182  return (uint16)ADC1->RES9.bit.RESULT;
4183 }
4184 
4190 {
4191  return (uint8)ADC1->RES9.bit.VALID;
4192 }
4193 
4199 {
4200  return (uint16)ADC1->RES10.bit.RESULT;
4201 }
4202 
4208 {
4209  return (uint8)ADC1->RES10.bit.VALID;
4210 }
4211 
4217 {
4218  return (uint16)ADC1->RES11.bit.RESULT;
4219 }
4220 
4226 {
4227  return (uint8)ADC1->RES11.bit.VALID;
4228 }
4229 
4235 {
4236  return (uint16)ADC1->RES12.bit.RESULT;
4237 }
4238 
4244 {
4245  return (uint8)ADC1->RES12.bit.VALID;
4246 }
4247 
4253 {
4254  return (uint16)ADC1->RES13.bit.RESULT;
4255 }
4256 
4262 {
4263  return (uint8)ADC1->RES13.bit.VALID;
4264 }
4265 
4271 {
4272  return (uint16)ADC1->RES14.bit.RESULT;
4273 }
4274 
4280 {
4281  return (uint8)ADC1->RES14.bit.VALID;
4282 }
4283 
4289 {
4290  return (uint16)ADC1->RES15.bit.RESULT;
4291 }
4292 
4298 {
4299  return (uint8)ADC1->RES15.bit.VALID;
4300 }
4301 
4307 {
4308  return (uint16)ADC1->RES16.bit.RESULT;
4309 }
4310 
4316 {
4317  return (uint8)ADC1->RES16.bit.VALID;
4318 }
4319 
4325 {
4326  return (uint16)ADC1->RES17.bit.RESULT;
4327 }
4328 
4334 {
4335  return (uint8)ADC1->RES17.bit.VALID;
4336 }
4337 
4343 {
4344  return (uint16)ADC1->RES18.bit.RESULT;
4345 }
4346 
4352 {
4353  return (uint8)ADC1->RES18.bit.VALID;
4354 }
4355 
4361 {
4362  return (uint16)ADC1->RES19.bit.RESULT;
4363 }
4364 
4370 {
4371  return (uint8)ADC1->RES19.bit.VALID;
4372 }
4373 
4379 {
4380  ADC1->CMPCFG0.reg = (uint32)s_value.reg;
4381 }
4382 
4388 {
4389  ADC1->CMPCFG1.reg = (uint32)s_value.reg;
4390 }
4391 
4397 {
4398  ADC1->CMPCFG2.reg = (uint32)s_value.reg;
4399 }
4400 
4406 {
4407  ADC1->CMPCFG3.reg = (uint32)s_value.reg;
4408 }
4409 
4415 {
4416  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_IS;
4417 }
4418 
4424 {
4425  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_IS;
4426 }
4427 
4433 {
4434  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_IS;
4435 }
4436 
4442 {
4443  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_IS;
4444 }
4445 
4451 {
4452  return (uint8)ADC1->CMPSTAT.bit.CMP_UP0_STS;
4453 }
4454 
4460 {
4461  return (uint8)ADC1->CMPSTAT.bit.CMP_UP1_STS;
4462 }
4463 
4469 {
4470  return (uint8)ADC1->CMPSTAT.bit.CMP_UP2_STS;
4471 }
4472 
4478 {
4479  return (uint8)ADC1->CMPSTAT.bit.CMP_UP3_STS;
4480 }
4481 
4487 {
4488  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_IS;
4489 }
4490 
4496 {
4497  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_IS;
4498 }
4499 
4505 {
4506  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_IS;
4507 }
4508 
4514 {
4515  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_IS;
4516 }
4517 
4523 {
4524  return (uint8)ADC1->CMPSTAT.bit.CMP_LO0_STS;
4525 }
4526 
4532 {
4533  return (uint8)ADC1->CMPSTAT.bit.CMP_LO1_STS;
4534 }
4535 
4541 {
4542  return (uint8)ADC1->CMPSTAT.bit.CMP_LO2_STS;
4543 }
4544 
4550 {
4551  return (uint8)ADC1->CMPSTAT.bit.CMP_LO3_STS;
4552 }
4553 
4557 {
4558  ADC1->CMPSTATCLR.bit.CMP_UP0_ISCLR = 1u;
4559 }
4560 
4564 {
4565  ADC1->CMPSTATCLR.bit.CMP_UP1_ISCLR = 1u;
4566 }
4567 
4571 {
4572  ADC1->CMPSTATCLR.bit.CMP_UP2_ISCLR = 1u;
4573 }
4574 
4578 {
4579  ADC1->CMPSTATCLR.bit.CMP_UP3_ISCLR = 1u;
4580 }
4581 
4585 {
4586  ADC1->CMPSTATCLR.bit.CMP_UP0_STSCLR = 1u;
4587 }
4588 
4592 {
4593  ADC1->CMPSTATCLR.bit.CMP_UP1_STSCLR = 1u;
4594 }
4595 
4599 {
4600  ADC1->CMPSTATCLR.bit.CMP_UP2_STSCLR = 1u;
4601 }
4602 
4606 {
4607  ADC1->CMPSTATCLR.bit.CMP_UP3_STSCLR = 1u;
4608 }
4609 
4613 {
4614  ADC1->CMPSTATCLR.bit.CMP_LO0_ISCLR = 1u;
4615 }
4616 
4620 {
4621  ADC1->CMPSTATCLR.bit.CMP_LO1_ISCLR = 1u;
4622 }
4623 
4627 {
4628  ADC1->CMPSTATCLR.bit.CMP_LO2_ISCLR = 1u;
4629 }
4630 
4634 {
4635  ADC1->CMPSTATCLR.bit.CMP_LO3_ISCLR = 1u;
4636 }
4637 
4641 {
4642  ADC1->CMPSTATCLR.bit.CMP_LO0_STSCLR = 1u;
4643 }
4644 
4648 {
4649  ADC1->CMPSTATCLR.bit.CMP_LO1_STSCLR = 1u;
4650 }
4651 
4655 {
4656  ADC1->CMPSTATCLR.bit.CMP_LO2_STSCLR = 1u;
4657 }
4658 
4662 {
4663  ADC1->CMPSTATCLR.bit.CMP_LO3_STSCLR = 1u;
4664 }
4665 
4669 {
4670  ADC1->CMPSTATSET.bit.CMP_UP0_ISSET = 1u;
4671 }
4672 
4676 {
4677  ADC1->CMPSTATSET.bit.CMP_UP1_ISSET = 1u;
4678 }
4679 
4683 {
4684  ADC1->CMPSTATSET.bit.CMP_UP2_ISSET = 1u;
4685 }
4686 
4690 {
4691  ADC1->CMPSTATSET.bit.CMP_UP3_ISSET = 1u;
4692 }
4693 
4697 {
4698  ADC1->CMPSTATSET.bit.CMP_UP0_STSSET = 1u;
4699 }
4700 
4704 {
4705  ADC1->CMPSTATSET.bit.CMP_UP1_STSSET = 1u;
4706 }
4707 
4711 {
4712  ADC1->CMPSTATSET.bit.CMP_UP2_STSSET = 1u;
4713 }
4714 
4718 {
4719  ADC1->CMPSTATSET.bit.CMP_UP3_STSSET = 1u;
4720 }
4721 
4725 {
4726  ADC1->CMPSTATSET.bit.CMP_LO0_ISSET = 1u;
4727 }
4728 
4732 {
4733  ADC1->CMPSTATSET.bit.CMP_LO1_ISSET = 1u;
4734 }
4735 
4739 {
4740  ADC1->CMPSTATSET.bit.CMP_LO2_ISSET = 1u;
4741 }
4742 
4746 {
4747  ADC1->CMPSTATSET.bit.CMP_LO3_ISSET = 1u;
4748 }
4749 
4753 {
4754  ADC1->CMPSTATSET.bit.CMP_LO0_STSSET = 1u;
4755 }
4756 
4760 {
4761  ADC1->CMPSTATSET.bit.CMP_LO1_STSSET = 1u;
4762 }
4763 
4767 {
4768  ADC1->CMPSTATSET.bit.CMP_LO2_STSSET = 1u;
4769 }
4770 
4774 {
4775  ADC1->CMPSTATSET.bit.CMP_LO3_STSSET = 1u;
4776 }
4777 
4781 {
4782  ADC1->IEN0.bit.IEN_UP0 = 1u;
4783 }
4784 
4788 {
4789  ADC1->IEN0.bit.IEN_UP0 = 0u;
4790 }
4791 
4795 {
4796  ADC1->IEN0.bit.IEN_UP1 = 1u;
4797 }
4798 
4802 {
4803  ADC1->IEN0.bit.IEN_UP1 = 0u;
4804 }
4805 
4809 {
4810  ADC1->IEN0.bit.IEN_UP2 = 1u;
4811 }
4812 
4816 {
4817  ADC1->IEN0.bit.IEN_UP2 = 0u;
4818 }
4819 
4823 {
4824  ADC1->IEN0.bit.IEN_UP3 = 1u;
4825 }
4826 
4830 {
4831  ADC1->IEN0.bit.IEN_UP3 = 0u;
4832 }
4833 
4837 {
4838  ADC1->IEN0.bit.IEN_LO0 = 1u;
4839 }
4840 
4844 {
4845  ADC1->IEN0.bit.IEN_LO0 = 0u;
4846 }
4847 
4851 {
4852  ADC1->IEN0.bit.IEN_LO1 = 1u;
4853 }
4854 
4858 {
4859  ADC1->IEN0.bit.IEN_LO1 = 0u;
4860 }
4861 
4865 {
4866  ADC1->IEN0.bit.IEN_LO2 = 1u;
4867 }
4868 
4872 {
4873  ADC1->IEN0.bit.IEN_LO2 = 0u;
4874 }
4875 
4879 {
4880  ADC1->IEN0.bit.IEN_LO3 = 1u;
4881 }
4882 
4886 {
4887  ADC1->IEN0.bit.IEN_LO3 = 0u;
4888 }
4889 
4893 {
4894  ADC1->IEN0.bit.IEN_SQ0 = 1u;
4895 }
4896 
4900 {
4901  ADC1->IEN0.bit.IEN_SQ0 = 0u;
4902 }
4903 
4907 {
4908  ADC1->IEN0.bit.IEN_SQ1 = 1u;
4909 }
4910 
4914 {
4915  ADC1->IEN0.bit.IEN_SQ1 = 0u;
4916 }
4917 
4921 {
4922  ADC1->IEN0.bit.IEN_SQ2 = 1u;
4923 }
4924 
4928 {
4929  ADC1->IEN0.bit.IEN_SQ2 = 0u;
4930 }
4931 
4935 {
4936  ADC1->IEN0.bit.IEN_SQ3 = 1u;
4937 }
4938 
4942 {
4943  ADC1->IEN0.bit.IEN_SQ3 = 0u;
4944 }
4945 
4949 {
4950  ADC1->IEN0.bit.IEN_CH0 = 1u;
4951 }
4952 
4956 {
4957  ADC1->IEN0.bit.IEN_CH0 = 0u;
4958 }
4959 
4963 {
4964  ADC1->IEN0.bit.IEN_CH1 = 1u;
4965 }
4966 
4970 {
4971  ADC1->IEN0.bit.IEN_CH1 = 0u;
4972 }
4973 
4977 {
4978  ADC1->IEN0.bit.IEN_CH2 = 1u;
4979 }
4980 
4984 {
4985  ADC1->IEN0.bit.IEN_CH2 = 0u;
4986 }
4987 
4991 {
4992  ADC1->IEN0.bit.IEN_CH3 = 1u;
4993 }
4994 
4998 {
4999  ADC1->IEN0.bit.IEN_CH3 = 0u;
5000 }
5001 
5005 {
5006  ADC1->IEN0.bit.IEN_CH4 = 1u;
5007 }
5008 
5012 {
5013  ADC1->IEN0.bit.IEN_CH4 = 0u;
5014 }
5015 
5019 {
5020  ADC1->IEN0.bit.IEN_CH5 = 1u;
5021 }
5022 
5026 {
5027  ADC1->IEN0.bit.IEN_CH5 = 0u;
5028 }
5029 
5033 {
5034  ADC1->IEN0.bit.IEN_CH6 = 1u;
5035 }
5036 
5040 {
5041  ADC1->IEN0.bit.IEN_CH6 = 0u;
5042 }
5043 
5047 {
5048  ADC1->IEN0.bit.IEN_CH7 = 1u;
5049 }
5050 
5054 {
5055  ADC1->IEN0.bit.IEN_CH7 = 0u;
5056 }
5057 
5061 {
5062  ADC1->IEN0.bit.IEN_CH8 = 1u;
5063 }
5064 
5068 {
5069  ADC1->IEN0.bit.IEN_CH8 = 0u;
5070 }
5071 
5075 {
5076  ADC1->IEN0.bit.IEN_CH9 = 1u;
5077 }
5078 
5082 {
5083  ADC1->IEN0.bit.IEN_CH9 = 0u;
5084 }
5085 
5089 {
5090  ADC1->IEN0.bit.IEN_CH10 = 1u;
5091 }
5092 
5096 {
5097  ADC1->IEN0.bit.IEN_CH10 = 0u;
5098 }
5099 
5103 {
5104  ADC1->IEN0.bit.IEN_CH11 = 1u;
5105 }
5106 
5110 {
5111  ADC1->IEN0.bit.IEN_CH11 = 0u;
5112 }
5113 
5117 {
5118  ADC1->IEN0.bit.IEN_CH12 = 1u;
5119 }
5120 
5124 {
5125  ADC1->IEN0.bit.IEN_CH12 = 0u;
5126 }
5127 
5131 {
5132  ADC1->IEN0.bit.IEN_CH13 = 1u;
5133 }
5134 
5138 {
5139  ADC1->IEN0.bit.IEN_CH13 = 0u;
5140 }
5141 
5145 {
5146  ADC1->IEN0.bit.IEN_CH14 = 1u;
5147 }
5148 
5152 {
5153  ADC1->IEN0.bit.IEN_CH14 = 0u;
5154 }
5155 
5159 {
5160  ADC1->IEN0.bit.IEN_CH15 = 1u;
5161 }
5162 
5166 {
5167  ADC1->IEN0.bit.IEN_CH15 = 0u;
5168 }
5169 
5173 {
5174  ADC1->IEN0.bit.IEN_CH16 = 1u;
5175 }
5176 
5180 {
5181  ADC1->IEN0.bit.IEN_CH16 = 0u;
5182 }
5183 
5187 {
5188  ADC1->IEN0.bit.IEN_CH17 = 1u;
5189 }
5190 
5194 {
5195  ADC1->IEN0.bit.IEN_CH17 = 0u;
5196 }
5197 
5201 {
5202  ADC1->IEN0.bit.IEN_CH18 = 1u;
5203 }
5204 
5208 {
5209  ADC1->IEN0.bit.IEN_CH18 = 0u;
5210 }
5211 
5215 {
5216  ADC1->IEN0.bit.IEN_CH19 = 1u;
5217 }
5218 
5222 {
5223  ADC1->IEN0.bit.IEN_CH19 = 0u;
5224 }
5225 
5229 {
5230  ADC1->IEN1.bit.IEN_WFR0 = 1u;
5231 }
5232 
5236 {
5237  ADC1->IEN1.bit.IEN_WFR0 = 0u;
5238 }
5239 
5243 {
5244  ADC1->IEN1.bit.IEN_WFR1 = 1u;
5245 }
5246 
5250 {
5251  ADC1->IEN1.bit.IEN_WFR1 = 0u;
5252 }
5253 
5257 {
5258  ADC1->IEN1.bit.IEN_WFR2 = 1u;
5259 }
5260 
5264 {
5265  ADC1->IEN1.bit.IEN_WFR2 = 0u;
5266 }
5267 
5271 {
5272  ADC1->IEN1.bit.IEN_WFR3 = 1u;
5273 }
5274 
5278 {
5279  ADC1->IEN1.bit.IEN_WFR3 = 0u;
5280 }
5281 
5285 {
5286  ADC1->IEN1.bit.IEN_COLL0 = 1u;
5287 }
5288 
5292 {
5293  ADC1->IEN1.bit.IEN_COLL0 = 0u;
5294 }
5295 
5299 {
5300  ADC1->IEN1.bit.IEN_COLL1 = 1u;
5301 }
5302 
5306 {
5307  ADC1->IEN1.bit.IEN_COLL1 = 0u;
5308 }
5309 
5313 {
5314  ADC1->IEN1.bit.IEN_COLL2 = 1u;
5315 }
5316 
5320 {
5321  ADC1->IEN1.bit.IEN_COLL2 = 0u;
5322 }
5323 
5327 {
5328  ADC1->IEN1.bit.IEN_COLL3 = 1u;
5329 }
5330 
5334 {
5335  ADC1->IEN1.bit.IEN_COLL3 = 0u;
5336 }
5337 
5343 {
5344  return (uint8)ADC1->INP0.bit.INP_CH0;
5345 }
5346 
5352 {
5353  return (uint8)ADC1->INP0.bit.INP_CH1;
5354 }
5355 
5361 {
5362  return (uint8)ADC1->INP0.bit.INP_CH2;
5363 }
5364 
5370 {
5371  return (uint8)ADC1->INP0.bit.INP_CH3;
5372 }
5373 
5379 {
5380  return (uint8)ADC1->INP0.bit.INP_CH4;
5381 }
5382 
5388 {
5389  return (uint8)ADC1->INP0.bit.INP_CH5;
5390 }
5391 
5397 {
5398  return (uint8)ADC1->INP0.bit.INP_CH6;
5399 }
5400 
5406 {
5407  return (uint8)ADC1->INP0.bit.INP_CH7;
5408 }
5409 
5415 {
5416  return (uint8)ADC1->INP0.bit.INP_CH8;
5417 }
5418 
5424 {
5425  return (uint8)ADC1->INP0.bit.INP_CH9;
5426 }
5427 
5433 {
5434  return (uint8)ADC1->INP0.bit.INP_CH10;
5435 }
5436 
5442 {
5443  return (uint8)ADC1->INP0.bit.INP_CH11;
5444 }
5445 
5451 {
5452  return (uint8)ADC1->INP0.bit.INP_CH12;
5453 }
5454 
5460 {
5461  return (uint8)ADC1->INP0.bit.INP_CH13;
5462 }
5463 
5469 {
5470  return (uint8)ADC1->INP0.bit.INP_CH14;
5471 }
5472 
5478 {
5479  return (uint8)ADC1->INP0.bit.INP_CH15;
5480 }
5481 
5487 {
5488  return (uint8)ADC1->INP1.bit.INP_CH16;
5489 }
5490 
5496 {
5497  return (uint8)ADC1->INP1.bit.INP_CH17;
5498 }
5499 
5505 {
5506  return (uint8)ADC1->INP1.bit.INP_CH18;
5507 }
5508 
5514 {
5515  return (uint8)ADC1->INP1.bit.INP_CH19;
5516 }
5517 
5523 {
5524  return (uint8)ADC1->INP2.bit.INP_CMP_LO0;
5525 }
5526 
5532 {
5533  return (uint8)ADC1->INP2.bit.INP_CMP_LO1;
5534 }
5535 
5541 {
5542  return (uint8)ADC1->INP2.bit.INP_CMP_LO2;
5543 }
5544 
5550 {
5551  return (uint8)ADC1->INP2.bit.INP_CMP_LO3;
5552 }
5553 
5559 {
5560  return (uint8)ADC1->INP2.bit.INP_CMP_UP0;
5561 }
5562 
5568 {
5569  return (uint8)ADC1->INP2.bit.INP_CMP_UP1;
5570 }
5571 
5577 {
5578  return (uint8)ADC1->INP2.bit.INP_CMP_UP2;
5579 }
5580 
5586 {
5587  return (uint8)ADC1->INP2.bit.INP_CMP_UP3;
5588 }
5589 
5595 {
5596  return (uint8)ADC1->INP3.bit.INP_SQ0;
5597 }
5598 
5604 {
5605  return (uint8)ADC1->INP3.bit.INP_SQ1;
5606 }
5607 
5613 {
5614  return (uint8)ADC1->INP3.bit.INP_SQ2;
5615 }
5616 
5622 {
5623  return (uint8)ADC1->INP3.bit.INP_SQ3;
5624 }
5625 
5631 {
5632  return (uint8)ADC1->INP3.bit.INP_COLL0;
5633 }
5634 
5640 {
5641  return (uint8)ADC1->INP3.bit.INP_COLL1;
5642 }
5643 
5649 {
5650  return (uint8)ADC1->INP3.bit.INP_COLL2;
5651 }
5652 
5658 {
5659  return (uint8)ADC1->INP3.bit.INP_COLL3;
5660 }
5661 
5667 {
5668  return (uint8)ADC1->INP3.bit.INP_WFR0;
5669 }
5670 
5676 {
5677  return (uint8)ADC1->INP3.bit.INP_WFR1;
5678 }
5679 
5685 {
5686  return (uint8)ADC1->INP3.bit.INP_WFR2;
5687 }
5688 
5694 {
5695  return (uint8)ADC1->INP3.bit.INP_WFR3;
5696 }
5697 
5703 {
5704  ADC1->SHDCTR.bit.ST_SQSEL = u8_value;
5705 }
5706 
5712 {
5713  return (uint8)ADC1->SHDCTR.bit.ST_SQSEL;
5714 }
5715 
5721 {
5722  ADC1->SHDCTR.bit.ST_TRGSEL = u8_value;
5723 }
5724 
5730 {
5731  return (uint8)ADC1->SHDCTR.bit.ST_TRGSEL;
5732 }
5733 
5739 {
5740  ADC1->SHDCTR.bit.ST_GTGSEL = u8_value;
5741 }
5742 
5748 {
5749  return (uint8)ADC1->SHDCTR.bit.ST_GTGSEL;
5750 }
5751 
5755 {
5756  ADC1->SHDCTR.bit.STE_SQSEL = 1u;
5757 }
5758 
5762 {
5763  ADC1->SHDCTR.bit.STE_SQSEL = 0u;
5764 }
5765 
5769 {
5770  ADC1->SHDCTR.bit.STE_TRGSEL = 1u;
5771 }
5772 
5776 {
5777  ADC1->SHDCTR.bit.STE_TRGSEL = 0u;
5778 }
5779 
5783 {
5784  ADC1->SHDCTR.bit.STE_GTGSEL = 1u;
5785 }
5786 
5790 {
5791  ADC1->SHDCTR.bit.STE_GTGSEL = 0u;
5792 }
5793 
5797 {
5798  ADC1->SHDCTR.bit.ST_SQSW = 1u;
5799 }
5800 
5806 {
5807  return (uint8)ADC1->SHDCTR.bit.ST_SQSW;
5808 }
5809 
5813 {
5814  ADC1->SHDCTR.bit.ST_TRGSW = 1u;
5815 }
5816 
5822 {
5823  return (uint8)ADC1->SHDCTR.bit.ST_TRGSW;
5824 }
5825 
5829 {
5830  ADC1->SHDCTR.bit.ST_GTGSW = 1u;
5831 }
5832 
5838 {
5839  return (uint8)ADC1->SHDCTR.bit.ST_GTGSW;
5840 }
5841 
5845 {
5846  ADC1->SHDCTR.bit.STE_SQ = 1u;
5847 }
5848 
5852 {
5853  ADC1->SHDCTR.bit.STE_SQ = 0u;
5854 }
5855 
5859 {
5860  ADC1->SHDCTR.bit.STE_TRG = 1u;
5861 }
5862 
5866 {
5867  ADC1->SHDCTR.bit.STE_TRG = 0u;
5868 }
5869 
5873 {
5874  ADC1->SHDCTR.bit.STE_GTG = 1u;
5875 }
5876 
5880 {
5881  ADC1->SHDCTR.bit.STE_GTG = 0u;
5882 }
5883 
5889 {
5890  ADC1->CALAI1.bit.CALOFFS = u8_value;
5891 }
5892 
5898 {
5899  return (uint8)ADC1->CALAI1.bit.CALOFFS;
5900 }
5901 
5907 {
5908  ADC1->CALAI1.bit.CALGAIN = u16_value;
5909 }
5910 
5916 {
5917  return (uint16)ADC1->CALAI1.bit.CALGAIN;
5918 }
5919 
5925 {
5926  ADC1->CALAI3.bit.CALOFFS = u8_value;
5927 }
5928 
5934 {
5935  return (uint8)ADC1->CALAI3.bit.CALOFFS;
5936 }
5937 
5943 {
5944  ADC1->CALAI3.bit.CALGAIN = u16_value;
5945 }
5946 
5952 {
5953  return (uint16)ADC1->CALAI3.bit.CALGAIN;
5954 }
5955 
5961 {
5962  ADC1->CALAI5.bit.CALOFFS = u8_value;
5963 }
5964 
5970 {
5971  return (uint8)ADC1->CALAI5.bit.CALOFFS;
5972 }
5973 
5979 {
5980  ADC1->CALAI5.bit.CALGAIN = u16_value;
5981 }
5982 
5988 {
5989  return (uint16)ADC1->CALAI5.bit.CALGAIN;
5990 }
5991 
5997 {
5998  ADC1->CALAI7.bit.CALOFFS = u8_value;
5999 }
6000 
6006 {
6007  return (uint8)ADC1->CALAI7.bit.CALOFFS;
6008 }
6009 
6015 {
6016  ADC1->CALAI7.bit.CALGAIN = u16_value;
6017 }
6018 
6024 {
6025  return (uint16)ADC1->CALAI7.bit.CALGAIN;
6026 }
6027 
6033 {
6034  ADC1->CALAI9.bit.CALOFFS = u8_value;
6035 }
6036 
6042 {
6043  return (uint8)ADC1->CALAI9.bit.CALOFFS;
6044 }
6045 
6051 {
6052  ADC1->CALAI9.bit.CALGAIN = u16_value;
6053 }
6054 
6060 {
6061  return (uint16)ADC1->CALAI9.bit.CALGAIN;
6062 }
6063 
6069 {
6070  ADC1->CALAI11.bit.CALOFFS = u8_value;
6071 }
6072 
6078 {
6079  return (uint8)ADC1->CALAI11.bit.CALOFFS;
6080 }
6081 
6087 {
6088  ADC1->CALAI11.bit.CALGAIN = u16_value;
6089 }
6090 
6096 {
6097  return (uint16)ADC1->CALAI11.bit.CALGAIN;
6098 }
6099 
6105 {
6106  ADC1->CALAI13.bit.CALOFFS = u8_value;
6107 }
6108 
6114 {
6115  return (uint8)ADC1->CALAI13.bit.CALOFFS;
6116 }
6117 
6123 {
6124  ADC1->CALAI13.bit.CALGAIN = u16_value;
6125 }
6126 
6132 {
6133  return (uint16)ADC1->CALAI13.bit.CALGAIN;
6134 }
6135 
6141 {
6142  ADC1->CALAI15.bit.CALOFFS = u8_value;
6143 }
6144 
6150 {
6151  return (uint8)ADC1->CALAI15.bit.CALOFFS;
6152 }
6153 
6159 {
6160  ADC1->CALAI15.bit.CALGAIN = u16_value;
6161 }
6162 
6168 {
6169  return (uint16)ADC1->CALAI15.bit.CALGAIN;
6170 }
6171 
6177 {
6178  ADC1->CALAI16.bit.CALOFFS = u8_value;
6179 }
6180 
6186 {
6187  return (uint8)ADC1->CALAI16.bit.CALOFFS;
6188 }
6189 
6195 {
6196  ADC1->CALAI16.bit.CALGAIN = u16_value;
6197 }
6198 
6204 {
6205  return (uint16)ADC1->CALAI16.bit.CALGAIN;
6206 }
6207 
6213 {
6214  ADC1->CALAI17.bit.CALOFFS = u8_value;
6215 }
6216 
6222 {
6223  return (uint8)ADC1->CALAI17.bit.CALOFFS;
6224 }
6225 
6231 {
6232  ADC1->CALAI17.bit.CALGAIN = u16_value;
6233 }
6234 
6240 {
6241  return (uint16)ADC1->CALAI17.bit.CALGAIN;
6242 }
6243 
6249 {
6250  ADC1->CALAI18.bit.CALOFFS = u8_value;
6251 }
6252 
6258 {
6259  return (uint8)ADC1->CALAI18.bit.CALOFFS;
6260 }
6261 
6267 {
6268  ADC1->CALAI18.bit.CALGAIN = u16_value;
6269 }
6270 
6276 {
6277  return (uint16)ADC1->CALAI18.bit.CALGAIN;
6278 }
6279 
6285 {
6286  ADC1->CALAI19.bit.CALOFFS = u8_value;
6287 }
6288 
6294 {
6295  return (uint8)ADC1->CALAI19.bit.CALOFFS;
6296 }
6297 
6303 {
6304  ADC1->CALAI19.bit.CALGAIN = u16_value;
6305 }
6306 
6312 {
6313  return (uint16)ADC1->CALAI19.bit.CALGAIN;
6314 }
6315 
6321 {
6322  ADC1->CALAI20.bit.CALOFFS = u8_value;
6323 }
6324 
6330 {
6331  return (uint8)ADC1->CALAI20.bit.CALOFFS;
6332 }
6333 
6339 {
6340  ADC1->CALAI20.bit.CALGAIN = u16_value;
6341 }
6342 
6348 {
6349  return (uint16)ADC1->CALAI20.bit.CALGAIN;
6350 }
6351 
6357 {
6358  ADC1->CALAI21.bit.CALOFFS = u8_value;
6359 }
6360 
6366 {
6367  return (uint8)ADC1->CALAI21.bit.CALOFFS;
6368 }
6369 
6375 {
6376  ADC1->CALAI21.bit.CALGAIN = u16_value;
6377 }
6378 
6384 {
6385  return (uint16)ADC1->CALAI21.bit.CALGAIN;
6386 }
6387 
6393 {
6394  ADC1->CALAI22.bit.CALOFFS = u8_value;
6395 }
6396 
6402 {
6403  return (uint8)ADC1->CALAI22.bit.CALOFFS;
6404 }
6405 
6411 {
6412  ADC1->CALAI22.bit.CALGAIN = u16_value;
6413 }
6414 
6420 {
6421  return (uint16)ADC1->CALAI22.bit.CALGAIN;
6422 }
6423 
6429 {
6430  ADC1->CALAI23.bit.CALOFFS = u8_value;
6431 }
6432 
6438 {
6439  return (uint8)ADC1->CALAI23.bit.CALOFFS;
6440 }
6441 
6447 {
6448  ADC1->CALAI23.bit.CALGAIN = u16_value;
6449 }
6450 
6456 {
6457  return (uint16)ADC1->CALAI23.bit.CALGAIN;
6458 }
6459 
6465 {
6466  ADC1->CALAI24.bit.CALOFFS = u8_value;
6467 }
6468 
6474 {
6475  return (uint8)ADC1->CALAI24.bit.CALOFFS;
6476 }
6477 
6483 {
6484  ADC1->CALAI24.bit.CALGAIN = u16_value;
6485 }
6486 
6492 {
6493  return (uint16)ADC1->CALAI24.bit.CALGAIN;
6494 }
6495 
6501 {
6502  ADC1->CALAI25.bit.CALOFFS = u8_value;
6503 }
6504 
6510 {
6511  return (uint8)ADC1->CALAI25.bit.CALOFFS;
6512 }
6513 
6519 {
6520  ADC1->CALAI25.bit.CALGAIN = u16_value;
6521 }
6522 
6528 {
6529  return (uint16)ADC1->CALAI25.bit.CALGAIN;
6530 }
6531 
6537 {
6538  ADC1->CALAI26.bit.CALOFFS = u8_value;
6539 }
6540 
6546 {
6547  return (uint8)ADC1->CALAI26.bit.CALOFFS;
6548 }
6549 
6555 {
6556  ADC1->CALAI26.bit.CALGAIN = u16_value;
6557 }
6558 
6564 {
6565  return (uint16)ADC1->CALAI26.bit.CALGAIN;
6566 }
6567 
6571 {
6572  ARVG->VAREF_CTRL.bit.EN = 1u;
6573 }
6574 
6578 {
6579  ARVG->VAREF_CTRL.bit.EN = 0u;
6580 }
6581 
6585 {
6586  ARVG->VAREF_IEN.bit.OC_IEN = 1u;
6587 }
6588 
6592 {
6593  ARVG->VAREF_IEN.bit.OC_IEN = 0u;
6594 }
6595 
6601 {
6602  return (uint8)ARVG->VAREF_IRQ.bit.OC_IS;
6603 }
6604 
6610 {
6611  return (uint8)ARVG->VAREF_IRQ.bit.OC_STS;
6612 }
6613 
6617 {
6618  ARVG->VAREF_IRQ_CLR.bit.OC_IS_CLR = 1u;
6619 }
6620 
6624 {
6625  ARVG->VAREF_IRQ_CLR.bit.OC_STS_CLR = 1u;
6626 }
6627 
6630 #endif /* _ADC1_H */
6631 
INLINE uint8 ADC1_getSeq3IntSts(void)
Get Sequence 3 Interrupt Status.
Definition: adc1.h:2191
INLINE uint16 ADC1_getCalibGainAnaIn1(void)
Get Calibration Gain analog input 1.
Definition: adc1.h:5915
INLINE uint8 ADC1_getCh0IntNodePtr(void)
Get Channel 0 Interrupt Node Pointer.
Definition: adc1.h:5342
INLINE void ADC1_clrCh1EndOfConvSts(void)
Clear Channel 1 End Of Conversion Status.
Definition: adc1.h:2751
INLINE void ADC1_disCalibProtCh24(void)
Disable Calibration Protection Channel 24.
Definition: adc1.h:3781
INLINE void ADC1_disCmp1LoInt(void)
Disable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:4857
INLINE void ADC1_clrFilter1Sts(void)
Clear Filter 1 Event flag.
Definition: adc1.h:3967
INLINE uint8 ADC1_getCh9ResultValidSts(void)
Get Result Valid Flag Channel 9.
Definition: adc1.h:4189
INLINE void ADC1_clrCmp0UpThSts(void)
Clear Compare 0 Upper Threshold Status.
Definition: adc1.h:4584
INLINE uint8 ADC1_getCh9IntNodePtr(void)
Get Channel 9 Interrupt Node Pointer.
Definition: adc1.h:5423
INLINE uint8 ADC1_getSeq1Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1579
INLINE uint8 ADC1_getCmp3UpThSts(void)
Get Compare 3 Upper Threshold Status.
Definition: adc1.h:4477
INLINE void ADC1_setCmp2LoThSts(void)
Set Compare 2 Lower Threshold Status.
Definition: adc1.h:4766
INLINE uint8 ADC1_getSeq2IntSts(void)
Get Sequence 2 Interrupt Status.
Definition: adc1.h:2182
INLINE void ADC1_clrCh5EndOfConvSts(void)
Clear Channel 5 End Of Conversion Status.
Definition: adc1.h:2779
INLINE uint8 ADC1_getCh6EndOfConvSts(void)
Get Channel 6 End Of Conversion Status.
Definition: adc1.h:2611
INLINE uint8 ADC1_getCalibOffsAnaIn22(void)
Get Calibration Offset analog input 22.
Definition: adc1.h:6401
INLINE void ADC1_disCalibProtCh25(void)
Disable Calibration Protection Channel 25.
Definition: adc1.h:3795
INLINE uint8 ADC1_getCh12IntNodePtr(void)
Get Channel 12 Interrupt Node Pointer.
Definition: adc1.h:5450
INLINE void ADC1_disCh6Int(void)
Disable Channel 6 Interrupt.
Definition: adc1.h:5039
INLINE uint8 ADC1_getCh5ResultValidSts(void)
Get Result Valid Flag Channel 5.
Definition: adc1.h:4117
INLINE uint16 ADC1_getCalibGainAnaIn23(void)
Get Calibration Gain analog input 23.
Definition: adc1.h:6455
INLINE void ADC1_setSeq1Slot3(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1720
INLINE void ADC1_enCh3Int(void)
Enable Channel 3 Interrupt.
Definition: adc1.h:4990
INLINE uint16 ADC1_getCalibGainAnaIn3(void)
Get Calibration Gain analog input 3.
Definition: adc1.h:5951
INLINE uint16 ADC1_getCalibGainAnaIn17(void)
Get Calibration Gain analog input 17.
Definition: adc1.h:6239
union ADC1_CONVCFGx tADC1_CONVCFGx
INLINE void ADC1_enSeq1CollInt(void)
Enable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5298
INLINE void ADC1_disSeq2Int(void)
Disable Sequence 2 Interrupt.
Definition: adc1.h:4927
INLINE uint16 ADC1_getCalibGainAnaIn20(void)
Get Calibration Gain analog input 20.
Definition: adc1.h:6347
INLINE void ADC1_enSeq3Int(void)
Enable Sequence 3 Interrupt.
Definition: adc1.h:4934
INLINE void ADC1_setCalibGainAnaIn25(uint16 u16_value)
Set Calibration Gain analog input 25.
Definition: adc1.h:6518
INLINE uint8 ADC1_getCh18ResultValidSts(void)
Get Result Valid Flag Channel 18.
Definition: adc1.h:4351
INLINE void ADC1_setCalibGainAnaIn11(uint16 u16_value)
Set Calibration Gain analog input 11.
Definition: adc1.h:6086
INLINE void ADC1_clrCmp3UpIntSts(void)
Clear Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4577
INLINE uint8 ADC1_getSeq3Slot3(void)
Get Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2083
INLINE void ADC1_clrSeq0CollSts(void)
Clear Sequence 0 Collision Status.
Definition: adc1.h:2235
INLINE uint8 ADC1_getCmp0UpThSts(void)
Get Compare 0 Upper Threshold Status.
Definition: adc1.h:4450
INLINE void ADC1_enCh15Int(void)
Enable Channel 15 Interrupt.
Definition: adc1.h:5158
INLINE void ADC1_enCalibCh16(void)
Enable Calibration Channel 16.
Definition: adc1.h:3284
INLINE uint8 ADC1_getSeq3Slot2(void)
Get Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2065
INLINE uint8 ADC1_getSeq2WaitForRead(void)
Get Sequence 2 Wait for Read Status.
Definition: adc1.h:2110
INLINE void ADC1_setFilter3Sts(void)
Set Filter 3 Event flag.
Definition: adc1.h:4009
INLINE void ADC1_clrCmp1LoIntSts(void)
Clear Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4619
INLINE void ADC1_disSeq0CollInt(void)
Disable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5291
INLINE uint8 ADC1_getCalibOffsAnaIn7(void)
Get Calibration Offset analog input 7.
Definition: adc1.h:6005
INLINE uint8 ADC1_getCh2ResultValidSts(void)
Get Result Valid Flag Channel 2.
Definition: adc1.h:4063
INLINE void ADC1_disCalibCh20(void)
Disable Calibration Channel 20.
Definition: adc1.h:3347
INLINE void ADC1_enTriggSwShadowTrans(void)
Enable Trigger Shadow Transfer.
Definition: adc1.h:5858
INLINE void ADC1_disSeq1CollInt(void)
Disable Sequence 1 Collision Detection Interrupt.
Definition: adc1.h:5305
INLINE void ARVG_disVAREF(void)
Disable VAREF.
Definition: adc1.h:6577
void ADC1_setCh18IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 18 Interrupt Node Pointer.
INLINE void ADC1_enCmp3UpInt(void)
Enable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:4822
INLINE uint16 ADC1_getCh4Result(void)
Get Result Value Channel 4.
Definition: adc1.h:4090
INLINE void ADC1_setTriggSwShadowTrans(void)
Set Trigger Software Shadow Transfer.
Definition: adc1.h:5812
void ADC1_setCh17IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 17 Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1402
INLINE void ADC1_disCalibCh14(void)
Disable Calibration Channel 14.
Definition: adc1.h:3263
INLINE uint8 ADC1_getSeq3WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5693
INLINE void ADC1_setCh8EndOfConvSts(void)
Set Channel 8 End Of Conversion Status.
Definition: adc1.h:2940
INLINE void ADC1_setCalibOffsAnaIn22(uint8 u8_value)
Set Calibration Offset analog input 22.
Definition: adc1.h:6392
INLINE void ADC1_setSeq3TriggerSelect(tADC1_Seq3Trig e_Seq3Trig)
Set Trigger Select.
Definition: adc1.h:1970
void ADC1_setCh16IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 16 Interrupt Node Pointer.
void ADC1_setCmp3LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh18(void)
Disable Calibration Protection Channel 18.
Definition: adc1.h:3697
INLINE void ADC1_disSeq1CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1593
INLINE uint8 ARVG_getVAREFOvercurrentSts(void)
Get VAREF Overcurrent Status.
Definition: adc1.h:6609
INLINE void ADC1_clrCh6EndOfConvSts(void)
Clear Channel 6 End Of Conversion Status.
Definition: adc1.h:2786
sint8 ADC1_getChFiltResult(uint16 *u16p_filtDigValue, uint8 u8_channel)
Get the 16-bit value of the ADC1 Filter Result Register of the selected ADC1 channel and returns the ...
Definition: adc1.c:374
INLINE uint8 ADC1_getCalibOffsAnaIn1(void)
Get Calibration Offset analog input 1.
Definition: adc1.h:5897
INLINE uint8 ADC1_getCh16EndOfConvSts(void)
Get Channel 16 End Of Conversion Status.
Definition: adc1.h:2701
INLINE void ADC1_setCalibOffsAnaIn21(uint8 u8_value)
Set Calibration Offset analog input 21.
Definition: adc1.h:6356
INLINE void ADC1_clrCmp1LoThSts(void)
Clear Compare 1 Lower Threshold Status.
Definition: adc1.h:4647
INLINE void ADC1_setSeq2Slot3(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1897
INLINE void ADC1_enSeq0WaitForReadInt(void)
Enable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5228
INLINE void ADC1_setCmp2UpIntSts(void)
Set Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4682
INLINE void ADC1_disCalibCh18(void)
Disable Calibration Channel 18.
Definition: adc1.h:3319
INLINE void ADC1_enCalibCh25(void)
Enable Calibration Channel 25.
Definition: adc1.h:3410
INLINE uint8 ADC1_getCh15IntNodePtr(void)
Get Channel 15 Interrupt Node Pointer.
Definition: adc1.h:5477
INLINE uint8 ADC1_getSeq0IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5594
INLINE void ADC1_enCmp2LoInt(void)
Enable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:4864
INLINE void ADC1_setCh3EndOfConvSts(void)
Set Channel 3 End Of Conversion Status.
Definition: adc1.h:2905
INLINE uint8 ARVG_getVAREFOvercurrentIntSts(void)
Get VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6600
INLINE uint8 ADC1_getCalibOffsAnaIn24(void)
Get Calibration Offset analog input 24.
Definition: adc1.h:6473
INLINE uint8 ADC1_getCh13ResultValidSts(void)
Get Result Valid Flag Channel 13.
Definition: adc1.h:4261
INLINE uint8 ADC1_getCalibOffsAnaIn11(void)
Get Calibration Offset analog input 11.
Definition: adc1.h:6077
INLINE uint8 ADC1_getCalibOffsAnaIn15(void)
Get Calibration Offset analog input 15.
Definition: adc1.h:6149
INLINE void ADC1_setCalibOffsAnaIn16(uint8 u8_value)
Set Calibration Offset analog input 16.
Definition: adc1.h:6176
INLINE void ADC1_enSeq2WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1777
INLINE void ADC1_disCalibProtCh2(void)
Disable Calibration Protection Channel 2.
Definition: adc1.h:3473
INLINE uint8 ADC1_getCh0ResultValidSts(void)
Get Result Valid Flag Channel 0.
Definition: adc1.h:4027
INLINE void ADC1_disCalibCh10(void)
Disable Calibration Channel 10.
Definition: adc1.h:3207
INLINE void ADC1_disPower(void)
Disable ADC1 Module.
Definition: adc1.h:1307
INLINE void ADC1_setSeqSwShadowTrans(void)
Set Sequence Software Shadow Transfer.
Definition: adc1.h:5796
INLINE void ADC1_disCmp2UpInt(void)
Disable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:4815
INLINE void ADC1_setSeq0Slot0(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1489
INLINE void ADC1_enCalibProtCh13(void)
Enable Calibration Protection Channel 13.
Definition: adc1.h:3620
INLINE uint8 ADC1_getSeq2TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1802
INLINE void ADC1_setSeq3IntSts(void)
Set Sequence 3 Interrupt Status.
Definition: adc1.h:2368
INLINE void ADC1_setSeq3Slot2(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 2.
Definition: adc1.h:2056
INLINE void ADC1_clrCh7EndOfConvSts(void)
Clear Channel 7 End Of Conversion Status.
Definition: adc1.h:2793
INLINE void ADC1_setSeq0Slot1(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1507
INLINE void ADC1_clrCh18EndOfConvSts(void)
Clear Channel 18 End Of Conversion Status.
Definition: adc1.h:2870
INLINE void ADC1_enCalibProtCh21(void)
Enable Calibration Protection Channel 21.
Definition: adc1.h:3732
INLINE uint16 ADC1_getCh10Result(void)
Get Result Value Channel 10.
Definition: adc1.h:4198
INLINE void ADC1_setCh15Config(tADC1_CHCFGx s_value)
Set Channel 15 configuration.
Definition: adc1.h:2512
INLINE void ADC1_enPower(void)
Enable ADC1 Module.
Definition: adc1.h:1300
INLINE void ADC1_disCh5Int(void)
Disable Channel 5 Interrupt.
Definition: adc1.h:5025
INLINE uint8 ADC1_getTriggHwShadowTrans(void)
Get Trigger Shadow Transfer Selection.
Definition: adc1.h:5729
INLINE void ADC1_enCh13Int(void)
Enable Channel 13 Interrupt.
Definition: adc1.h:5130
INLINE void ADC1_disCalibProtCh9(void)
Disable Calibration Protection Channel 9.
Definition: adc1.h:3571
INLINE void ADC1_disSeq0Int(void)
Disable Sequence 0 Interrupt.
Definition: adc1.h:4899
INLINE uint8 ADC1_getCalibOffsAnaIn17(void)
Get Calibration Offset analog input 17.
Definition: adc1.h:6221
INLINE void ADC1_enCalibCh6(void)
Enable Calibration Channel 6.
Definition: adc1.h:3144
INLINE void ADC1_setCalibOffsAnaIn9(uint8 u8_value)
Set Calibration Offset analog input 9.
Definition: adc1.h:6032
INLINE uint8 ADC1_getSeq2CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5648
INLINE uint8 ADC1_getCmp0UpIntSts(void)
Get Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4414
INLINE void ADC1_disCmp3LoInt(void)
Disable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:4885
INLINE void ADC1_setFilter3Coeff(uint8 u8_value)
Set Filter 3 Coefficient.
Definition: adc1.h:3872
INLINE uint8 ADC1_getCmp2LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5540
INLINE void ADC1_setCh1Config(tADC1_CHCFGx s_value)
Set Channel 1 configuration.
Definition: adc1.h:2386
INLINE uint8 ADC1_getCh11IntNodePtr(void)
Get Channel 11 Interrupt Node Pointer.
Definition: adc1.h:5441
INLINE void ADC1_enSeq2CollInt(void)
Enable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5312
INLINE void ADC1_setFilter1Sts(void)
Set Filter 1 Event flag.
Definition: adc1.h:3995
INLINE void ADC1_enCalibCh3(void)
Enable Calibration Channel 3.
Definition: adc1.h:3102
INLINE void ADC1_disCalibCh22(void)
Disable Calibration Channel 22.
Definition: adc1.h:3375
INLINE void ADC1_enCalibCh13(void)
Enable Calibration Channel 13.
Definition: adc1.h:3242
INLINE void ADC1_disCalibCh7(void)
Disable Calibration Channel 7.
Definition: adc1.h:3165
INLINE uint8 ADC1_getCh4EndOfConvSts(void)
Get Channel 4 End Of Conversion Status.
Definition: adc1.h:2593
INLINE void ADC1_disCalibCh16(void)
Disable Calibration Channel 16.
Definition: adc1.h:3291
INLINE uint8 ADC1_getCh16ResultValidSts(void)
Get Result Valid Flag Channel 16.
Definition: adc1.h:4315
INLINE void ADC1_setCh19Config(tADC1_CHCFGx s_value)
Set Channel 19 configuration.
Definition: adc1.h:2548
INLINE uint8 ADC1_getFilter0Coeff(void)
Get Filter 0 Coefficient.
Definition: adc1.h:3827
INLINE uint8 ADC1_getCh14ResultValidSts(void)
Get Result Valid Flag Channel 14.
Definition: adc1.h:4279
INLINE uint8 ADC1_getSeq1IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5603
INLINE void ADC1_enSeq0WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1423
INLINE void ADC1_enCh4Int(void)
Enable Channel 4 Interrupt.
Definition: adc1.h:5004
INLINE void ADC1_disCalibCh5(void)
Disable Calibration Channel 5.
Definition: adc1.h:3137
INLINE uint16 ADC1_getCh7Result(void)
Get Result Value Channel 7.
Definition: adc1.h:4144
INLINE void ADC1_setCh5EndOfConvSts(void)
Set Channel 5 End Of Conversion Status.
Definition: adc1.h:2919
INLINE void ADC1_setSeq2TriggerSelect(tADC1_Seq2Trig e_Seq2Trig)
Set Trigger Select.
Definition: adc1.h:1793
void ADC1_setCh19IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 19 Interrupt Node Pointer.
void ADC1_setCmp0UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getCh4ResultValidSts(void)
Get Result Valid Flag Channel 4.
Definition: adc1.h:4099
INLINE void ADC1_enCalibCh24(void)
Enable Calibration Channel 24.
Definition: adc1.h:3396
INLINE void ADC1_enCmp2UpInt(void)
Enable Compare 2 Upper Threshold Interrupt.
Definition: adc1.h:4808
INLINE void ADC1_setCmp3UpIntSts(void)
Set Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4689
INLINE uint8 ADC1_getCalibOffsAnaIn20(void)
Get Calibration Offset analog input 20.
Definition: adc1.h:6329
INLINE void ADC1_setCalibGainAnaIn20(uint16 u16_value)
Set Calibration Gain analog input 20.
Definition: adc1.h:6338
INLINE void ADC1_setCalibOffsAnaIn19(uint8 u8_value)
Set Calibration Offset analog input 19.
Definition: adc1.h:6284
INLINE uint8 ADC1_getCh1EndOfConvSts(void)
Get Channel 1 End Of Conversion Status.
Definition: adc1.h:2566
INLINE uint8 ADC1_getCmp3LoThSts(void)
Get Compare 3 Lower Threshold Status.
Definition: adc1.h:4549
INLINE void ADC1_clrCmp0LoThSts(void)
Clear Compare 0 Lower Threshold Status.
Definition: adc1.h:4640
INLINE void ADC1_setCalibGainAnaIn15(uint16 u16_value)
Set Calibration Gain analog input 15.
Definition: adc1.h:6158
INLINE void ADC1_setCmp3UpThSts(void)
Set Compare 3 Upper Threshold Status.
Definition: adc1.h:4717
INLINE void ADC1_setCalibOffsAnaIn7(uint8 u8_value)
Set Calibration Offset analog input 7.
Definition: adc1.h:5996
INLINE void ADC1_disCalibProtCh0(void)
Disable Calibration Protection Channel 0.
Definition: adc1.h:3445
INLINE void ADC1_clrCh3EndOfConvSts(void)
Clear Channel 3 End Of Conversion Status.
Definition: adc1.h:2765
INLINE void ADC1_disCmp1UpInt(void)
Disable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:4801
INLINE void ADC1_enCalibProtCh16(void)
Enable Calibration Protection Channel 16.
Definition: adc1.h:3662
INLINE void ADC1_setSeq2CollSts(void)
Set Sequence 2 Collision Status.
Definition: adc1.h:2333
INLINE void ADC1_enCh5Int(void)
Enable Channel 5 Interrupt.
Definition: adc1.h:5018
INLINE void ADC1_clrCmp3UpThSts(void)
Clear Compare 3 Upper Threshold Status.
Definition: adc1.h:4605
INLINE void ADC1_disSeq1WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1607
ADC1_Seq0Trig
Enumeration for the trigger source of the sequence 0.
Definition: adc1.h:244
INLINE void ADC1_disCh7Int(void)
Disable Channel 7 Interrupt.
Definition: adc1.h:5053
INLINE void ADC1_enCalibCh18(void)
Enable Calibration Channel 18.
Definition: adc1.h:3312
INLINE void ADC1_disSuspend(void)
Disable ADC1 Suspend.
Definition: adc1.h:1339
INLINE void ADC1_clrCmp3LoIntSts(void)
Clear Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4633
INLINE void ADC1_setCalibOffsAnaIn3(uint8 u8_value)
Set Calibration Offset analog input 3.
Definition: adc1.h:5924
INLINE void ADC1_disSeq2WaitForReadInt(void)
Disable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5263
sint8 ADC1_init(void)
Initialize all CW registers of the ADC1 module.
Definition: adc1.c:128
INLINE void ADC1_setSeq3Slot3(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 3.
Definition: adc1.h:2074
INLINE void ADC1_enCalibProtCh20(void)
Enable Calibration Protection Channel 20.
Definition: adc1.h:3718
INLINE uint8 ADC1_getSeq0CollSts(void)
Get Sequence 0 Collision Status.
Definition: adc1.h:2128
INLINE uint8 ADC1_getCmp1UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5567
INLINE void ADC1_enSeq0TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1473
INLINE void ADC1_enCh6Int(void)
Enable Channel 6 Interrupt.
Definition: adc1.h:5032
INLINE uint8 ADC1_getSeq3TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1979
INLINE void ADC1_setCalibOffsAnaIn17(uint8 u8_value)
Set Calibration Offset analog input 17.
Definition: adc1.h:6212
INLINE void ADC1_setGateSwShadowTrans(void)
Set Gating Software Shadow Transfer.
Definition: adc1.h:5828
INLINE uint8 ADC1_getSeq3Slot0(void)
Get Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2029
INLINE void ADC1_enCmp3LoInt(void)
Enable Compare 3 Lower Threshold Interrupt.
Definition: adc1.h:4878
INLINE void ADC1_setCalibGainAnaIn17(uint16 u16_value)
Set Calibration Gain analog input 17.
Definition: adc1.h:6230
INLINE uint8 ADC1_getCh11ResultValidSts(void)
Get Result Valid Flag Channel 11.
Definition: adc1.h:4225
INLINE void ADC1_clrCh10EndOfConvSts(void)
Clear Channel 10 End Of Conversion Status.
Definition: adc1.h:2814
INLINE void ADC1_setSeq3Slot0(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 0.
Definition: adc1.h:2020
INLINE uint8 ADC1_getCh13EndOfConvSts(void)
Get Channel 13 End Of Conversion Status.
Definition: adc1.h:2674
INLINE void ADC1_setCh0Config(tADC1_CHCFGx s_value)
Set Channel 0 configuration.
Definition: adc1.h:2377
void ADC1_setCmp1LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint8 ADC1_getCmp1LoThSts(void)
Get Compare 1 Lower Threshold Status.
Definition: adc1.h:4531
INLINE void ADC1_enCalibProtCh4(void)
Enable Calibration Protection Channel 4.
Definition: adc1.h:3494
INLINE void ADC1_setCalibOffsAnaIn15(uint8 u8_value)
Set Calibration Offset analog input 15.
Definition: adc1.h:6140
INLINE void ADC1_clrSeq2IntSts(void)
Clear Sequence 2 Interrupt Status.
Definition: adc1.h:2277
INLINE uint16 ADC1_getCalibGainAnaIn7(void)
Get Calibration Gain analog input 7.
Definition: adc1.h:6023
INLINE void ADC1_disCalibProtCh4(void)
Disable Calibration Protection Channel 4.
Definition: adc1.h:3501
INLINE void ADC1_setCalibGainAnaIn23(uint16 u16_value)
Set Calibration Gain analog input 23.
Definition: adc1.h:6446
INLINE void ADC1_setCalibOffsAnaIn11(uint8 u8_value)
Set Calibration Offset analog input 11.
Definition: adc1.h:6068
INLINE uint8 ADC1_getCh5IntNodePtr(void)
Get Channel 5 Interrupt Node Pointer.
Definition: adc1.h:5387
INLINE void ADC1_enCh17Int(void)
Enable Channel 17 Interrupt.
Definition: adc1.h:5186
INLINE void ADC1_setCalibGainAnaIn22(uint16 u16_value)
Set Calibration Gain analog input 22.
Definition: adc1.h:6410
INLINE void ADC1_enCh12Int(void)
Enable Channel 12 Interrupt.
Definition: adc1.h:5116
INLINE void ADC1_setCalibGainAnaIn3(uint16 u16_value)
Set Calibration Gain analog input 3.
Definition: adc1.h:5942
void ADC1_setCmp2LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE uint16 ADC1_getCh1Result(void)
Get Result Value Channel 1.
Definition: adc1.h:4036
INLINE void ADC1_setSeq2Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1747
INLINE uint16 ADC1_getCalibGainAnaIn18(void)
Get Calibration Gain analog input 18.
Definition: adc1.h:6275
INLINE void ADC1_enCalibProtCh9(void)
Enable Calibration Protection Channel 9.
Definition: adc1.h:3564
INLINE void ADC1_enCalibCh21(void)
Enable Calibration Channel 21.
Definition: adc1.h:3354
INLINE void ADC1_enCalibProtCh14(void)
Enable Calibration Protection Channel 14.
Definition: adc1.h:3634
INLINE uint8 ADC1_getCh1ResultValidSts(void)
Get Result Valid Flag Channel 1.
Definition: adc1.h:4045
INLINE void ADC1_setCalibOffsAnaIn23(uint8 u8_value)
Set Calibration Offset analog input 23.
Definition: adc1.h:6428
INLINE void ADC1_enSeqSwShadowTrans(void)
Enable Sequence Shadow Transfer.
Definition: adc1.h:5844
uint8 ADC1_getEndOfConvSts(uint8 u8_seqIdx, uint8 u8_slotIdx)
Get End-of-Convertion status for selected sequence and slot.
Definition: adc1.c:762
INLINE uint8 ADC1_getSeq1TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1625
INLINE uint8 ADC1_getCmp3LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5549
INLINE uint8 ADC1_getCalibOffsAnaIn18(void)
Get Calibration Offset analog input 18.
Definition: adc1.h:6257
INLINE uint8 ADC1_getCmp2LoThSts(void)
Get Compare 2 Lower Threshold Status.
Definition: adc1.h:4540
INLINE void ADC1_setSeq2Slot1(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1861
INLINE void ADC1_setCalibGainAnaIn26(uint16 u16_value)
Set Calibration Gain analog input 26.
Definition: adc1.h:6554
INLINE uint8 ADC1_getCh10EndOfConvSts(void)
Get Channel 10 End Of Conversion Status.
Definition: adc1.h:2647
INLINE void ADC1_setCalibGainAnaIn5(uint16 u16_value)
Set Calibration Gain analog input 5.
Definition: adc1.h:5978
INLINE uint8 ADC1_getCmp2UpIntSts(void)
Get Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4432
INLINE void ADC1_enCalibCh4(void)
Enable Calibration Channel 4.
Definition: adc1.h:3116
void ADC1_setCmp3UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq1Slot1(void)
Get Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1693
INLINE uint8 ADC1_getCh7EndOfConvSts(void)
Get Channel 7 End Of Conversion Status.
Definition: adc1.h:2620
void ADC1_setSeq2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_disCalibCh12(void)
Disable Calibration Channel 12.
Definition: adc1.h:3235
INLINE void ADC1_setCh6Config(tADC1_CHCFGx s_value)
Set Channel 6 configuration.
Definition: adc1.h:2431
INLINE void ADC1_clrSeq3CollSts(void)
Clear Sequence 3 Collision Status.
Definition: adc1.h:2256
INLINE uint8 ADC1_getCurrChannel(void)
Get Current Channel under conversion.
Definition: adc1.h:2737
INLINE uint8 ADC1_getCh9EndOfConvSts(void)
Get Channel 9 End Of Conversion Status.
Definition: adc1.h:2638
INLINE uint16 ADC1_getCalibGainAnaIn16(void)
Get Calibration Gain analog input 16.
Definition: adc1.h:6203
INLINE void ADC1_setSeq3Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1924
INLINE uint8 ADC1_getFilter1Sts(void)
Get Filter 1 Event flag.
Definition: adc1.h:3935
INLINE void ADC1_clrCh17EndOfConvSts(void)
Clear Channel 17 End Of Conversion Status.
Definition: adc1.h:2863
INLINE void ADC1_setSeq0Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1393
INLINE void ADC1_enCalibProtCh10(void)
Enable Calibration Protection Channel 10.
Definition: adc1.h:3578
ADC1_Seq3Trig
Enumeration for the trigger source of the sequence 3.
Definition: adc1.h:294
INLINE uint8 ADC1_getCh15EndOfConvSts(void)
Get Channel 15 End Of Conversion Status.
Definition: adc1.h:2692
INLINE void ADC1_enSuspend(void)
Enable ADC1 Suspend.
Definition: adc1.h:1332
INLINE void ADC1_setFilter2Coeff(uint8 u8_value)
Set Filter 2 Coefficient.
Definition: adc1.h:3854
INLINE void ADC1_enCalibCh19(void)
Enable Calibration Channel 19.
Definition: adc1.h:3326
INLINE void ADC1_disCalibCh13(void)
Disable Calibration Channel 13.
Definition: adc1.h:3249
INLINE uint8 ADC1_getGateHwShadowTrans(void)
Get Gating Shadow Transfer Selection.
Definition: adc1.h:5747
INLINE void ADC1_enCh9Int(void)
Enable Channel 9 Interrupt.
Definition: adc1.h:5074
INLINE void ADC1_setCh14Config(tADC1_CHCFGx s_value)
Set Channel 14 configuration.
Definition: adc1.h:2503
INLINE void ADC1_disCalibCh26(void)
Disable Calibration Channel 26.
Definition: adc1.h:3431
INLINE void ADC1_enCalibProtCh19(void)
Enable Calibration Protection Channel 19.
Definition: adc1.h:3704
INLINE uint16 ADC1_getCh11Result(void)
Get Result Value Channel 11.
Definition: adc1.h:4216
INLINE void ADC1_disSeq1Int(void)
Disable Sequence 1 Interrupt.
Definition: adc1.h:4913
INLINE void ADC1_enCalibCh14(void)
Enable Calibration Channel 14.
Definition: adc1.h:3256
INLINE void ADC1_setFilter2Sts(void)
Set Filter 2 Event flag.
Definition: adc1.h:4002
INLINE uint8 ADC1_getSeq1Slot2(void)
Get Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1711
INLINE uint8 ADC1_getSeq3CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5657
INLINE void ADC1_disSeq0TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1480
INLINE void ADC1_disCalibProtCh3(void)
Disable Calibration Protection Channel 3.
Definition: adc1.h:3487
INLINE void ADC1_setCh17Config(tADC1_CHCFGx s_value)
Set Channel 17 configuration.
Definition: adc1.h:2530
INLINE void ADC1_disCh4Int(void)
Disable Channel 4 Interrupt.
Definition: adc1.h:5011
INLINE void ADC1_enCalibProtCh23(void)
Enable Calibration Protection Channel 23.
Definition: adc1.h:3760
INLINE uint8 ADC1_getGateSwShadowTrans(void)
Get Gating Software Shadow Transfer.
Definition: adc1.h:5837
INLINE void ADC1_enCalibProtCh24(void)
Enable Calibration Protection Channel 24.
Definition: adc1.h:3774
INLINE uint8 ADC1_getSeq3Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1933
INLINE void ADC1_disCalibProtCh1(void)
Disable Calibration Protection Channel 1.
Definition: adc1.h:3459
INLINE void ADC1_enSeq1WaitForReadInt(void)
Enable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5242
void ADC1_setSeq3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE uint8 ADC1_getFilter2Coeff(void)
Get Filter 2 Coefficient.
Definition: adc1.h:3863
INLINE void ADC1_disCh18Int(void)
Disable Channel 18 Interrupt.
Definition: adc1.h:5207
INLINE uint8 ADC1_getSeqSwShadowTrans(void)
Get Sequence Software Shadow Transfer.
Definition: adc1.h:5805
INLINE void ADC1_setSeq0WaitForRead(void)
Set Sequence 0 Wait for Read Status.
Definition: adc1.h:2291
INLINE void ADC1_enSeq3WaitForReadInt(void)
Enable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5270
INLINE void ADC1_enSeq0CollInt(void)
Enable Sequence 0 Collision Detection Interrupt.
Definition: adc1.h:5284
INLINE uint16 ADC1_getCh15Result(void)
Get Result Value Channel 15.
Definition: adc1.h:4288
INLINE void ADC1_disSeq3CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1947
INLINE void ADC1_disCh3Int(void)
Disable Channel 3 Interrupt.
Definition: adc1.h:4997
INLINE uint8 ADC1_getSeq2IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5612
void ADC1_setCmp2UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_disSeqHwShadowTrans(void)
Disable Sequence Shadow Transfer Selection.
Definition: adc1.h:5761
INLINE void ADC1_disCalibCh2(void)
Disable Calibration Channel 2.
Definition: adc1.h:3095
INLINE uint16 ADC1_getCalibGainAnaIn13(void)
Get Calibration Gain analog input 13.
Definition: adc1.h:6131
INLINE uint8 ADC1_getFilter3Sts(void)
Get Filter 3 Event flag.
Definition: adc1.h:3953
INLINE uint16 ADC1_getCh6Result(void)
Get Result Value Channel 6.
Definition: adc1.h:4126
INLINE uint8 ADC1_getSeq1Slot3(void)
Get Channel Select for Sequence 1 Slot 3.
Definition: adc1.h:1729
INLINE void ADC1_disSeq2TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1834
INLINE uint8 ADC1_getFilter0Sts(void)
Get Filter 0 Event flag.
Definition: adc1.h:3926
enum ADC1_Seq1Trig tADC1_Seq1Trig
INLINE uint8 ADC1_getCh3IntNodePtr(void)
Get Channel 3 Interrupt Node Pointer.
Definition: adc1.h:5369
INLINE void ADC1_disCalibProtCh12(void)
Disable Calibration Protection Channel 12.
Definition: adc1.h:3613
void ADC1_setCh12IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 12 Interrupt Node Pointer.
INLINE uint16 ADC1_getCalibGainAnaIn19(void)
Get Calibration Gain analog input 19.
Definition: adc1.h:6311
INLINE void ADC1_setCh13Config(tADC1_CHCFGx s_value)
Set Channel 13 configuration.
Definition: adc1.h:2494
INLINE uint8 ADC1_getSeq2GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1820
void ADC1_setCh0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 0 Interrupt Node Pointer.
INLINE void ADC1_setCmp1UpIntSts(void)
Set Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4675
INLINE uint8 ADC1_getSeq1IntSts(void)
Get Sequence 1 Interrupt Status.
Definition: adc1.h:2173
INLINE uint8 ADC1_getSeq1CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5639
INLINE uint8 ADC1_getCh2IntNodePtr(void)
Get Channel 2 Interrupt Node Pointer.
Definition: adc1.h:5360
INLINE void ADC1_setCmp2Config(tADC1_CMPCFGx s_value)
Set Compare Channel 2 configuration.
Definition: adc1.h:4396
INLINE uint8 ADC1_getSeq3CollSts(void)
Get Sequence 3 Collision Status.
Definition: adc1.h:2155
INLINE void ADC1_enCh11Int(void)
Enable Channel 11 Interrupt.
Definition: adc1.h:5102
INLINE uint8 ADC1_getCmp2UpThSts(void)
Get Compare 2 Upper Threshold Status.
Definition: adc1.h:4468
INLINE uint8 ADC1_getSeq0Slot0(void)
Get Channel Select for Sequence 0 Slot 0.
Definition: adc1.h:1498
INLINE void ADC1_enCalibProtCh25(void)
Enable Calibration Protection Channel 25.
Definition: adc1.h:3788
enum ADC1_Seq2Trig tADC1_Seq2Trig
INLINE void ADC1_setCh1EndOfConvSts(void)
Set Channel 1 End Of Conversion Status.
Definition: adc1.h:2891
INLINE void ADC1_enCh14Int(void)
Enable Channel 14 Interrupt.
Definition: adc1.h:5144
INLINE void ADC1_disCh19Int(void)
Disable Channel 19 Interrupt.
Definition: adc1.h:5221
INLINE void ADC1_setCalibOffsAnaIn25(uint8 u8_value)
Set Calibration Offset analog input 25.
Definition: adc1.h:6500
INLINE void ADC1_disCalibProtCh17(void)
Disable Calibration Protection Channel 17.
Definition: adc1.h:3683
INLINE void ADC1_disCmp0UpInt(void)
Disable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:4787
void ADC1_setSeq2WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh6(void)
Disable Calibration Protection Channel 6.
Definition: adc1.h:3529
INLINE void ADC1_disCalibCh9(void)
Disable Calibration Channel 9.
Definition: adc1.h:3193
INLINE uint8 ADC1_getSuspendMode(void)
Get Suspend Mode.
Definition: adc1.h:1357
INLINE uint16 ADC1_getCh8Result(void)
Get Result Value Channel 8.
Definition: adc1.h:4162
void ADC1_setCh11IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 11 Interrupt Node Pointer.
void ADC1_setSeq0WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq0IntSts(void)
Get Sequence 0 Interrupt Status.
Definition: adc1.h:2164
INLINE void ADC1_disCmp2LoInt(void)
Disable Compare 2 Lower Threshold Interrupt.
Definition: adc1.h:4871
INLINE void ADC1_enCh1Int(void)
Enable Channel 1 Interrupt.
Definition: adc1.h:4962
INLINE void ADC1_setCalibGainAnaIn1(uint16 u16_value)
Set Calibration Gain analog input 1.
Definition: adc1.h:5906
INLINE void ADC1_enCalibCh17(void)
Enable Calibration Channel 17.
Definition: adc1.h:3298
INLINE void ADC1_setCh9Config(tADC1_CHCFGx s_value)
Set Channel 9 configuration.
Definition: adc1.h:2458
INLINE void ADC1_setCh10Config(tADC1_CHCFGx s_value)
Set Channel 10 configuration.
Definition: adc1.h:2467
INLINE void ADC1_setCalibGainAnaIn19(uint16 u16_value)
Set Calibration Gain analog input 19.
Definition: adc1.h:6302
INLINE void ADC1_enCalibProtCh5(void)
Enable Calibration Protection Channel 5.
Definition: adc1.h:3508
INLINE uint8 ADC1_getSeq3IntNodePtr(void)
Get Sequence Interrupt Node Pointer.
Definition: adc1.h:5621
INLINE void ADC1_clrCmp2LoThSts(void)
Clear Compare 2 Lower Threshold Status.
Definition: adc1.h:4654
INLINE uint16 ADC1_getCh0Result(void)
Get Result Value Channel 0.
Definition: adc1.h:4018
INLINE void ADC1_enCalibCh9(void)
Enable Calibration Channel 9.
Definition: adc1.h:3186
INLINE uint16 ADC1_getCh17Result(void)
Get Result Value Channel 17.
Definition: adc1.h:4324
INLINE void ADC1_disCalibCh23(void)
Disable Calibration Channel 23.
Definition: adc1.h:3389
INLINE void ADC1_setCalibOffsAnaIn24(uint8 u8_value)
Set Calibration Offset analog input 24.
Definition: adc1.h:6464
INLINE uint8 ADC1_getSeq2Repetition(void)
Get Sequence repetition.
Definition: adc1.h:1756
INLINE void ADC1_enCalibCh8(void)
Enable Calibration Channel 8.
Definition: adc1.h:3172
INLINE uint8 ADC1_getCalibOffsAnaIn3(void)
Get Calibration Offset analog input 3.
Definition: adc1.h:5933
INLINE void ADC1_clrFilter2Sts(void)
Clear Filter 2 Event flag.
Definition: adc1.h:3974
INLINE void ADC1_disCalibCh3(void)
Disable Calibration Channel 3.
Definition: adc1.h:3109
INLINE void ADC1_setCh11Config(tADC1_CHCFGx s_value)
Set Channel 11 configuration.
Definition: adc1.h:2476
INLINE void ADC1_setGateHwShadowTrans(uint8 u8_value)
Set Gating Shadow Transfer Selection.
Definition: adc1.h:5738
INLINE uint16 ADC1_getCalibGainAnaIn26(void)
Get Calibration Gain analog input 26.
Definition: adc1.h:6563
INLINE void ADC1_setSeq1GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1634
INLINE uint8 ADC1_getCalibOffsAnaIn9(void)
Get Calibration Offset analog input 9.
Definition: adc1.h:6041
INLINE void ADC1_setSeq1TriggerSelect(tADC1_Seq1Trig e_Seq1Trig)
Set Trigger Select.
Definition: adc1.h:1616
INLINE uint8 ADC1_getCmp0LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5522
void ADC1_setCh2IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 2 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh16(void)
Disable Calibration Protection Channel 16.
Definition: adc1.h:3669
INLINE void ADC1_enCalibProtCh0(void)
Enable Calibration Protection Channel 0.
Definition: adc1.h:3438
INLINE void ADC1_clrSeq0WaitForRead(void)
Clear Sequence 0 Wait for Read Status.
Definition: adc1.h:2207
INLINE void ADC1_setCh9EndOfConvSts(void)
Set Channel 9 End Of Conversion Status.
Definition: adc1.h:2947
INLINE void ADC1_setSeq1Slot0(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1666
INLINE uint8 ADC1_getSeq1WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5675
INLINE uint16 ADC1_getFilter2Result(void)
Get Result Value Filter 2.
Definition: adc1.h:3908
INLINE void ADC1_setFilter0Coeff(uint8 u8_value)
Set Filter 0 Coefficient.
Definition: adc1.h:3818
INLINE void ADC1_clrSeq1CollSts(void)
Clear Sequence 1 Collision Status.
Definition: adc1.h:2242
INLINE void ADC1_clrSeq2WaitForRead(void)
Clear Sequence 2 Wait for Read Status.
Definition: adc1.h:2221
INLINE uint8 ADC1_getCh5EndOfConvSts(void)
Get Channel 5 End Of Conversion Status.
Definition: adc1.h:2602
INLINE void ADC1_disSeq3CollInt(void)
Disable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5333
INLINE void ADC1_disSeq3WaitForReadInt(void)
Disable Sequence 3 Wait for Read Interrupt.
Definition: adc1.h:5277
INLINE uint8 ADC1_getCh10ResultValidSts(void)
Get Result Valid Flag Channel 10.
Definition: adc1.h:4207
INLINE void ADC1_setCmp2UpThSts(void)
Set Compare 2 Upper Threshold Status.
Definition: adc1.h:4710
INLINE void ADC1_setTriggHwShadowTrans(uint8 u8_value)
Set Trigger Shadow Transfer Selection.
Definition: adc1.h:5720
INLINE void ADC1_disCalibProtCh8(void)
Disable Calibration Protection Channel 8.
Definition: adc1.h:3557
sint8 ADC1_getSeqResult_mV(uint16 *u16p_digValue_mV, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register in mV of the selected slot in the sequencer and retu...
Definition: adc1.c:597
INLINE void ADC1_setCalibGainAnaIn21(uint16 u16_value)
Set Calibration Gain analog input 21.
Definition: adc1.h:6374
INLINE void ADC1_enSeq2CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1763
INLINE void ADC1_setCh18EndOfConvSts(void)
Set Channel 18 End Of Conversion Status.
Definition: adc1.h:3010
INLINE void ADC1_setCh2EndOfConvSts(void)
Set Channel 2 End Of Conversion Status.
Definition: adc1.h:2898
void ADC1_setSeq3CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_setSeq0GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1457
INLINE uint16 ADC1_getCh2Result(void)
Get Result Value Channel 2.
Definition: adc1.h:4054
INLINE void ADC1_enCh18Int(void)
Enable Channel 18 Interrupt.
Definition: adc1.h:5200
INLINE uint8 ADC1_getCh8EndOfConvSts(void)
Get Channel 8 End Of Conversion Status.
Definition: adc1.h:2629
INLINE void ADC1_disCh14Int(void)
Disable Channel 14 Interrupt.
Definition: adc1.h:5151
INLINE uint8 ADC1_getSeq0Slot1(void)
Get Channel Select for Sequence 0 Slot 1.
Definition: adc1.h:1516
INLINE uint8 ADC1_getCh12EndOfConvSts(void)
Get Channel 12 End Of Conversion Status.
Definition: adc1.h:2665
void ADC1_setCmp1UpIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Up Interrupt Node Pointer.
INLINE void ADC1_setConvClass2Config(tADC1_CONVCFGx s_value)
Set Conversion Class 2.
Definition: adc1.h:3044
INLINE void ARVG_enVAREFOvercurrentInt(void)
Enable VAREF Overcurrent Interrupt.
Definition: adc1.h:6584
INLINE void ADC1_clrCh8EndOfConvSts(void)
Clear Channel 8 End Of Conversion Status.
Definition: adc1.h:2800
INLINE void ADC1_clrCmp3LoThSts(void)
Clear Compare 3 Lower Threshold Status.
Definition: adc1.h:4661
INLINE void ADC1_setCh12Config(tADC1_CHCFGx s_value)
Set Channel 12 configuration.
Definition: adc1.h:2485
INLINE void ADC1_disSeq0WaitForReadInt(void)
Disable Sequence 0 Wait for Read Interrupt.
Definition: adc1.h:5235
INLINE void ADC1_setSeq1WaitForRead(void)
Set Sequence 1 Wait for Read Status.
Definition: adc1.h:2298
union ADC1_SQSLOTx tADC1_SQSLOTx
INLINE void ADC1_setCmp1LoThSts(void)
Set Compare 1 Lower Threshold Status.
Definition: adc1.h:4759
INLINE void ADC1_clrCh4EndOfConvSts(void)
Clear Channel 4 End Of Conversion Status.
Definition: adc1.h:2772
INLINE uint8 ADC1_getCmp3UpIntSts(void)
Get Compare 3 Upper Threshold Interrupt Status.
Definition: adc1.h:4441
INLINE void ADC1_setCmp1Config(tADC1_CMPCFGx s_value)
Set Compare Channel 1 configuration.
Definition: adc1.h:4387
INLINE void ADC1_setCmp2LoIntSts(void)
Set Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4738
INLINE uint8 ADC1_getSeq3WaitForRead(void)
Get Sequence 3 Wait for Read Status.
Definition: adc1.h:2119
INLINE void ADC1_disSeq3TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:2011
INLINE uint8 ADC1_getCalibOffsAnaIn5(void)
Get Calibration Offset analog input 5.
Definition: adc1.h:5969
INLINE uint8 ADC1_getCh19IntNodePtr(void)
Get Channel 19 Interrupt Node Pointer.
Definition: adc1.h:5513
INLINE uint8 ADC1_getCh16IntNodePtr(void)
Get Channel 16 Interrupt Node Pointer.
Definition: adc1.h:5486
INLINE uint8 ADC1_getCh8IntNodePtr(void)
Get Channel 8 Interrupt Node Pointer.
Definition: adc1.h:5414
INLINE uint8 ADC1_getSeq2CollSts(void)
Get Sequence 2 Collision Status.
Definition: adc1.h:2146
INLINE uint8 ADC1_getCalibOffsAnaIn26(void)
Get Calibration Offset analog input 26.
Definition: adc1.h:6545
INLINE uint8 ADC1_getCh3ResultValidSts(void)
Get Result Valid Flag Channel 3.
Definition: adc1.h:4081
INLINE void ADC1_clrFilter3Sts(void)
Clear Filter 3 Event flag.
Definition: adc1.h:3981
INLINE void ADC1_setSeq2Slot2(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1879
INLINE uint8 ADC1_getCh19EndOfConvSts(void)
Get Channel 19 End Of Conversion Status.
Definition: adc1.h:2728
INLINE void ADC1_enCmp1UpInt(void)
Enable Compare 1 Upper Threshold Interrupt.
Definition: adc1.h:4794
INLINE void ADC1_disCmp3UpInt(void)
Disable Compare 3 Upper Threshold Interrupt.
Definition: adc1.h:4829
INLINE void ADC1_enSeq3WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1954
INLINE uint8 ADC1_getCalibOffsAnaIn13(void)
Get Calibration Offset analog input 13.
Definition: adc1.h:6113
INLINE void ADC1_setSeq1CollSts(void)
Set Sequence 1 Collision Status.
Definition: adc1.h:2326
INLINE uint8 ADC1_getCh0EndOfConvSts(void)
Get Channel 0 End Of Conversion Status.
Definition: adc1.h:2557
INLINE void ADC1_setCh11EndOfConvSts(void)
Set Channel 11 End Of Conversion Status.
Definition: adc1.h:2961
INLINE void ADC1_enCalibProtCh11(void)
Enable Calibration Protection Channel 11.
Definition: adc1.h:3592
INLINE void ADC1_enCmp0LoInt(void)
Enable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:4836
INLINE uint8 ADC1_getSeq1WaitForRead(void)
Get Sequence 1 Wait for Read Status.
Definition: adc1.h:2101
INLINE void ADC1_disCalibCh1(void)
Disable Calibration Channel 1.
Definition: adc1.h:3081
INLINE void ADC1_enCalibCh23(void)
Enable Calibration Channel 23.
Definition: adc1.h:3382
INLINE void ADC1_enCh16Int(void)
Enable Channel 16 Interrupt.
Definition: adc1.h:5172
INLINE uint8 ADC1_getCh11EndOfConvSts(void)
Get Channel 11 End Of Conversion Status.
Definition: adc1.h:2656
INLINE uint16 ADC1_getCh14Result(void)
Get Result Value Channel 14.
Definition: adc1.h:4270
INLINE void ADC1_enCalibProtCh26(void)
Enable Calibration Protection Channel 26.
Definition: adc1.h:3802
INLINE void ADC1_setCalibOffsAnaIn1(uint8 u8_value)
Set Calibration Offset analog input 1.
Definition: adc1.h:5888
INLINE void ADC1_setSeq0Slot3(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1543
INLINE void ADC1_enCalibProtCh8(void)
Enable Calibration Protection Channel 8.
Definition: adc1.h:3550
INLINE uint8 ADC1_getSeq0WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5666
INLINE void ADC1_setCalibGainAnaIn18(uint16 u16_value)
Set Calibration Gain analog input 18.
Definition: adc1.h:6266
INLINE void ADC1_setCmp0Config(tADC1_CMPCFGx s_value)
Set Compare Channel 0 configuration.
Definition: adc1.h:4378
INLINE uint8 ADC1_getSeq3Slot1(void)
Get Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2047
INLINE void ADC1_enSeq3CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1940
INLINE void ADC1_enCalibProtCh15(void)
Enable Calibration Protection Channel 15.
Definition: adc1.h:3648
INLINE void ADC1_disSeqSwShadowTrans(void)
Disable Sequence Shadow Transfer.
Definition: adc1.h:5851
void ADC1_setCmp0LoIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Compare Lo Interrupt Node Pointer.
INLINE void ADC1_setCh7EndOfConvSts(void)
Set Channel 7 End Of Conversion Status.
Definition: adc1.h:2933
INLINE void ADC1_clrSeq1WaitForRead(void)
Clear Sequence 1 Wait for Read Status.
Definition: adc1.h:2214
INLINE void ADC1_enCmp1LoInt(void)
Enable Compare 1 Lower Threshold Interrupt.
Definition: adc1.h:4850
INLINE void ADC1_disCalibProtCh14(void)
Disable Calibration Protection Channel 14.
Definition: adc1.h:3641
INLINE void ADC1_clrCmp1UpIntSts(void)
Clear Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4563
INLINE void ADC1_disCh1Int(void)
Disable Channel 1 Interrupt.
Definition: adc1.h:4969
INLINE uint16 ADC1_getCalibGainAnaIn9(void)
Get Calibration Gain analog input 9.
Definition: adc1.h:6059
INLINE void ADC1_enSeq1CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1586
INLINE uint8 ADC1_getCh17ResultValidSts(void)
Get Result Valid Flag Channel 17.
Definition: adc1.h:4333
INLINE uint16 ADC1_getFilter1Result(void)
Get Result Value Filter 1.
Definition: adc1.h:3899
INLINE uint16 ADC1_getCalibGainAnaIn15(void)
Get Calibration Gain analog input 15.
Definition: adc1.h:6167
INLINE void ADC1_setFilter0Sts(void)
Set Filter 0 Event flag.
Definition: adc1.h:3988
INLINE void ADC1_disSeq1TriggerGate(void)
Disable Trigger Software Gating.
Definition: adc1.h:1657
INLINE uint8 ADC1_getCh10IntNodePtr(void)
Get Channel 10 Interrupt Node Pointer.
Definition: adc1.h:5432
INLINE void ADC1_setSeq1Slot2(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 2.
Definition: adc1.h:1702
INLINE uint16 ADC1_getCh9Result(void)
Get Result Value Channel 9.
Definition: adc1.h:4180
INLINE uint8 ADC1_getCh18EndOfConvSts(void)
Get Channel 18 End Of Conversion Status.
Definition: adc1.h:2719
INLINE uint8 ADC1_getSeq2Slot1(void)
Get Channel Select for Sequence 2 Slot 1.
Definition: adc1.h:1870
sint8 ADC1_getChFiltResult_mV(uint16 *u16p_filtDigValue_mV, uint8 u8_channel)
Get the value of the ADC1 Filter Result Register of the selected ADC1 channel in millivolt (mV) and r...
Definition: adc1.c:429
INLINE void ADC1_setCalibOffsAnaIn13(uint8 u8_value)
Set Calibration Offset analog input 13.
Definition: adc1.h:6104
INLINE void ADC1_disCalibProtCh21(void)
Disable Calibration Protection Channel 21.
Definition: adc1.h:3739
INLINE uint8 ADC1_getCh19ResultValidSts(void)
Get Result Valid Flag Channel 19.
Definition: adc1.h:4369
ADC1_Seq2Trig
Enumeration for the trigger source of the sequence 2.
Definition: adc1.h:277
INLINE void ADC1_disCh12Int(void)
Disable Channel 12 Interrupt.
Definition: adc1.h:5123
INLINE void ADC1_disCh17Int(void)
Disable Channel 17 Interrupt.
Definition: adc1.h:5193
INLINE void ADC1_setCh18Config(tADC1_CHCFGx s_value)
Set Channel 18 configuration.
Definition: adc1.h:2539
INLINE void ADC1_enSeq2TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1827
void ADC1_setCh9IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 9 Interrupt Node Pointer.
INLINE void ADC1_setCalibGainAnaIn13(uint16 u16_value)
Set Calibration Gain analog input 13.
Definition: adc1.h:6122
INLINE uint8 ADC1_getCmp1LoIntNodePtr(void)
Get Compare Lo Interrupt Node Pointer.
Definition: adc1.h:5531
INLINE uint16 ADC1_getCalibGainAnaIn5(void)
Get Calibration Gain analog input 5.
Definition: adc1.h:5987
INLINE void ADC1_setCh6EndOfConvSts(void)
Set Channel 6 End Of Conversion Status.
Definition: adc1.h:2926
INLINE void ADC1_clrCh0EndOfConvSts(void)
Clear Channel 0 End Of Conversion Status.
Definition: adc1.h:2744
INLINE void ADC1_disSeq3Int(void)
Disable Sequence 3 Interrupt.
Definition: adc1.h:4941
INLINE void ADC1_enSeq0CollisionDetect(void)
Enable Collision Config.
Definition: adc1.h:1409
INLINE uint8 ADC1_getSeq0GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1466
INLINE void ADC1_setCh12EndOfConvSts(void)
Set Channel 12 End Of Conversion Status.
Definition: adc1.h:2968
INLINE void ADC1_disTriggSwShadowTrans(void)
Disable Trigger Shadow Transfer.
Definition: adc1.h:5865
INLINE void ADC1_disCalibProtCh26(void)
Disable Calibration Protection Channel 26.
Definition: adc1.h:3809
INLINE uint8 ADC1_getCalibOffsAnaIn21(void)
Get Calibration Offset analog input 21.
Definition: adc1.h:6365
INLINE void ADC1_enCmp0UpInt(void)
Enable Compare 0 Upper Threshold Interrupt.
Definition: adc1.h:4780
INLINE void ADC1_clrCh11EndOfConvSts(void)
Clear Channel 11 End Of Conversion Status.
Definition: adc1.h:2821
INLINE void ADC1_enCalibCh11(void)
Enable Calibration Channel 11.
Definition: adc1.h:3214
INLINE void ARVG_enVAREF(void)
Enable VAREF.
Definition: adc1.h:6570
INLINE void ADC1_setCmp3LoIntSts(void)
Set Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4745
INLINE void ADC1_disCalibCh4(void)
Disable Calibration Channel 4.
Definition: adc1.h:3123
INLINE void ARVG_clrVAREFOvercurrentIntSts(void)
Clear VAREF Overcurrent Interrupt Status.
Definition: adc1.h:6616
INLINE void ADC1_enGateSwShadowTrans(void)
Enable Gating Shadow Transfer.
Definition: adc1.h:5872
INLINE void ADC1_disCh2Int(void)
Disable Channel 2 Interrupt.
Definition: adc1.h:4983
INLINE uint8 ADC1_getCmp0LoIntSts(void)
Get Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4486
INLINE uint16 ADC1_getCalibGainAnaIn21(void)
Get Calibration Gain analog input 21.
Definition: adc1.h:6383
INLINE void ADC1_setCh5Config(tADC1_CHCFGx s_value)
Set Channel 5 configuration.
Definition: adc1.h:2422
INLINE void ADC1_enCalibCh7(void)
Enable Calibration Channel 7.
Definition: adc1.h:3158
INLINE uint16 ADC1_getCalibGainAnaIn22(void)
Get Calibration Gain analog input 22.
Definition: adc1.h:6419
INLINE void ADC1_enCalibCh12(void)
Enable Calibration Channel 12.
Definition: adc1.h:3228
INLINE uint8 ADC1_getCh17EndOfConvSts(void)
Get Channel 17 End Of Conversion Status.
Definition: adc1.h:2710
INLINE uint8 ADC1_getCh4IntNodePtr(void)
Get Channel 4 Interrupt Node Pointer.
Definition: adc1.h:5378
INLINE void ADC1_setCalibGainAnaIn24(uint16 u16_value)
Set Calibration Gain analog input 24.
Definition: adc1.h:6482
INLINE void ADC1_setCalibGainAnaIn16(uint16 u16_value)
Set Calibration Gain analog input 16.
Definition: adc1.h:6194
INLINE uint8 ADC1_getSeq2Slot0(void)
Get Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1852
INLINE void ADC1_disCalibCh17(void)
Disable Calibration Channel 17.
Definition: adc1.h:3305
INLINE void ADC1_disCalibProtCh11(void)
Disable Calibration Protection Channel 11.
Definition: adc1.h:3599
INLINE void ADC1_setClockDiv(uint8 u8_value)
Set Clock Divider Settings.
Definition: adc1.h:1316
INLINE void ADC1_setSeq1Repetition(uint8 u8_value)
Set Sequence repetition.
Definition: adc1.h:1570
INLINE void ADC1_disCalibCh24(void)
Disable Calibration Channel 24.
Definition: adc1.h:3403
INLINE uint16 ADC1_getCh5Result(void)
Get Result Value Channel 5.
Definition: adc1.h:4108
INLINE void ADC1_clrCh12EndOfConvSts(void)
Clear Channel 12 End Of Conversion Status.
Definition: adc1.h:2828
INLINE uint8 ADC1_getSeq2Slot3(void)
Get Channel Select for Sequence 2 Slot 3.
Definition: adc1.h:1906
INLINE void ADC1_enCalibCh22(void)
Enable Calibration Channel 22.
Definition: adc1.h:3368
void ADC1_setSeq2CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCh16Int(void)
Disable Channel 16 Interrupt.
Definition: adc1.h:5179
INLINE uint8 ADC1_getClockDiv(void)
Get Clock Divider Settings.
Definition: adc1.h:1325
INLINE uint8 ADC1_getFilter2Sts(void)
Get Filter 2 Event flag.
Definition: adc1.h:3944
INLINE uint8 ADC1_getCh1IntNodePtr(void)
Get Channel 1 Interrupt Node Pointer.
Definition: adc1.h:5351
INLINE void ADC1_clrCh13EndOfConvSts(void)
Clear Channel 13 End Of Conversion Status.
Definition: adc1.h:2835
INLINE void ADC1_clrSeq3IntSts(void)
Clear Sequence 3 Interrupt Status.
Definition: adc1.h:2284
void ADC1_setSeq0IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
enum ADC1_Seq3Trig tADC1_Seq3Trig
INLINE void ADC1_disTriggHwShadowTrans(void)
Disable Trigger Shadow Transfer Selection.
Definition: adc1.h:5775
INLINE void ADC1_disCalibCh25(void)
Disable Calibration Channel 25.
Definition: adc1.h:3417
void ADC1_setSeq0CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_disCalibCh11(void)
Disable Calibration Channel 11.
Definition: adc1.h:3221
INLINE void ADC1_clrCmp2LoIntSts(void)
Clear Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4626
INLINE void ADC1_setSeq3Slot1(uint8 u8_value)
Set Channel Select for Sequence 3 Slot 1.
Definition: adc1.h:2038
INLINE uint8 ADC1_getSeq0Slot3(void)
Get Channel Select for Sequence 0 Slot 3.
Definition: adc1.h:1552
INLINE void ADC1_disCalibProtCh15(void)
Disable Calibration Protection Channel 15.
Definition: adc1.h:3655
INLINE void ADC1_setCmp1UpThSts(void)
Set Compare 1 Upper Threshold Status.
Definition: adc1.h:4703
INLINE void ADC1_disGateHwShadowTrans(void)
Disable Gating Shadow Transfer Selection.
Definition: adc1.h:5789
void ADC1_setCh3IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 3 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh17(void)
Enable Calibration Protection Channel 17.
Definition: adc1.h:3676
INLINE void ADC1_setCmp0LoThSts(void)
Set Compare 0 Lower Threshold Status.
Definition: adc1.h:4752
INLINE void ADC1_setCmp3Config(tADC1_CMPCFGx s_value)
Set Compare Channel 3 configuration.
Definition: adc1.h:4405
INLINE void ADC1_clrCh2EndOfConvSts(void)
Clear Channel 2 End Of Conversion Status.
Definition: adc1.h:2758
INLINE void ADC1_setCalibGainAnaIn9(uint16 u16_value)
Set Calibration Gain analog input 9.
Definition: adc1.h:6050
INLINE uint8 ADC1_getSeq1CollSts(void)
Get Sequence 1 Collision Status.
Definition: adc1.h:2137
INLINE void ADC1_setSeq2WaitForRead(void)
Set Sequence 2 Wait for Read Status.
Definition: adc1.h:2305
INLINE uint16 ADC1_getCh12Result(void)
Get Result Value Channel 12.
Definition: adc1.h:4234
INLINE void ADC1_clrCmp2UpIntSts(void)
Clear Compare 2 Upper Threshold Interrupt Status.
Definition: adc1.h:4570
INLINE void ADC1_setSeq2Config(tADC1_SQCFGx s_value)
Set Sequence 2 configuration.
Definition: adc1.h:1738
INLINE void ADC1_clrCh16EndOfConvSts(void)
Clear Channel 16 End Of Conversion Status.
Definition: adc1.h:2856
void ADC1_setCh5IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 5 Interrupt Node Pointer.
INLINE uint8 ADC1_getCh2EndOfConvSts(void)
Get Channel 2 End Of Conversion Status.
Definition: adc1.h:2575
INLINE void ADC1_disCh0Int(void)
Disable Channel 0 Interrupt.
Definition: adc1.h:4955
sint8 ADC1_startSequence(uint8 u8_seqIdx)
Start the conversion of a sequence by software.
Definition: adc1.c:698
INLINE void ADC1_clrCmp0UpIntSts(void)
Clear Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4556
INLINE void ADC1_disSeq1WaitForReadInt(void)
Disable Sequence 1 Wait for Read Interrupt.
Definition: adc1.h:5249
INLINE uint8 ADC1_getCmp1UpIntSts(void)
Get Compare 1 Upper Threshold Interrupt Status.
Definition: adc1.h:4423
INLINE uint8 ADC1_getSeq0Slot2(void)
Get Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1534
INLINE uint8 ADC1_getFilter1Coeff(void)
Get Filter 1 Coefficient.
Definition: adc1.h:3845
INLINE void ADC1_enSeq3CollInt(void)
Enable Sequence 3 Collision Detection Interrupt.
Definition: adc1.h:5326
INLINE void ADC1_setCh16Config(tADC1_CHCFGx s_value)
Set Channel 16 configuration.
Definition: adc1.h:2521
INLINE uint8 ADC1_getSeq0CollIntNodePtr(void)
Get Collision Interrupt Node Pointer.
Definition: adc1.h:5630
INLINE void ADC1_enSeq2WaitForReadInt(void)
Enable Sequence 2 Wait for Read Interrupt.
Definition: adc1.h:5256
INLINE void ADC1_disCh15Int(void)
Disable Channel 15 Interrupt.
Definition: adc1.h:5165
INLINE void ADC1_setSeq0TriggerSelect(tADC1_Seq0Trig e_Seq0Trig)
Set Trigger Select.
Definition: adc1.h:1439
INLINE void ADC1_enSeq3TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:2004
INLINE void ADC1_setCmp3LoThSts(void)
Set Compare 3 Lower Threshold Status.
Definition: adc1.h:4773
INLINE void ADC1_clrCh19EndOfConvSts(void)
Clear Channel 19 End Of Conversion Status.
Definition: adc1.h:2877
INLINE void ADC1_enCalibProtCh7(void)
Enable Calibration Protection Channel 7.
Definition: adc1.h:3536
INLINE uint8 ADC1_getCmp1UpThSts(void)
Get Compare 1 Upper Threshold Status.
Definition: adc1.h:4459
INLINE uint8 ADC1_getSuspendSts(void)
Get Suspend Mode Status.
Definition: adc1.h:1366
INLINE uint8 ADC1_getCh18IntNodePtr(void)
Get Channel 18 Interrupt Node Pointer.
Definition: adc1.h:5504
INLINE void ADC1_setCh16EndOfConvSts(void)
Set Channel 16 End Of Conversion Status.
Definition: adc1.h:2996
void ADC1_setCh13IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 13 Interrupt Node Pointer.
void ADC1_setCh10IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 10 Interrupt Node Pointer.
ADC1_Seq1Trig
Enumeration for the trigger source of the sequence 1.
Definition: adc1.h:260
union ADC1_SQCFGx tADC1_SQCFGx
INLINE void ADC1_disCalibProtCh20(void)
Disable Calibration Protection Channel 20.
Definition: adc1.h:3725
INLINE uint8 ADC1_getCurrSeq(void)
Get Actual Sequence processed.
Definition: adc1.h:2200
INLINE void ADC1_setSeq1Config(tADC1_SQCFGx s_value)
Set Sequence 1 configuration.
Definition: adc1.h:1561
INLINE void ADC1_enCh2Int(void)
Enable Channel 2 Interrupt.
Definition: adc1.h:4976
INLINE void ADC1_disCh9Int(void)
Disable Channel 9 Interrupt.
Definition: adc1.h:5081
INLINE uint8 ADC1_getCalibOffsAnaIn16(void)
Get Calibration Offset analog input 16.
Definition: adc1.h:6185
INLINE void ADC1_clrFilter0Sts(void)
Clear Filter 0 Event flag.
Definition: adc1.h:3960
INLINE void ADC1_setFilter1Coeff(uint8 u8_value)
Set Filter 1 Coefficient.
Definition: adc1.h:3836
INLINE uint8 ADC1_getCh8ResultValidSts(void)
Get Result Valid Flag Channel 8.
Definition: adc1.h:4171
INLINE uint8 ADC1_getCmp2UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5576
INLINE uint8 ADC1_getCh13IntNodePtr(void)
Get Channel 13 Interrupt Node Pointer.
Definition: adc1.h:5459
INLINE void ADC1_setCh14EndOfConvSts(void)
Set Channel 14 End Of Conversion Status.
Definition: adc1.h:2982
INLINE void ADC1_setSuspendMode(uint8 u8_value)
Set Suspend Mode.
Definition: adc1.h:1348
INLINE void ADC1_setCh7Config(tADC1_CHCFGx s_value)
Set Channel 7 configuration.
Definition: adc1.h:2440
sint8 ADC1_getSeqResult(uint16 *u16p_DigValue, uint8 u8_seqIdx, uint8 u8_slotIdx)
Get the 14-bit value of the ADC1 Result Register of the selected slot in the sequencer and returns th...
Definition: adc1.c:495
INLINE uint16 ADC1_getFilter0Result(void)
Get Result Value Filter 0.
Definition: adc1.h:3890
INLINE void ADC1_setSeq2GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1811
INLINE void ADC1_clrSeq0IntSts(void)
Clear Sequence 0 Interrupt Status.
Definition: adc1.h:2263
INLINE void ADC1_enCh8Int(void)
Enable Channel 8 Interrupt.
Definition: adc1.h:5060
INLINE void ADC1_clrCh15EndOfConvSts(void)
Clear Channel 15 End Of Conversion Status.
Definition: adc1.h:2849
INLINE void ADC1_enCh0Int(void)
Enable Channel 0 Interrupt.
Definition: adc1.h:4948
enum ADC1_Seq0Trig tADC1_Seq0Trig
INLINE void ADC1_setConvClass3Config(tADC1_CONVCFGx s_value)
Set Conversion Class 3.
Definition: adc1.h:3053
INLINE void ADC1_setSeq0Config(tADC1_SQCFGx s_value)
Set Sequence 0 configuration.
Definition: adc1.h:1384
INLINE void ADC1_disCh8Int(void)
Disable Channel 8 Interrupt.
Definition: adc1.h:5067
INLINE void ADC1_setCh4Config(tADC1_CHCFGx s_value)
Set Channel 4 configuration.
Definition: adc1.h:2413
INLINE void ADC1_enCalibCh0(void)
Enable Calibration Channel 0.
Definition: adc1.h:3060
INLINE void ADC1_disCalibCh19(void)
Disable Calibration Channel 19.
Definition: adc1.h:3333
void ADC1_setCh8IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 8 Interrupt Node Pointer.
INLINE void ADC1_disCalibProtCh7(void)
Disable Calibration Protection Channel 7.
Definition: adc1.h:3543
INLINE void ADC1_enCalibProtCh22(void)
Enable Calibration Protection Channel 22.
Definition: adc1.h:3746
INLINE void ADC1_disSeq3WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1961
INLINE void ADC1_enCalibProtCh2(void)
Enable Calibration Protection Channel 2.
Definition: adc1.h:3466
sint8 ADC1_getChResult_mV(uint16 *u16p_digValue_mV, uint8 u8_channel)
Get the value of the ADC1 Result Register of the selected ADC1 channel in millivolt (mV)
Definition: adc1.c:307
INLINE uint16 ADC1_getCh18Result(void)
Get Result Value Channel 18.
Definition: adc1.h:4342
INLINE void ADC1_setSeq1Slot1(uint8 u8_value)
Set Channel Select for Sequence 1 Slot 1.
Definition: adc1.h:1684
INLINE uint8 ADC1_getCh6IntNodePtr(void)
Get Channel 6 Interrupt Node Pointer.
Definition: adc1.h:5396
INLINE void ADC1_disSeq2CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1770
INLINE uint8 ADC1_getCalibOffsAnaIn25(void)
Get Calibration Offset analog input 25.
Definition: adc1.h:6509
INLINE void ADC1_disGateSwShadowTrans(void)
Disable Gating Shadow Transfer.
Definition: adc1.h:5879
INLINE void ADC1_setCmp0UpThSts(void)
Set Compare 0 Upper Threshold Status.
Definition: adc1.h:4696
void ADC1_setSeq1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Sequence Interrupt Node Pointer.
INLINE void ADC1_setSeq3GatingSelect(uint8 u8_value)
Set Gating Select.
Definition: adc1.h:1988
INLINE void ADC1_setSeq3WaitForRead(void)
Set Sequence 3 Wait for Read Status.
Definition: adc1.h:2312
INLINE void ADC1_enCalibProtCh3(void)
Enable Calibration Protection Channel 3.
Definition: adc1.h:3480
INLINE void ADC1_disCalibProtCh19(void)
Disable Calibration Protection Channel 19.
Definition: adc1.h:3711
INLINE void ADC1_clrSeq2CollSts(void)
Clear Sequence 2 Collision Status.
Definition: adc1.h:2249
INLINE uint8 ADC1_getCh14IntNodePtr(void)
Get Channel 14 Interrupt Node Pointer.
Definition: adc1.h:5468
INLINE void ADC1_setSeq1IntSts(void)
Set Sequence 1 Interrupt Status.
Definition: adc1.h:2354
INLINE void ADC1_disSeq0CollisionDetect(void)
Disable Collision Config.
Definition: adc1.h:1416
INLINE uint16 ADC1_getCh13Result(void)
Get Result Value Channel 13.
Definition: adc1.h:4252
INLINE void ADC1_enGateHwShadowTrans(void)
Enable Gating Shadow Transfer Selection.
Definition: adc1.h:5782
INLINE uint8 ADC1_getSeq0TriggerSelect(void)
Get Trigger Select.
Definition: adc1.h:1448
INLINE void ADC1_clrCmp0LoIntSts(void)
Clear Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4612
INLINE uint16 ADC1_getCalibGainAnaIn11(void)
Get Calibration Gain analog input 11.
Definition: adc1.h:6095
INLINE uint8 ADC1_getSeq1Slot0(void)
Get Channel Select for Sequence 1 Slot 0.
Definition: adc1.h:1675
INLINE void ADC1_enCalibCh15(void)
Enable Calibration Channel 15.
Definition: adc1.h:3270
INLINE void ADC1_enCalibCh26(void)
Enable Calibration Channel 26.
Definition: adc1.h:3424
INLINE void ADC1_setCalibOffsAnaIn18(uint8 u8_value)
Set Calibration Offset analog input 18.
Definition: adc1.h:6248
INLINE uint16 ADC1_getFilter3Result(void)
Get Result Value Filter 3.
Definition: adc1.h:3917
INLINE uint16 ADC1_getCh16Result(void)
Get Result Value Channel 16.
Definition: adc1.h:4306
INLINE uint8 ADC1_getReady(void)
Get Module Ready.
Definition: adc1.h:1375
INLINE void ADC1_setCmp0LoIntSts(void)
Set Compare 0 Lower Threshold Interrupt Status.
Definition: adc1.h:4724
INLINE void ADC1_disCalibCh21(void)
Disable Calibration Channel 21.
Definition: adc1.h:3361
INLINE void ADC1_enCalibProtCh6(void)
Enable Calibration Protection Channel 6.
Definition: adc1.h:3522
INLINE void ADC1_disCalibProtCh22(void)
Disable Calibration Protection Channel 22.
Definition: adc1.h:3753
INLINE void ADC1_disSeq0WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1430
INLINE void ADC1_setCh3Config(tADC1_CHCFGx s_value)
Set Channel 3 configuration.
Definition: adc1.h:2404
INLINE uint16 ADC1_getCh19Result(void)
Get Result Value Channel 19.
Definition: adc1.h:4360
sint8 ADC1_getChResult(uint16 *u16p_digValue, uint8 u8_channel)
Get the 14-bit value of the ADC1 Result Register of the selected ADC1 channel.
Definition: adc1.c:253
INLINE void ADC1_enCalibProtCh18(void)
Enable Calibration Protection Channel 18.
Definition: adc1.h:3690
INLINE void ADC1_enSeqHwShadowTrans(void)
Enable Sequence Shadow Transfer Selection.
Definition: adc1.h:5754
INLINE void ADC1_disCalibProtCh13(void)
Disable Calibration Protection Channel 13.
Definition: adc1.h:3627
INLINE void ADC1_setCh4EndOfConvSts(void)
Set Channel 4 End Of Conversion Status.
Definition: adc1.h:2912
INLINE void ADC1_clrCh9EndOfConvSts(void)
Clear Channel 9 End Of Conversion Status.
Definition: adc1.h:2807
INLINE uint8 ADC1_getCh6ResultValidSts(void)
Get Result Valid Flag Channel 6.
Definition: adc1.h:4135
INLINE void ADC1_disCalibProtCh10(void)
Disable Calibration Protection Channel 10.
Definition: adc1.h:3585
INLINE void ARVG_clrVAREFOvercurrentSts(void)
Clear VAREF Overcurrent Status.
Definition: adc1.h:6623
INLINE void ADC1_enSeq0Int(void)
Enable Sequence 0 Interrupt.
Definition: adc1.h:4892
INLINE void ADC1_setCalibOffsAnaIn20(uint8 u8_value)
Set Calibration Offset analog input 20.
Definition: adc1.h:6320
INLINE uint8 ADC1_getCalibOffsAnaIn23(void)
Get Calibration Offset analog input 23.
Definition: adc1.h:6437
INLINE void ADC1_disCh11Int(void)
Disable Channel 11 Interrupt.
Definition: adc1.h:5109
INLINE void ADC1_setCh8Config(tADC1_CHCFGx s_value)
Set Channel 8 configuration.
Definition: adc1.h:2449
INLINE void ADC1_enCh10Int(void)
Enable Channel 10 Interrupt.
Definition: adc1.h:5088
INLINE void ADC1_enSeq1Int(void)
Enable Sequence 1 Interrupt.
Definition: adc1.h:4906
INLINE void ADC1_setSeqHwShadowTrans(uint8 u8_value)
Set Sequence Shadow Transfer Selection.
Definition: adc1.h:5702
INLINE void ADC1_enSeq2Int(void)
Enable Sequence 2 Interrupt.
Definition: adc1.h:4920
INLINE uint8 ADC1_getCh14EndOfConvSts(void)
Get Channel 14 End Of Conversion Status.
Definition: adc1.h:2683
INLINE uint8 ADC1_getSeq0WaitForRead(void)
Get Sequence 0 Wait for Read Status.
Definition: adc1.h:2092
INLINE void ADC1_setSeq3Config(tADC1_SQCFGx s_value)
Set Sequence 3 configuration.
Definition: adc1.h:1915
INLINE void ADC1_disSeq2WaitForRead(void)
Disable Wait for Read Enable.
Definition: adc1.h:1784
INLINE void ADC1_setConvClass1Config(tADC1_CONVCFGx s_value)
Set Conversion Class 1.
Definition: adc1.h:3035
void ADC1_setCh6IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 6 Interrupt Node Pointer.
INLINE void ARVG_disVAREFOvercurrentInt(void)
Disable VAREF Overcurrent Interrupt.
Definition: adc1.h:6591
INLINE uint8 ADC1_getCalibOffsAnaIn19(void)
Get Calibration Offset analog input 19.
Definition: adc1.h:6293
INLINE void ADC1_setCh2Config(tADC1_CHCFGx s_value)
Set Channel 2 configuration.
Definition: adc1.h:2395
INLINE void ADC1_enCalibCh5(void)
Enable Calibration Channel 5.
Definition: adc1.h:3130
INLINE void ADC1_disCalibProtCh23(void)
Disable Calibration Protection Channel 23.
Definition: adc1.h:3767
INLINE uint8 ADC1_getTriggSwShadowTrans(void)
Get Trigger Software Shadow Transfer.
Definition: adc1.h:5821
INLINE uint8 ADC1_getCh17IntNodePtr(void)
Get Channel 17 Interrupt Node Pointer.
Definition: adc1.h:5495
INLINE uint8 ADC1_getFilter3Coeff(void)
Get Filter 3 Coefficient.
Definition: adc1.h:3881
INLINE void ADC1_enCh7Int(void)
Enable Channel 7 Interrupt.
Definition: adc1.h:5046
union ADC1_CMPCFGx tADC1_CMPCFGx
INLINE uint8 ADC1_getSeqHwShadowTrans(void)
Get Sequence Shadow Transfer Selection.
Definition: adc1.h:5711
INLINE void ADC1_setCh19EndOfConvSts(void)
Set Channel 19 End Of Conversion Status.
Definition: adc1.h:3017
INLINE void ADC1_disCalibCh8(void)
Disable Calibration Channel 8.
Definition: adc1.h:3179
void ADC1_setCh15IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 15 Interrupt Node Pointer.
INLINE void ADC1_setCh15EndOfConvSts(void)
Set Channel 15 End Of Conversion Status.
Definition: adc1.h:2989
INLINE void ADC1_disCh13Int(void)
Disable Channel 13 Interrupt.
Definition: adc1.h:5137
INLINE void ADC1_clrCmp2UpThSts(void)
Clear Compare 2 Upper Threshold Status.
Definition: adc1.h:4598
INLINE void ADC1_disCalibCh6(void)
Disable Calibration Channel 6.
Definition: adc1.h:3151
void ADC1_setSeq1WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE uint8 ADC1_getSeq2WaitForReadIntNodePtr(void)
Get Wait for read Interrupt Node Pointer.
Definition: adc1.h:5684
INLINE uint8 ADC1_getCh7ResultValidSts(void)
Get Result Valid Flag Channel 7.
Definition: adc1.h:4153
INLINE void ADC1_clrCh14EndOfConvSts(void)
Clear Channel 14 End Of Conversion Status.
Definition: adc1.h:2842
INLINE uint8 ADC1_getCmp1LoIntSts(void)
Get Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4495
INLINE uint8 ADC1_getCmp0LoThSts(void)
Get Compare 0 Lower Threshold Status.
Definition: adc1.h:4522
INLINE void ADC1_setConvClass0Config(tADC1_CONVCFGx s_value)
Set Conversion Class 0.
Definition: adc1.h:3026
INLINE void ADC1_enCalibCh2(void)
Enable Calibration Channel 2.
Definition: adc1.h:3088
INLINE void ADC1_setCmp1LoIntSts(void)
Set Compare 1 Lower Threshold Interrupt Status.
Definition: adc1.h:4731
INLINE void ADC1_setCmp0UpIntSts(void)
Set Compare 0 Upper Threshold Interrupt Status.
Definition: adc1.h:4668
INLINE void ADC1_clrSeq3WaitForRead(void)
Clear Sequence 3 Wait for Read Status.
Definition: adc1.h:2228
INLINE uint8 ADC1_getCmp2LoIntSts(void)
Get Compare 2 Lower Threshold Interrupt Status.
Definition: adc1.h:4504
INLINE uint8 ADC1_getSeq1GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1643
INLINE uint8 ADC1_getCh12ResultValidSts(void)
Get Result Valid Flag Channel 12.
Definition: adc1.h:4243
INLINE uint8 ADC1_getCmp3LoIntSts(void)
Get Compare 3 Lower Threshold Interrupt Status.
Definition: adc1.h:4513
INLINE void ADC1_clrSeq1IntSts(void)
Clear Sequence 1 Interrupt Status.
Definition: adc1.h:2270
INLINE void ADC1_setCh0EndOfConvSts(void)
Set Channel 0 End Of Conversion Status.
Definition: adc1.h:2884
INLINE void ADC1_setSeq0Slot2(uint8 u8_value)
Set Channel Select for Sequence 0 Slot 2.
Definition: adc1.h:1525
void ADC1_setCh7IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 7 Interrupt Node Pointer.
INLINE void ADC1_setSeq2IntSts(void)
Set Sequence 2 Interrupt Status.
Definition: adc1.h:2361
INLINE void ADC1_disCh10Int(void)
Disable Channel 10 Interrupt.
Definition: adc1.h:5095
void ADC1_setCh4IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 4 Interrupt Node Pointer.
INLINE void ADC1_enCalibProtCh1(void)
Enable Calibration Protection Channel 1.
Definition: adc1.h:3452
INLINE void ADC1_setCalibOffsAnaIn5(uint8 u8_value)
Set Calibration Offset analog input 5.
Definition: adc1.h:5960
INLINE uint8 ADC1_getCh3EndOfConvSts(void)
Get Channel 3 End Of Conversion Status.
Definition: adc1.h:2584
INLINE uint8 ADC1_getCh15ResultValidSts(void)
Get Result Valid Flag Channel 15.
Definition: adc1.h:4297
INLINE uint16 ADC1_getCh3Result(void)
Get Result Value Channel 3.
Definition: adc1.h:4072
INLINE void ADC1_setCh13EndOfConvSts(void)
Set Channel 13 End Of Conversion Status.
Definition: adc1.h:2975
INLINE void ADC1_setCh10EndOfConvSts(void)
Set Channel 10 End Of Conversion Status.
Definition: adc1.h:2954
INLINE void ADC1_enCalibProtCh12(void)
Enable Calibration Protection Channel 12.
Definition: adc1.h:3606
INLINE void ADC1_setSeq0IntSts(void)
Set Sequence 0 Interrupt Status.
Definition: adc1.h:2347
INLINE void ADC1_enCalibCh1(void)
Enable Calibration Channel 1.
Definition: adc1.h:3074
INLINE void ADC1_disSeq2CollInt(void)
Disable Sequence 2 Collision Detection Interrupt.
Definition: adc1.h:5319
void ADC1_setSeq1CollIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Collision Interrupt Node Pointer.
INLINE void ADC1_enCalibCh20(void)
Enable Calibration Channel 20.
Definition: adc1.h:3340
INLINE void ADC1_enSeq1TriggerGate(void)
Enable Trigger Software Gating.
Definition: adc1.h:1650
INLINE void ADC1_setCalibOffsAnaIn26(uint8 u8_value)
Set Calibration Offset analog input 26.
Definition: adc1.h:6536
INLINE void ADC1_disCalibCh0(void)
Disable Calibration Channel 0.
Definition: adc1.h:3067
union ADC1_CHCFGx tADC1_CHCFGx
INLINE uint16 ADC1_getCalibGainAnaIn25(void)
Get Calibration Gain analog input 25.
Definition: adc1.h:6527
INLINE uint8 ADC1_getSeq3GatingSelect(void)
Get Gating Select.
Definition: adc1.h:1997
INLINE void ADC1_setCalibGainAnaIn7(uint16 u16_value)
Set Calibration Gain analog input 7.
Definition: adc1.h:6014
INLINE void ADC1_setCh17EndOfConvSts(void)
Set Channel 17 End Of Conversion Status.
Definition: adc1.h:3003
INLINE void ADC1_enSeq1WaitForRead(void)
Enable Wait for Read Enable.
Definition: adc1.h:1600
INLINE uint8 ADC1_getCmp0UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5558
INLINE void ADC1_disCalibProtCh5(void)
Disable Calibration Protection Channel 5.
Definition: adc1.h:3515
INLINE void ADC1_setSeq2Slot0(uint8 u8_value)
Set Channel Select for Sequence 2 Slot 0.
Definition: adc1.h:1843
INLINE void ADC1_disCalibCh15(void)
Disable Calibration Channel 15.
Definition: adc1.h:3277
void ADC1_setSeq3WaitForReadIntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Wait for read Interrupt Node Pointer.
INLINE void ADC1_enTriggHwShadowTrans(void)
Enable Trigger Shadow Transfer Selection.
Definition: adc1.h:5768
INLINE uint8 ADC1_getCh7IntNodePtr(void)
Get Channel 7 Interrupt Node Pointer.
Definition: adc1.h:5405
INLINE void ADC1_clrCmp1UpThSts(void)
Clear Compare 1 Upper Threshold Status.
Definition: adc1.h:4591
INLINE void ADC1_disCmp0LoInt(void)
Disable Compare 0 Lower Threshold Interrupt.
Definition: adc1.h:4843
INLINE uint8 ADC1_getCmp3UpIntNodePtr(void)
Get Compare Up Interrupt Node Pointer.
Definition: adc1.h:5585
INLINE uint8 ADC1_getSeq2Slot2(void)
Get Channel Select for Sequence 2 Slot 2.
Definition: adc1.h:1888
INLINE void ADC1_setSeq0CollSts(void)
Set Sequence 0 Collision Status.
Definition: adc1.h:2319
INLINE uint16 ADC1_getCalibGainAnaIn24(void)
Get Calibration Gain analog input 24.
Definition: adc1.h:6491
void ADC1_setCh1IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 1 Interrupt Node Pointer.
INLINE void ADC1_enCalibCh10(void)
Enable Calibration Channel 10.
Definition: adc1.h:3200
INLINE void ADC1_enCh19Int(void)
Enable Channel 19 Interrupt.
Definition: adc1.h:5214
INLINE void ADC1_setSeq3CollSts(void)
Set Sequence 3 Collision Status.
Definition: adc1.h:2340
void ADC1_setCh14IntNodePtr(void) __attribute__((deprecated("Do not change this at runtime
Set Channel 14 Interrupt Node Pointer.
@ ADC1_Seq0Trig_Seq0Complete
Definition: adc1.h:251
@ ADC1_Seq0Trig_T12ZM
Definition: adc1.h:246
@ ADC1_Seq0Trig_T13PM
Definition: adc1.h:248
@ ADC1_Seq0Trig_T16CM
Definition: adc1.h:249
@ ADC1_Seq0Trig_HallCorrect
Definition: adc1.h:250
@ ADC1_Seq0Trig_T12PM
Definition: adc1.h:247
@ ADC1_Seq0Trig_SW
Definition: adc1.h:245
@ ADC1_Seq0Trig_Seq3Complete
Definition: adc1.h:252
@ ADC1_SQ3Trig_Seq3Complete
Definition: adc1.h:301
@ ADC1_SQ3Trig_SW
Definition: adc1.h:295
@ ADC1_SQ3Trig_T12CC72ACM
Definition: adc1.h:297
@ ADC1_SQ3Trig_T12C71BCM
Definition: adc1.h:298
@ ADC1_SQ3Trig_T12ZM
Definition: adc1.h:296
@ ADC1_SQ3Trig_T16PM
Definition: adc1.h:299
@ ADC1_SQ3Trig_Seq2Complete
Definition: adc1.h:302
@ ADC1_SQ3Trig_T15CM
Definition: adc1.h:300
@ ADC1_Seq2Trig_T12C70BCM
Definition: adc1.h:281
@ ADC1_Seq2Trig_T12CC71ACM
Definition: adc1.h:280
@ ADC1_Seq2Trig_T12ZM
Definition: adc1.h:279
@ ADC1_Seq2Trig_T15PM
Definition: adc1.h:282
@ ADC1_Seq2Trig_GPT2
Definition: adc1.h:284
@ ADC1_Seq2Trig_Seq2Complete
Definition: adc1.h:285
@ ADC1_Seq2Trig_SW
Definition: adc1.h:278
@ ADC1_Seq2Trig_T14CM
Definition: adc1.h:283
@ ADC1_Seq2Trig_Seq1Complete
Definition: adc1.h:286
@ ADC1_Seq1Trig_T12ZM
Definition: adc1.h:262
@ ADC1_Seq1Trig_Seq0Complete
Definition: adc1.h:269
@ ADC1_Seq1Trig_T14PM
Definition: adc1.h:265
@ ADC1_Seq1Trig_SW
Definition: adc1.h:261
@ ADC1_Seq1Trig_GPT1
Definition: adc1.h:267
@ ADC1_Seq1Trig_T12CC70ACM
Definition: adc1.h:263
@ ADC1_Seq1Trig_Seq1Complete
Definition: adc1.h:268
@ ADC1_Seq1Trig_T13CM
Definition: adc1.h:266
@ ADC1_Seq1Trig_T12C72BCM
Definition: adc1.h:264
#define ARVG
Definition: internal/tle989x.h:25594
#define ADC1
Definition: internal/tle989x.h:25592
__attribute__((noreturn))
Definition: startup_tle989x.c:221
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Compare Channel 0 Control Register.
Structure for the ADC1 Channel Configuration Register.
Structure for the ADC1 Sequence Configuration Register.
Device specific memory layout defines and features.
General type declarations.
#define INLINE
Definition: types.h:167
uint8_t uint8
8 bit unsigned value
Definition: types.h:220
int8_t sint8
8 bit signed value
Definition: types.h:225
uint16_t uint16
16 bit unsigned value
Definition: types.h:221
uint32_t uint32
32 bit unsigned value
Definition: types.h:222
Definition: adc1.h:347
uint32 CMPSEL
Definition: adc1.h:356
uint32 CLASSEL
Definition: adc1.h:357
uint32 INSEL
Definition: adc1.h:351
uint32 FILSEL
Definition: adc1.h:355
uint32 reg
Definition: adc1.h:348
struct ADC1_CHCFGx::@2 bit
uint32 CHREP
Definition: adc1.h:353
Definition: adc1.h:385
uint32 LOWER
Definition: adc1.h:389
uint32 HYST_LO
Definition: adc1.h:392
uint32 RST_BLANK_TIME
Definition: adc1.h:396
uint32 BLANK_TIME
Definition: adc1.h:395
uint32 MODE
Definition: adc1.h:398
struct ADC1_CMPCFGx::@4 bit
uint32 INP_SEL
Definition: adc1.h:390
uint32 reg
Definition: adc1.h:386
uint32 HYST_UP
Definition: adc1.h:397
uint32 UPPER
Definition: adc1.h:394
Definition: adc1.h:365
uint32 STC
Definition: adc1.h:371
uint32 SESP
Definition: adc1.h:372
uint32 BWD
Definition: adc1.h:376
uint32 TCONF
Definition: adc1.h:369
uint32 PCAL
Definition: adc1.h:375
uint32 OVERS
Definition: adc1.h:370
struct ADC1_CONVCFGx::@3 bit
uint32 BWD_HI_CUR
Definition: adc1.h:377
uint32 MSBD
Definition: adc1.h:374
uint32 reg
Definition: adc1.h:366
Definition: adc1.h:309
uint32 TRGSEL
Definition: adc1.h:318
struct ADC1_SQCFGx::@0 bit
uint32 GTSW
Definition: adc1.h:321
uint32 GTSEL
Definition: adc1.h:319
uint32 WFRCFG
Definition: adc1.h:317
uint32 COLLCFG
Definition: adc1.h:316
uint32 SLOTS
Definition: adc1.h:313
uint32 TRGSW
Definition: adc1.h:320
uint32 reg
Definition: adc1.h:310
uint32 SQREP
Definition: adc1.h:315
Definition: adc1.h:329
uint32 CHSEL3
Definition: adc1.h:339
uint32 CHSEL2
Definition: adc1.h:337
uint32 CHSEL0
Definition: adc1.h:333
struct ADC1_SQSLOTx::@1 bit
uint32 CHSEL1
Definition: adc1.h:335
uint32 reg
Definition: adc1.h:330