Infineon MOTIX™ MCU TLE987x Device Family SDK
scu.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
22 /*******************************************************************************
23 ** Author(s) Identity **
24 ********************************************************************************
25 ** Initials Name **
26 ** ---------------------------------------------------------------------------**
27 ** DM Daniel Mysliwitz **
28 ** TA Thomas Albersinger **
29 ** BG Blandine Guillot **
30 ** JO Julia Ott **
31 ** VO Vanessa Ongaro **
32 *******************************************************************************/
33 
34 /*******************************************************************************
35 ** Revision Control History **
36 ********************************************************************************
37 ** V0.1.0: 2013-02-10, DM: Initial version **
38 ** V0.1.1: 2013-02-21, DM: VCOSEL added to function SCU_SetSysClk() **
39 ** V0.1.2: 2013-03-06, DM: NVM Protection added **
40 ** V0.1.3: 2013-03-26, DM: EXINT3 removed **
41 ** V0.1.4: 2013-04-05, DM: APCLK1/2 (MI_CLK, FILT_CLK) register access **
42 ** corrected **
43 ** V0.1.5: 2013-11-06, DM: Changed global interrupt disable/enable in **
44 ** power saving functions **
45 ** V0.2.0: 2014-04-26, TA: In SCU_init(): use #defines from the header file **
46 ** generated by the config wizard **
47 ** V0.2.1: 2014-05-18, DM: Fixed SCU_ChangeNVMProtection function **
48 ** V0.2.2: 2014-06-17, DM: Fixed EnterSleepMode, switch LIN Trx. into **
49 ** sleep mode as well **
50 ** V0.2.3: 2014-06-18, TA: Included bootrom.h for NVM protection control **
51 ** Included lin.h because of sleep functions **
52 ** V0.2.4: 2014-06-23, TA: Conditional include of lin.h **
53 ** V0.2.5: 2014-09-09, DM: OSC_CON, XTAL power down handled **
54 ** V0.2.6: 2014-10-20, DM: OSC_CON, OSC_PLL async. set before StopMode entry**
55 ** V0.2.7: 2015-02-10, DM: Individual header file added **
56 ** OSC_CON register defined by IFXConfigWizard **
57 ** V0.2.8: 2015-11-18, DM: In function SCU_EnterStopMode() one __WFE removed**
58 ** V0.2.9: 2015-11-26, DM: Init of DMASRCSELx added **
59 ** V0.3.0: 2016-08-04, DM: Password open check removed for EnterSleepMode, **
60 ** EnterStopMode, EnterSlowMode **
61 ** V0.3.1: 2017-05-26, DM: Global variable SystemFrequency added **
62 ** V0.3.2: 2017-10-11, DM: MISRA 2012 compliance, the following PC-Lint **
63 ** rules are globally deactivated: **
64 ** - Info 793: ANSI/ISO limit of 6 'significant **
65 ** characters in an external identifier **
66 ** - Info 835: A zero has been given as right **
67 ** argument to operator **
68 ** - Info 845: The left argument to operator '&' **
69 ** is certain to be 0 **
70 ** The following rules are locally deactivated: **
71 ** - Warning 438: Last value assigned to variable **
72 ** 'dummy' (defined at line ...) not used **
73 ** - Info 838: Previously assigned value to variable**
74 ** 'dummy' has not been use **
75 ** Replaced register accesses within functions **
76 ** by function calls **
77 ** Replaced __STATIC_INLINE by INLINE **
78 ** V0.3.3: 2018-03-12, DM: SCU_ChangeNVMProtection returns now a bool result**
79 ** V0.3.4: 2018-07-06, BG: SCU_WDT_Start, SCU_WDT_Stop, SCU_WDT_Service, **
80 ** SCU_OpenPASSWD, SCU_ClosePASSWD rewritten **
81 ** V0.3.5: 2018-10-05, JO: Parameter for prescaler to function EnterSlowMode**
82 ** and defines for the slowdown mode prescaler added**
83 ** SCU_ClkInit, SCU_Init, SCU_EnterSleepMode, **
84 ** SCU_EnterStopMode, SCU_EnterSlowMode, **
85 ** SCU_ExitSlowMode,SCU_ChangeNVMProtection **
86 ** rewritten **
87 ** V0.3.6: 2018-11-28, JO: Doxygen update **
88 ** Moved revision history from scu.c to scu.h **
89 ** Replaced register accesses by function calls in **
90 ** SCU_ClkInit **
91 ** Added #ifndef UNIT_TESTING_LV2 condition in **
92 ** SCU_EnterSleepMode for testability **
93 ** Reworked SCU_EnterSlowMode and added a parameter **
94 ** for the divider **
95 ** Reworked SCU_ExitSlowMode **
96 ** V0.3.7: 2019-06-05, JO: Enable SysTick after entering Slow Mode in **
97 ** function SCU_EnterSlowMode **
98 ** V0.3.8: 2020-04-15, BG: Updated revision history format **
99 ** V0.3.9: 2020-04-17, BG: Updated stop mode entry sequence to match the UM **
100 ** V0.4.0: 2020-07-14, JO: EP-431: remove ARMCC v6 Compiler warnings **
101 ** - Added '__attribute__((noreturn))' to **
102 ** definition of SCU_EnterSleepMode(void) **
103 ** V0.4.1: 2020-07-21, BG: EP-439: Formatted .h/.c files **
104 ** V0.5.0: 2020-10-21, DM: EP-529: Updated PLL init. flow **
105 ** V0.5.1: 2020-10-27, DM: EP-559: Replaced Field_Mod() in the power saving **
106 ** function between the Open_/Close_Passwd **
107 ** V0.5.2: 2020-11-05, BG: EP-548: Moved function PLL_setClkSrcToIntOscAsync**
108 ** into contition #if (PMU_STOP_MODE == 1) **
109 ** V0.5.3: 2021-05-26, JO: EP-698: Added clearing of WAKE_STS_GPIO0/1 when **
110 ** entering stop mode **
111 ** V0.5.4: 2021-06-29, BG: EP-175: Added forced inline for SCU_OpenPASSWD **
112 ** to reduce execution time for IAR compiler **
113 ** V0.5.5: 2022-02-25, JO: EP-1040: Corrected usage of CMSIS_Irq_Dis() **
114 ** V0.5.6: 2022-02-28, JO: EP-936: Updated copyright and branding **
115 ** V0.5.7: 2022-10-18, VO: EP-1252: Updated enum definition **
116 ** V0.5.8: 2025-01-02, JO: EP-1493: Updated license **
117 ** V0.5.9: 2025-01-16, JO: EP-1417: Added call to SCU_ClkInit when waking **
118 ** up from stop mode **
119 *******************************************************************************/
120 
121 #ifndef SCU_H
122 #define SCU_H
123 
124 /*******************************************************************************
125 ** Includes **
126 *******************************************************************************/
127 #include "tle987x.h"
128 #include "types.h"
129 #include "sfr_access.h"
130 #include "scu_defines.h"
131 
132 
133 /*******************************************************************************
134 ** Global Macro Definitions **
135 *******************************************************************************/
137 #define PASSWD_Open (0x98U)
139 #define PASSWD_Close (0xA8U)
140 
142 #define NVM_DATA_WRITE (0U)
144 #define NVM_CODE_WRITE (1U)
146 #define NVM_DATA_READ (2U)
148 #define NVM_CODE_READ (3U)
149 
151 #define PROTECTION_CLEAR (1U)
153 #define PROTECTION_SET (0U)
154 
155 /* Slow Down mode prescaler */
156 #define SLOWDOWN_PRESCALER_1 (0U)
157 #define SLOWDOWN_PRESCALER_2 (1U)
158 #define SLOWDOWN_PRESCALER_3 (2U)
159 #define SLOWDOWN_PRESCALER_4 (3U)
160 #define SLOWDOWN_PRESCALER_8 (4U)
161 #define SLOWDOWN_PRESCALER_16 (5U)
162 #define SLOWDOWN_PRESCALER_24 (6U)
163 #define SLOWDOWN_PRESCALER_32 (7U)
164 #define SLOWDOWN_PRESCALER_48 (8U)
165 #define SLOWDOWN_PRESCALER_64 (9U)
166 #define SLOWDOWN_PRESCALER_96 (10U)
167 #define SLOWDOWN_PRESCALER_128 (11U)
168 #define SLOWDOWN_PRESCALER_192 (12U)
169 #define SLOWDOWN_PRESCALER_256 (13U)
170 #define SLOWDOWN_PRESCALER_384 (14U)
171 #define SLOWDOWN_PRESCALER_512 (15U)
172 
173 
174 /*******************************************************************************
175 ** Global Type Definitions **
176 *******************************************************************************/
180 typedef enum Scu_Mod
181 {
182  Mod_ADC1 = 0x00,
183  Mod_SSC1 = 0x01,
184  Mod_CCU6 = 0x02,
185  Mod_Timer2 = 0x03,
186  Mod_GPT12 = 0x04,
187  Mod_SSC2 = 0x11,
188  Mod_Timer21 = 0x13,
189  Mod_Timer3 = 0x15
191 
192 /*******************************************************************************
193 ** Global Function Declarations **
194 *******************************************************************************/
199 void SCU_ClkInit(void);
200 
205 void SCU_Init(void);
206 
229 
259 void SCU_EnterStopMode(void);
260 
282 void SCU_EnterSlowMode(uint8 divider_scaled);
283 
296 void SCU_ExitSlowMode(void);
297 
320 
321 
322 /*******************************************************************************
323 ** Global Inline Function Declarations **
324 *******************************************************************************/
325 INLINE void SCU_WDT_Start(void);
326 INLINE void SCU_WDT_Stop(void);
327 INLINE void SCU_WDT_Service(void);
328 INLINE void SCU_Disable_Module(TScu_Mod Module);
329 INLINE void SCU_Enable_Module(TScu_Mod Module);
330 INLINE void SCU_OpenPASSWD(void);
331 INLINE void SCU_ClosePASSWD(void);
332 
333 /*******************************************************************************
334 ** Global Inline Function Definitions **
335 *******************************************************************************/
351 {
352  SCU_OpenPASSWD();
354  SCU_ClosePASSWD();
355 }
356 
371 {
372  SCU_OpenPASSWD();
374  SCU_ClosePASSWD();
375 }
376 
391 {
393 }
394 
410 {
411  if (((uint8)Module & (uint8)0x10) == (uint8)0x10)
412  {
413  /* reset the corresponding bit (given by the lower nibble in the parameter Module)
414  * in register PMCON2 */
415  SCU->PMCON2.reg |= (uint8) (1u << ((uint8)Module & (uint8)0x07));
416  }
417  else
418  {
419  /* reset the corresponding bit (given by the lower nibble in the parameter Module)
420  * in register PMCON1 */
421  SCU->PMCON1.reg |= (uint8) (1u << ((uint8)Module & (uint8)0x07));
422  }
423 }
424 
440 {
441  if (((uint8)Module & (uint8)0x10) == (uint8)0x10)
442  {
443  /* set the corresponding bit (given by the lower nibble in the parameter Module)
444  * in register PMCON2 */
445  SCU->PMCON2.reg &= (uint8) ~ (1u << ((uint8)Module & (uint8)0x07));
446  }
447  else
448  {
449  /* set the corresponding bit (given by the lower nibble in the parameter Module)
450  * in register PMCON1 */
451  SCU->PMCON1.reg &= (uint8) ~ (1u << ((uint8)Module & (uint8)0x07));
452  }
453 }
454 
467 #if defined (__IAR_SYSTEMS_ICC__)
468  #pragma inline=forced
469 #endif
471 {
472  Field_Wrt8all(&SCU->PASSWD.reg, PASSWD_Open);
473 }
474 
488 {
489  Field_Wrt8all(&SCU->PASSWD.reg, PASSWD_Close);
490 }
491 
492 #endif
#define SCU
Definition: tle987x.h:6071
#define SCU_WDTCON_WDTRS_Msk
Definition: tle987x.h:9360
#define SCU_WDTCON_WDTEN_Pos
Definition: tle987x.h:9357
#define SCU_WDTCON_WDTEN_Msk
Definition: tle987x.h:9358
#define SCU_WDTCON_WDTRS_Pos
Definition: tle987x.h:9359
void SCU_ExitSlowMode(void)
Gets the device out of Slow Mode.
INLINE void SCU_Enable_Module(TScu_Mod Module)
Enables a given peripheral module in the Peripheral Management Control Registers.
Definition: scu.h:439
enum Scu_Mod TScu_Mod
Scu_Mod
Definition: scu.h:181
@ Mod_Timer21
Definition: scu.h:188
@ Mod_SSC2
Definition: scu.h:187
@ Mod_CCU6
Definition: scu.h:184
@ Mod_GPT12
Definition: scu.h:186
@ Mod_Timer2
Definition: scu.h:185
@ Mod_SSC1
Definition: scu.h:183
@ Mod_Timer3
Definition: scu.h:189
@ Mod_ADC1
Definition: scu.h:182
#define PASSWD_Close
PASSWD Phrases, PASSWD Closed.
Definition: scu.h:139
void SCU_ClkInit(void)
Initializes the system clocks.
INLINE void SCU_Disable_Module(TScu_Mod Module)
Disables a given peripheral module in the Peripheral Management Control Registers.
Definition: scu.h:409
void SCU_Init(void)
Initializes the SCU based on the Config Wizard for MOTIX MCU configuration.
INLINE void SCU_WDT_Start(void)
Starts the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by ...
Definition: scu.h:350
INLINE void SCU_WDT_Service(void)
Services the Watchdog of SCU-DM in the Watchdog Timer Control Register.
Definition: scu.h:390
void SCU_EnterStopMode(void)
Sets the device into Stop Mode.
#define PASSWD_Open
PASSWD Phrases, PASSWD Opened.
Definition: scu.h:137
INLINE void SCU_OpenPASSWD(void)
Opens the bit protection by writing PASSWD_Open to the Bit Protection Register.
Definition: scu.h:470
INLINE void SCU_ClosePASSWD(void)
Closes the bit protection by writing PASSWD_Close to the Bit Protection Register.
Definition: scu.h:487
void SCU_EnterSlowMode(uint8 divider_scaled)
Sets the device into Slow Down Mode.
INLINE void SCU_WDT_Stop(void)
Stops the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by t...
Definition: scu.h:370
void SCU_EnterSleepMode(void)
Sets the device into Sleep Mode.
bool SCU_ChangeNVMProtection(uint32 mode, uint32 action)
Sets the Write/Read Protection for the Code/Data Flash.
SFR low level access library.
INLINE void Field_Wrt8all(volatile uint8 *reg, uint8 val)
This function writes an 8-bit register directly, no mask/position needed.
Definition: sfr_access.h:317
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:132
uint8_t uint8
8 bit unsigned value
Definition: types.h:137
uint32_t uint32
32 bit unsigned value
Definition: types.h:139