73 #define SSC1_tBit_us (1.0 / (SSC1_MAN_BAUDRATE / 1000.0))
75 #define SSC2_tBit_us (1.0 / (SSC2_MAN_BAUDRATE / 1000.0))
#define SSC2
Definition: tle987x.h:6074
#define SSC1
Definition: tle987x.h:6073
#define SCU
Definition: tle987x.h:6071
#define SCU_MODIEN2_TIREN2_Msk
Definition: tle987x.h:9127
#define SSC1_RB_RB_VALUE_Pos
Definition: tle987x.h:9851
#define SCU_MODIEN1_EIREN1_Msk
Definition: tle987x.h:9116
#define SCU_MODIEN1_TIREN1_Pos
Definition: tle987x.h:9113
#define SCU_MODIEN1_RIREN1_Msk
Definition: tle987x.h:9112
#define SCU_MODIEN2_TIREN2_Pos
Definition: tle987x.h:9126
#define SCU_IRCON2CLR_TIRC_Pos
Definition: tle987x.h:9042
#define SSC2_TB_TB_VALUE_Pos
Definition: tle987x.h:9904
#define SCU_MODIEN2_RIREN2_Pos
Definition: tle987x.h:9124
#define SSC1_TB_TB_VALUE_Pos
Definition: tle987x.h:9854
#define SSC1_RB_RB_VALUE_Msk
Definition: tle987x.h:9852
#define SCU_IRCON2CLR_EIRC_Pos
Definition: tle987x.h:9044
#define SCU_MODIEN1_TIREN1_Msk
Definition: tle987x.h:9114
#define SCU_IRCON2CLR_RIRC_Pos
Definition: tle987x.h:9040
#define SCU_IRCON2CLR_EIRC_Msk
Definition: tle987x.h:9045
#define SCU_IRCON1CLR_RIRC_Msk
Definition: tle987x.h:9027
#define SCU_MODIEN1_EIREN1_Pos
Definition: tle987x.h:9115
#define SCU_MODIEN2_RIREN2_Msk
Definition: tle987x.h:9125
#define SSC2_RB_RB_VALUE_Pos
Definition: tle987x.h:9901
#define SCU_MODIEN2_EIREN2_Msk
Definition: tle987x.h:9129
#define SCU_MODIEN1_RIREN1_Pos
Definition: tle987x.h:9111
#define SSC1_TB_TB_VALUE_Msk
Definition: tle987x.h:9855
#define SCU_IRCON2CLR_TIRC_Msk
Definition: tle987x.h:9043
#define SSC2_RB_RB_VALUE_Msk
Definition: tle987x.h:9902
#define SSC2_TB_TB_VALUE_Msk
Definition: tle987x.h:9905
#define SCU_MODIEN2_EIREN2_Pos
Definition: tle987x.h:9128
#define SCU_IRCON1CLR_RIRC_Pos
Definition: tle987x.h:9026
#define SCU_IRCON1CLR_TIRC_Msk
Definition: tle987x.h:9029
#define SCU_IRCON2CLR_RIRC_Msk
Definition: tle987x.h:9041
#define SCU_IRCON1CLR_EIRC_Msk
Definition: tle987x.h:9031
#define SCU_IRCON1CLR_EIRC_Pos
Definition: tle987x.h:9030
#define SCU_IRCON1CLR_TIRC_Pos
Definition: tle987x.h:9028
SFR low level access library.
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:327
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:322
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:412
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
INLINE void SSC2_TX_Int_Clr(void)
clears transmit interrupt flag for SSC2.
Definition: ssc.h:163
INLINE void SSC2_TX_Int_En(void)
enables transmit interrupt for SSC2.
Definition: ssc.h:364
void SSC1_Init(void)
Initializes the SSC1 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_En(void)
enables receive interrupt for SSC2.
Definition: ssc.h:409
INLINE void SSC2_Err_Int_En(void)
enables error interrupt for SSC2.
Definition: ssc.h:454
INLINE void SSC1_RX_Int_Dis(void)
disables receive interrupt for SSC1.
Definition: ssc.h:297
INLINE void SSC1_Err_Int_Clr(void)
clears error interrupt flag for SSC1.
Definition: ssc.h:141
INLINE void SSC1_RX_Int_Clr(void)
clears receive interrupt flag for SSC1.
Definition: ssc.h:119
INLINE void SSC1_RX_Int_En(void)
enables receive interrupt for SSC1.
Definition: ssc.h:274
void SSC2_Init(void)
Initializes the SSC2 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_Clr(void)
clears receive interrupt flag for SSC2.
Definition: ssc.h:185
INLINE uint16 SSC2_ReadWord(void)
SSC2: Read data word from receive buffer.
Definition: ssc.h:591
INLINE void SSC1_Err_Int_Dis(void)
disables error interrupt for SSC1.
Definition: ssc.h:342
INLINE void SSC2_Err_Int_Clr(void)
clears error interrupt flag for SSC2.
Definition: ssc.h:207
INLINE void SSC2_RX_Int_Dis(void)
disables receive interrupt for SSC2.
Definition: ssc.h:432
INLINE void SSC1_TX_Int_En(void)
enables transmit interrupt for SSC1.
Definition: ssc.h:229
INLINE uint16 SSC2_SendWord(uint16 DataWord)
SSC2: Send data word.
Definition: ssc.h:569
INLINE void SSC1_Err_Int_En(void)
enables error interrupt for SSC1.
Definition: ssc.h:319
INLINE void SSC1_TX_Int_Dis(void)
disables transmit interrupt for SSC1.
Definition: ssc.h:252
INLINE uint16 SSC1_SendWord(uint16 DataWord)
SSC1: Send data word.
Definition: ssc.h:525
INLINE uint16 SSC1_ReadWord(void)
SSC1: Read data word from receive buffer.
Definition: ssc.h:547
INLINE void SSC2_Err_Int_Dis(void)
disables error interrupt for SSC2.
Definition: ssc.h:477
INLINE void SSC1_TX_Int_Clr(void)
clears transmit interrupt flag for SSC1.
Definition: ssc.h:97
INLINE void SSC2_TX_Int_Dis(void)
disables transmit interrupt for SSC2.
Definition: ssc.h:387
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:132
uint8_t uint8
8 bit unsigned value
Definition: types.h:137
uint16_t uint16
16 bit unsigned value
Definition: types.h:138