Infineon MOTIX™ MCU TLE987x Device Family SDK
pmu.h
Go to the documentation of this file.
1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
20 /*******************************************************************************
21 ** Author(s) Identity **
22 ********************************************************************************
23 ** Initials Name **
24 ** ---------------------------------------------------------------------------**
25 ** DM Daniel Mysliwitz **
26 ** BG Blandine Guillot **
27 ** JO Julia Ott **
28 *******************************************************************************/
29 
30 /*******************************************************************************
31 ** Revision Control History **
32 ********************************************************************************
33 ** V0.1.0: 2014-05-12, DM: Initial version **
34 ** V0.1.1: 2015-02-10, DM: Individual header file added **
35 ** V0.1.2: 2017-07-06, DM: PMU_VDDEXT_On() function updated to satisfy **
36 ** the EPN for BE-Step **
37 ** V0.1.3: 2017-07-20, DM: PMU_VDDEXT_On() workaround reworked to work **
38 ** for fSYS=40MHz as well **
39 ** V0.1.4: 2017-10-10, DM: MISRA 2012 compliance, the following PC-Lint **
40 ** rules are globally deactivated: **
41 ** - Info 793: ANSI/ISO limit of 6 'significant **
42 ** characters in an external identifier **
43 ** - Info 835: A zero has been given as right **
44 ** argument to operator **
45 ** - Info 845: The left argument to operator '&' **
46 ** is certain to be 0 **
47 ** Replaced macros by INLINE functions **
48 ** Replaced register accesses within functions by **
49 ** function calls **
50 ** Replaced __STATIC_INLINE by INLINE **
51 ** V0.1.5: 2018-03-20, DM: PMU_VDDEXT_On() return value handling modified **
52 ** to meet MISRA 2012 **
53 ** V0.1.6: 2018-07-06, BG: PMU_Clear_Reset_Status(), PMU_VDDEXT_Off(), **
54 ** PMU_Get_Reset_Status, PMU_VDDEXT_Error_Clear(u8),**
55 ** PMU_VDDEXT_Set(uint8) rewritten **
56 ** V0.1.7: 2018-10-16, JO: PMU_VDDEXT_Error_Clear renamed to **
57 ** PMU_VDDEXT_Short_Clr, parameter removed **
58 ** Corrected mask in PMU_Get_Reset_Status and **
59 ** PMU_Set_Reset_Status **
60 ** Field_Mod8 instead of Field_Wrt8 in **
61 ** PMU_VDDEXT_On BF-step **
62 ** V0.1.8: 2018-11-27, JO: Doxygen update **
63 ** Moved revision history from pmu.c to pmu.h **
64 ** V0.1.9: 2020-04-15, BG: Updated revision history format **
65 ** V0.2.0: 2020-07-21, BG: EP-439: Formatted .h/.c files **
66 ** V0.2.1: 2022-02-25, JO: EP-1040: Corrected usage of CMSIS_Irq_Dis() **
67 ** V0.2.2: 2022-02-28, JO: EP-936: Updated copyright and branding **
68 ** V0.2.3: 2025-01-02, JO: EP-1493: Updated license **
69 *******************************************************************************/
70 
71 #ifndef PMU_H
72 #define PMU_H
73 
74 /*******************************************************************************
75 ** Includes **
76 *******************************************************************************/
77 #include "tle987x.h"
78 #include "types.h"
79 #include "sfr_access.h"
80 
81 /*******************************************************************************
82 ** Global Macro Definitions **
83 *******************************************************************************/
85 #define PMU_RESET_STS_POR (0x80u)
87 #define PMU_RESET_STS_PIN (0x40u)
89 #define PMU_RESET_STS_WDT1 (0x20u)
91 #define PMU_RESET_STS_ClkWDT (0x10u)
93 #define PMU_RESET_STS_LPR (0x08u)
95 #define PMU_RESET_STS_SLEEP (0x04u)
97 #define PMU_RESET_STS_WAKE (0x02u)
99 #define PMU_RESET_STS_SYS_FAIL (0x01u)
100 
102 #define PMU_VDDEXT_STABLE (0x80u)
104 #define PMU_VDDEXT_OK (0x40u)
106 #define PMU_VDDEXT_OVERLOAD (0x20u)
108 #define PMU_VDDEXT_OVERVOLT (0x10u)
110 #define PMU_VDDEXT_SHORT (0x08u)
112 #define PMU_VDDEXT_IE (0x04u)
114 #define PMU_VDDEXT_CYC_EN (0x02u)
116 #define PMU_VDDEXT_ENABLE (0x01u)
117 
118 /*******************************************************************************
119 ** Global Inline Function Definitions **
120 *******************************************************************************/
138 {
140 }
141 
160 {
162 }
163 
181 {
183 }
184 
203 {
205 }
206 
224 {
226 }
227 
246 {
248 }
249 
250 /*******************************************************************************
251 ** Global Function Declarations **
252 *******************************************************************************/
257 void PMU_Init(void);
258 
277 bool PMU_VDDEXT_On(void);
278 
279 /*******************************************************************************
280 ** Inline Function Declarations **
281 *******************************************************************************/
283 INLINE void PMU_Clear_Reset_Status(void);
285 INLINE void PMU_VDDEXT_Short_Clr(void);
286 INLINE void PMU_VDDEXT_Set(uint8 FlagMask);
287 
288 /*******************************************************************************
289 ** Inline Function Definitions **
290 *******************************************************************************/
309 {
310  return u8_Field_Rd8(&PMU->PMU_RESET_STS1.reg, 0u, 0xFFu);
311 }
312 
329 {
330  Field_Wrt8all(&PMU->PMU_RESET_STS1.reg, 0u);
331 }
332 
351 {
354 }
355 
369 {
370  Field_Clr8(&PMU->VDDEXT_CTRL.reg, 0x08);
371 }
372 
388 {
389  Field_Mod8(&PMU->VDDEXT_CTRL.reg, 0u, (uint8)FlagMask, 0xFFu);
390 }
391 
392 #endif
#define PMU
Definition: tle987x.h:6069
#define PMU_VDDEXT_CTRL_FAIL_EN_Msk
Definition: tle987x.h:8372
#define PMU_PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Msk
Definition: tle987x.h:8333
#define PMU_PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Msk
Definition: tle987x.h:8339
#define PMU_PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Pos
Definition: tle987x.h:8332
#define PMU_VDDEXT_CTRL_STABLE_Pos
Definition: tle987x.h:8361
#define PMU_VDDEXT_CTRL_ENABLE_Msk
Definition: tle987x.h:8376
#define PMU_VDDEXT_CTRL_STABLE_Msk
Definition: tle987x.h:8362
#define PMU_VDDEXT_CTRL_FAIL_EN_Pos
Definition: tle987x.h:8371
#define PMU_PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Pos
Definition: tle987x.h:8338
#define PMU_VDDEXT_CTRL_ENABLE_Pos
Definition: tle987x.h:8375
INLINE void PMU_VDDP_Int_Dis(void)
disables VDDP status information as interrupt source.
Definition: pmu.h:245
INLINE void PMU_VDDEXT_Short_Clr(void)
Clear VDDEXT Short Error Flag.
Definition: pmu.h:368
INLINE uint8 PMU_VDDEXT_Off(void)
Switches off (disables) VDDEXT and returns the stable state of VDDEXT (VDDEXT Supply works inside its...
Definition: pmu.h:350
INLINE uint8 PMU_Get_Reset_Status(void)
Reads out the Reset Status Hard Register (PMU->PMU_RESET_STS1)
Definition: pmu.h:308
INLINE void PMU_VDDEXT_Set(uint8 FlagMask)
Set the given bits in the PMU->VDDEXT_CTRL register.
Definition: pmu.h:387
INLINE void PMU_VDDP_Int_En(void)
enables VDDP status information as interrupt source.
Definition: pmu.h:223
INLINE void PMU_VDDEXT_Int_Dis(void)
disables VDDEXT Supply status information as interrupt source (disable Fail Interrupt).
Definition: pmu.h:159
INLINE void PMU_VDDEXT_Int_En(void)
enables VDDEXT Supply status information as interrupt source (enable Fail Interrupt).
Definition: pmu.h:137
void PMU_Init(void)
Initializes the ADC1 based on the Config Wizard for MOTIX MCU configuration.
INLINE void PMU_Clear_Reset_Status(void)
Clears the Reset Status Hard Register (PMU->PMU_RESET_STS1)
Definition: pmu.h:328
bool PMU_VDDEXT_On(void)
Turns VDDEXT on.
INLINE void PMU_VDDC_Int_Dis(void)
disables VDDC status information as interrupt source.
Definition: pmu.h:202
INLINE void PMU_VDDC_Int_En(void)
enables VDDC status information as interrupt source.
Definition: pmu.h:180
SFR low level access library.
INLINE uint8 u8_Field_Rd8(const volatile uint8 *reg, uint8 pos, uint8 msk)
This function reads a 8-bit field of a 8-bit register.
Definition: sfr_access.h:397
INLINE void Field_Wrt8all(volatile uint8 *reg, uint8 val)
This function writes an 8-bit register directly, no mask/position needed.
Definition: sfr_access.h:317
INLINE void Field_Clr8(volatile uint8 *reg, uint8 msk)
This function clears a bit field in a 8-bit register.
Definition: sfr_access.h:367
INLINE uint8 u1_Field_Rd8(const volatile uint8 *reg, uint8 pos, uint8 msk)
This function reads a 1-bit field of a 8-bit register.
Definition: sfr_access.h:382
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:132
uint8_t uint8
8 bit unsigned value
Definition: types.h:137