Infineon MOTIX™ MCU TLE987x Device Family SDK
ssc.h
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1 /*
2  ***********************************************************************************************************************
3  *
4  * Copyright (c) Infineon Technologies AG
5  * All rights reserved.
6  *
7  * The applicable license agreement can be found at this pack's installation directory in the file
8  * license/IFX_SW_Licence_MOTIX_LITIX.txt
9  *
10  **********************************************************************************************************************/
20 /*******************************************************************************
21 ** Author(s) Identity **
22 ********************************************************************************
23 ** Initials Name **
24 ** ---------------------------------------------------------------------------**
25 ** DM Daniel Mysliwitz **
26 ** TA Thomas Albersinger **
27 ** BG Blandine Guillot **
28 ** JO Julia Ott **
29 *******************************************************************************/
30 
31 /*******************************************************************************
32 ** Revision Control History **
33 ********************************************************************************
34 ** V0.1.0: 2014-05-15, TA: Initial version **
35 ** V0.1.1: 2015-02-10, DM: Individual header file added **
36 ** V0.1.2: 2015-06-24, DM: SendWord functions return received data word **
37 ** V0.1.3: 2017-05-24, DM: Interrupt APIs added **
38 ** V0.1.4: 2017-10-18, DM: MISRA 2012 compliance, the following PC-Lint **
39 ** rules are globally deactivated: **
40 ** - Info 793: ANSI/ISO limit of 6 'significant **
41 ** characters in an external identifier **
42 ** - Info 835: A zero has been given as right **
43 ** argument to operator **
44 ** - Info 845: The left argument to operator '&' **
45 ** is certain to be 0 **
46 ** Replaced macros by INLINE functions **
47 ** Replaced register accesses within functions by **
48 ** function calls **
49 ** Replaced __STATIC_INLINE by INLINE **
50 ** V0.1.5: 2018-11-27, JO: Doxygen update **
51 ** Moved revision history from ssc.c to ssc.h **
52 ** Replaced __STATIC_INLINE by INLINE **
53 ** V0.1.6: 2020-04-15, BG: Updated revision history format **
54 ** V0.1.7: 2020-07-21, BG: EP-439: Formatted .h/.c files **
55 ** V0.1.8: 2022-02-28, JO: EP-936: Updated copyright and branding **
56 ** V0.1.9: 2025-01-02, JO: EP-1493: Updated license **
57 *******************************************************************************/
58 
59 #ifndef SSC_H
60 #define SSC_H
61 
62 /*******************************************************************************
63 ** Includes **
64 *******************************************************************************/
65 #include "tle987x.h"
66 #include "types.h"
67 #include "sfr_access.h"
68 
69 /*******************************************************************************
70 ** Global Macro Definitions **
71 *******************************************************************************/
73 #define SSC1_tBit_us (1.0 / (SSC1_MAN_BAUDRATE / 1000.0))
75 #define SSC2_tBit_us (1.0 / (SSC2_MAN_BAUDRATE / 1000.0))
76 
77 /*******************************************************************************
78 ** Global Inline Function Definitions **
79 *******************************************************************************/
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482 /*******************************************************************************
483 ** Global Function Declarations **
484 *******************************************************************************/
489 void SSC1_Init(void);
490 
495 void SSC2_Init(void);
496 
497 /*******************************************************************************
498 ** Global Inline Function Declarations **
499 *******************************************************************************/
504 
505 /*******************************************************************************
506 ** Global Inline Function Definitions **
507 *******************************************************************************/
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596 #endif
#define SSC2
Definition: tle987x.h:6074
#define SSC1
Definition: tle987x.h:6073
#define SCU
Definition: tle987x.h:6071
#define SCU_MODIEN2_TIREN2_Msk
Definition: tle987x.h:9127
#define SSC1_RB_RB_VALUE_Pos
Definition: tle987x.h:9851
#define SCU_MODIEN1_EIREN1_Msk
Definition: tle987x.h:9116
#define SCU_MODIEN1_TIREN1_Pos
Definition: tle987x.h:9113
#define SCU_MODIEN1_RIREN1_Msk
Definition: tle987x.h:9112
#define SCU_MODIEN2_TIREN2_Pos
Definition: tle987x.h:9126
#define SCU_IRCON2CLR_TIRC_Pos
Definition: tle987x.h:9042
#define SSC2_TB_TB_VALUE_Pos
Definition: tle987x.h:9904
#define SCU_MODIEN2_RIREN2_Pos
Definition: tle987x.h:9124
#define SSC1_TB_TB_VALUE_Pos
Definition: tle987x.h:9854
#define SSC1_RB_RB_VALUE_Msk
Definition: tle987x.h:9852
#define SCU_IRCON2CLR_EIRC_Pos
Definition: tle987x.h:9044
#define SCU_MODIEN1_TIREN1_Msk
Definition: tle987x.h:9114
#define SCU_IRCON2CLR_RIRC_Pos
Definition: tle987x.h:9040
#define SCU_IRCON2CLR_EIRC_Msk
Definition: tle987x.h:9045
#define SCU_IRCON1CLR_RIRC_Msk
Definition: tle987x.h:9027
#define SCU_MODIEN1_EIREN1_Pos
Definition: tle987x.h:9115
#define SCU_MODIEN2_RIREN2_Msk
Definition: tle987x.h:9125
#define SSC2_RB_RB_VALUE_Pos
Definition: tle987x.h:9901
#define SCU_MODIEN2_EIREN2_Msk
Definition: tle987x.h:9129
#define SCU_MODIEN1_RIREN1_Pos
Definition: tle987x.h:9111
#define SSC1_TB_TB_VALUE_Msk
Definition: tle987x.h:9855
#define SCU_IRCON2CLR_TIRC_Msk
Definition: tle987x.h:9043
#define SSC2_RB_RB_VALUE_Msk
Definition: tle987x.h:9902
#define SSC2_TB_TB_VALUE_Msk
Definition: tle987x.h:9905
#define SCU_MODIEN2_EIREN2_Pos
Definition: tle987x.h:9128
#define SCU_IRCON1CLR_RIRC_Pos
Definition: tle987x.h:9026
#define SCU_IRCON1CLR_TIRC_Msk
Definition: tle987x.h:9029
#define SCU_IRCON2CLR_RIRC_Msk
Definition: tle987x.h:9041
#define SCU_IRCON1CLR_EIRC_Msk
Definition: tle987x.h:9031
#define SCU_IRCON1CLR_EIRC_Pos
Definition: tle987x.h:9030
#define SCU_IRCON1CLR_TIRC_Pos
Definition: tle987x.h:9028
SFR low level access library.
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:327
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:322
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:412
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
INLINE void SSC2_TX_Int_Clr(void)
clears transmit interrupt flag for SSC2.
Definition: ssc.h:163
INLINE void SSC2_TX_Int_En(void)
enables transmit interrupt for SSC2.
Definition: ssc.h:364
void SSC1_Init(void)
Initializes the SSC1 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_En(void)
enables receive interrupt for SSC2.
Definition: ssc.h:409
INLINE void SSC2_Err_Int_En(void)
enables error interrupt for SSC2.
Definition: ssc.h:454
INLINE void SSC1_RX_Int_Dis(void)
disables receive interrupt for SSC1.
Definition: ssc.h:297
INLINE void SSC1_Err_Int_Clr(void)
clears error interrupt flag for SSC1.
Definition: ssc.h:141
INLINE void SSC1_RX_Int_Clr(void)
clears receive interrupt flag for SSC1.
Definition: ssc.h:119
INLINE void SSC1_RX_Int_En(void)
enables receive interrupt for SSC1.
Definition: ssc.h:274
void SSC2_Init(void)
Initializes the SSC2 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_Clr(void)
clears receive interrupt flag for SSC2.
Definition: ssc.h:185
INLINE uint16 SSC2_ReadWord(void)
SSC2: Read data word from receive buffer.
Definition: ssc.h:591
INLINE void SSC1_Err_Int_Dis(void)
disables error interrupt for SSC1.
Definition: ssc.h:342
INLINE void SSC2_Err_Int_Clr(void)
clears error interrupt flag for SSC2.
Definition: ssc.h:207
INLINE void SSC2_RX_Int_Dis(void)
disables receive interrupt for SSC2.
Definition: ssc.h:432
INLINE void SSC1_TX_Int_En(void)
enables transmit interrupt for SSC1.
Definition: ssc.h:229
INLINE uint16 SSC2_SendWord(uint16 DataWord)
SSC2: Send data word.
Definition: ssc.h:569
INLINE void SSC1_Err_Int_En(void)
enables error interrupt for SSC1.
Definition: ssc.h:319
INLINE void SSC1_TX_Int_Dis(void)
disables transmit interrupt for SSC1.
Definition: ssc.h:252
INLINE uint16 SSC1_SendWord(uint16 DataWord)
SSC1: Send data word.
Definition: ssc.h:525
INLINE uint16 SSC1_ReadWord(void)
SSC1: Read data word from receive buffer.
Definition: ssc.h:547
INLINE void SSC2_Err_Int_Dis(void)
disables error interrupt for SSC2.
Definition: ssc.h:477
INLINE void SSC1_TX_Int_Clr(void)
clears transmit interrupt flag for SSC1.
Definition: ssc.h:97
INLINE void SSC2_TX_Int_Dis(void)
disables transmit interrupt for SSC2.
Definition: ssc.h:387
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:132
uint8_t uint8
8 bit unsigned value
Definition: types.h:137
uint16_t uint16
16 bit unsigned value
Definition: types.h:138