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Infineon MOTIX™ MCU TLE987x Device Family SDK
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Macros | |
#define | __CM3_REV 0x0000U |
#define | __NVIC_PRIO_BITS 4 |
#define | __Vendor_SysTickConfig 0 |
#define | __MPU_PRESENT 0 |
#define | __FPU_PRESENT 0 |
Enumerations | |
enum | IRQn_Type { Reset_IRQn = -15 , NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 , UsageFault_IRQn = -10 , SVCall_IRQn = -5 , DebugMonitor_IRQn = -4 , PendSV_IRQn = -2 , SysTick_IRQn = -1 , GPT1_Int = 0 , GPT2_Int = 1 , ADC2_Tmr3_Int = 2 , ADC1_VREF5_Int = 3 , CCU6_SR0_Int = 4 , CCU6_SR1_Int = 5 , CCU6_SR2_Int = 6 , CCU6_SR3_Int = 7 , SSC1_Int = 8 , SSC2_Int = 9 , UART1_LIN_Tmr2_Int = 10 , UART2_Tmr21_EINT2_Int = 11 , EXINT0_MON_Int = 12 , EXINT1_Int = 13 , BDRV_CP_Int = 14 , DMA_Int = 15 } |
#define __CM3_REV 0x0000U |
CM3 Core Revision
#define __FPU_PRESENT 0 |
FPU present or not
#define __MPU_PRESENT 0 |
MPU present or not
#define __NVIC_PRIO_BITS 4 |
Number of Bits used for Priority Levels
#define __Vendor_SysTickConfig 0 |
Set to 1 if different SysTick Config is used
enum IRQn_Type |
Enumerator | |
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Reset_IRQn | -15 Reset Vector, invoked on Power up and warm reset |
NonMaskableInt_IRQn | -14 Non maskable Interrupt, cannot be stopped or preempted |
HardFault_IRQn | -13 Hard Fault, all classes of Fault |
MemoryManagement_IRQn | -12 Memory Management, MPU mismatch, including Access Violation and No Match |
BusFault_IRQn | -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other address/memory related Fault |
UsageFault_IRQn | -10 Usage Fault, i.e. Undef Instruction, Illegal State Transition |
SVCall_IRQn | -5 System Service Call via SVC instruction |
DebugMonitor_IRQn | -4 Debug Monitor |
PendSV_IRQn | -2 Pendable request for system service |
SysTick_IRQn | -1 System Tick Timer |
GPT1_Int | 0 Interrupt node 0: GPT1 Block |
GPT2_Int | 1 Interrupt node 1: GPT2 Block |
ADC2_Tmr3_Int | 2 Interrupt node 2: ADC2, Timer3, BEMF, ADC3/4 |
ADC1_VREF5_Int | 3 Interrupt node 3: ADC1, VAREF |
CCU6_SR0_Int | 4 Interrupt node 4: CCU6 node0 |
CCU6_SR1_Int | 5 Interrupt node 5: CCU6 node1 |
CCU6_SR2_Int | 6 Interrupt node 6: CCU6 node2 |
CCU6_SR3_Int | 7 Interrupt node 7: CCU6 node3 |
SSC1_Int | 8 Interrupt node 8: SSC1 |
SSC2_Int | 9 Interrupt node 9: SSC2 |
UART1_LIN_Tmr2_Int | 10 Interrupt node10: UART1(ASC,LIN), Timer2 |
UART2_Tmr21_EINT2_Int | 11 Interrupt node11: UART2, Timer21, EINT2 |
EXINT0_MON_Int | 12 Interrupt node12: EINT0, MON |
EXINT1_Int | 13 Interrupt node13: EINT1 |
BDRV_CP_Int | 14 Interrupt node14: BDRV, Charge Pump |
DMA_Int | 15 Interrupt node15: DMA |