Infineon MOTIX™ MCU TLE987x Device Family SDK
Functions
isr.h File Reference

Go to the source code of this file.

Detailed Description

Interrupt Service Routines low level access library.

Version
V0.3.0
Date
02. Jan 2025
Note
This file violates [MISRA Rule 27], [MISRA 2012 Rule 8.5, required], [MISRA 2012 Rule 2.2, required], [MISRA 2012 Rule 10.7, required], [MISRA 2012 Rule 12.2, required]

Functions

void GPT1_IRQHandler (void)
 The GPT1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. GPT1_IRQHandler is responsible for: GPT1 T2 INT, GPT1 T3 INT, GPT1 T4 INT. More...
 
void GPT2_IRQHandler (void)
 The GPT2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. GPT2_IRQHandler is responsible for: GPT2 T5 INT, GPT2 T6 INT, GPT2 CAPREL INT. More...
 
void ADC2_IRQHandler (void)
 The ADC2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. ADC2_IRQHandler is responsible for: TIMER3 HB INT, TIMER3 LB INT, ADC2 VBG UP INT, ADC2 VBG LO INT, BEMF U HI INT, BEMF U LO INT, BEMF V HI INT, BEMF V LO INT, BEMF W HI INT, BEMF W LO INT, ADC34 ADC3 INT, ADC34 ADC4 INT. More...
 
void ADC1_IRQHandler (void)
 The ADC1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. ADC1_IRQHandler is responsible for: ADC1 CH0 INT, ADC1 CH1 INT, ADC1 CH2 INT, ADC1 CH3 INT, ADC1 CH4 INT, ADC1 CH5 INT, ADC1 CH6 INT, ADC1 CH7 INT, ADC1 EIM INT, ADC1 ESM INT, ADC2 VAREF UP INT, ADC2 VAREF LO INT, ADC2 VAREF OL INT. More...
 
void CCU6SR0_IRQHandler (void)
 The SSU6SR0_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR0_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN. More...
 
void CCU6SR1_IRQHandler (void)
 The SSU6SR1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR1_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN. More...
 
void CCU6SR2_IRQHandler (void)
 The SSU6SR2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR2_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN. More...
 
void CCU6SR3_IRQHandler (void)
 The SSU6SR3_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR3_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN. More...
 
void SSC1_IRQHandler (void)
 The SSC1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSC1_IRQHandler is responsible for: SSC1 RX INT, SSC1 TX INT, SSC1 ERR INT. More...
 
void SSC2_IRQHandler (void)
 The SSC2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSC2_IRQHandler is responsible for: SSC2 RX INT, SSC2 TX INT, SSC2 ERR INT. More...
 
void UART1_IRQHandler (void)
 The UART1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. UART1_IRQHandler is responsible for: UART1 RX INT, UART1 TX INT, TIMER2 EXF2 INT, TIMER2 TF2 INT, LIN EOF INT, LIN ERR INT, LIN OC INT, LIN OT INT, LIN TMOUT INT. More...
 
void UART2_IRQHandler (void)
 The UART2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. UART2_IRQHandler is responsible for: UART2 RX INT, UART2 TX INT, TIMER21 EXF2 INT, TIMER21 TF2 INT, SCU EXINT2 RISING INT, SCU EXINT2 FALLING INT. More...
 
void EXINT0_IRQHandler (void)
 The EXINT0_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. EXINT0_IRQHandler is responsible for: SCU EXINT0 RISING INT, SCU EXINT0 FALLING INT, MON RISING INT, MON FALLING INT. More...
 
void EXINT1_IRQHandler (void)
 The EXINT1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. EXINT1_IRQHandler is responsible for: SCU EXINT1 RISING INT, SCU EXINT1 FALLING INT,. More...
 
void BDRV_IRQHandler (void)
 The BDRV_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. BDRV_IRQHandler is responsible for: BDRV HS1 OC INT, BDRV LS1 OC INT, BDRV HS2 OC INT, BDRV LS2 OC INT, BDRV HS3 OC INT, BDRV LS3 OC INT, BDRV HS1 DS INT, BDRV LS1 DS INT, BDRV HS2 DS INT, BDRV LS2 DS INT, BDRV HS3 DS INT, BDRV LS3 DS INT, ADC2 VSD UP INT, ADC2 VSD LO INT, BDRV VCP LO2 INT, ADC2 VCP UP INT, ADC2 VCP LO INT. More...
 
void DMA_IRQHandler (void)
 The DMA_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. DMA_IRQHandler is responsible for: DMA_SQ1_RDY_INT, DMA_SQ2_RDY_INT, DMA_SSC_TX_INT, DMA_SSC_RX_INT, DMA_CH1_INT, DMA_CH2_INT, DMA_CH3_INT_EN, DMA_CH4_INT, DMA_CH5_INT, DMA_CH6_INT, DMA_CH7_INT, DMA_CH8_INT_EN, DMA_GPT12E_INT. More...
 
void NMI_Handler (void)
 The NMI_Handler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. NMI_Handler is responsible for: SCU_NMI_WDT_INT, SCU_NMI_PLL_INT, SCU_NMI_NVM_INT, SCU_NMI_OWD_INT, SCU_NMI_MAP_INT, SCU_ECC_RAM_DB_INT_EN, SCU_ECC_NVM_DB_INT_EN, ADC2_SYS_TEMP_UP_INT, ADC2_SYS_TEMP_LO_INT, ADC2_PMU_TEMP_UP_INT, ADC2_PMU_TEMP_LO_INT, ADC2_VS_UP_INT, ADC2_VS_LO_INT, ADC2_VBAT_UP_INT, ADC2_VBAT_LO_INT, ADC2_VDDC_UP_INT, ADC2_VDDC_LO_INT, ADC2_VDDP_UP_INT, ADC2_VDDP_LO_INT, ADC2_MON_UP_INT, ADC2_MON_LO_INT, PMU_VDDEXT_SHORT_INT, PMU_VDDEXT_OV_INT, PMU_VDDEXT_OL_INT, PMU_VDDC_OV_INT, PMU_VDDC_OL_INT, PMU_VDDP_OV_INT, PMU_VDDP_OL_INT. More...
 
void HardFault_Handler (void)
 The HardFault_Handler handles the HardFault exception. More...
 
void MemManage_Handler (void)
 The MemManage_Handler handles the MemManage exception. More...
 
void BusFault_Handler (void)
 The BusFault_Handler handles the BusFault exception. More...
 
void UsageFault_Handler (void)
 The UsageFault_Handler handles the UsageFault exception. More...
 
void SysTick_Handler (void)
 The SysTick_Handler handles the SysTick exception. More...
 

Function Documentation

◆ ADC1_IRQHandler()

void ADC1_IRQHandler ( void  )

The ADC1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. ADC1_IRQHandler is responsible for: ADC1 CH0 INT, ADC1 CH1 INT, ADC1 CH2 INT, ADC1 CH3 INT, ADC1 CH4 INT, ADC1 CH5 INT, ADC1 CH6 INT, ADC1 CH7 INT, ADC1 EIM INT, ADC1 ESM INT, ADC2 VAREF UP INT, ADC2 VAREF LO INT, ADC2 VAREF OL INT.

◆ ADC2_IRQHandler()

void ADC2_IRQHandler ( void  )

The ADC2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. ADC2_IRQHandler is responsible for: TIMER3 HB INT, TIMER3 LB INT, ADC2 VBG UP INT, ADC2 VBG LO INT, BEMF U HI INT, BEMF U LO INT, BEMF V HI INT, BEMF V LO INT, BEMF W HI INT, BEMF W LO INT, ADC34 ADC3 INT, ADC34 ADC4 INT.

◆ BDRV_IRQHandler()

void BDRV_IRQHandler ( void  )

The BDRV_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. BDRV_IRQHandler is responsible for: BDRV HS1 OC INT, BDRV LS1 OC INT, BDRV HS2 OC INT, BDRV LS2 OC INT, BDRV HS3 OC INT, BDRV LS3 OC INT, BDRV HS1 DS INT, BDRV LS1 DS INT, BDRV HS2 DS INT, BDRV LS2 DS INT, BDRV HS3 DS INT, BDRV LS3 DS INT, ADC2 VSD UP INT, ADC2 VSD LO INT, BDRV VCP LO2 INT, ADC2 VCP UP INT, ADC2 VCP LO INT.

◆ BusFault_Handler()

void BusFault_Handler ( void  )

The BusFault_Handler handles the BusFault exception.

◆ CCU6SR0_IRQHandler()

void CCU6SR0_IRQHandler ( void  )

The SSU6SR0_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR0_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN.

◆ CCU6SR1_IRQHandler()

void CCU6SR1_IRQHandler ( void  )

The SSU6SR1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR1_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN.

◆ CCU6SR2_IRQHandler()

void CCU6SR2_IRQHandler ( void  )

The SSU6SR2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR2_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN.

◆ CCU6SR3_IRQHandler()

void CCU6SR3_IRQHandler ( void  )

The SSU6SR3_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSU6SR3_IRQHandler is responsible for: CCU6_CH0_CM_R_INT_EN, CCU6_CH0_CM_F_INT_EN CCU6_CH1_CM_R_INT_EN, CCU6_CH1_CM_F_INT_EN CCU6_CH2_CM_R_INT_EN, CCU6_CH2_CM_F_INT_EN CCU6_T12_OM_INT_EN, CCU6_T12_PM_INT_EN CCU6_T13_CM_INT_EN, CCU6_T13_PM_INT_EN CCU6_TRAP_INT_EN, CCU6_WHE_INT_EN, CCU6_CHE_INT_EN, CCU6_MCM_STR_INT_EN.

◆ DMA_IRQHandler()

void DMA_IRQHandler ( void  )

The DMA_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. DMA_IRQHandler is responsible for: DMA_SQ1_RDY_INT, DMA_SQ2_RDY_INT, DMA_SSC_TX_INT, DMA_SSC_RX_INT, DMA_CH1_INT, DMA_CH2_INT, DMA_CH3_INT_EN, DMA_CH4_INT, DMA_CH5_INT, DMA_CH6_INT, DMA_CH7_INT, DMA_CH8_INT_EN, DMA_GPT12E_INT.

◆ EXINT0_IRQHandler()

void EXINT0_IRQHandler ( void  )

The EXINT0_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. EXINT0_IRQHandler is responsible for: SCU EXINT0 RISING INT, SCU EXINT0 FALLING INT, MON RISING INT, MON FALLING INT.

◆ EXINT1_IRQHandler()

void EXINT1_IRQHandler ( void  )

The EXINT1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. EXINT1_IRQHandler is responsible for: SCU EXINT1 RISING INT, SCU EXINT1 FALLING INT,.

◆ GPT1_IRQHandler()

void GPT1_IRQHandler ( void  )

The GPT1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. GPT1_IRQHandler is responsible for: GPT1 T2 INT, GPT1 T3 INT, GPT1 T4 INT.

◆ GPT2_IRQHandler()

void GPT2_IRQHandler ( void  )

The GPT2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. GPT2_IRQHandler is responsible for: GPT2 T5 INT, GPT2 T6 INT, GPT2 CAPREL INT.

◆ HardFault_Handler()

void HardFault_Handler ( void  )

The HardFault_Handler handles the HardFault exception.

◆ MemManage_Handler()

void MemManage_Handler ( void  )

The MemManage_Handler handles the MemManage exception.

◆ NMI_Handler()

void NMI_Handler ( void  )

The NMI_Handler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. NMI_Handler is responsible for: SCU_NMI_WDT_INT, SCU_NMI_PLL_INT, SCU_NMI_NVM_INT, SCU_NMI_OWD_INT, SCU_NMI_MAP_INT, SCU_ECC_RAM_DB_INT_EN, SCU_ECC_NVM_DB_INT_EN, ADC2_SYS_TEMP_UP_INT, ADC2_SYS_TEMP_LO_INT, ADC2_PMU_TEMP_UP_INT, ADC2_PMU_TEMP_LO_INT, ADC2_VS_UP_INT, ADC2_VS_LO_INT, ADC2_VBAT_UP_INT, ADC2_VBAT_LO_INT, ADC2_VDDC_UP_INT, ADC2_VDDC_LO_INT, ADC2_VDDP_UP_INT, ADC2_VDDP_LO_INT, ADC2_MON_UP_INT, ADC2_MON_LO_INT, PMU_VDDEXT_SHORT_INT, PMU_VDDEXT_OV_INT, PMU_VDDEXT_OL_INT, PMU_VDDC_OV_INT, PMU_VDDC_OL_INT, PMU_VDDP_OV_INT, PMU_VDDP_OL_INT.

◆ SSC1_IRQHandler()

void SSC1_IRQHandler ( void  )

The SSC1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSC1_IRQHandler is responsible for: SSC1 RX INT, SSC1 TX INT, SSC1 ERR INT.

◆ SSC2_IRQHandler()

void SSC2_IRQHandler ( void  )

The SSC2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. SSC2_IRQHandler is responsible for: SSC2 RX INT, SSC2 TX INT, SSC2 ERR INT.

◆ SysTick_Handler()

void SysTick_Handler ( void  )

The SysTick_Handler handles the SysTick exception.

◆ UART1_IRQHandler()

void UART1_IRQHandler ( void  )

The UART1_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. UART1_IRQHandler is responsible for: UART1 RX INT, UART1 TX INT, TIMER2 EXF2 INT, TIMER2 TF2 INT, LIN EOF INT, LIN ERR INT, LIN OC INT, LIN OT INT, LIN TMOUT INT.

◆ UART2_IRQHandler()

void UART2_IRQHandler ( void  )

The UART2_IRQHandler checks which interrupt caused the call of the node handler (interrupt enabled and status bit indicates that this interrupt occurred). Then it calls the corresponding interrupt handler and clears the interrupt status bit. UART2_IRQHandler is responsible for: UART2 RX INT, UART2 TX INT, TIMER21 EXF2 INT, TIMER21 TF2 INT, SCU EXINT2 RISING INT, SCU EXINT2 FALLING INT.

◆ UsageFault_Handler()

void UsageFault_Handler ( void  )

The UsageFault_Handler handles the UsageFault exception.