85 #define PMU_RESET_STS_POR (0x80u)
87 #define PMU_RESET_STS_PIN (0x40u)
89 #define PMU_RESET_STS_WDT1 (0x20u)
91 #define PMU_RESET_STS_ClkWDT (0x10u)
93 #define PMU_RESET_STS_LPR (0x08u)
95 #define PMU_RESET_STS_SLEEP (0x04u)
97 #define PMU_RESET_STS_WAKE (0x02u)
99 #define PMU_RESET_STS_SYS_FAIL (0x01u)
102 #define PMU_VDDEXT_STABLE (0x80u)
104 #define PMU_VDDEXT_OK (0x40u)
106 #define PMU_VDDEXT_OVERLOAD (0x20u)
108 #define PMU_VDDEXT_OVERVOLT (0x10u)
110 #define PMU_VDDEXT_SHORT (0x08u)
112 #define PMU_VDDEXT_IE (0x04u)
114 #define PMU_VDDEXT_CYC_EN (0x02u)
116 #define PMU_VDDEXT_ENABLE (0x01u)
#define PMU
Definition: tle987x.h:6069
#define PMU_VDDEXT_CTRL_FAIL_EN_Msk
Definition: tle987x.h:8372
#define PMU_PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Msk
Definition: tle987x.h:8333
#define PMU_PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Msk
Definition: tle987x.h:8339
#define PMU_PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Pos
Definition: tle987x.h:8332
#define PMU_VDDEXT_CTRL_STABLE_Pos
Definition: tle987x.h:8361
#define PMU_VDDEXT_CTRL_ENABLE_Msk
Definition: tle987x.h:8376
#define PMU_VDDEXT_CTRL_STABLE_Msk
Definition: tle987x.h:8362
#define PMU_VDDEXT_CTRL_FAIL_EN_Pos
Definition: tle987x.h:8371
#define PMU_PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Pos
Definition: tle987x.h:8338
#define PMU_VDDEXT_CTRL_ENABLE_Pos
Definition: tle987x.h:8375
INLINE void PMU_VDDP_Int_Dis(void)
disables VDDP status information as interrupt source.
Definition: pmu.h:245
INLINE void PMU_VDDEXT_Short_Clr(void)
Clear VDDEXT Short Error Flag.
Definition: pmu.h:368
INLINE uint8 PMU_VDDEXT_Off(void)
Switches off (disables) VDDEXT and returns the stable state of VDDEXT (VDDEXT Supply works inside its...
Definition: pmu.h:350
INLINE uint8 PMU_Get_Reset_Status(void)
Reads out the Reset Status Hard Register (PMU->PMU_RESET_STS1)
Definition: pmu.h:308
INLINE void PMU_VDDEXT_Set(uint8 FlagMask)
Set the given bits in the PMU->VDDEXT_CTRL register.
Definition: pmu.h:387
INLINE void PMU_VDDP_Int_En(void)
enables VDDP status information as interrupt source.
Definition: pmu.h:223
INLINE void PMU_VDDEXT_Int_Dis(void)
disables VDDEXT Supply status information as interrupt source (disable Fail Interrupt).
Definition: pmu.h:159
INLINE void PMU_VDDEXT_Int_En(void)
enables VDDEXT Supply status information as interrupt source (enable Fail Interrupt).
Definition: pmu.h:137
void PMU_Init(void)
Initializes the ADC1 based on the Config Wizard for MOTIX MCU configuration.
INLINE void PMU_Clear_Reset_Status(void)
Clears the Reset Status Hard Register (PMU->PMU_RESET_STS1)
Definition: pmu.h:328
bool PMU_VDDEXT_On(void)
Turns VDDEXT on.
INLINE void PMU_VDDC_Int_Dis(void)
disables VDDC status information as interrupt source.
Definition: pmu.h:202
INLINE void PMU_VDDC_Int_En(void)
enables VDDC status information as interrupt source.
Definition: pmu.h:180
SFR low level access library.
INLINE uint8 u8_Field_Rd8(const volatile uint8 *reg, uint8 pos, uint8 msk)
This function reads a 8-bit field of a 8-bit register.
Definition: sfr_access.h:397
INLINE void Field_Wrt8all(volatile uint8 *reg, uint8 val)
This function writes an 8-bit register directly, no mask/position needed.
Definition: sfr_access.h:317
INLINE void Field_Clr8(volatile uint8 *reg, uint8 msk)
This function clears a bit field in a 8-bit register.
Definition: sfr_access.h:367
INLINE uint8 u1_Field_Rd8(const volatile uint8 *reg, uint8 pos, uint8 msk)
This function reads a 1-bit field of a 8-bit register.
Definition: sfr_access.h:382
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:132
uint8_t uint8
8 bit unsigned value
Definition: types.h:137