89 #define SSC1_tBit_us (1.0 / (SSC1_MAN_BAUDRATE / 1000.0))
91 #define SSC2_tBit_us (1.0 / (SSC2_MAN_BAUDRATE / 1000.0))
#define SSC2
Definition: tle987x.h:6100
#define SSC1
Definition: tle987x.h:6099
#define SCU
Definition: tle987x.h:6097
#define SCU_MODIEN2_TIREN2_Msk
Definition: tle987x.h:9153
#define SSC1_RB_RB_VALUE_Pos
Definition: tle987x.h:9877
#define SCU_MODIEN1_EIREN1_Msk
Definition: tle987x.h:9142
#define SCU_MODIEN1_TIREN1_Pos
Definition: tle987x.h:9139
#define SCU_MODIEN1_RIREN1_Msk
Definition: tle987x.h:9138
#define SCU_MODIEN2_TIREN2_Pos
Definition: tle987x.h:9152
#define SCU_IRCON2CLR_TIRC_Pos
Definition: tle987x.h:9068
#define SSC2_TB_TB_VALUE_Pos
Definition: tle987x.h:9930
#define SCU_MODIEN2_RIREN2_Pos
Definition: tle987x.h:9150
#define SSC1_TB_TB_VALUE_Pos
Definition: tle987x.h:9880
#define SSC1_RB_RB_VALUE_Msk
Definition: tle987x.h:9878
#define SCU_IRCON2CLR_EIRC_Pos
Definition: tle987x.h:9070
#define SCU_MODIEN1_TIREN1_Msk
Definition: tle987x.h:9140
#define SCU_IRCON2CLR_RIRC_Pos
Definition: tle987x.h:9066
#define SCU_IRCON2CLR_EIRC_Msk
Definition: tle987x.h:9071
#define SCU_IRCON1CLR_RIRC_Msk
Definition: tle987x.h:9053
#define SCU_MODIEN1_EIREN1_Pos
Definition: tle987x.h:9141
#define SCU_MODIEN2_RIREN2_Msk
Definition: tle987x.h:9151
#define SSC2_RB_RB_VALUE_Pos
Definition: tle987x.h:9927
#define SCU_MODIEN2_EIREN2_Msk
Definition: tle987x.h:9155
#define SCU_MODIEN1_RIREN1_Pos
Definition: tle987x.h:9137
#define SSC1_TB_TB_VALUE_Msk
Definition: tle987x.h:9881
#define SCU_IRCON2CLR_TIRC_Msk
Definition: tle987x.h:9069
#define SSC2_RB_RB_VALUE_Msk
Definition: tle987x.h:9928
#define SSC2_TB_TB_VALUE_Msk
Definition: tle987x.h:9931
#define SCU_MODIEN2_EIREN2_Pos
Definition: tle987x.h:9154
#define SCU_IRCON1CLR_RIRC_Pos
Definition: tle987x.h:9052
#define SCU_IRCON1CLR_TIRC_Msk
Definition: tle987x.h:9055
#define SCU_IRCON2CLR_RIRC_Msk
Definition: tle987x.h:9067
#define SCU_IRCON1CLR_EIRC_Msk
Definition: tle987x.h:9057
#define SCU_IRCON1CLR_EIRC_Pos
Definition: tle987x.h:9056
#define SCU_IRCON1CLR_TIRC_Pos
Definition: tle987x.h:9054
SFR low level access library.
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:342
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:427
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:352
INLINE void SSC2_TX_Int_Clr(void)
clears transmit interrupt flag for SSC2.
Definition: ssc.h:179
INLINE void SSC2_TX_Int_En(void)
enables transmit interrupt for SSC2.
Definition: ssc.h:380
void SSC1_Init(void)
Initializes the SSC1 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_En(void)
enables receive interrupt for SSC2.
Definition: ssc.h:425
INLINE void SSC2_Err_Int_En(void)
enables error interrupt for SSC2.
Definition: ssc.h:470
INLINE void SSC1_RX_Int_Dis(void)
disables receive interrupt for SSC1.
Definition: ssc.h:313
INLINE void SSC1_Err_Int_Clr(void)
clears error interrupt flag for SSC1.
Definition: ssc.h:157
INLINE void SSC1_RX_Int_Clr(void)
clears receive interrupt flag for SSC1.
Definition: ssc.h:135
INLINE void SSC1_RX_Int_En(void)
enables receive interrupt for SSC1.
Definition: ssc.h:290
void SSC2_Init(void)
Initializes the SSC2 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_Clr(void)
clears receive interrupt flag for SSC2.
Definition: ssc.h:201
INLINE uint16 SSC2_ReadWord(void)
SSC2: Read data word from receive buffer.
Definition: ssc.h:607
INLINE void SSC1_Err_Int_Dis(void)
disables error interrupt for SSC1.
Definition: ssc.h:358
INLINE void SSC2_Err_Int_Clr(void)
clears error interrupt flag for SSC2.
Definition: ssc.h:223
INLINE void SSC2_RX_Int_Dis(void)
disables receive interrupt for SSC2.
Definition: ssc.h:448
INLINE void SSC1_TX_Int_En(void)
enables transmit interrupt for SSC1.
Definition: ssc.h:245
INLINE uint16 SSC2_SendWord(uint16 DataWord)
SSC2: Send data word.
Definition: ssc.h:585
INLINE void SSC1_Err_Int_En(void)
enables error interrupt for SSC1.
Definition: ssc.h:335
INLINE void SSC1_TX_Int_Dis(void)
disables transmit interrupt for SSC1.
Definition: ssc.h:268
INLINE uint16 SSC1_SendWord(uint16 DataWord)
SSC1: Send data word.
Definition: ssc.h:541
INLINE uint16 SSC1_ReadWord(void)
SSC1: Read data word from receive buffer.
Definition: ssc.h:563
INLINE void SSC2_Err_Int_Dis(void)
disables error interrupt for SSC2.
Definition: ssc.h:493
INLINE void SSC1_TX_Int_Clr(void)
clears transmit interrupt flag for SSC1.
Definition: ssc.h:113
INLINE void SSC2_TX_Int_Dis(void)
disables transmit interrupt for SSC2.
Definition: ssc.h:403
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:148
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint16_t uint16
16 bit unsigned value
Definition: types.h:154