Infineon MOTIX™ MCU TLE987x Device Family SDK
ssc.h
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37 /*******************************************************************************
38 ** Author(s) Identity **
39 ********************************************************************************
40 ** Initials Name **
41 ** ---------------------------------------------------------------------------**
42 ** DM Daniel Mysliwitz **
43 ** TA Thomas Albersinger **
44 ** BG Blandine Guillot **
45 ** JO Julia Ott **
46 *******************************************************************************/
47 
48 /*******************************************************************************
49 ** Revision Control History **
50 ********************************************************************************
51 ** V0.1.0: 2014-05-15, TA: Initial version **
52 ** V0.1.1: 2015-02-10, DM: Individual header file added **
53 ** V0.1.2: 2015-06-24, DM: SendWord functions return received data word **
54 ** V0.1.3: 2017-05-24, DM: Interrupt APIs added **
55 ** V0.1.4: 2017-10-18, DM: MISRA 2012 compliance, the following PC-Lint **
56 ** rules are globally deactivated: **
57 ** - Info 793: ANSI/ISO limit of 6 'significant **
58 ** characters in an external identifier **
59 ** - Info 835: A zero has been given as right **
60 ** argument to operator **
61 ** - Info 845: The left argument to operator '&' **
62 ** is certain to be 0 **
63 ** Replaced macros by INLINE functions **
64 ** Replaced register accesses within functions by **
65 ** function calls **
66 ** Replaced __STATIC_INLINE by INLINE **
67 ** V0.1.5: 2018-11-27, JO: Doxygen update **
68 ** Moved revision history from ssc.c to ssc.h **
69 ** Replaced __STATIC_INLINE by INLINE **
70 ** V0.1.6: 2020-04-15, BG: Updated revision history format **
71 ** V0.1.7: 2020-07-21, BG: EP-439: Formatted .h/.c files **
72 ** V0.1.8: 2022-02-28, JO: EP-936: Updated copyright and branding **
73 *******************************************************************************/
74 
75 #ifndef SSC_H
76 #define SSC_H
77 
78 /*******************************************************************************
79 ** Includes **
80 *******************************************************************************/
81 #include "tle987x.h"
82 #include "types.h"
83 #include "sfr_access.h"
84 
85 /*******************************************************************************
86 ** Global Macro Definitions **
87 *******************************************************************************/
89 #define SSC1_tBit_us (1.0 / (SSC1_MAN_BAUDRATE / 1000.0))
91 #define SSC2_tBit_us (1.0 / (SSC2_MAN_BAUDRATE / 1000.0))
92 
93 /*******************************************************************************
94 ** Global Inline Function Definitions **
95 *******************************************************************************/
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498 /*******************************************************************************
499 ** Global Function Declarations **
500 *******************************************************************************/
505 void SSC1_Init(void);
506 
511 void SSC2_Init(void);
512 
513 /*******************************************************************************
514 ** Global Inline Function Declarations **
515 *******************************************************************************/
520 
521 /*******************************************************************************
522 ** Global Inline Function Definitions **
523 *******************************************************************************/
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612 #endif
#define SSC2
Definition: tle987x.h:6100
#define SSC1
Definition: tle987x.h:6099
#define SCU
Definition: tle987x.h:6097
#define SCU_MODIEN2_TIREN2_Msk
Definition: tle987x.h:9153
#define SSC1_RB_RB_VALUE_Pos
Definition: tle987x.h:9877
#define SCU_MODIEN1_EIREN1_Msk
Definition: tle987x.h:9142
#define SCU_MODIEN1_TIREN1_Pos
Definition: tle987x.h:9139
#define SCU_MODIEN1_RIREN1_Msk
Definition: tle987x.h:9138
#define SCU_MODIEN2_TIREN2_Pos
Definition: tle987x.h:9152
#define SCU_IRCON2CLR_TIRC_Pos
Definition: tle987x.h:9068
#define SSC2_TB_TB_VALUE_Pos
Definition: tle987x.h:9930
#define SCU_MODIEN2_RIREN2_Pos
Definition: tle987x.h:9150
#define SSC1_TB_TB_VALUE_Pos
Definition: tle987x.h:9880
#define SSC1_RB_RB_VALUE_Msk
Definition: tle987x.h:9878
#define SCU_IRCON2CLR_EIRC_Pos
Definition: tle987x.h:9070
#define SCU_MODIEN1_TIREN1_Msk
Definition: tle987x.h:9140
#define SCU_IRCON2CLR_RIRC_Pos
Definition: tle987x.h:9066
#define SCU_IRCON2CLR_EIRC_Msk
Definition: tle987x.h:9071
#define SCU_IRCON1CLR_RIRC_Msk
Definition: tle987x.h:9053
#define SCU_MODIEN1_EIREN1_Pos
Definition: tle987x.h:9141
#define SCU_MODIEN2_RIREN2_Msk
Definition: tle987x.h:9151
#define SSC2_RB_RB_VALUE_Pos
Definition: tle987x.h:9927
#define SCU_MODIEN2_EIREN2_Msk
Definition: tle987x.h:9155
#define SCU_MODIEN1_RIREN1_Pos
Definition: tle987x.h:9137
#define SSC1_TB_TB_VALUE_Msk
Definition: tle987x.h:9881
#define SCU_IRCON2CLR_TIRC_Msk
Definition: tle987x.h:9069
#define SSC2_RB_RB_VALUE_Msk
Definition: tle987x.h:9928
#define SSC2_TB_TB_VALUE_Msk
Definition: tle987x.h:9931
#define SCU_MODIEN2_EIREN2_Pos
Definition: tle987x.h:9154
#define SCU_IRCON1CLR_RIRC_Pos
Definition: tle987x.h:9052
#define SCU_IRCON1CLR_TIRC_Msk
Definition: tle987x.h:9055
#define SCU_IRCON2CLR_RIRC_Msk
Definition: tle987x.h:9067
#define SCU_IRCON1CLR_EIRC_Msk
Definition: tle987x.h:9057
#define SCU_IRCON1CLR_EIRC_Pos
Definition: tle987x.h:9056
#define SCU_IRCON1CLR_TIRC_Pos
Definition: tle987x.h:9054
SFR low level access library.
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:342
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:337
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:427
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:352
INLINE void SSC2_TX_Int_Clr(void)
clears transmit interrupt flag for SSC2.
Definition: ssc.h:179
INLINE void SSC2_TX_Int_En(void)
enables transmit interrupt for SSC2.
Definition: ssc.h:380
void SSC1_Init(void)
Initializes the SSC1 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_En(void)
enables receive interrupt for SSC2.
Definition: ssc.h:425
INLINE void SSC2_Err_Int_En(void)
enables error interrupt for SSC2.
Definition: ssc.h:470
INLINE void SSC1_RX_Int_Dis(void)
disables receive interrupt for SSC1.
Definition: ssc.h:313
INLINE void SSC1_Err_Int_Clr(void)
clears error interrupt flag for SSC1.
Definition: ssc.h:157
INLINE void SSC1_RX_Int_Clr(void)
clears receive interrupt flag for SSC1.
Definition: ssc.h:135
INLINE void SSC1_RX_Int_En(void)
enables receive interrupt for SSC1.
Definition: ssc.h:290
void SSC2_Init(void)
Initializes the SSC2 module based on the Config Wizard for MOTIX MCU configuration.
INLINE void SSC2_RX_Int_Clr(void)
clears receive interrupt flag for SSC2.
Definition: ssc.h:201
INLINE uint16 SSC2_ReadWord(void)
SSC2: Read data word from receive buffer.
Definition: ssc.h:607
INLINE void SSC1_Err_Int_Dis(void)
disables error interrupt for SSC1.
Definition: ssc.h:358
INLINE void SSC2_Err_Int_Clr(void)
clears error interrupt flag for SSC2.
Definition: ssc.h:223
INLINE void SSC2_RX_Int_Dis(void)
disables receive interrupt for SSC2.
Definition: ssc.h:448
INLINE void SSC1_TX_Int_En(void)
enables transmit interrupt for SSC1.
Definition: ssc.h:245
INLINE uint16 SSC2_SendWord(uint16 DataWord)
SSC2: Send data word.
Definition: ssc.h:585
INLINE void SSC1_Err_Int_En(void)
enables error interrupt for SSC1.
Definition: ssc.h:335
INLINE void SSC1_TX_Int_Dis(void)
disables transmit interrupt for SSC1.
Definition: ssc.h:268
INLINE uint16 SSC1_SendWord(uint16 DataWord)
SSC1: Send data word.
Definition: ssc.h:541
INLINE uint16 SSC1_ReadWord(void)
SSC1: Read data word from receive buffer.
Definition: ssc.h:563
INLINE void SSC2_Err_Int_Dis(void)
disables error interrupt for SSC2.
Definition: ssc.h:493
INLINE void SSC1_TX_Int_Clr(void)
clears transmit interrupt flag for SSC1.
Definition: ssc.h:113
INLINE void SSC2_TX_Int_Dis(void)
disables transmit interrupt for SSC2.
Definition: ssc.h:403
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:148
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint16_t uint16
16 bit unsigned value
Definition: types.h:154