Infineon MOTIX™ MCU TLE987x Device Family SDK
scu.h
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39 /*******************************************************************************
40 ** Author(s) Identity **
41 ********************************************************************************
42 ** Initials Name **
43 ** ---------------------------------------------------------------------------**
44 ** DM Daniel Mysliwitz **
45 ** TA Thomas Albersinger **
46 ** BG Blandine Guillot **
47 ** JO Julia Ott **
48 ** VO Vanessa Ongaro **
49 *******************************************************************************/
50 
51 /*******************************************************************************
52 ** Revision Control History **
53 ********************************************************************************
54 ** V0.1.0: 2013-02-10, DM: Initial version **
55 ** V0.1.1: 2013-02-21, DM: VCOSEL added to function SCU_SetSysClk() **
56 ** V0.1.2: 2013-03-06, DM: NVM Protection added **
57 ** V0.1.3: 2013-03-26, DM: EXINT3 removed **
58 ** V0.1.4: 2013-04-05, DM: APCLK1/2 (MI_CLK, FILT_CLK) register access **
59 ** corrected **
60 ** V0.1.5: 2013-11-06, DM: Changed global interrupt disable/enable in **
61 ** power saving functions **
62 ** V0.2.0: 2014-04-26, TA: In SCU_init(): use #defines from the header file **
63 ** generated by the config wizard **
64 ** V0.2.1: 2014-05-18, DM: Fixed SCU_ChangeNVMProtection function **
65 ** V0.2.2: 2014-06-17, DM: Fixed EnterSleepMode, switch LIN Trx. into **
66 ** sleep mode as well **
67 ** V0.2.3: 2014-06-18, TA: Included bootrom.h for NVM protection control **
68 ** Included lin.h because of sleep functions **
69 ** V0.2.4: 2014-06-23, TA: Conditional include of lin.h **
70 ** V0.2.5: 2014-09-09, DM: OSC_CON, XTAL power down handled **
71 ** V0.2.6: 2014-10-20, DM: OSC_CON, OSC_PLL async. set before StopMode entry**
72 ** V0.2.7: 2015-02-10, DM: Individual header file added **
73 ** OSC_CON register defined by IFXConfigWizard **
74 ** V0.2.8: 2015-11-18, DM: In function SCU_EnterStopMode() one __WFE removed**
75 ** V0.2.9: 2015-11-26, DM: Init of DMASRCSELx added **
76 ** V0.3.0: 2016-08-04, DM: Password open check removed for EnterSleepMode, **
77 ** EnterStopMode, EnterSlowMode **
78 ** V0.3.1: 2017-05-26, DM: Global variable SystemFrequency added **
79 ** V0.3.2: 2017-10-11, DM: MISRA 2012 compliance, the following PC-Lint **
80 ** rules are globally deactivated: **
81 ** - Info 793: ANSI/ISO limit of 6 'significant **
82 ** characters in an external identifier **
83 ** - Info 835: A zero has been given as right **
84 ** argument to operator **
85 ** - Info 845: The left argument to operator '&' **
86 ** is certain to be 0 **
87 ** The following rules are locally deactivated: **
88 ** - Warning 438: Last value assigned to variable **
89 ** 'dummy' (defined at line ...) not used **
90 ** - Info 838: Previously assigned value to variable**
91 ** 'dummy' has not been use **
92 ** Replaced register accesses within functions **
93 ** by function calls **
94 ** Replaced __STATIC_INLINE by INLINE **
95 ** V0.3.3: 2018-03-12, DM: SCU_ChangeNVMProtection returns now a bool result**
96 ** V0.3.4: 2018-07-06, BG: SCU_WDT_Start, SCU_WDT_Stop, SCU_WDT_Service, **
97 ** SCU_OpenPASSWD, SCU_ClosePASSWD rewritten **
98 ** V0.3.5: 2018-10-05, JO: Parameter for prescaler to function EnterSlowMode**
99 ** and defines for the slowdown mode prescaler added**
100 ** SCU_ClkInit, SCU_Init, SCU_EnterSleepMode, **
101 ** SCU_EnterStopMode, SCU_EnterSlowMode, **
102 ** SCU_ExitSlowMode,SCU_ChangeNVMProtection **
103 ** rewritten **
104 ** V0.3.6: 2018-11-28, JO: Doxygen update **
105 ** Moved revision history from scu.c to scu.h **
106 ** Replaced register accesses by function calls in **
107 ** SCU_ClkInit **
108 ** Added #ifndef UNIT_TESTING_LV2 condition in **
109 ** SCU_EnterSleepMode for testability **
110 ** Reworked SCU_EnterSlowMode and added a parameter **
111 ** for the divider **
112 ** Reworked SCU_ExitSlowMode **
113 ** V0.3.7: 2019-06-05, JO: Enable SysTick after entering Slow Mode in **
114 ** function SCU_EnterSlowMode **
115 ** V0.3.8: 2020-04-15, BG: Updated revision history format **
116 ** V0.3.9: 2020-04-17, BG: Updated stop mode entry sequence to match the UM **
117 ** V0.4.0: 2020-07-14, JO: EP-431: remove ARMCC v6 Compiler warnings **
118 ** - Added '__attribute__((noreturn))' to **
119 ** definition of SCU_EnterSleepMode(void) **
120 ** V0.4.1: 2020-07-21, BG: EP-439: Formatted .h/.c files **
121 ** V0.5.0: 2020-10-21, DM: EP-529: Updated PLL init. flow **
122 ** V0.5.1: 2020-10-27, DM: EP-559: Replaced Field_Mod() in the power saving **
123 ** function between the Open_/Close_Passwd **
124 ** V0.5.2: 2020-11-05, BG: EP-548: Moved function PLL_setClkSrcToIntOscAsync**
125 ** into contition #if (PMU_STOP_MODE == 1) **
126 ** V0.5.3: 2021-05-26, JO: EP-698: Added clearing of WAKE_STS_GPIO0/1 when **
127 ** entering stop mode **
128 ** V0.5.4: 2021-06-29, BG: EP-175: Added forced inline for SCU_OpenPASSWD **
129 ** to reduce execution time for IAR compiler **
130 ** V0.5.5: 2022-02-25, JO: EP-1040: Corrected usage of CMSIS_Irq_Dis() **
131 ** V0.5.6: 2022-02-28, JO: EP-936: Updated copyright and branding **
132 ** V0.5.7: 2022-10-18, VO: EP-1252: Updated enum definition **
133 *******************************************************************************/
134 
135 #ifndef SCU_H
136 #define SCU_H
137 
138 /*******************************************************************************
139 ** Includes **
140 *******************************************************************************/
141 #include "tle987x.h"
142 #include "types.h"
143 #include "sfr_access.h"
144 #include "scu_defines.h"
145 
146 
147 /*******************************************************************************
148 ** Global Macro Definitions **
149 *******************************************************************************/
151 #define PASSWD_Open (0x98U)
153 #define PASSWD_Close (0xA8U)
154 
156 #define NVM_DATA_WRITE (0U)
158 #define NVM_CODE_WRITE (1U)
160 #define NVM_DATA_READ (2U)
162 #define NVM_CODE_READ (3U)
163 
165 #define PROTECTION_CLEAR (1U)
167 #define PROTECTION_SET (0U)
168 
169 /* Slow Down mode prescaler */
170 #define SLOWDOWN_PRESCALER_1 (0U)
171 #define SLOWDOWN_PRESCALER_2 (1U)
172 #define SLOWDOWN_PRESCALER_3 (2U)
173 #define SLOWDOWN_PRESCALER_4 (3U)
174 #define SLOWDOWN_PRESCALER_8 (4U)
175 #define SLOWDOWN_PRESCALER_16 (5U)
176 #define SLOWDOWN_PRESCALER_24 (6U)
177 #define SLOWDOWN_PRESCALER_32 (7U)
178 #define SLOWDOWN_PRESCALER_48 (8U)
179 #define SLOWDOWN_PRESCALER_64 (9U)
180 #define SLOWDOWN_PRESCALER_96 (10U)
181 #define SLOWDOWN_PRESCALER_128 (11U)
182 #define SLOWDOWN_PRESCALER_192 (12U)
183 #define SLOWDOWN_PRESCALER_256 (13U)
184 #define SLOWDOWN_PRESCALER_384 (14U)
185 #define SLOWDOWN_PRESCALER_512 (15U)
186 
187 
188 /*******************************************************************************
189 ** Global Type Definitions **
190 *******************************************************************************/
194 typedef enum Scu_Mod
195 {
196  Mod_ADC1 = 0x00,
197  Mod_SSC1 = 0x01,
198  Mod_CCU6 = 0x02,
199  Mod_Timer2 = 0x03,
200  Mod_GPT12 = 0x04,
201  Mod_SSC2 = 0x11,
202  Mod_Timer21 = 0x13,
203  Mod_Timer3 = 0x15
205 
206 /*******************************************************************************
207 ** Global Function Declarations **
208 *******************************************************************************/
213 void SCU_ClkInit(void);
214 
219 void SCU_Init(void);
220 
243 
273 void SCU_EnterStopMode(void);
274 
296 void SCU_EnterSlowMode(uint8 divider_scaled);
297 
310 void SCU_ExitSlowMode(void);
311 
334 
335 
336 /*******************************************************************************
337 ** Global Inline Function Declarations **
338 *******************************************************************************/
339 INLINE void SCU_WDT_Start(void);
340 INLINE void SCU_WDT_Stop(void);
341 INLINE void SCU_WDT_Service(void);
342 INLINE void SCU_Disable_Module(TScu_Mod Module);
343 INLINE void SCU_Enable_Module(TScu_Mod Module);
344 INLINE void SCU_OpenPASSWD(void);
345 INLINE void SCU_ClosePASSWD(void);
346 
347 /*******************************************************************************
348 ** Global Inline Function Definitions **
349 *******************************************************************************/
365 {
366  SCU_OpenPASSWD();
368  SCU_ClosePASSWD();
369 }
370 
385 {
386  SCU_OpenPASSWD();
388  SCU_ClosePASSWD();
389 }
390 
405 {
407 }
408 
424 {
425  if (((uint8)Module & (uint8)0x10) == (uint8)0x10)
426  {
427  /* reset the corresponding bit (given by the lower nibble in the parameter Module)
428  * in register PMCON2 */
429  SCU->PMCON2.reg |= (uint8) (1u << ((uint8)Module & (uint8)0x07));
430  }
431  else
432  {
433  /* reset the corresponding bit (given by the lower nibble in the parameter Module)
434  * in register PMCON1 */
435  SCU->PMCON1.reg |= (uint8) (1u << ((uint8)Module & (uint8)0x07));
436  }
437 }
438 
454 {
455  if (((uint8)Module & (uint8)0x10) == (uint8)0x10)
456  {
457  /* set the corresponding bit (given by the lower nibble in the parameter Module)
458  * in register PMCON2 */
459  SCU->PMCON2.reg &= (uint8) ~ (1u << ((uint8)Module & (uint8)0x07));
460  }
461  else
462  {
463  /* set the corresponding bit (given by the lower nibble in the parameter Module)
464  * in register PMCON1 */
465  SCU->PMCON1.reg &= (uint8) ~ (1u << ((uint8)Module & (uint8)0x07));
466  }
467 }
468 
481 #if defined (__IAR_SYSTEMS_ICC__)
482  #pragma inline=forced
483 #endif
485 {
486  Field_Wrt8all(&SCU->PASSWD.reg, PASSWD_Open);
487 }
488 
502 {
503  Field_Wrt8all(&SCU->PASSWD.reg, PASSWD_Close);
504 }
505 
506 #endif
#define SCU
Definition: tle987x.h:6097
#define SCU_WDTCON_WDTRS_Msk
Definition: tle987x.h:9386
#define SCU_WDTCON_WDTEN_Pos
Definition: tle987x.h:9383
#define SCU_WDTCON_WDTEN_Msk
Definition: tle987x.h:9384
#define SCU_WDTCON_WDTRS_Pos
Definition: tle987x.h:9385
void SCU_ExitSlowMode(void)
Gets the device out of Slow Mode.
INLINE void SCU_Enable_Module(TScu_Mod Module)
Enables a given peripheral module in the Peripheral Management Control Registers.
Definition: scu.h:453
enum Scu_Mod TScu_Mod
Scu_Mod
Definition: scu.h:195
@ Mod_Timer21
Definition: scu.h:202
@ Mod_SSC2
Definition: scu.h:201
@ Mod_CCU6
Definition: scu.h:198
@ Mod_GPT12
Definition: scu.h:200
@ Mod_Timer2
Definition: scu.h:199
@ Mod_SSC1
Definition: scu.h:197
@ Mod_Timer3
Definition: scu.h:203
@ Mod_ADC1
Definition: scu.h:196
#define PASSWD_Close
PASSWD Phrases, PASSWD Closed.
Definition: scu.h:153
void SCU_ClkInit(void)
Initializes the system clocks.
INLINE void SCU_Disable_Module(TScu_Mod Module)
Disables a given peripheral module in the Peripheral Management Control Registers.
Definition: scu.h:423
void SCU_Init(void)
Initializes the SCU based on the Config Wizard for MOTIX MCU configuration.
INLINE void SCU_WDT_Start(void)
Starts the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by ...
Definition: scu.h:364
INLINE void SCU_WDT_Service(void)
Services the Watchdog of SCU-DM in the Watchdog Timer Control Register.
Definition: scu.h:404
void SCU_EnterStopMode(void)
Sets the device into Stop Mode.
#define PASSWD_Open
PASSWD Phrases, PASSWD Opened.
Definition: scu.h:151
INLINE void SCU_OpenPASSWD(void)
Opens the bit protection by writing PASSWD_Open to the Bit Protection Register.
Definition: scu.h:484
INLINE void SCU_ClosePASSWD(void)
Closes the bit protection by writing PASSWD_Close to the Bit Protection Register.
Definition: scu.h:501
void SCU_EnterSlowMode(uint8 divider_scaled)
Sets the device into Slow Down Mode.
INLINE void SCU_WDT_Stop(void)
Stops the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by t...
Definition: scu.h:384
void SCU_EnterSleepMode(void)
Sets the device into Sleep Mode.
bool SCU_ChangeNVMProtection(uint32 mode, uint32 action)
Sets the Write/Read Protection for the Code/Data Flash.
SFR low level access library.
INLINE void Field_Wrt8all(volatile uint8 *reg, uint8 val)
This function writes an 8-bit register directly, no mask/position needed.
Definition: sfr_access.h:332
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:352
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:148
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint32_t uint32
32 bit unsigned value
Definition: types.h:155