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Infineon MOTIX™ MCU TLE987x Device Family SDK
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Go to the source code of this file.
Direct Memory Access low level access library.
Data Structures | |
struct | TControl |
This structure lists the bit assignments for the channel_cfg memory location. More... | |
struct | TDMA_Entry |
This structure lists the DMA transfer memory locations. More... | |
Macros | |
#define | DMA_CH0 (0u) |
DMA channel selection macro, DMA CH0. More... | |
#define | DMA_CH1 (1u) |
DMA channel selection macro, DMA CH1. More... | |
#define | DMA_CH2 (2u) |
DMA channel selection macro, DMA CH2. More... | |
#define | DMA_CH3 (3u) |
DMA channel selection macro, DMA CH3. More... | |
#define | DMA_CH4 (4u) |
DMA channel selection macro, DMA CH4. More... | |
#define | DMA_CH5 (5u) |
DMA channel selection macro, DMA CH5. More... | |
#define | DMA_CH6 (6u) |
DMA channel selection macro, DMA CH6. More... | |
#define | DMA_CH7 (7u) |
DMA channel selection macro, DMA CH7. More... | |
#define | DMA_CH8 (8u) |
DMA channel selection macro, DMA CH8. More... | |
#define | DMA_CH9 (9u) |
DMA channel selection macro, DMA CH9. More... | |
#define | DMA_CH10 (10u) |
DMA channel selection macro, DMA CH10. More... | |
#define | DMA_CH11 (11u) |
DMA channel selection macro, DMA CH11. More... | |
#define | DMA_CH12 (12u) |
DMA channel selection macro, DMA CH12. More... | |
#define | DMA_CH13 (13u) |
DMA channel selection macro, DMA CH13, for TLE9879-2QXA40 only. More... | |
#define | DMA_MASK_CH0 ((uint16)1u << DMA_CH0) |
DMA channel Mask macro, DMA CH0 MASK. More... | |
#define | DMA_MASK_CH1 ((uint16)1u << DMA_CH1) |
DMA channel Mask macro, DMA CH1 MASK. More... | |
#define | DMA_MASK_CH2 ((uint16)1u << DMA_CH2) |
DMA channel Mask macro, DMA CH2 MASK. More... | |
#define | DMA_MASK_CH3 ((uint16)1u << DMA_CH3) |
DMA channel Mask macro, DMA CH3 MASK. More... | |
#define | DMA_MASK_CH4 ((uint16)1u << DMA_CH4) |
DMA channel Mask macro, DMA CH4 MASK. More... | |
#define | DMA_MASK_CH5 ((uint16)1u << DMA_CH5) |
DMA channel Mask macro, DMA CH5 MASK. More... | |
#define | DMA_MASK_CH6 ((uint16)1u << DMA_CH6) |
DMA channel Mask macro, DMA CH6 MASK. More... | |
#define | DMA_MASK_CH7 ((uint16)1u << DMA_CH7) |
DMA channel Mask macro, DMA CH7 MASK. More... | |
#define | DMA_MASK_CH8 ((uint16)1u << DMA_CH8) |
DMA channel Mask macro, DMA CH8 MASK. More... | |
#define | DMA_MASK_CH9 ((uint16)1u << DMA_CH9) |
DMA channel Mask macro, DMA CH9 MASK. More... | |
#define | DMA_MASK_CH10 ((uint16)1u << DMA_CH10) |
DMA channel Mask macro, DMA CH10 MASK. More... | |
#define | DMA_MASK_CH11 ((uint16)1u << DMA_CH11) |
DMA channel Mask macro, DMA CH11 MASK. More... | |
#define | DMA_MASK_CH12 ((uint16)1u << DMA_CH12) |
DMA channel Mask macro, DMA CH12 MASK. More... | |
#define | DMA_MASK_CH13 ((uint16)1u << DMA_CH13) |
DMA channel Mask macro, DMA CH13 MASK, for TLE9879-2QXA40 only. More... | |
Typedefs | |
typedef enum DMA_Transfer_Size | TDMA_Transfer_Size |
typedef enum DMA_Increment_Size | TDMA_Increment_Size |
typedef enum DMA_Increment_Mode | TDMA_Increment_Mode |
typedef enum DMA_Cycle_Types | TDMA_Cycle_Types |
Enumerations | |
enum | DMA_Transfer_Size { DMA_8Bit_Transfer = 0u , DMA_16Bit_Transfer = 1u , DMA_32Bit_Transfer = 2u } |
enum | DMA_Increment_Size { DMA_Inc_8bit = 0u , DMA_Inc_16bit = 1u , DMA_Inc_32bit = 2u } |
enum | DMA_Increment_Mode { DMA_No_Inc = 0u , DMA_Src_Inc = 1u , DMA_Dst_Inc = 2u , DMA_Src_Dst_Inc = 3u } |
enum | DMA_Cycle_Types { DMA_Cycle_Type_Invalid = 0u , DMA_Cycle_Type_Basic = 1u , DMA_Cycle_Type_Auto = 2u , DMA_Cycle_Type_PingPong = 3u , DMA_Cycle_Type_MemSctGthPrim = 4u , DMA_Cycle_Type_MemSctGthAlt = 5u , DMA_Cycle_Type_PerSctGthPrim = 6u , DMA_Cycle_Type_PerSctGthAlt = 7u } |
Functions | |
INLINE void | DMA_CH0_Int_Clr (void) |
clears DMA Channel 0 Interrupt flag. More... | |
INLINE void | DMA_CH1_Int_Clr (void) |
clears DMA Channel 1 Interrupt flag. More... | |
INLINE void | DMA_CH2_Int_Clr (void) |
clears DMA Channel 2 Interrupt flag. More... | |
INLINE void | DMA_CH3_Int_Clr (void) |
clears DMA Channel 3 Interrupt flag. More... | |
INLINE void | DMA_CH4_Int_Clr (void) |
clears DMA Channel 4 Interrupt flag. More... | |
INLINE void | DMA_CH5_Int_Clr (void) |
clears DMA Channel 5 Interrupt flag. More... | |
INLINE void | DMA_CH6_Int_Clr (void) |
clears DMA Channel 6 Interrupt flag. More... | |
INLINE void | DMA_CH7_Int_Clr (void) |
clears DMA Channel 7 Interrupt flag. More... | |
INLINE void | DMA_CH8_Int_Clr (void) |
clears DMA Channel 8 Interrupt flag. More... | |
INLINE void | DMA_CH9_Int_Clr (void) |
clears DMA Channel 9 Interrupt flag. More... | |
INLINE void | DMA_CH10_Int_Clr (void) |
clears DMA Channel 10 Interrupt flag. More... | |
INLINE void | DMA_CH11_Int_Clr (void) |
clears DMA Channel 11 Interrupt flag. More... | |
INLINE void | DMA_CH12_Int_Clr (void) |
clears DMA Channel 12 Interrupt flag. More... | |
INLINE void | DMA_CH13_Int_Clr (void) |
clears DMA Channel 13 Interrupt flag. More... | |
INLINE void | DMA_CH0_Int_En (void) |
enables DMA Channel 0 Interrupt. More... | |
INLINE void | DMA_CH0_Int_Dis (void) |
disables DMA Channel 0 Interrupt. More... | |
INLINE void | DMA_CH1_Int_En (void) |
enables DMA Channel 1 Interrupt. More... | |
INLINE void | DMA_CH1_Int_Dis (void) |
disables DMA Channel 1 Interrupt. More... | |
INLINE void | DMA_CH2_Int_En (void) |
enables DMA Channel 2 Interrupt. More... | |
INLINE void | DMA_CH2_Int_Dis (void) |
disables DMA Channel 2 Interrupt. More... | |
INLINE void | DMA_CH3_Int_En (void) |
enables DMA Channel 3 Interrupt. More... | |
INLINE void | DMA_CH3_Int_Dis (void) |
disables DMA Channel 3 Interrupt. More... | |
INLINE void | DMA_CH4_Int_En (void) |
enables DMA Channel 4 Interrupt. More... | |
INLINE void | DMA_CH4_Int_Dis (void) |
disables DMA Channel 4 Interrupt. More... | |
INLINE void | DMA_CH5_Int_En (void) |
enables DMA Channel 5 Interrupt. More... | |
INLINE void | DMA_CH5_Int_Dis (void) |
disables DMA Channel 5 Interrupt. More... | |
INLINE void | DMA_CH6_Int_En (void) |
enables DMA Channel 6 Interrupt. More... | |
INLINE void | DMA_CH6_Int_Dis (void) |
disables DMA Channel 6 Interrupt. More... | |
INLINE void | DMA_CH7_Int_En (void) |
enables DMA Channel 7 Interrupt. More... | |
INLINE void | DMA_CH7_Int_Dis (void) |
disables DMA Channel 7 Interrupt. More... | |
INLINE void | DMA_CH8_Int_En (void) |
enables DMA Channel 8 Interrupt. More... | |
INLINE void | DMA_CH8_Int_Dis (void) |
disables DMA Channel 8 Interrupt. More... | |
INLINE void | DMA_CH9_Int_En (void) |
enables DMA Channel 9 Interrupt. More... | |
INLINE void | DMA_CH9_Int_Dis (void) |
disables DMA Channel 9 Interrupt. More... | |
INLINE void | DMA_CH10_Int_En (void) |
enables DMA Channel 10 Interrupt. More... | |
INLINE void | DMA_CH10_Int_Dis (void) |
disables DMA Channel 10 Interrupt. More... | |
INLINE void | DMA_CH11_Int_En (void) |
enables DMA Channel 11 Interrupt. More... | |
INLINE void | DMA_CH11_Int_Dis (void) |
disables DMA Channel 11 Interrupt. More... | |
INLINE void | DMA_CH12_Int_En (void) |
enables DMA Channel 12 Interrupt. More... | |
INLINE void | DMA_CH12_Int_Dis (void) |
disables DMA Channel 12 Interrupt. More... | |
INLINE void | DMA_CH13_Int_En (void) |
enables DMA Channel 13 Interrupt. More... | |
INLINE void | DMA_CH13_Int_Dis (void) |
disables DMA Channel 13 Interrupt. More... | |
INLINE void | DMA_Primary_Struct_Set (uint32 mask_ch) |
points to the base address of the primary data structure. More... | |
INLINE void | DMA_Channel_Enable_Set (uint32 mask_ch) |
enables DMA Channels. More... | |
INLINE void | DMA_Software_Request_Set (uint32 mask_ch) |
Set software request for DMA Channels. More... | |
INLINE void | DMA_Primary_Struct_Usage_Set (uint32 mask_ch) |
selects the primary data structure for the corresponding DMA channel. More... | |
INLINE void | DMA_Alternate_Struct_Usage_Set (uint32 mask_ch) |
selects the alternate data structure for the corresponding DMA channel. More... | |
INLINE uint32 | DMA_CHx_Entry_Alt (uint8 DMA_Ch) |
This function returns the address inside the alternate structure in RAM for a given DMA channel. More... | |
INLINE uint32 | DMA_CHx_Entry_Pri (uint8 DMA_Ch) |
This function returns the address inside the primary structure in RAM for a given DMA channel. More... | |
void | DMA_Init (void) |
Initializes the DMA structure in RAM and SFRs based on the Config Wizard for MOTIX MCU configuration. More... | |
void | DMA_Setup_Channel (uint32 DMA_ChIdx, uint32 addr_src, uint32 addr_dst, uint32 trans_cnt, TDMA_Transfer_Size datawidth, TDMA_Increment_Mode increment) |
Sets up the desired DMA channel in the primary structure in RAM. More... | |
void | DMA_Reset_Channel (uint32 DMA_ChIdx, uint32 trans_cnt) |
Resets the primary structure in RAM for a given channel and rearms it. More... | |
TDMA_Entry * | DMA_Task_SctGth_Set (TDMA_Entry *entry, uint8 DMA_Ch, TDMA_Entry *Task_List, uint32 NoOfTask) |
Sets up a task to be used with memory scatter-gather mode. More... | |
void | DMA_Channel_MemSctGth_Set (uint32 DMA_ChIdx, TDMA_Entry *Task_List, uint32 NoOfTasks) |
Sets up a channel to operate in Memory Scatter-Gather mode on a given task list. More... | |
void | DMA_Channel_PerSctGth_Set (uint32 DMA_ChIdx, TDMA_Entry *Task_List, uint32 NoOfTasks) |
Sets up a channel to operate in Peripheral Scatter-Gather mode on a given task list. More... | |
TDMA_Entry * | DMA_Task_Set (TDMA_Entry *entry, TDMA_Cycle_Types cycle_type, uint8 arb_rate, uint32 addr_src, uint32 addr_dst, uint32 trans_cnt, TDMA_Transfer_Size datawidth, TDMA_Increment_Mode increment) |
Sets up a task to be used in the Scatter-Gather modes. More... | |
INLINE void | DMA_Master_En (void) |
Enabled the DMA master. More... | |
#define DMA_CH0 (0u) |
DMA channel selection macro, DMA CH0.
#define DMA_CH1 (1u) |
DMA channel selection macro, DMA CH1.
#define DMA_CH10 (10u) |
DMA channel selection macro, DMA CH10.
#define DMA_CH11 (11u) |
DMA channel selection macro, DMA CH11.
#define DMA_CH12 (12u) |
DMA channel selection macro, DMA CH12.
#define DMA_CH13 (13u) |
DMA channel selection macro, DMA CH13, for TLE9879-2QXA40 only.
#define DMA_CH2 (2u) |
DMA channel selection macro, DMA CH2.
#define DMA_CH3 (3u) |
DMA channel selection macro, DMA CH3.
#define DMA_CH4 (4u) |
DMA channel selection macro, DMA CH4.
#define DMA_CH5 (5u) |
DMA channel selection macro, DMA CH5.
#define DMA_CH6 (6u) |
DMA channel selection macro, DMA CH6.
#define DMA_CH7 (7u) |
DMA channel selection macro, DMA CH7.
#define DMA_CH8 (8u) |
DMA channel selection macro, DMA CH8.
#define DMA_CH9 (9u) |
DMA channel selection macro, DMA CH9.
DMA channel Mask macro, DMA CH13 MASK, for TLE9879-2QXA40 only.
typedef enum DMA_Cycle_Types TDMA_Cycle_Types |
typedef enum DMA_Increment_Mode TDMA_Increment_Mode |
typedef enum DMA_Increment_Size TDMA_Increment_Size |
typedef enum DMA_Transfer_Size TDMA_Transfer_Size |
enum DMA_Cycle_Types |
enum DMA_Increment_Mode |
enum DMA_Increment_Size |
enum DMA_Transfer_Size |
selects the alternate data structure for the corresponding DMA channel.
mask_ch | DMA channel Mask |
Example
This example selects the alternate data structure for DMA channel 0.
INLINE void DMA_CH0_Int_Clr | ( | void | ) |
clears DMA Channel 0 Interrupt flag.
Example
This example treats the DMA Channel 0 Interrupt.
INLINE void DMA_CH0_Int_Dis | ( | void | ) |
disables DMA Channel 0 Interrupt.
Example
This example treats the DMA Channel 0 Interrupt.
INLINE void DMA_CH0_Int_En | ( | void | ) |
enables DMA Channel 0 Interrupt.
Example
This example treats the DMA Channel 0 Interrupt.
INLINE void DMA_CH10_Int_Clr | ( | void | ) |
clears DMA Channel 10 Interrupt flag.
Example
This example treats the DMA Channel 10 Interrupt.
INLINE void DMA_CH10_Int_Dis | ( | void | ) |
disables DMA Channel 10 Interrupt.
Example
This example treats the DMA Channel 10 Interrupt.
INLINE void DMA_CH10_Int_En | ( | void | ) |
enables DMA Channel 10 Interrupt.
Example
This example treats the DMA Channel 10 Interrupt.
INLINE void DMA_CH11_Int_Clr | ( | void | ) |
clears DMA Channel 11 Interrupt flag.
Example
This example treats the DMA Channel 11 Interrupt.
INLINE void DMA_CH11_Int_Dis | ( | void | ) |
disables DMA Channel 11 Interrupt.
Example
This example treats the DMA Channel 11 Interrupt.
INLINE void DMA_CH11_Int_En | ( | void | ) |
enables DMA Channel 11 Interrupt.
Example
This example treats the DMA Channel 11 Interrupt.
INLINE void DMA_CH12_Int_Clr | ( | void | ) |
clears DMA Channel 12 Interrupt flag.
Example
This example treats the DMA Channel 12 Interrupt.
INLINE void DMA_CH12_Int_Dis | ( | void | ) |
disables DMA Channel 12 Interrupt.
Example
This example treats the DMA Channel 12 Interrupt.
INLINE void DMA_CH12_Int_En | ( | void | ) |
enables DMA Channel 12 Interrupt.
Example
This example treats the DMA Channel 12 Interrupt.
INLINE void DMA_CH13_Int_Clr | ( | void | ) |
clears DMA Channel 13 Interrupt flag.
Example
This example clears the DMA Channel 13 Interrupt flag when its Status is equal to 1.
INLINE void DMA_CH13_Int_Dis | ( | void | ) |
disables DMA Channel 13 Interrupt.
Example
This example clears the DMA Channel 13 Interrupt flag when its Status is equal to 1.
INLINE void DMA_CH13_Int_En | ( | void | ) |
enables DMA Channel 13 Interrupt.
Example
This example clears the DMA Channel 13 Interrupt flag when its Status is equal to 1.
INLINE void DMA_CH1_Int_Clr | ( | void | ) |
clears DMA Channel 1 Interrupt flag.
Example
This example treats the DMA Channel 1 Interrupt.
INLINE void DMA_CH1_Int_Dis | ( | void | ) |
disables DMA Channel 1 Interrupt.
Example
This example treats the DMA Channel 1 Interrupt.
INLINE void DMA_CH1_Int_En | ( | void | ) |
enables DMA Channel 1 Interrupt.
Example
This example treats the DMA Channel 1 Interrupt.
INLINE void DMA_CH2_Int_Clr | ( | void | ) |
clears DMA Channel 2 Interrupt flag.
Example
This example treats the DMA Channel 2 Interrupt.
INLINE void DMA_CH2_Int_Dis | ( | void | ) |
disables DMA Channel 2 Interrupt.
Example
This example treats the DMA Channel 2 Interrupt.
INLINE void DMA_CH2_Int_En | ( | void | ) |
enables DMA Channel 2 Interrupt.
Example
This example treats the DMA Channel 2 Interrupt.
INLINE void DMA_CH3_Int_Clr | ( | void | ) |
clears DMA Channel 3 Interrupt flag.
Example
This example treats the DMA Channel 3 Interrupt.
INLINE void DMA_CH3_Int_Dis | ( | void | ) |
disables DMA Channel 3 Interrupt.
Example
This example treats the DMA Channel 3 Interrupt.
INLINE void DMA_CH3_Int_En | ( | void | ) |
enables DMA Channel 3 Interrupt.
Example
This example treats the DMA Channel 3 Interrupt.
INLINE void DMA_CH4_Int_Clr | ( | void | ) |
clears DMA Channel 4 Interrupt flag.
Example
This example treats the DMA Channel 4 Interrupt.
INLINE void DMA_CH4_Int_Dis | ( | void | ) |
disables DMA Channel 4 Interrupt.
Example
This example treats the DMA Channel 4 Interrupt.
INLINE void DMA_CH4_Int_En | ( | void | ) |
enables DMA Channel 4 Interrupt.
Example
This example treats the DMA Channel 4 Interrupt.
INLINE void DMA_CH5_Int_Clr | ( | void | ) |
clears DMA Channel 5 Interrupt flag.
Example
This example treats the DMA Channel 5 Interrupt.
INLINE void DMA_CH5_Int_Dis | ( | void | ) |
disables DMA Channel 5 Interrupt.
Example
This example treats the DMA Channel 5 Interrupt.
INLINE void DMA_CH5_Int_En | ( | void | ) |
enables DMA Channel 5 Interrupt.
Example
This example treats the DMA Channel 5 Interrupt.
INLINE void DMA_CH6_Int_Clr | ( | void | ) |
clears DMA Channel 6 Interrupt flag.
Example
This example treats the DMA Channel 6 Interrupt.
INLINE void DMA_CH6_Int_Dis | ( | void | ) |
disables DMA Channel 6 Interrupt.
Example
This example treats the DMA Channel 6 Interrupt.
INLINE void DMA_CH6_Int_En | ( | void | ) |
enables DMA Channel 6 Interrupt.
Example
This example treats the DMA Channel 6 Interrupt.
INLINE void DMA_CH7_Int_Clr | ( | void | ) |
clears DMA Channel 7 Interrupt flag.
Example
This example treats the DMA Channel 7 Interrupt.
INLINE void DMA_CH7_Int_Dis | ( | void | ) |
disables DMA Channel 7 Interrupt.
Example
This example treats the DMA Channel 7 Interrupt.
INLINE void DMA_CH7_Int_En | ( | void | ) |
enables DMA Channel 7 Interrupt.
Example
This example treats the DMA Channel 7 Interrupt.
INLINE void DMA_CH8_Int_Clr | ( | void | ) |
clears DMA Channel 8 Interrupt flag.
Example
This example treats the DMA Channel 8 Interrupt.
INLINE void DMA_CH8_Int_Dis | ( | void | ) |
disables DMA Channel 8 Interrupt.
Example
This example treats the DMA Channel 8 Interrupt.
INLINE void DMA_CH8_Int_En | ( | void | ) |
enables DMA Channel 8 Interrupt.
Example
This example treats the DMA Channel 8 Interrupt.
INLINE void DMA_CH9_Int_Clr | ( | void | ) |
clears DMA Channel 9 Interrupt flag.
Example
This example treats the DMA Channel 9 Interrupt.
INLINE void DMA_CH9_Int_Dis | ( | void | ) |
disables DMA Channel 9 Interrupt.
Example
This example treats the DMA Channel 9 Interrupt.
INLINE void DMA_CH9_Int_En | ( | void | ) |
enables DMA Channel 9 Interrupt.
Example
This example treats the DMA Channel 9 Interrupt.
enables DMA Channels.
mask_ch | DMA channel Mask |
Example
This example enables DMA Channel 0.
void DMA_Channel_MemSctGth_Set | ( | uint32 | DMA_ChIdx, |
TDMA_Entry * | Task_List, | ||
uint32 | NoOfTasks | ||
) |
Sets up a channel to operate in Memory Scatter-Gather mode on a given task list.
DMA_ChIdx | DMA channel to be set up |
Task_List | points to the task structure defined in RAM, see DMA_Task_Set |
NoOfTasks | number of tasks in the Task_List |
Example
This example transfers the result of ADC1.Ch4 into a local variable once the ADC1.Ch4 conversion is done.
void DMA_Channel_PerSctGth_Set | ( | uint32 | DMA_ChIdx, |
TDMA_Entry * | Task_List, | ||
uint32 | NoOfTasks | ||
) |
Sets up a channel to operate in Peripheral Scatter-Gather mode on a given task list.
DMA_ChIdx | DMA channel to be set up |
Task_List | points to the task structure defined in RAM, see DMA_Task_Set |
NoOfTasks | number of tasks in the Task_List |
Example
This example transfers the four SPI values from RAM to SSC1.
This function returns the address inside the alternate structure in RAM for a given DMA channel.
DMA_Ch | DMA channel number |
This function returns the address inside the primary structure in RAM for a given DMA channel.
DMA_Ch | DMA channel number |
void DMA_Init | ( | void | ) |
Initializes the DMA structure in RAM and SFRs based on the Config Wizard for MOTIX MCU configuration.
INLINE void DMA_Master_En | ( | void | ) |
Enabled the DMA master.
Example
This example transfers the result of ADC1.Ch4 into a local variable once the ADC1.Ch4 conversion is done.
points to the base address of the primary data structure.
mask_ch | DMA channel Mask |
Example
This example points to the base address of Channel 0.
selects the primary data structure for the corresponding DMA channel.
mask_ch | DMA channel Mask |
Example
This example selects the primary data structure for DMA channel 0.
Resets the primary structure in RAM for a given channel and rearms it.
DMA_ChIdx | DMA channel to be set up |
trans_cnt | number of transfers |
Example
This example transfers the result of ADC1.Ch4 into a local variable, inside the interrupt service callback the DMA channel 8 gets reset.
void DMA_Setup_Channel | ( | uint32 | DMA_ChIdx, |
uint32 | addr_src, | ||
uint32 | addr_dst, | ||
uint32 | trans_cnt, | ||
TDMA_Transfer_Size | datawidth, | ||
TDMA_Increment_Mode | increment | ||
) |
Sets up the desired DMA channel in the primary structure in RAM.
DMA_ChIdx | DMA channel to be set up |
addr_src | address pointing to the source location |
addr_dst | address pointing to the destination location |
trans_cnt | number of transfers |
datawidth | data width for each transfer, see TDMA_Transfer_Size |
increment | incrementing scheme used for the transfer, see TDMA_Increment_Mode |
Example
This example transfers the result of ADC1.Ch4 into a local variable once the ADC1.Ch4 conversion is done.
Set software request for DMA Channels.
mask_ch | DMA channel Mask |
Example
This example enables DMA Channel 0.
TDMA_Entry* DMA_Task_SctGth_Set | ( | TDMA_Entry * | entry, |
uint8 | DMA_Ch, | ||
TDMA_Entry * | Task_List, | ||
uint32 | NoOfTask | ||
) |
Sets up a task to be used with memory scatter-gather mode.
The DMA scather-gather mode can be used to perform multiple but different DMA transfers initiated with one trigger.
The last task can be used to self-arm this scatter-gather transfer again.
This function can be used to define the last, self-arming task for the scather-gather mode.
entry | pointer to the task |
DMA_Ch | the DMA channel for with the task is setup |
Task_List | pointer to the task list to be executed with this DMA transfer |
NoOfTask | number of tasks defined in the task list |
Example
This example performs an endless scatter-gather transfer and toggles P0.1.
TDMA_Entry* DMA_Task_Set | ( | TDMA_Entry * | entry, |
TDMA_Cycle_Types | cycle_type, | ||
uint8 | arb_rate, | ||
uint32 | addr_src, | ||
uint32 | addr_dst, | ||
uint32 | trans_cnt, | ||
TDMA_Transfer_Size | datawidth, | ||
TDMA_Increment_Mode | increment | ||
) |
Sets up a task to be used in the Scatter-Gather modes.
entry | pointer to the task structure TDMA_Entry |
cycle_type | defines the type of DMA transfer to be performed, see TDMA_Cycle_Types |
arb_rate | arbitration rate, defines after how many DMA transfer it rearbitrates, 2^arb_rate |
addr_src | address pointing to the source location |
addr_dst | address pointing to the destination location |
trans_cnt | number of transfers |
datawidth | data width for each transfer, see TDMA_Transfer_Size |
increment | incrementing scheme used for the transfer, see TDMA_Increment_Mode |
Example
This example transfers the four SPI values from RAM to SSC1.