Infineon MOTIX™ MCU TLE987x Device Family SDK
Data Fields
MF_Type Struct Reference

Detailed Description

Measurement Function (MF)

#include <tle987x.h>

Data Fields

union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   P2_0_ADC_SEL: 1
 
      __IOM uint32_t   P2_2_ADC_SEL: 1
 
      __IOM uint32_t   P2_3_ADC_SEL: 1
 
      __IOM uint32_t   P2_4_ADC_SEL: 1
 
      __IOM uint32_t   P2_5_ADC_SEL: 1
 
      __IM   uint32_t: 3
 
      __IOM uint32_t   ADC3_INP_SEL: 1
 
      __IOM uint32_t   ADC3_INN_SEL: 1
 
      __IOM uint32_t   ADC1_CH1_SEL: 1
 
   }   bit
 
P2_ADCSEL_CTRL
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   VMON_SEN_PD_N: 1
 
      __IM   uint32_t: 3
 
      __IOM uint32_t   VMON_SEN_HRESO_5V: 1
 
      __IOM uint32_t   VMON_SEN_SEL_INRANGE: 1
 
   }   bit
 
VMON_SEN_CTRL
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   PHUCOMP_EN: 1
 
      __IOM uint32_t   PHVCOMP_EN: 1
 
      __IOM uint32_t   PHWCOMP_EN: 1
 
      __IOM uint32_t   DEMGFILTDIS: 1
 
      __IOM uint32_t   FILTBYPS: 1
 
      __IOM uint32_t   GPT12CAPINSW: 1
 
      __IM   uint32_t: 2
 
      __IOM uint32_t   PHUCOMP_ON: 1
 
      __IOM uint32_t   PHVCOMP_ON: 1
 
      __IOM uint32_t   PHWCOMP_ON: 1
 
      __IOM uint32_t   CCPOS_INSEL: 1
 
      __IM uint32_t   PHU_ZC_STS: 1
 
      __IM uint32_t   PHV_ZC_STS: 1
 
      __IM uint32_t   PHW_ZC_STS: 1
 
   }   bit
 
BEMFC_CTRL_STS
 
__IM uint32_t RESERVED0
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IM   uint32_t: 4
 
      __IM uint32_t   PMU_OTWARN_STS: 1
 
      __IM uint32_t   PMU_OT_STS: 1
 
      __IM uint32_t   SYS_OTWARN_STS: 1
 
      __IM uint32_t   SYS_OT_STS: 1
 
   }   bit
 
TEMPSENSE_CTRL
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IM   uint32_t: 4
 
      __IM uint32_t   REFBG_LOTHWARN_STS: 1
 
      __IM uint32_t   REFBG_UPTHWARN_STS: 1
 
   }   bit
 
REF1_STS
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   VREF5V_PD_N: 1
 
      __IM uint32_t   VREF5V_OVL_STS: 1
 
      __IM uint32_t   VREF5V_UV_STS: 1
 
      __IM uint32_t   VREF5V_OV_STS: 1
 
   }   bit
 
REF2_CTRL
 
__IM uint32_t RESERVED1
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   BEMF_BT_TFILT_SEL: 3
 
      __IM   uint32_t: 1
 
      __IOM uint32_t   BEMF_GPT_CAPIN_SEL: 2
 
      __IOM uint32_t   BEMF_TFILT_SEL: 2
 
   }   bit
 
TRIM_BEMFx
 

Field Documentation

◆ ADC1_CH1_SEL

__IOM uint32_t ADC1_CH1_SEL

[10..10] ADC1 Channel 1 Input Selection

◆ ADC3_INN_SEL

__IOM uint32_t ADC3_INN_SEL

[9..9] ADC3 Negative Input Selection

◆ ADC3_INP_SEL

__IOM uint32_t ADC3_INP_SEL

[8..8] ADC3 Positive Input Selection

◆ BEMF_BT_TFILT_SEL

__IOM uint32_t BEMF_BT_TFILT_SEL

[2..0] Blanking Time for BEMF Comparator Output Signal

◆ BEMF_GPT_CAPIN_SEL

__IOM uint32_t BEMF_GPT_CAPIN_SEL

[5..4] GPT12 CAPIN input selector

◆ BEMF_TFILT_SEL

__IOM uint32_t BEMF_TFILT_SEL

[9..8] Filter Time for BEMF Comparator Output Signal

◆ 

union { ... } BEMFC_CTRL_STS

◆  [1/7]

struct { ... } bit

◆  [2/7]

struct { ... } bit

◆  [3/7]

struct { ... } bit

◆  [4/7]

struct { ... } bit

◆  [5/7]

struct { ... } bit

◆  [6/7]

struct { ... } bit

◆  [7/7]

struct { ... } bit

◆ CCPOS_INSEL

__IOM uint32_t CCPOS_INSEL

[12..12] CCPOSx_3 INSEL select, x = 0,1,2

◆ DEMGFILTDIS

__IOM uint32_t DEMGFILTDIS

[3..3] BEMF Comparator Demagnetisation (Demag) Filter Disable

◆ FILTBYPS

__IOM uint32_t FILTBYPS

[4..4] BEMF Comparator Output Filter Bypass

◆ GPT12CAPINSW

__IOM uint32_t GPT12CAPINSW

[5..5] GPT12 CAPIN software trigger

◆ P2_0_ADC_SEL

__IOM uint32_t P2_0_ADC_SEL

[0..0] Port 2.0 Input Selection

◆ P2_2_ADC_SEL

__IOM uint32_t P2_2_ADC_SEL

[1..1] Port 2.2 Input Selection

◆ P2_3_ADC_SEL

__IOM uint32_t P2_3_ADC_SEL

[2..2] Port 2.3 Input Selection

◆ P2_4_ADC_SEL

__IOM uint32_t P2_4_ADC_SEL

[3..3] Port 2.4 Input Selection

◆ P2_5_ADC_SEL

__IOM uint32_t P2_5_ADC_SEL

[4..4] Port 2.5 Input Selection

◆ 

union { ... } P2_ADCSEL_CTRL

◆ PHU_ZC_STS

__IM uint32_t PHU_ZC_STS

[16..16] Phase U Comparator zero crossing status

◆ PHUCOMP_EN

__IOM uint32_t PHUCOMP_EN

[0..0] Phase U Comparator enable

◆ PHUCOMP_ON

__IOM uint32_t PHUCOMP_ON

[8..8] Phase U Comparator on

◆ PHV_ZC_STS

__IM uint32_t PHV_ZC_STS

[17..17] Phase V Comparator zero crossing status

◆ PHVCOMP_EN

__IOM uint32_t PHVCOMP_EN

[1..1] Phase V Comparator enable

◆ PHVCOMP_ON

__IOM uint32_t PHVCOMP_ON

[9..9] Phase V Comparator on

◆ PHW_ZC_STS

__IM uint32_t PHW_ZC_STS

[18..18] Phase W Comparator zero crossing status

◆ PHWCOMP_EN

__IOM uint32_t PHWCOMP_EN

[2..2] Phase W Comparator enable

◆ PHWCOMP_ON

__IOM uint32_t PHWCOMP_ON

[10..10] Phase W Comparator on

◆ PMU_OT_STS

__IM uint32_t PMU_OT_STS

[5..5] PMU Regulator Overtemperature (MU) Status

◆ PMU_OTWARN_STS

__IM uint32_t PMU_OTWARN_STS

[4..4] PMU Regulator Overtemperature Warning (MU) Status

◆ 

union { ... } REF1_STS

◆ 

union { ... } REF2_CTRL

◆ REFBG_LOTHWARN_STS

__IM uint32_t REFBG_LOTHWARN_STS

[4..4] Status for Undervoltage Threshold Measurement of internal VAREF

◆ REFBG_UPTHWARN_STS

__IM uint32_t REFBG_UPTHWARN_STS

[5..5] Status for Overvoltage Threshold Measurement of internal VAREF

◆ reg

(@ 0x00000000) Port 2 ADC Selection Control Register

(@ 0x00000004) Supply Sense Control Register

(@ 0x00000008) BEMF Comparator Control Status Register

(@ 0x00000010) Temperature Sensor Control Register

(@ 0x00000014) Reference 1 Status Register

(@ 0x00000018) Reference 2 Control Register

(@ 0x00000020) Trimming of Driver

◆ RESERVED0

__IM uint32_t RESERVED0

◆ RESERVED1

__IM uint32_t RESERVED1

◆ SYS_OT_STS

__IM uint32_t SYS_OT_STS

[7..7] System Overtemperature (MU) Status

◆ SYS_OTWARN_STS

__IM uint32_t SYS_OTWARN_STS

[6..6] System Overtemperature Warning (MU) Status

◆ 

union { ... } TEMPSENSE_CTRL

◆ 

union { ... } TRIM_BEMFx

◆ uint32_t

__IM uint32_t

◆ 

union { ... } VMON_SEN_CTRL

◆ VMON_SEN_HRESO_5V

__IOM uint32_t VMON_SEN_HRESO_5V

[4..4] Monitoring Input Attenuator High Impedance Output Control

◆ VMON_SEN_PD_N

__IOM uint32_t VMON_SEN_PD_N

[0..0] Monitoring Input Attenuator enable

◆ VMON_SEN_SEL_INRANGE

__IOM uint32_t VMON_SEN_SEL_INRANGE

[5..5] Monitoring Input Attenuator Select Inputrange

◆ VREF5V_OV_STS

__IM uint32_t VREF5V_OV_STS

[3..3] ADC1 Bit Reference Voltage Generation Overvoltage Bit

◆ VREF5V_OVL_STS

__IM uint32_t VREF5V_OVL_STS

[1..1] ADC1 Bit Reference Voltage Generation Over Load Bit

◆ VREF5V_PD_N

__IOM uint32_t VREF5V_PD_N

[0..0] ADC1 Bit Reference Voltage Generation Power Down Bit

◆ VREF5V_UV_STS

__IM uint32_t VREF5V_UV_STS

[2..2] ADC1 Bit Reference Voltage Generation Undervoltage Bit


The documentation for this struct was generated from the following file: