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Infineon MOTIX™ MCU TLE987x Device Family SDK
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Power Management Unit (PMU)
#include <tle987x.h>
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union { ... } CNF_CYC_SAMPLE_DEL |
union { ... } CNF_CYC_SENSE |
union { ... } CNF_CYC_WAKE |
union { ... } CNF_PMU_SETTINGS |
union { ... } CNF_RST_TFB |
union { ... } CNF_WAKE_FILTER |
[1..1] Disables the reduction of the VDDC regulator output to 0.9 V during Stop-Mode
[2..2] Wake-up via GPIO0 which is a logical OR combination of all Wake_STS_GPIO0 bits
[3..3] Wake-up via GPIO1 which is a logical OR combination of all Wake_STS_GPIO1 bits
union { ... } GPUDATA00 |
union { ... } GPUDATA01 |
union { ... } GPUDATA02 |
union { ... } GPUDATA03 |
union { ... } GPUDATA04 |
union { ... } GPUDATA05 |
union { ... } LIN_WAKE_EN |
union { ... } PMU_RESET_STS1 |
union { ... } PMU_RESET_STS2 |
union { ... } PMU_SUPPLY_STS |
(@ 0x00000000) Main wake status register
(@ 0x00000004) Voltage Reg Status Register
(@ 0x00000008) VDDEXT Control
(@ 0x00000010) Reset Status Hard Register
(@ 0x00000014) Reset Status Soft Register
(@ 0x00000020) PMU Settings Register
(@ 0x00000028) Dead Time in Cyclic Sense Register
(@ 0x0000002C) Dead Time in Cyclic Wake Register
(@ 0x00000030) Sample Delay in Cyclic Sense Register
(@ 0x00000050) LIN Wake Enable
(@ 0x0000006C) Reset Blind Time Register
(@ 0x00000070) System Fail Status Register
(@ 0x00000080) Wake Status Fail Register
(@ 0x00000084) Wake Source MON Input Register
(@ 0x00000088) Wake Status GPIO 0 Register
(@ 0x0000008C) Wake Status GPIO 1 Register
(@ 0x000000AC) PMU Wake-up Timing Register
(@ 0x000000C0) General Purpose User DATA0
(@ 0x000000C4) General Purpose User DATA1
(@ 0x000000C8) General Purpose User DATA2
(@ 0x000000CC) General Purpose User DATA3
(@ 0x000000D0) General Purpose User DATA4
(@ 0x000000D4) General Purpose User DATA5
(@ 0x000000D8) Wake Configuration GPIO Port 0 Rising Edge Register
(@ 0x000000DC) Wake Configuration GPIO Port 0 Falling Edge Register
(@ 0x000000E0) Wake Port 0 Cycle Enabled Register
(@ 0x000000E4) Wake Configuration GPIO Port 1 Rising Edge Register
(@ 0x000000E8) Wake Configuration GPIO Port 1 Falling Edge Register
(@ 0x000000EC) Wake Port 1 Cycle Enabled Register
(@ 0x000002D4) System Startup Config
[0..0] Flag which indicates a reset caused by a System Fail reported in the corresponding Fail Register
union { ... } SYS_FAIL_STS |
union { ... } SystemStartConfig |
__IM uint8_t |
union { ... } VDDEXT_CTRL |
union { ... } WAKE_CONF_GPIO0_CYC |
union { ... } WAKE_CONF_GPIO0_FALL |
union { ... } WAKE_CONF_GPIO0_RISE |
union { ... } WAKE_CONF_GPIO1_CYC |
union { ... } WAKE_CONF_GPIO1_FALL |
union { ... } WAKE_CONF_GPIO1_RISE |
union { ... } WAKE_STATUS |
union { ... } WAKE_STS_FAIL |
union { ... } WAKE_STS_GPIO0 |
union { ... } WAKE_STS_GPIO1 |
union { ... } WAKE_STS_MON |