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TLE986x Device Family SDK
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INLINE void GPT12E_T3_Output_Dis(void)
disables Timer T3 Overflow/Underflow Output.
Definition: gpt12e.h:1734
#define SCU_GPT12IRC_T6_Msk
Definition: tle986x.h:8831
#define GPT12E_T6CON_T6I_Pos
Definition: tle986x.h:7975
INLINE void GPT12E_T4_Mode_IncEnc_Edge_Detect_Clr(void)
clears Timer T4 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:3042
#define GPT12E_T6CON_T6OE_Pos
Definition: tle986x.h:7985
#define SCU_GPT12ICLR_T3C_Msk
Definition: tle986x.h:8811
#define GPT12E_T2CON_T2I_Msk
Definition: tle986x.h:7874
#define GPT12E_T2CON_T2M_Msk
Definition: tle986x.h:7876
INLINE void GPT12E_T2_UpCount_Sel(void)
selects Timer T2 counts up.
Definition: gpt12e.h:1137
INLINE void GPT12E_T6_UpDownCount_Ext_En(void)
enables controlling Count direction by external input (T6EUD).
Definition: gpt12e.h:4417
INLINE void GPT12E_T6_Output_Set(void)
sets Timer T6 Overflow Toggle Latch.
Definition: gpt12e.h:4346
INLINE void GPT12E_T4_Stop(void)
stops Timer T4.
Definition: gpt12e.h:2783
#define GPT12E_T2CON_T2CHDIR_Pos
Definition: tle986x.h:7889
#define GPT12E_T4CON_T4CHDIR_Pos
Definition: tle986x.h:7943
INLINE void Field_Mod16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:351
INLINE void GPT12E_T2_Mode_Counter_Input_Rising_T3Out_En(void)
enables Rising Edge on T3OTL as T2 Counter Mode Input.
Definition: gpt12e.h:615
INLINE void GPT12E_T4_Start_by_T3_En(void)
enables controlling Timer T4 by the run bit T3R of core timer T3.
Definition: gpt12e.h:2801
INLINE void GPT12E_T3_Mode_IncEnc_Any_T3EUD_En(void)
enables Falling or Falling Edge on T3EUD as T3 Incremental Interface Mode Input.
Definition: gpt12e.h:1648
#define GPT12E_T4_T4_Msk
Definition: tle986x.h:7921
INLINE void GPT12E_T4_Mode_Timer_Clk_Prescaler_Sel(uint16 t4i)
selects T4 Timer Mode Parameter.
Definition: gpt12e.h:2205
#define GPT12E_PISEL_ISCAPIN_Msk
Definition: tle986x.h:7868
INLINE void GPT12E_T6_Stop(void)
stops Timer T6.
Definition: gpt12e.h:4294
#define GPT12E_T6CON_T6OTL_Msk
Definition: tle986x.h:7988
#define GPT12E_T2CON_T2RC_Pos
Definition: tle986x.h:7883
INLINE void GPT12E_T2_Mode_Capture_Input_Rising_T2In_Dis(void)
disables Rising Edge on T2In as T2 Capture Mode Input.
Definition: gpt12e.h:723
INLINE void GPT12E_T5_UpDownCount_Ext_Dis(void)
disables controlling Count direction by external input (T5EUD).
Definition: gpt12e.h:3906
INLINE void GPT12E_T4_Mode_IncEnc_Any_T3In_En(void)
enables Rising or Falling Edge on T3In as T4 Incremental Interface Mode Input.
Definition: gpt12e.h:2693
bool GPT12E_T6_Interval_Timer_Setup(uint32 timer_interval_us)
Initializes the T6 to be reloaded by CAPREL.
INLINE void GPT12E_T3_Output_Rst(void)
clears Timer T3 Overflow Toggle Latch.
Definition: gpt12e.h:1770
INLINE void GPT12E_T5_Capture_En(void)
enables T5 Capture Mode.
Definition: gpt12e.h:3500
INLINE void GPT12E_T3_Mode_Counter_Input_Rising_T3In_En(void)
enables Rising Edge on T3In as T3 Counter Mode Input.
Definition: gpt12e.h:1540
#define SCU_GPT12ICLR_T6C_Pos
Definition: tle986x.h:8804
#define SCU_GPT12IRC_T3_Pos
Definition: tle986x.h:8836
INLINE void GPT12E_T6_Value_Set(uint16 t6)
sets Timer T6 Value.
Definition: gpt12e.h:4475
INLINE void GPT12E_T4_Clr_T2_Dis(void)
Disables the automatic clearing of timer T2 upon a falling edge of the selected T4EUD input.
Definition: gpt12e.h:2962
INLINE void GPT12E_T2_Mode_Timer_Sel(void)
selects T2 Timer Mode.
Definition: gpt12e.h:330
INLINE void GPT12E_T2_Stop(void)
stops Timer T2.
Definition: gpt12e.h:1065
#define GPT12E_T2CON_T2CHDIR_Msk
Definition: tle986x.h:7890
#define GPT12E_T3CON_T3I_Pos
Definition: tle986x.h:7897
INLINE void GPT12E_T4_Mode_Reload_Input_Rising_T3Out_En(void)
enables Rising Edge on T3OTL as T4 Reload Mode Input.
Definition: gpt12e.h:2621
#define GPT12E_T6CON_T6CLR_Pos
Definition: tle986x.h:7991
INLINE void GPT12E_T4_Mode_Capture_Sel(void)
selects T4 Capture Mode.
Definition: gpt12e.h:2151
INLINE void GPT12E_T2_Mode_Counter_Input_Rising_T2In_Dis(void)
disables Rising Edge on T2In as T2 Counter Mode Input.
Definition: gpt12e.h:543
#define GPT12E_PISEL_IST6IN_Msk
Definition: tle986x.h:7864
INLINE void GPT12E_T4_Mode_Counter_Input_Rising_T4In_Dis(void)
disables Rising Edge on T4In as T4 Counter Mode Input.
Definition: gpt12e.h:2279
INLINE uint8 GPT12E_T4_Int_Sts(void)
reads GPT Module 1 Timer 4 interrupt Status.
Definition: gpt12e.h:4616
#define GPT12E
Definition: tle986x.h:5998
General type declarations.
#define GPT12E_T4CON_T4RC_Msk
Definition: tle986x.h:7934
INLINE void GPT12E_T3_Int_En(void)
enables GPT Module 1 Timer 3 interrupt.
Definition: gpt12e.h:4896
INLINE void GPT12E_T2_Mode_Counter_Input_Falling_T2In_En(void)
enables Falling Edge on T2In as T2 Counter Mode Input.
Definition: gpt12e.h:561
INLINE void GPT12E_CapRel_Int_Clr(void)
clears GPT Module 1 Capture Reload interrupt flag.
Definition: gpt12e.h:4827
#define GPT12E_T5CON_T5CLR_Msk
Definition: tle986x.h:7968
INLINE void GPT12E_T5_Cleared_On_Capture_En(void)
enables clearing T5 on a Capture Event.
Definition: gpt12e.h:3723
INLINE void GPT12E_T2_Mode_Reload_Input_Falling_T3Out_Dis(void)
disables Falling Edge on T3OTL as T2 Reload Mode Input.
Definition: gpt12e.h:939
INLINE void GPT12E_T2_Mode_Capture_Input_Rising_T2In_En(void)
enables Rising Edge on T2In as T2 Capture Mode Input.
Definition: gpt12e.h:705
INLINE void GPT12E_T5_Int_Clr(void)
clears GPT Module 2 Timer 5 interrupt flag.
Definition: gpt12e.h:4781
TGPT12E_CAPIN
This enum lists the GPT12E CAPINx Inputs.
Definition: gpt12e.h:230
#define GPT12E_T6CON_T6UD_Msk
Definition: tle986x.h:7982
INLINE void GPT12E_T4_Mode_Counter_Input_Rising_T3Out_Dis(void)
disables Rising Edge on T3OTL as T4 Counter Mode Input.
Definition: gpt12e.h:2369
INLINE void GPT12E_T2_Start_by_T3_Dis(void)
disables controlling Timer T2 by the run bit T3R of core timer T3.
Definition: gpt12e.h:1101
INLINE void GPT12E_T4_Mode_Capture_Input_T4In_Sel(void)
selects T4In as T4 Capture Mode Input.
Definition: gpt12e.h:2423
INLINE uint16 GPT12E_T6_Value_Get(void)
reads Timer T6 Value.
Definition: gpt12e.h:4456
#define GPT12E_T5CON_T5UDE_Pos
Definition: tle986x.h:7959
INLINE void GPT12E_T4_Mode_Gated_Timer_High_Sel(void)
selects T4 Gated high Mode.
Definition: gpt12e.h:2117
INLINE void GPT12E_T2_Mode_IncEnc_Dir_Change_Clr(void)
clears Timer T2 Incremental Interface Direction Change.
Definition: gpt12e.h:1296
#define SCU_GPT12ICLR_T5C_Msk
Definition: tle986x.h:8807
INLINE uint8 GPT12E_T6_Int_Sts(void)
reads GPT Module 2 Timer 6 interrupt Status.
Definition: gpt12e.h:4664
#define GPT12E_T3CON_T3RDIR_Pos
Definition: tle986x.h:7917
INLINE void GPT12E_T2_Mode_IncEnc_DownCount_RotDir_Sel(void)
selects Timer T2 Incremental Interface Rotation Detection Mode counts down.
Definition: gpt12e.h:1190
#define GPT12E_T3CON_T3I_Msk
Definition: tle986x.h:7898
INLINE void GPT12E_CapRel_CAPIn_Sel(uint16 iscapin)
selects CAPIN.
Definition: gpt12e.h:4541
INLINE uint8 GPT12E_T5_Int_Sts(void)
reads GPT Module 2 Timer 5 interrupt Status.
Definition: gpt12e.h:4640
#define SCU_GPT12ICLR_T3C_Pos
Definition: tle986x.h:8810
INLINE void GPT12E_T6_Mode_Counter_Input_Any_T6In_Sel(void)
selects Any Edge on T6In as T6 Counter Mode Input.
Definition: gpt12e.h:4170
#define SCU_GPT12IEN_T2IE_Msk
Definition: tle986x.h:8826
#define GPT12E_T6CON_T6UDE_Msk
Definition: tle986x.h:7984
INLINE void GPT12E_T6_Mode_Timer_Sel(void)
selects T6 Timer Mode.
Definition: gpt12e.h:4007
INLINE void GPT12E_T2_Mode_IncEnc_Edge_Sel(void)
selects T2 Incremental Interface -Edge Detection- Mode.
Definition: gpt12e.h:449
INLINE void GPT12E_T3_Mode_Gated_Timer_High_Sel(void)
selects T3 Gated high Mode.
Definition: gpt12e.h:1448
INLINE void GPT12E_T6_Int_Clr(void)
clears GPT Module 2 Timer 6 interrupt flag.
Definition: gpt12e.h:4804
#define GPT12E_T6CON_T6R_Msk
Definition: tle986x.h:7980
INLINE uint8 GPT12E_CapRel_Int_Sts(void)
reads GPT Module 1 Capture Reload interrupt Status.
Definition: gpt12e.h:4688
INLINE void GPT12E_T6_T6EUD_Sel(uint16 ist6eud)
selects Input for T6EUD.
Definition: gpt12e.h:4516
#define GPT12E_T2CON_T2UDE_Pos
Definition: tle986x.h:7881
TGPT12E_Mode_Timer_Prescaler
This enum lists the GPT12E Mode Timer Prescaler.
Definition: gpt12e.h:241
INLINE void GPT12E_T5_Mode_Counter_Input_T6Out_Sel(void)
selects T6OTL as T5 Counter Mode Input.
Definition: gpt12e.h:3411
#define GPT12E_T2CON_T2I_Pos
Definition: tle986x.h:7873
#define GPT12E_PISEL_ISCAPIN_Pos
Definition: tle986x.h:7867
INLINE void GPT12E_T2_Mode_Capture_Sel(void)
selects T2 Capture Mode.
Definition: gpt12e.h:415
INLINE void GPT12E_T2_Mode_Counter_Input_Falling_T3Out_En(void)
enables Falling Edge on T3OTL as T2 Counter Mode Input.
Definition: gpt12e.h:651
#define SCU_GPT12IRC_T6_Pos
Definition: tle986x.h:8830
INLINE void GPT12E_T2_Mode_IncEnc_UpCount_RotDir_Sel(void)
selects Timer T2 Incremental Interface Rotation Detection Mode counts up.
Definition: gpt12e.h:1208
#define GPT12E_T3CON_BPS1_Pos
Definition: tle986x.h:7911
INLINE void GPT12E_T3_Mode_IncEnc_Rot_Sel(void)
selects T3 Incremental Interface -Rotation Detection- Mode.
Definition: gpt12e.h:1465
INLINE void GPT12E_T5_Cleared_On_Capture_Dis(void)
disables clearing T5 on a Capture Event.
Definition: gpt12e.h:3741
#define GPT12E_T6CON_T6UD_Pos
Definition: tle986x.h:7981
INLINE void GPT12E_T4_T4EUD_Sel(uint16 ist4eud)
selects Input for T4EUD.
Definition: gpt12e.h:3167
INLINE void GPT12E_T2_Mode_Capture_Input_Falling_T2In_En(void)
enables Falling Edge on T2In as T2 Capture Mode Input.
Definition: gpt12e.h:741
TGPT12E_T3IN
This enum lists the GPT12E T3INx Inputs.
Definition: gpt12e.h:143
bool GPT12E_T3_Interval_Timer_Setup(uint32 timer_interval_us)
Initializes the T3 to be reloaded by T2.
INLINE void GPT12E_T4_Mode_Capture_Input_Falling_T4In_En(void)
enables Falling Edge on T4In as T4 Capture Mode Input.
Definition: gpt12e.h:2477
#define GPT12E_T5_T5_Pos
Definition: tle986x.h:7948
TGPT12E_T6EUD
This enum lists the GPT12E T6EUDx Inputs.
Definition: gpt12e.h:221
#define GPT12E_PISEL_IST5EUD_Pos
Definition: tle986x.h:7861
INLINE void GPT12E_T4_Mode_Counter_Input_T3Out_Sel(void)
selects T3OTL as T4 Counter Mode Input.
Definition: gpt12e.h:2333
#define GPT12E_T4CON_T4I_Pos
Definition: tle986x.h:7923
#define GPT12E_T5CON_T5R_Msk
Definition: tle986x.h:7956
INLINE void GPT12E_T2_Mode_Counter_Input_T3Out_Sel(void)
selects T3OTL as T2 Counter Mode Input.
Definition: gpt12e.h:597
INLINE void GPT12E_T5_T5EUD_Sel(uint16 ist5eud)
selects Input for T5EUD.
Definition: gpt12e.h:3987
INLINE void GPT12E_T6_Int_En(void)
enables GPT Module 2 Timer 6 interrupt.
Definition: gpt12e.h:5034
INLINE void GPT12E_T2_DownCount_Sel(void)
selects Timer T2 counts down.
Definition: gpt12e.h:1119
INLINE void GPT12E_T3_Output_En(void)
enables Timer T3 Overflow/Underflow Output.
Definition: gpt12e.h:1717
INLINE void GPT12E_T4_T4In_Sel(uint16 ist4in)
selects Input for T4IN.
Definition: gpt12e.h:3147
#define GPT12E_T5CON_T5I_Pos
Definition: tle986x.h:7951
INLINE uint8 GPT12E_T2_Int_Sts(void)
reads GPT Module 1 Timer 2 interrupt Status.
Definition: gpt12e.h:4568
#define GPT12E_T4CON_T4UDE_Msk
Definition: tle986x.h:7932
INLINE void GPT12E_T4_Mode_IncEnc_Any_T3In_Dis(void)
disables Rising or Falling Edge on T3In as T4 Incremental Interface Mode Input.
Definition: gpt12e.h:2711
INLINE void GPT12E_T3_Mode_Gated_Timer_Clk_Prescaler_Sel(uint16 t3i)
selects T3 Gated Timer Mode Parameter.
Definition: gpt12e.h:1522
SFR low level access library.
INLINE void GPT12E_T6_Mode_Counter_Sel(void)
selects T6 Counter Mode.
Definition: gpt12e.h:4024
TGPT12E_T2EUD
This enum lists the GPT12E T2EUDx Inputs.
Definition: gpt12e.h:134
#define GPT12E_CAPREL_CAPREL_Pos
Definition: tle986x.h:7839
#define SCU_GPT12IRC_CR_Pos
Definition: tle986x.h:8828
INLINE void GPT12E_T5_Capture_Trig_Rising_CapIn_En(void)
enables Rising Edge on CapIn as T5 Capture Mode Input.
Definition: gpt12e.h:3554
#define GPT12E_T4CON_T4R_Pos
Definition: tle986x.h:7927
#define SCU_GPT12ICLR_T2C_Pos
Definition: tle986x.h:8812
#define GPT12E_T6CON_T6SR_Pos
Definition: tle986x.h:7993
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:421
#define GPT12E_T3CON_T3OE_Pos
Definition: tle986x.h:7907
INLINE void GPT12E_T5_Capture_Trig_Any_T3EUD_En(void)
enables Any Edge on T3EUD as T5 Capture Mode Input.
Definition: gpt12e.h:3686
INLINE void GPT12E_T3_Mode_Gated_Timer_Low_Sel(void)
selects T3 Gated low Mode.
Definition: gpt12e.h:1431
INLINE uint16 GPT12E_T5_Value_Get(void)
reads Timer T5 Value.
Definition: gpt12e.h:3927
#define GPT12E_T6_T6_Msk
Definition: tle986x.h:7973
#define GPT12E_PISEL_IST4EUD_Pos
Definition: tle986x.h:7857
#define SCU_GPT12IEN_CRIE_Msk
Definition: tle986x.h:8816
#define INLINE
Definition: types.h:134
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:346
INLINE uint8 u1_Field_Rd8(const volatile uint8 *reg, uint8 pos, uint8 msk)
This function reads a 1-bit field of a 8-bit register.
Definition: sfr_access.h:391
#define GPT12E_T5CON_T5R_Pos
Definition: tle986x.h:7955
TGPT12E_T4IN
This enum lists the GPT12E T4INx Inputs.
Definition: gpt12e.h:163
INLINE void GPT12E_T3_DownCount_Sel(void)
selects Timer T3 counts down.
Definition: gpt12e.h:1788
INLINE void GPT12E_T3_Mode_Timer_Clk_Prescaler_Sel(uint16 t3i)
selects T3 Timer Mode Parameter.
Definition: gpt12e.h:1502
#define GPT12E_T4_T4_Pos
Definition: tle986x.h:7920
INLINE void GPT12E_T4_Mode_Capture_Input_Falling_T4In_Dis(void)
disables Falling Edge on T4In as T4 Capture Mode Input.
Definition: gpt12e.h:2495
INLINE void GPT12E_T2_Mode_Counter_Input_Rising_T2In_En(void)
enables Rising Edge on T2In as T2 Counter Mode Input.
Definition: gpt12e.h:525
#define GPT12E_T5CON_T5UD_Msk
Definition: tle986x.h:7958
#define GPT12E_T5CON_T5M_Msk
Definition: tle986x.h:7954
#define GPT12E_T3CON_T3M_Pos
Definition: tle986x.h:7899
INLINE void GPT12E_T4_Start_by_T3_Dis(void)
disables controlling Timer T4 by the run bit T3R of core timer T3.
Definition: gpt12e.h:2819
INLINE void GPT12E_T5_Mode_Timer_Clk_Prescaler_Sel(uint16 t5i)
selects T5 Timer Mode Parameter.
Definition: gpt12e.h:3301
INLINE void GPT12E_T5_Capture_Trig_Rising_CapIn_Dis(void)
disables Rising Edge on CapIn as T5 Capture Mode Input.
Definition: gpt12e.h:3573
INLINE void GPT12E_T4_DownCount_Sel(void)
selects Timer T4 counts down.
Definition: gpt12e.h:2837
INLINE void GPT12E_T2_Mode_Counter_Input_Rising_T3Out_Dis(void)
disables Rising Edge on T3OTL as T2 Counter Mode Input.
Definition: gpt12e.h:633
INLINE void GPT12E_T5_Mode_Counter_Input_Rising_T6Out_En(void)
enables Rising Edge on T6OTL as T5 Counter Mode Input.
Definition: gpt12e.h:3429
#define GPT12E_T5CON_T5RC_Pos
Definition: tle986x.h:7961
#define GPT12E_T5CON_T5I_Msk
Definition: tle986x.h:7952
INLINE void GPT12E_T3_Mode_Counter_Sel(void)
selects T3 Counter Mode.
Definition: gpt12e.h:1414
INLINE void GPT12E_T4_Start(void)
starts Timer T4.
Definition: gpt12e.h:2765
INLINE void GPT12E_T2_Mode_IncEnc_Any_T3EUD_En(void)
enables Falling or Falling Edge on T3EUD as T2 Incremental Interface Mode Input.
Definition: gpt12e.h:1011
INLINE void GPT12E_T4_Mode_IncEnc_Rot_Sel(void)
selects T4 Incremental Interface -Rotation Detection- Mode.
Definition: gpt12e.h:2168
#define GPT12E_T4CON_T4CHDIR_Msk
Definition: tle986x.h:7944
INLINE void GPT12E_T4_Mode_Reload_Input_Rising_T3Out_Dis(void)
disables Rising Edge on T3OTL as T4 Reload Mode Input.
Definition: gpt12e.h:2639
INLINE void GPT12E_T4_Mode_Reload_Input_Falling_T4In_En(void)
enables Falling Edge on T4In as T4 Reload Mode Input.
Definition: gpt12e.h:2567
INLINE void GPT12E_T5_DownCount_Sel(void)
selects Timer T5 counts down.
Definition: gpt12e.h:3853
#define GPT12E_T3CON_T3CHDIR_Msk
Definition: tle986x.h:7916
#define GPT12E_T3CON_T3OE_Msk
Definition: tle986x.h:7908
INLINE void GPT12E_T4_UpDownCount_Ext_Dis(void)
disables controlling Count direction by external input (T4EUD).
Definition: gpt12e.h:2890
#define GPT12E_T2CON_T2UDE_Msk
Definition: tle986x.h:7882
#define GPT12E_T6CON_T6OTL_Pos
Definition: tle986x.h:7987
INLINE void GPT12E_T6_Output_En(void)
enables Timer T6 Overflow/Underflow Output.
Definition: gpt12e.h:4311
unsigned short uint16
16 bit unsigned value
Definition: types.h:140
INLINE void GPT12E_T4_Mode_Reload_Input_T4In_Sel(void)
selects T4In as T4 Reload Mode Input.
Definition: gpt12e.h:2513
#define GPT12E_T5CON_T5SC_Pos
Definition: tle986x.h:7969
INLINE void GPT12E_T3_T3EUD_Sel(uint16 ist3eud)
selects Input for T3EUD.
Definition: gpt12e.h:2046
INLINE void GPT12E_T6_Mode_Counter_Input_Falling_T6In_Sel(void)
selects Falling Edge on T6In as T6 Counter Mode Input.
Definition: gpt12e.h:4152
INLINE void GPT12E_T2_Mode_Reload_Input_Rising_T3Out_En(void)
enables Rising Edge on T3OTL as T2 Reload Mode Input.
Definition: gpt12e.h:885
INLINE uint16 GPT12E_T2_Value_Get(void)
reads Timer T2 Value.
Definition: gpt12e.h:1317
INLINE void GPT12E_T4_Int_En(void)
enables GPT Module 1 Timer 4 interrupt.
Definition: gpt12e.h:4942
INLINE void GPT12E_T4_Mode_Counter_Sel(void)
selects T4 Counter Mode.
Definition: gpt12e.h:2083
INLINE void GPT12E_T5_Int_En(void)
enables GPT Module 2 Timer 5 interrupt.
Definition: gpt12e.h:4988
#define GPT12E_T4CON_T4EDGE_Pos
Definition: tle986x.h:7941
INLINE void GPT12E_T2_UpDownCount_Ext_Dis(void)
disables controlling Count direction by external input (T2EUD).
Definition: gpt12e.h:1172
#define GPT12E_T4CON_CLRT3EN_Pos
Definition: tle986x.h:7937
#define SCU_GPT12IEN_T4IE_Pos
Definition: tle986x.h:8821
#define GPT12E_T2CON_T2UD_Msk
Definition: tle986x.h:7880
#define GPT12E_T3CON_T3CHDIR_Pos
Definition: tle986x.h:7915
#define GPT12E_T4CON_CLRT2EN_Msk
Definition: tle986x.h:7936
INLINE void GPT12E_T3_Mode_IncEnc_Edge_Sel(void)
selects T3 Incremental Interface -Edge Detection- Mode.
Definition: gpt12e.h:1482
#define SCU_GPT12ICLR_CRC_Msk
Definition: tle986x.h:8803
INLINE void GPT12E_T4_Value_Set(uint16 t4)
sets Timer T4 Value.
Definition: gpt12e.h:3126
INLINE void GPT12E_T3_T4_CCU6_Sel(uint8 gpt)
selects GPT12 TIN3B/TIN4D Input.
Definition: gpt12e.h:310
INLINE void GPT12E_T2_Mode_Gated_Timer_High_Sel(void)
selects T2 Gated high Mode.
Definition: gpt12e.h:381
#define GPT12E_PISEL_IST4IN_Pos
Definition: tle986x.h:7855
#define GPT12E_T5CON_T5SC_Msk
Definition: tle986x.h:7970
#define GPT12E_T5CON_T5UD_Pos
Definition: tle986x.h:7957
INLINE void GPT12E_T3_Mode_Counter_Input_Rising_T3In_Dis(void)
disables Rising Edge on T3In as T3 Counter Mode Input.
Definition: gpt12e.h:1558
INLINE void GPT12E_T4_Mode_Counter_Input_Falling_T4In_Dis(void)
disables Falling Edge on T4In as T4 Counter Mode Input.
Definition: gpt12e.h:2315
INLINE void GPT12E_T5_Mode_Gated_Timer_Clk_Prescaler_Sel(uint16 t5i)
selects T5 Gated Timer Mode Parameter.
Definition: gpt12e.h:3321
#define GPT12E_PISEL_IST6EUD_Pos
Definition: tle986x.h:7865
INLINE void GPT12E_T5_Capture_Dis(void)
disables T5 Capture Mode.
Definition: gpt12e.h:3517
#define GPT12E_T3CON_T3OTL_Msk
Definition: tle986x.h:7910
INLINE void GPT12E_T3_Mode_Counter_Input_Falling_T3In_En(void)
enables Falling Edge on T3In as T3 Counter Mode Input.
Definition: gpt12e.h:1576
#define GPT12E_T3CON_BPS1_Msk
Definition: tle986x.h:7912
INLINE void GPT12E_T4_Mode_Reload_Input_Falling_T4In_Dis(void)
disables Falling Edge on T4In as T4 Reload Mode Input.
Definition: gpt12e.h:2585
#define GPT12E_T6CON_BPS2_Pos
Definition: tle986x.h:7989
#define SCU_GPT12IEN_T4IE_Msk
Definition: tle986x.h:8822
INLINE uint16 GPT12E_GPT1_Clk_Prescaler_Get(void)
reads GPT1 Clock Prescaler.
Definition: gpt12e.h:291
INLINE void GPT12E_T6_Output_Dis(void)
disables Timer T6 Overflow/Underflow Output.
Definition: gpt12e.h:4328
#define SCU_GPT12ICLR_T4C_Msk
Definition: tle986x.h:8809
INLINE void GPT12E_T2_Mode_Capture_Input_T2In_Sel(void)
selects T2In as T2 Capture Mode Input.
Definition: gpt12e.h:687
INLINE void GPT12E_T3_Mode_Counter_Input_Falling_T3In_Dis(void)
disables Falling Edge on T3In as T3 Counter Mode Input.
Definition: gpt12e.h:1594
INLINE void GPT12E_T6_T6In_Sel(uint16 ist6in)
selects Input for T6IN.
Definition: gpt12e.h:4496
INLINE void GPT12E_T6_Reload_En(void)
enables T6 Reload Mode.
Definition: gpt12e.h:4187
#define GPT12E_T3CON_T3OTL_Pos
Definition: tle986x.h:7909
#define GPT12E_T6CON_T6M_Pos
Definition: tle986x.h:7977
#define GPT12E_T4CON_CLRT2EN_Pos
Definition: tle986x.h:7935
INLINE void GPT12E_T4_Int_Dis(void)
enables GPT Module 1 Timer 4 interrupt.
Definition: gpt12e.h:4965
INLINE void GPT12E_T5_Stop(void)
stops Timer T5.
Definition: gpt12e.h:3799
INLINE void GPT12E_T5_UpCount_Sel(void)
selects Timer T5 counts up.
Definition: gpt12e.h:3871
INLINE void GPT12E_T6_Start(void)
starts Timer T6.
Definition: gpt12e.h:4277
INLINE void GPT12E_T3_Mode_IncEnc_DownCount_RotDir_Sel(void)
selects Timer T3 Incremental Interface Rotation Detection Mode counts down.
Definition: gpt12e.h:1859
#define GPT12E_T2_T2_Msk
Definition: tle986x.h:7871
INLINE void GPT12E_T5_Start(void)
starts Timer T5.
Definition: gpt12e.h:3781
#define GPT12E_PISEL_IST6EUD_Msk
Definition: tle986x.h:7866
unsigned char uint8
8 bit unsigned value
Definition: types.h:139
#define GPT12E_T2CON_T2R_Pos
Definition: tle986x.h:7877
#define GPT12E_T5CON_T5CLR_Pos
Definition: tle986x.h:7967
INLINE void GPT12E_T6_UpDownCount_Ext_Dis(void)
disables controlling Count direction by external input (T6EUD).
Definition: gpt12e.h:4435
INLINE void GPT12E_T2_Start_by_T3_En(void)
enables controlling Timer T2 by the run bit T3R of core timer T3.
Definition: gpt12e.h:1083
INLINE void GPT12E_T2_Mode_IncEnc_Any_T3In_En(void)
enables Rising or Falling Edge on T3In as T2 Incremental Interface Mode Input.
Definition: gpt12e.h:975
INLINE void GPT12E_T2_Mode_Counter_Input_Falling_T2In_Dis(void)
disables Falling Edge on T2In as T2 Counter Mode Input.
Definition: gpt12e.h:579
INLINE void GPT12E_T5_Mode_Timer_Sel(void)
selects T5 Timer Mode.
Definition: gpt12e.h:3230
INLINE void GPT12E_T2_T2EUD_Sel(uint16 ist2eud)
selects Input for T2EUD.
Definition: gpt12e.h:1377
#define GPT12E_T4CON_T4RC_Pos
Definition: tle986x.h:7933
INLINE void GPT12E_T6_On_Capture_Cleared_En(void)
enables clearing T6 on a Capture Event.
Definition: gpt12e.h:4242
#define GPT12E_T4CON_CLRT3EN_Msk
Definition: tle986x.h:7938
#define GPT12E_T2CON_T2EDGE_Msk
Definition: tle986x.h:7888
#define GPT12E_PISEL_IST4IN_Msk
Definition: tle986x.h:7856
TGPT12E_T2IN
This enum lists the GPT12E T2INx Inputs.
Definition: gpt12e.h:125
#define GPT12E_PISEL_IST2EUD_Msk
Definition: tle986x.h:7850
#define GPT12E_T6CON_T6M_Msk
Definition: tle986x.h:7978
#define SCU_GPT12IRC_T2_Pos
Definition: tle986x.h:8838
INLINE void GPT12E_T6_On_Capture_Cleared_Dis(void)
disables clearing T6 on a Capture Event.
Definition: gpt12e.h:4260
INLINE void GPT12E_T4_Clr_T2_En(void)
Enables the automatic clearing of timer T2 upon a falling edge of the selected T4EUD input.
Definition: gpt12e.h:2945
INLINE void GPT12E_T6_UpCount_Sel(void)
selects Timer T6 counts up.
Definition: gpt12e.h:4400
INLINE void GPT12E_T5_Mode_Counter_Input_Rising_T5In_Sel(void)
selects Rising Edge on T5In as T5 Counter Mode Input.
Definition: gpt12e.h:3357
#define GPT12E_PISEL_IST5EUD_Msk
Definition: tle986x.h:7862
INLINE uint8 GPT12E_T2_Mode_IncEnc_Edge_Detect_Sts(void)
reads Timer T2 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:1231
#define GPT12E_T5CON_T5M_Pos
Definition: tle986x.h:7953
#define GPT12E_T2CON_T2RC_Msk
Definition: tle986x.h:7884
#define GPT12E_T3CON_T3EDGE_Msk
Definition: tle986x.h:7914
unsigned int uint32
32 bit unsigned value
Definition: types.h:141
#define GPT12E_T2_T2_Pos
Definition: tle986x.h:7870
#define GPT12E_PISEL_IST5IN_Pos
Definition: tle986x.h:7859
TGPT12E_CCU6_SEL
This enum lists the GPT12E CCU6 Selection.
Definition: gpt12e.h:106
INLINE void GPT12E_T6_Mode_Gated_Timer_High_Sel(void)
selects T6 Gated high Mode.
Definition: gpt12e.h:4058
#define SCU_GPT12IRC_T2_Msk
Definition: tle986x.h:8839
INLINE void GPT12E_T3_Int_Dis(void)
disables GPT Module 1 Timer 3 interrupt.
Definition: gpt12e.h:4919
INLINE uint8 GPT12E_T3_Mode_IncEnc_Edge_Detect_Sts(void)
reads Timer T3 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:1900
INLINE void GPT12E_T2_Mode_Reload_Input_Falling_T2In_En(void)
enables Falling Edge on T2In as T2 Reload Mode Input.
Definition: gpt12e.h:831
#define GPT12E_T4CON_T4M_Msk
Definition: tle986x.h:7926
INLINE void GPT12E_T2_Mode_IncEnc_Rot_Sel(void)
selects T2 Incremental Interface -Rotation Detection- Mode.
Definition: gpt12e.h:432
#define SCU_GPT12IEN_T2IE_Pos
Definition: tle986x.h:8825
INLINE void GPT12E_T6_Mode_Gated_Timer_Low_Sel(void)
selects T6 Gated low Mode.
Definition: gpt12e.h:4041
INLINE void GPT12E_T5_Int_Dis(void)
disables GPT Module 2 Timer 5 interrupt.
Definition: gpt12e.h:5011
#define GPT12E_T6CON_BPS2_Msk
Definition: tle986x.h:7990
INLINE void GPT12E_CapRel_Int_Dis(void)
disables GPT Module 1 Capture Reload interrupt.
Definition: gpt12e.h:5103
INLINE void GPT12E_T4_Int_Clr(void)
clears GPT Module 1 Timer 4 interrupt flag.
Definition: gpt12e.h:4758
#define GPT12E_PISEL_IST2EUD_Pos
Definition: tle986x.h:7849
INLINE void GPT12E_T2_Mode_Reload_Input_T3Out_Sel(void)
selects T3OTL as T2 Reload Mode Input.
Definition: gpt12e.h:867
TGPT1_Clk_Prescaler
This enum lists the GPT1 Mode Timer Prescaler.
Definition: gpt12e.h:95
INLINE void GPT12E_T2_Mode_IncEnc_Any_T3EUD_Dis(void)
disables Falling or Falling Edge on T3EUD as T2 Incremental Interface Mode Input.
Definition: gpt12e.h:1029
INLINE void GPT12E_T5_Mode_Counter_Input_Falling_T6Out_Dis(void)
disables Falling Edge on T6OTL as T5 Counter Mode Input.
Definition: gpt12e.h:3483
INLINE void GPT12E_T2_Mode_IncEnc_Any_T3In_Dis(void)
disables Rising or Falling Edge on T3In as T2 Incremental Interface Mode Input.
Definition: gpt12e.h:993
INLINE uint16 GPT12E_T4_Value_Get(void)
reads Timer T4 Value.
Definition: gpt12e.h:3107
INLINE void GPT12E_T2_Mode_Reload_Input_Falling_T2In_Dis(void)
disables Falling Edge on T2In as T2 Reload Mode Input.
Definition: gpt12e.h:849
INLINE void GPT12E_T2_UpDownCount_Ext_En(void)
enables controlling Count direction by external input (T2EUD).
Definition: gpt12e.h:1154
INLINE void GPT12E_T4_Mode_Counter_Input_Falling_T4In_En(void)
enables Falling Edge on T4In as T4 Counter Mode Input.
Definition: gpt12e.h:2297
INLINE void GPT12E_T4_Mode_Reload_Sel(void)
selects T4 Reload Mode.
Definition: gpt12e.h:2134
INLINE void GPT12E_T3_Int_Clr(void)
clears GPT Module 1 Timer 3 interrupt flag.
Definition: gpt12e.h:4735
#define GPT12E_PISEL_IST6IN_Pos
Definition: tle986x.h:7863
TGPT12E_T3EUD
This enum lists the GPT12E T3EUDx Inputs.
Definition: gpt12e.h:154
#define GPT12E_T3CON_T3RDIR_Msk
Definition: tle986x.h:7918
INLINE uint8 GPT12E_T4_Mode_IncEnc_Edge_Detect_Sts(void)
reads Timer T4 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:3021
INLINE void GPT12E_T5_T5In_Sel(uint16 ist5in)
selects Input for T2IN.
Definition: gpt12e.h:3967
#define GPT12E_T4CON_T4EDGE_Msk
Definition: tle986x.h:7942
#define SCU_GPT12IRC_T3_Msk
Definition: tle986x.h:8837
#define GPT12E_T3CON_T3M_Msk
Definition: tle986x.h:7900
INLINE void GPT12E_T4_Clr_T3_Dis(void)
Disables the automatic clearing of timer T3 upon a falling edge of the selected T4EUD input.
Definition: gpt12e.h:2998
#define GPT12E_T6_T6_Pos
Definition: tle986x.h:7972
#define GPT12E_T2CON_T2M_Pos
Definition: tle986x.h:7875
void GPT12E_Init(void)
Initializes the GPT12E module.
INLINE void GPT12E_T4_Mode_Reload_Input_Falling_T3Out_En(void)
enables Falling Edge on T3OTL as T4 Reload Mode Input.
Definition: gpt12e.h:2657
INLINE void GPT12E_T2_Mode_Reload_Input_T2In_Sel(void)
selects T2In as T2 Reload Mode Input.
Definition: gpt12e.h:777
#define GPT12E_T3CON_T3EDGE_Pos
Definition: tle986x.h:7913
INLINE void GPT12E_T2_Mode_Capture_Input_Falling_T2In_Dis(void)
disables Falling Edge on T2In as T2 Capture Mode Input.
Definition: gpt12e.h:759
INLINE uint16 GPT12E_GPT2_Clk_Prescaler_Get(void)
reads GPT2 Block Prescaler.
Definition: gpt12e.h:3210
#define GPT12E_PISEL_IST5IN_Msk
Definition: tle986x.h:7860
#define GPT12E_PISEL_IST3IN_Msk
Definition: tle986x.h:7852
#define SCU_GPT12IRC_CR_Msk
Definition: tle986x.h:8829
#define SCU_GPT12IRC_T4_Msk
Definition: tle986x.h:8835
INLINE void GPT12E_T5_Mode_Counter_Input_Any_T5In_Sel(void)
selects Any Edge on T5In as T5 Counter Mode Input.
Definition: gpt12e.h:3393
#define GPT12E_T4CON_T4R_Msk
Definition: tle986x.h:7928
INLINE void GPT12E_T4_Mode_IncEnc_Any_T3EUD_Dis(void)
disables Falling or Falling Edge on T3EUD as T4 Incremental Interface Mode Input.
Definition: gpt12e.h:2747
#define SCU_GPT12IRC_T5_Msk
Definition: tle986x.h:8833
#define GPT12E_T3CON_T3UD_Pos
Definition: tle986x.h:7903
INLINE void GPT12E_T5_Mode_Counter_Input_T5In_Sel(void)
selects T5In as T5 Counter Mode Input.
Definition: gpt12e.h:3339
#define GPT12E_T3CON_T3R_Pos
Definition: tle986x.h:7901
#define GPT12E_T4CON_T4RDIR_Pos
Definition: tle986x.h:7945
INLINE void GPT12E_T6_Reload_Dis(void)
disables T6 Reload Mode.
Definition: gpt12e.h:4204
INLINE void GPT12E_T3_Mode_IncEnc_Any_T3EUD_Dis(void)
disables Falling or Falling Edge on T3EUD as T3 Incremental Interface Mode Input.
Definition: gpt12e.h:1666
#define GPT12E_T6CON_T6SR_Msk
Definition: tle986x.h:7994
#define GPT12E_T6CON_T6I_Msk
Definition: tle986x.h:7976
#define GPT12E_T5CON_T5RC_Msk
Definition: tle986x.h:7962
INLINE uint8 GPT12E_T4_Mode_IncEnc_Dir_Change_Sts(void)
reads Timer T4 Incremental Interface Direction Change.
Definition: gpt12e.h:3065
INLINE uint8 u1_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 1-bit field of a 16-bit register.
Definition: sfr_access.h:396
CMSIS register HeaderFile.
INLINE void GPT12E_T2_Int_Dis(void)
disables GPT Module 1 Timer 2 interrupt.
Definition: gpt12e.h:4873
#define SCU
Definition: tle986x.h:6004
INLINE void GPT12E_T2_Mode_Reload_Sel(void)
selects T2 Reload Mode.
Definition: gpt12e.h:398
#define SCU_GPT12IEN_T5IE_Msk
Definition: tle986x.h:8820
INLINE void GPT12E_T4_Mode_Reload_Input_Rising_T4In_Dis(void)
disables Rising Edge on T4In as T4 Reload Mode Input.
Definition: gpt12e.h:2549
INLINE void GPT12E_T5_Start_by_T6_Dis(void)
disables controlling Timer T5 by the run bit T6R of core timer T6.
Definition: gpt12e.h:3817
INLINE void GPT12E_T5_Capture_Trig_Any_T3EUD_Dis(void)
disables Any Edge on T3EUD as T5 Capture Mode Input.
Definition: gpt12e.h:3705
INLINE void GPT12E_T2_Mode_Reload_Input_Rising_T3Out_Dis(void)
disables Rising Edge on T3OTL as T2 Reload Mode Input.
Definition: gpt12e.h:903
#define GPT12E_T4CON_T4I_Msk
Definition: tle986x.h:7924
INLINE void GPT12E_T4_Mode_Counter_Input_Falling_T3Out_En(void)
enables Falling Edge on T3OTL as T4 Counter Mode Input.
Definition: gpt12e.h:2387
INLINE void GPT12E_T3_Mode_IncEnc_Any_T3In_Dis(void)
disables Rising or Falling Edge on T3In as T3 Incremental Interface Mode Input.
Definition: gpt12e.h:1630
#define GPT12E_T4CON_T4UD_Pos
Definition: tle986x.h:7929
INLINE void GPT12E_T3_Value_Set(uint16 t3)
sets Timer T3 Value.
Definition: gpt12e.h:2005
#define SCU_GPT12ICLR_T5C_Pos
Definition: tle986x.h:8806
#define GPT12E_PISEL_IST2IN_Msk
Definition: tle986x.h:7848
INLINE void GPT12E_T4_Mode_IncEnc_Any_T3EUD_En(void)
enables Falling or Falling Edge on T3EUD as T4 Incremental Interface Mode Input.
Definition: gpt12e.h:2729
INLINE void GPT12E_T2_T2In_Sel(uint16 ist2in)
selects Input for T2IN.
Definition: gpt12e.h:1357
INLINE void GPT12E_T2_Mode_Gated_Timer_Clk_Prescaler_Sel(uint16 t2i)
selects T2 Gated Timer Mode Parameter.
Definition: gpt12e.h:489
INLINE void GPT12E_T5_Start_by_T6_En(void)
enables controlling Timer T5 by the run bit T6R of core timer T6.
Definition: gpt12e.h:3835
#define GPT12E_T3_T3_Pos
Definition: tle986x.h:7894
#define SCU_GPT12IEN_T6IE_Pos
Definition: tle986x.h:8817
TGPT2_Clk_Prescaler
This enum lists the GPT2 Mode Timer Prescaler.
Definition: gpt12e.h:183
INLINE void GPT12E_T3_Start(void)
starts Timer T3.
Definition: gpt12e.h:1683
#define GPT12E_T2CON_T2R_Msk
Definition: tle986x.h:7878
#define SCU_GPT12PISEL_GPT12_Msk
Definition: tle986x.h:8846
INLINE void GPT12E_T4_Mode_Reload_Input_Rising_T4In_En(void)
enables Rising Edge on T4In as T4 Reload Mode Input.
Definition: gpt12e.h:2531
TGPT12E_T4EUD
This enum lists the GPT12E T4EUDx Inputs.
Definition: gpt12e.h:174
#define GPT12E_T2CON_T2RDIR_Pos
Definition: tle986x.h:7891
INLINE void GPT12E_T6_DownCount_Sel(void)
selects Timer T6 counts down.
Definition: gpt12e.h:4382
INLINE void GPT12E_T3_Mode_IncEnc_Edge_Detect_Clr(void)
clears Timer T3 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:1921
INLINE void GPT12E_T4_Clr_T3_En(void)
Enables the automatic clearing of timer T3 upon a falling edge of the selected T4EUD input.
Definition: gpt12e.h:2981
INLINE void GPT12E_T4_Mode_Gated_Timer_Clk_Prescaler_Sel(uint16 t4i)
selects T4 Gated Timer Mode Parameter.
Definition: gpt12e.h:2225
INLINE void GPT12E_T4_Mode_Counter_Input_Falling_T3Out_Dis(void)
disables Falling Edge on T3OTL as T4 Counter Mode Input.
Definition: gpt12e.h:2405
INLINE void GPT12E_T4_Mode_Gated_Timer_Low_Sel(void)
selects T4 Gated low Mode.
Definition: gpt12e.h:2100
INLINE void GPT12E_T4_Mode_IncEnc_Edge_Sel(void)
selects T4 Incremental Interface -Edge Detection- Mode.
Definition: gpt12e.h:2185
#define SCU_GPT12IRC_T5_Pos
Definition: tle986x.h:8832
INLINE uint8 GPT12E_T2_Mode_IncEnc_Dir_Change_Sts(void)
reads Timer T2 Incremental Interface Direction Change.
Definition: gpt12e.h:1275
#define GPT12E_T6CON_T6OE_Msk
Definition: tle986x.h:7986
INLINE void GPT12E_T3_Mode_IncEnc_Dir_Change_Clr(void)
clears Timer T3 Incremental Interface Direction Change.
Definition: gpt12e.h:1965
INLINE void GPT12E_T4_Mode_Capture_Input_Rising_T4In_Dis(void)
disables Rising Edge on T4In as T4 Capture Mode Input.
Definition: gpt12e.h:2459
INLINE void GPT12E_T6_Mode_Timer_Clk_Prescaler_Sel(uint16 t6i)
selects T6 Timer Mode Parameter.
Definition: gpt12e.h:4078
#define GPT12E_T4CON_T4UDE_Pos
Definition: tle986x.h:7931
#define GPT12E_T5_T5_Msk
Definition: tle986x.h:7949
INLINE void GPT12E_T2_Mode_Counter_Input_Falling_T3Out_Dis(void)
disables Falling Edge on T3OTL as T2 Counter Mode Input.
Definition: gpt12e.h:669
#define GPT12E_T3CON_T3UDE_Msk
Definition: tle986x.h:7906
INLINE void GPT12E_T2_Mode_Reload_Input_Falling_T3Out_En(void)
enables Falling Edge on T3OTL as T2 Reload Mode Input.
Definition: gpt12e.h:921
INLINE void GPT12E_T2_Int_En(void)
enables GPT Module 1 Timer 2 interrupt.
Definition: gpt12e.h:4850
INLINE void GPT12E_T2_Int_Clr(void)
clears GPT Module 1 Timer 2 interrupt flag.
Definition: gpt12e.h:4712
INLINE uint8 GPT12E_T3_Mode_IncEnc_Dir_Change_Sts(void)
reads Timer T3 Incremental Interface Direction Change.
Definition: gpt12e.h:1944
INLINE void GPT12E_T6_Mode_Gated_Timer_Clk_Prescaler_Sel(uint16 t6i)
selects T6 Gated Timer Mode Parameter.
Definition: gpt12e.h:4098
#define GPT12E_T6CON_T6CLR_Msk
Definition: tle986x.h:7992
#define GPT12E_T3CON_T3UDE_Pos
Definition: tle986x.h:7905
INLINE void GPT12E_T5_Mode_Counter_Input_Falling_T5In_Sel(void)
selects Falling Edge on T5In as T5 Counter Mode Input.
Definition: gpt12e.h:3375
INLINE void GPT12E_T6_Reload_Value_Set(uint16 rl)
sets Current T6 Reload Value.
Definition: gpt12e.h:4224
INLINE void GPT12E_T5_Capture_Trig_Falling_CapIn_En(void)
enables Falling Edge on CapIn as T5 Capture Mode Input.
Definition: gpt12e.h:3592
INLINE void GPT12E_T3_UpDownCount_Ext_Dis(void)
disables controlling Count direction by external input (T3EUD).
Definition: gpt12e.h:1841
INLINE void GPT12E_T2_Mode_IncEnc_Input_Sel(void)
selects T2 Incremental Interface Mode Input.
Definition: gpt12e.h:957
INLINE void GPT12E_CapRel_Int_En(void)
enables GPT Module 1 Capture Reload interrupt.
Definition: gpt12e.h:5080
#define GPT12E_T3CON_T3R_Msk
Definition: tle986x.h:7902
TGPT12E_T5EUD
This enum lists the GPT12E T5EUDx Inputs.
Definition: gpt12e.h:203
INLINE void GPT12E_T2_Mode_Reload_Input_Rising_T2In_En(void)
enables Rising Edge on T2In as T2 Reload Mode Input.
Definition: gpt12e.h:795
INLINE uint8 GPT12E_T3_Int_Sts(void)
reads GPT Module 1 Timer 3 interrupt Status.
Definition: gpt12e.h:4592
#define GPT12E_T5CON_T5UDE_Msk
Definition: tle986x.h:7960
#define GPT12E_T6CON_T6R_Pos
Definition: tle986x.h:7979
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:336
#define GPT12E_PISEL_IST2IN_Pos
Definition: tle986x.h:7847
INLINE void GPT12E_T4_Mode_Counter_Input_Rising_T3Out_En(void)
enables Rising Edge on T3OTL as T4 Counter Mode Input.
Definition: gpt12e.h:2351
INLINE void GPT12E_T2_Mode_Gated_Timer_Low_Sel(void)
selects T2 Gated low Mode.
Definition: gpt12e.h:364
#define SCU_GPT12ICLR_T4C_Pos
Definition: tle986x.h:8808
INLINE void GPT12E_T2_Value_Set(uint16 t2)
sets Timer T2 Value.
Definition: gpt12e.h:1336
#define GPT12E_PISEL_IST3IN_Pos
Definition: tle986x.h:7851
INLINE void GPT12E_T4_Mode_Counter_Input_Rising_T4In_En(void)
enables Rising Edge on T4In as T4 Counter Mode Input.
Definition: gpt12e.h:2261
#define GPT12E_T3CON_T3UD_Msk
Definition: tle986x.h:7904
INLINE void GPT12E_T2_Start(void)
starts Timer T2.
Definition: gpt12e.h:1047
INLINE void GPT12E_T5_Value_Set(uint16 t5)
sets Timer T5 Value.
Definition: gpt12e.h:3946
INLINE void GPT12E_T5_Capture_Trig_Falling_CapIn_Dis(void)
disables Falling Edge on CapIn as T5 Capture Mode Input.
Definition: gpt12e.h:3611
INLINE void GPT12E_T5_Capture_Trig_T3In_T3EUD_Sel(void)
selects T3In and/or T3EUD as T5 Capture Mode Input.
Definition: gpt12e.h:3629
#define SCU_GPT12IRC_T4_Pos
Definition: tle986x.h:8834
#define GPT12E_PISEL_IST3EUD_Msk
Definition: tle986x.h:7854
INLINE void GPT12E_T5_Capture_Trig_Any_T3In_Dis(void)
disables Any Edge on T3In as T5 Capture Mode Input.
Definition: gpt12e.h:3667
INLINE void GPT12E_T6_Output_Rst(void)
clears Timer T6 Overflow Toggle Latch.
Definition: gpt12e.h:4364
INLINE void GPT12E_T4_Mode_Counter_Input_T4In_Sel(void)
selects T4In as T4 Counter Mode Input.
Definition: gpt12e.h:2243
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:331
#define SCU_GPT12IEN_T6IE_Msk
Definition: tle986x.h:8818
INLINE uint16 GPT12E_T5_Capture_Value_Get(void)
reads Current T5 Capture Value.
Definition: gpt12e.h:3763
#define SCU_GPT12IEN_T5IE_Pos
Definition: tle986x.h:8819
INLINE void GPT12E_T3_Stop(void)
stops Timer T3.
Definition: gpt12e.h:1700
INLINE uint16 GPT12E_T3_Value_Get(void)
reads Timer T3 Value.
Definition: gpt12e.h:1986
INLINE void GPT12E_T4_Mode_Timer_Sel(void)
selects T4 Timer Mode.
Definition: gpt12e.h:2066
#define GPT12E_T2CON_T2RDIR_Msk
Definition: tle986x.h:7892
INLINE void GPT12E_T3_T3In_Sel(uint16 ist3in)
selects Input for T3IN.
Definition: gpt12e.h:2026
#define SCU_GPT12ICLR_T6C_Msk
Definition: tle986x.h:8805
INLINE void GPT12E_T3_Mode_IncEnc_Any_T3In_En(void)
enables Rising or Falling Edge on T3In as T3 Incremental Interface Mode Input.
Definition: gpt12e.h:1612
#define SCU_GPT12PISEL_GPT12_Pos
Definition: tle986x.h:8845
INLINE void GPT12E_T5_Mode_Counter_Sel(void)
selects T5 Counter Mode.
Definition: gpt12e.h:3247
INLINE void GPT12E_T2_Mode_Counter_Sel(void)
selects T2 Counter Mode.
Definition: gpt12e.h:347
INLINE void GPT12E_T5_Capture_Trig_CapIn_Sel(void)
selects CapIn as T5 Capture Mode Input.
Definition: gpt12e.h:3535
INLINE void GPT12E_T2_Mode_Counter_Input_T2In_Sel(void)
selects T2In as T2 Counter Mode Input.
Definition: gpt12e.h:507
INLINE void GPT12E_GPT2_Clk_Prescaler_Sel(uint16 bps2)
selects GPT2 Block Prescaler.
Definition: gpt12e.h:3189
INLINE void GPT12E_T4_Mode_Reload_Input_Falling_T3Out_Dis(void)
disables Falling Edge on T3OTL as T4 Reload Mode Input.
Definition: gpt12e.h:2675
#define SCU_GPT12IEN_CRIE_Pos
Definition: tle986x.h:8815
INLINE void GPT12E_T5_UpDownCount_Ext_En(void)
enables controlling Count direction by external input (T5EUD).
Definition: gpt12e.h:3888
#define GPT12E_PISEL_IST4EUD_Msk
Definition: tle986x.h:7858
INLINE void GPT12E_T2_Mode_Timer_Clk_Prescaler_Sel(uint16 t2i)
selects T2 Timer Mode Parameter.
Definition: gpt12e.h:469
INLINE void GPT12E_T2_Mode_IncEnc_Edge_Detect_Clr(void)
clears Timer T2 Incremental Interface Edge Detection Counting.
Definition: gpt12e.h:1252
INLINE void GPT12E_T5_Mode_Counter_Input_Falling_T6Out_En(void)
enables Falling Edge on T6OTL as T5 Counter Mode Input.
Definition: gpt12e.h:3465
INLINE void GPT12E_T3_UpDownCount_Ext_En(void)
enables controlling Count direction by external input (T3EUD).
Definition: gpt12e.h:1823
INLINE void GPT12E_T3_Output_Set(void)
sets Timer T3 Overflow Toggle Latch.
Definition: gpt12e.h:1752
#define GPT12E_T3_T3_Msk
Definition: tle986x.h:7895
#define GPT12E_T6CON_T6UDE_Pos
Definition: tle986x.h:7983
INLINE void GPT12E_T3_Mode_Timer_Sel(void)
selects T3 Timer Mode.
Definition: gpt12e.h:1397
#define SCU_GPT12IEN_T3IE_Pos
Definition: tle986x.h:8823
INLINE void GPT12E_T4_Mode_IncEnc_Dir_Change_Clr(void)
clears Timer T4 Incremental Interface Direction Change.
Definition: gpt12e.h:3086
#define SCU_GPT12ICLR_T2C_Msk
Definition: tle986x.h:8813
INLINE void GPT12E_T5_Capture_Trig_Any_T3In_En(void)
enables Any Edge on T3In as T5 Capture Mode Input.
Definition: gpt12e.h:3648
INLINE void GPT12E_T6_Mode_Counter_Input_Rising_T6In_Sel(void)
selects Rising Edge on T6In as T6 Counter Mode Input.
Definition: gpt12e.h:4134
#define GPT12E_T2CON_T2EDGE_Pos
Definition: tle986x.h:7887
INLINE void GPT12E_T6_Mode_Counter_Input_T6In_Sel(void)
selects T6In as T6 Counter Mode Input.
Definition: gpt12e.h:4116
INLINE void GPT12E_T6_Int_Dis(void)
disables GPT Module 2 Timer 6 interrupt.
Definition: gpt12e.h:5057
INLINE void GPT12E_T4_Mode_IncEnc_UpCount_RotDir_Sel(void)
selects Timer T4 Incremental Interface Rotation Detection Mode counts up.
Definition: gpt12e.h:2926
TGPT12E_T5IN
This enum lists the GPT12E T5INx Inputs.
Definition: gpt12e.h:194
#define GPT12E_CAPREL_CAPREL_Msk
Definition: tle986x.h:7840
INLINE void GPT12E_T4_Mode_Reload_Input_T3Out_Sel(void)
selects T3OTL as T4 Reload Mode Input.
Definition: gpt12e.h:2603
INLINE void GPT12E_T4_UpDownCount_Ext_En(void)
enables controlling Count direction by external input (T4EUD).
Definition: gpt12e.h:2872
INLINE void GPT12E_T3_Mode_IncEnc_UpCount_RotDir_Sel(void)
selects Timer T3 Incremental Interface Rotation Detection Mode counts up.
Definition: gpt12e.h:1877
INLINE void GPT12E_T4_Mode_Capture_Input_Rising_T4In_En(void)
enables Rising Edge on T4In as T4 Capture Mode Input.
Definition: gpt12e.h:2441
INLINE void GPT12E_T5_Mode_Gated_Timer_High_Sel(void)
selects T5 Gated high Mode.
Definition: gpt12e.h:3281
INLINE void GPT12E_T5_Mode_Gated_Timer_Low_Sel(void)
selects T5 Gated low Mode.
Definition: gpt12e.h:3264
#define GPT12E_T4CON_T4M_Pos
Definition: tle986x.h:7925
#define GPT12E_T4CON_T4UD_Msk
Definition: tle986x.h:7930
INLINE void GPT12E_GPT1_Clk_Prescaler_Sel(uint16 bps1)
selects GPT1 Clock Prescaler.
Definition: gpt12e.h:270
#define SCU_GPT12ICLR_CRC_Pos
Definition: tle986x.h:8802
TGPT12E_T6IN
This enum lists the GPT12E T6INx Inputs.
Definition: gpt12e.h:212
#define GPT12E_T2CON_T2UD_Pos
Definition: tle986x.h:7879
#define SCU_GPT12IEN_T3IE_Msk
Definition: tle986x.h:8824
INLINE void GPT12E_T3_UpCount_Sel(void)
selects Timer T3 counts up.
Definition: gpt12e.h:1806
INLINE void GPT12E_T5_Mode_Counter_Input_Rising_T6Out_Dis(void)
disables Rising Edge on T6OTL as T5 Counter Mode Input.
Definition: gpt12e.h:3447
INLINE void GPT12E_T4_UpCount_Sel(void)
selects Timer T4 counts up.
Definition: gpt12e.h:2855
#define GPT12E_PISEL_IST3EUD_Pos
Definition: tle986x.h:7853
INLINE void GPT12E_T2_Mode_Reload_Input_Rising_T2In_Dis(void)
disables Rising Edge on T2In as T2 Reload Mode Input.
Definition: gpt12e.h:813
#define GPT12E_T5CON_CT3_Msk
Definition: tle986x.h:7964
#define GPT12E_T5CON_CT3_Pos
Definition: tle986x.h:7963
#define GPT12E_T4CON_T4RDIR_Msk
Definition: tle986x.h:7946
INLINE void GPT12E_T4_Mode_IncEnc_DownCount_RotDir_Sel(void)
selects Timer T4 Incremental Interface Rotation Detection Mode counts down.
Definition: gpt12e.h:2908