TLE986x Device Family SDK
ssc.h
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37 /*******************************************************************************
38 ** Author(s) Identity **
39 ********************************************************************************
40 ** Initials Name **
41 ** ---------------------------------------------------------------------------**
42 ** DM Daniel Mysliwitz **
43 ** JO Julia Ott **
44 ** TA Thomas Albersinger **
45 ** BG Blandine Guillot **
46 *******************************************************************************/
47 
48 /*******************************************************************************
49 ** Revision Control History **
50 ********************************************************************************
51 ** V0.1.0: 2014-05-15, TA: Initial version **
52 ** V0.1.1: 2015-02-10, DM: Individual header file added **
53 ** V0.1.2: 2015-06-24, DM: SendWord functions return received data word **
54 ** V0.1.3: 2017-05-24, DM: Interrupt APIs added **
55 ** V0.1.4: 2017-10-18, DM: MISRA 2012 compliance, the following PC-Lint **
56 ** rules are globally deactivated: **
57 ** - Info 793: ANSI/ISO limit of 6 'significant **
58 ** characters in an external identifier **
59 ** - Info 835: A zero has been given as right **
60 ** argument to operator **
61 ** - Info 845: The left argument to operator '&' **
62 ** is certain to be 0 **
63 ** Replaced macros by INLINE functions **
64 ** Replaced register accesses within functions by **
65 ** function calls **
66 ** Replaced __STATIC_INLINE by INLINE **
67 ** V0.1.5: 2018-11-27, JO: Doxygen update, moved revision history from **
68 ** ssc.c to ssc.h **
69 ** Replaced __STATIC_INLINE by INLINE **
70 ** V0.1.6: 2019-06-06, JO: Changed mask for initializing SSCx_CON from **
71 ** 0x7FFF to 0x5FFF to mask out the reserved bit **
72 ** (bit 13) **
73 ** V0.1.7: 2020-02-28, BG: Updated revision history format **
74 *******************************************************************************/
75 
76 #ifndef SSC_H
77 #define SSC_H
78 
79 /*******************************************************************************
80 ** Includes **
81 *******************************************************************************/
82 #include "tle986x.h"
83 #include "types.h"
84 #include "sfr_access.h"
85 
86 /*******************************************************************************
87 ** Global Macro Definitions **
88 *******************************************************************************/
90 #define SSC1_tBit_us (1.0 / (SSC1_MAN_BAUDRATE / 1000.0))
91 
92 #define SSC2_tBit_us (1.0 / (SSC2_MAN_BAUDRATE / 1000.0))
93 
94 /*******************************************************************************
95 ** Global Inline Function Definitions **
96 *******************************************************************************/
114 INLINE void SSC1_TX_Int_Clr(void)
115 {
117 }
118 
136 INLINE void SSC1_RX_Int_Clr(void)
137 {
139 }
140 
158 INLINE void SSC1_Err_Int_Clr(void)
159 {
161 }
162 
180 INLINE void SSC2_TX_Int_Clr(void)
181 {
183 }
184 
202 INLINE void SSC2_RX_Int_Clr(void)
203 {
205 }
206 
224 INLINE void SSC2_Err_Int_Clr(void)
225 {
227 }
228 
246 INLINE void SSC1_TX_Int_En(void)
247 {
249 }
250 
269 INLINE void SSC1_TX_Int_Dis(void)
270 {
272 }
273 
291 INLINE void SSC1_RX_Int_En(void)
292 {
294 }
295 
314 INLINE void SSC1_RX_Int_Dis(void)
315 {
317 }
318 
336 INLINE void SSC1_Err_Int_En(void)
337 {
339 }
340 
359 INLINE void SSC1_Err_Int_Dis(void)
360 {
362 }
363 
381 INLINE void SSC2_TX_Int_En(void)
382 {
384 }
385 
404 INLINE void SSC2_TX_Int_Dis(void)
405 {
407 }
408 
426 INLINE void SSC2_RX_Int_En(void)
427 {
429 }
430 
449 INLINE void SSC2_RX_Int_Dis(void)
450 {
452 }
453 
471 INLINE void SSC2_Err_Int_En(void)
472 {
474 }
475 
494 INLINE void SSC2_Err_Int_Dis(void)
495 {
497 }
498 
499 /*******************************************************************************
500 ** Global Function Declarations **
501 *******************************************************************************/
506 void SSC1_Init(void);
507 
512 void SSC2_Init(void);
513 
514 /*******************************************************************************
515 ** Global Inline Function Declarations **
516 *******************************************************************************/
521 
522 /*******************************************************************************
523 ** Global Inline Function Definitions **
524 *******************************************************************************/
543 {
546 }
547 
565 {
567 }
568 
587 {
590 }
591 
609 {
611 }
612 
613 #endif
SCU_MODIEN2_TIREN2_Msk
#define SCU_MODIEN2_TIREN2_Msk
Definition: tle986x.h:8998
SSC2
#define SSC2
Definition: tle986x.h:6007
SCU_IRCON1CLR_EIRC_Msk
#define SCU_IRCON1CLR_EIRC_Msk
Definition: tle986x.h:8902
SSC2_RB_RB_VALUE_Msk
#define SSC2_RB_RB_VALUE_Msk
Definition: tle986x.h:9689
SSC1_Err_Int_En
INLINE void SSC1_Err_Int_En(void)
enables error interrupt for SSC1.
Definition: ssc.h:331
SSC2_Err_Int_Clr
INLINE void SSC2_Err_Int_Clr(void)
clears error interrupt flag for SSC2.
Definition: ssc.h:219
types.h
General type declarations.
SCU_MODIEN1_RIREN1_Pos
#define SCU_MODIEN1_RIREN1_Pos
Definition: tle986x.h:8982
SCU_IRCON2CLR_RIRC_Msk
#define SCU_IRCON2CLR_RIRC_Msk
Definition: tle986x.h:8912
SSC2_RX_Int_En
INLINE void SSC2_RX_Int_En(void)
enables receive interrupt for SSC2.
Definition: ssc.h:421
SCU_IRCON2CLR_TIRC_Msk
#define SCU_IRCON2CLR_TIRC_Msk
Definition: tle986x.h:8914
SSC2_TX_Int_Dis
INLINE void SSC2_TX_Int_Dis(void)
disables transmit interrupt for SSC2.
Definition: ssc.h:399
SSC1_ReadWord
INLINE uint16 SSC1_ReadWord(void)
SSC1: Read data word from receive buffer.
Definition: ssc.h:556
SCU_MODIEN1_EIREN1_Pos
#define SCU_MODIEN1_EIREN1_Pos
Definition: tle986x.h:8986
SCU_MODIEN2_EIREN2_Pos
#define SCU_MODIEN2_EIREN2_Pos
Definition: tle986x.h:8999
sfr_access.h
SFR low level access library.
u16_Field_Rd16
INLINE uint16 u16_Field_Rd16(const volatile uint16 *reg, uint16 pos, uint16 msk)
This function reads a 16-bit field of a 16-bit register.
Definition: sfr_access.h:421
SSC1_SendWord
INLINE uint16 SSC1_SendWord(uint16 DataWord)
SSC1: Send data word.
Definition: ssc.h:534
SSC2_TX_Int_Clr
INLINE void SSC2_TX_Int_Clr(void)
clears transmit interrupt flag for SSC2.
Definition: ssc.h:175
INLINE
#define INLINE
Definition: types.h:134
Field_Mod8
INLINE void Field_Mod8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:346
SCU_IRCON2CLR_TIRC_Pos
#define SCU_IRCON2CLR_TIRC_Pos
Definition: tle986x.h:8913
SCU_IRCON1CLR_TIRC_Msk
#define SCU_IRCON1CLR_TIRC_Msk
Definition: tle986x.h:8900
SSC1_RB_RB_VALUE_Pos
#define SSC1_RB_RB_VALUE_Pos
Definition: tle986x.h:9638
SCU_IRCON1CLR_RIRC_Msk
#define SCU_IRCON1CLR_RIRC_Msk
Definition: tle986x.h:8898
uint16
unsigned short uint16
16 bit unsigned value
Definition: types.h:140
SCU_MODIEN2_RIREN2_Pos
#define SCU_MODIEN2_RIREN2_Pos
Definition: tle986x.h:8995
SCU_IRCON2CLR_EIRC_Pos
#define SCU_IRCON2CLR_EIRC_Pos
Definition: tle986x.h:8915
SSC2_Init
void SSC2_Init(void)
Initializes the SSC2 module.
SSC2_TX_Int_En
INLINE void SSC2_TX_Int_En(void)
enables transmit interrupt for SSC2.
Definition: ssc.h:376
SCU_IRCON2CLR_RIRC_Pos
#define SCU_IRCON2CLR_RIRC_Pos
Definition: tle986x.h:8911
SSC2_RX_Int_Clr
INLINE void SSC2_RX_Int_Clr(void)
clears receive interrupt flag for SSC2.
Definition: ssc.h:197
SSC2_TB_TB_VALUE_Pos
#define SSC2_TB_TB_VALUE_Pos
Definition: tle986x.h:9691
SSC1_RX_Int_En
INLINE void SSC1_RX_Int_En(void)
enables receive interrupt for SSC1.
Definition: ssc.h:286
SSC1_TX_Int_En
INLINE void SSC1_TX_Int_En(void)
enables transmit interrupt for SSC1.
Definition: ssc.h:241
SSC2_TB_TB_VALUE_Msk
#define SSC2_TB_TB_VALUE_Msk
Definition: tle986x.h:9692
SSC1_TB_TB_VALUE_Pos
#define SSC1_TB_TB_VALUE_Pos
Definition: tle986x.h:9641
SCU_MODIEN2_RIREN2_Msk
#define SCU_MODIEN2_RIREN2_Msk
Definition: tle986x.h:8996
uint8
unsigned char uint8
8 bit unsigned value
Definition: types.h:139
SSC2_Err_Int_Dis
INLINE void SSC2_Err_Int_Dis(void)
disables error interrupt for SSC2.
Definition: ssc.h:489
SSC2_Err_Int_En
INLINE void SSC2_Err_Int_En(void)
enables error interrupt for SSC2.
Definition: ssc.h:466
SSC2_RX_Int_Dis
INLINE void SSC2_RX_Int_Dis(void)
disables receive interrupt for SSC2.
Definition: ssc.h:444
SSC2_ReadWord
INLINE uint16 SSC2_ReadWord(void)
SSC2: Read data word from receive buffer.
Definition: ssc.h:600
SCU_IRCON1CLR_EIRC_Pos
#define SCU_IRCON1CLR_EIRC_Pos
Definition: tle986x.h:8901
SSC1_Err_Int_Dis
INLINE void SSC1_Err_Int_Dis(void)
disables error interrupt for SSC1.
Definition: ssc.h:354
SSC1
#define SSC1
Definition: tle986x.h:6006
SCU_IRCON2CLR_EIRC_Msk
#define SCU_IRCON2CLR_EIRC_Msk
Definition: tle986x.h:8916
SSC1_TB_TB_VALUE_Msk
#define SSC1_TB_TB_VALUE_Msk
Definition: tle986x.h:9642
SSC1_TX_Int_Clr
INLINE void SSC1_TX_Int_Clr(void)
clears transmit interrupt flag for SSC1.
Definition: ssc.h:109
SSC1_RX_Int_Clr
INLINE void SSC1_RX_Int_Clr(void)
clears receive interrupt flag for SSC1.
Definition: ssc.h:131
tle986x.h
CMSIS register HeaderFile.
SCU
#define SCU
Definition: tle986x.h:6004
SSC1_RX_Int_Dis
INLINE void SSC1_RX_Int_Dis(void)
disables receive interrupt for SSC1.
Definition: ssc.h:309
SCU_MODIEN1_EIREN1_Msk
#define SCU_MODIEN1_EIREN1_Msk
Definition: tle986x.h:8987
SCU_IRCON1CLR_TIRC_Pos
#define SCU_IRCON1CLR_TIRC_Pos
Definition: tle986x.h:8899
SSC2_SendWord
INLINE uint16 SSC2_SendWord(uint16 DataWord)
SSC2: Send data word.
Definition: ssc.h:578
SCU_MODIEN2_EIREN2_Msk
#define SCU_MODIEN2_EIREN2_Msk
Definition: tle986x.h:9000
SSC1_TX_Int_Dis
INLINE void SSC1_TX_Int_Dis(void)
disables transmit interrupt for SSC1.
Definition: ssc.h:264
SSC1_Err_Int_Clr
INLINE void SSC1_Err_Int_Clr(void)
clears error interrupt flag for SSC1.
Definition: ssc.h:153
SCU_MODIEN2_TIREN2_Pos
#define SCU_MODIEN2_TIREN2_Pos
Definition: tle986x.h:8997
SSC1_RB_RB_VALUE_Msk
#define SSC1_RB_RB_VALUE_Msk
Definition: tle986x.h:9639
Field_Wrt16
INLINE void Field_Wrt16(volatile uint16 *reg, uint16 pos, uint16 msk, uint16 val)
This function writes a bit field in a 16-bit register.
Definition: sfr_access.h:336
SSC1_Init
void SSC1_Init(void)
Initializes the SSC1 module.
SCU_IRCON1CLR_RIRC_Pos
#define SCU_IRCON1CLR_RIRC_Pos
Definition: tle986x.h:8897
Field_Wrt8
INLINE void Field_Wrt8(volatile uint8 *reg, uint8 pos, uint8 msk, uint8 val)
This function writes a bit field in a 8-bit register.
Definition: sfr_access.h:331
SCU_MODIEN1_RIREN1_Msk
#define SCU_MODIEN1_RIREN1_Msk
Definition: tle986x.h:8983
SCU_MODIEN1_TIREN1_Msk
#define SCU_MODIEN1_TIREN1_Msk
Definition: tle986x.h:8985
SCU_MODIEN1_TIREN1_Pos
#define SCU_MODIEN1_TIREN1_Pos
Definition: tle986x.h:8984
SSC2_RB_RB_VALUE_Pos
#define SSC2_RB_RB_VALUE_Pos
Definition: tle986x.h:9688