Infineon MOTIX™ MCU TLE985x Device Family SDK
Data Fields
TIMER2_Type Struct Reference

Detailed Description

TIMER2 (TIMER2)

#include <tle985x.h>

Data Fields

union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   CP_RL2: 1
 
      __IOM uint32_t   C_T2: 1
 
      __IOM uint32_t   TR2: 1
 
      __IOM uint32_t   EXEN2: 1
 
      __IM   uint32_t: 2
 
      __IM uint32_t   EXF2: 1
 
      __IM uint32_t   TF2: 1
 
   }   bit
 
CON
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   DCEN: 1
 
      __IOM uint32_t   T2PRE: 3
 
      __IOM uint32_t   PREN: 1
 
      __IOM uint32_t   EDGESEL: 1
 
      __IOM uint32_t   T2RHEN: 1
 
      __IOM uint32_t   T2REGS: 1
 
   }   bit
 
MOD
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   RCL2: 8
 
      __IOM uint32_t   RCH2: 8
 
   }   bit
 
RC
 
__IM uint32_t RESERVED
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   T2L: 8
 
      __IOM uint32_t   T2H: 8
 
   }   bit
 
CNT
 
__IM uint32_t RESERVED1
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IM   uint32_t: 6
 
      __OM uint32_t   EXF2CLR: 1
 
      __OM uint32_t   TF2CLR: 1
 
   }   bit
 
ICLR
 
union {
   __IOM uint32_t   reg
 
   struct {
      __IOM uint32_t   EXF2EN: 1
 
      __IOM uint32_t   TF2EN: 1
 
   }   bit
 
CON1
 

Field Documentation

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struct { ... } bit

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struct { ... } bit

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struct { ... } bit

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struct { ... } bit

◆ C_T2

[1..1] Timer or Counter Select

◆ 

union { ... } CNT

◆ 

union { ... } CON

< (@ 0x48004000) TIMER2 Structure

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union { ... } CON1

◆ CP_RL2

__IOM uint32_t CP_RL2

[0..0] Capture/Reload Select

◆ DCEN

[0..0] Up/Down Counter Enable

◆ EDGESEL

__IOM uint32_t EDGESEL

[5..5] Edge Select in Capture Mode/Reload Mode

◆ EXEN2

__IOM uint32_t EXEN2

[3..3] Timer 2 External Enable Control

◆ EXF2

__IM uint32_t EXF2

[6..6] Timer 2 External Flag

◆ EXF2CLR

__OM uint32_t EXF2CLR

[6..6] External Interrupt Clear Flag

◆ EXF2EN

__IOM uint32_t EXF2EN

[0..0] External Interrupt Enable

◆ 

union { ... } ICLR

◆ 

union { ... } MOD

◆ PREN

[4..4] Prescaler Enable

◆ 

union { ... } RC

◆ RCH2

[15..8] Reload/Capture Value

◆ RCL2

[7..0] Reload/Capture Value

◆ reg

(@ 0x00000000) Timer 2 Control Register

(@ 0x00000004) Timer 2 Mode Register

(@ 0x00000008) Timer 2 Reload/Capture Register

(@ 0x00000010) Timer 2 Count Register

(@ 0x00000018) Timer 2 Interrupt Clear Register

(@ 0x0000001C) Timer 2 Control Register 1

◆ RESERVED

__IM uint32_t RESERVED

◆ RESERVED1

__IM uint32_t RESERVED1

◆ T2H

[15..8] Timer 2 Value

◆ T2L

[7..0] Timer 2 Value

◆ T2PRE

__IOM uint32_t T2PRE

[3..1] Timer 2 Prescaler Bit

◆ T2REGS

__IOM uint32_t T2REGS

[7..7] Edge Select for Timer 2 External Start

◆ T2RHEN

__IOM uint32_t T2RHEN

[6..6] Timer 2 External Start Enable

◆ TF2

[7..7] Timer 2 Overflow/Underflow Flag

◆ TF2CLR

__OM uint32_t TF2CLR

[7..7] Overflow/Underflow Interrupt Clear Flag

◆ TF2EN

__IOM uint32_t TF2EN

[1..1] Overflow/Underflow Interrupt Enable

◆ TR2

[2..2] Timer 2 Start/Stop Control

◆ uint32_t

__IM uint32_t

The documentation for this struct was generated from the following file: