Infineon MOTIX™ MCU TLE985x Device Family SDK
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PASSWD_Close :
scu.h
PASSWD_Open :
scu.h
PBA0_Div_1 :
scu.h
PBA0_Div_2 :
scu.h
PMU :
tle985x.h
PMU_BASE :
tle985x.h
PMU_CNF_RST_TFB_RST_TFB_Msk :
tle985x.h
PMU_CNF_RST_TFB_RST_TFB_Pos :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_GPIO_FT_Msk :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_GPIO_FT_Pos :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_LIN_FT_Msk :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_LIN_FT_Pos :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_MON_FT_Msk :
tle985x.h
PMU_CNF_WAKE_FILTER_CNF_MON_FT_Pos :
tle985x.h
PMU_DRV_CTRL_CNF_OFF_Msk :
tle985x.h
PMU_DRV_CTRL_CNF_OFF_Pos :
tle985x.h
PMU_DRV_CTRL_CNF_ON_Msk :
tle985x.h
PMU_DRV_CTRL_CNF_ON_Pos :
tle985x.h
PMU_DRV_CTRL_GL1_CYC_ON_Msk :
tle985x.h
PMU_DRV_CTRL_GL1_CYC_ON_Pos :
tle985x.h
PMU_DRV_CTRL_GL1_HOLD_ON_Msk :
tle985x.h
PMU_DRV_CTRL_GL1_HOLD_ON_Pos :
tle985x.h
PMU_DRV_CTRL_GL2_CYC_ON_Msk :
tle985x.h
PMU_DRV_CTRL_GL2_CYC_ON_Pos :
tle985x.h
PMU_DRV_CTRL_GL2_HOLD_ON_Msk :
tle985x.h
PMU_DRV_CTRL_GL2_HOLD_ON_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_0_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_0_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_1_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_1_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_2_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_2_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_3_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_3_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_4_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_4_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_5_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO0_STS_5_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_0_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_0_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_1_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_1_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_2_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_2_Pos :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_4_Msk :
tle985x.h
PMU_GPIO_WAKE_STATUS_GPIO1_STS_4_Pos :
tle985x.h
PMU_GPUDATA0to3_DATA0_Msk :
tle985x.h
PMU_GPUDATA0to3_DATA0_Pos :
tle985x.h
PMU_GPUDATA0to3_DATA1_Msk :
tle985x.h
PMU_GPUDATA0to3_DATA1_Pos :
tle985x.h
PMU_GPUDATA0to3_DATA2_Msk :
tle985x.h
PMU_GPUDATA0to3_DATA2_Pos :
tle985x.h
PMU_GPUDATA0to3_DATA3_Msk :
tle985x.h
PMU_GPUDATA0to3_DATA3_Pos :
tle985x.h
PMU_GPUDATA4to7_DATA4_Msk :
tle985x.h
PMU_GPUDATA4to7_DATA4_Pos :
tle985x.h
PMU_GPUDATA4to7_DATA5_Msk :
tle985x.h
PMU_GPUDATA4to7_DATA5_Pos :
tle985x.h
PMU_GPUDATA4to7_DATA6_Msk :
tle985x.h
PMU_GPUDATA4to7_DATA6_Pos :
tle985x.h
PMU_GPUDATA4to7_DATA7_Msk :
tle985x.h
PMU_GPUDATA4to7_DATA7_Pos :
tle985x.h
PMU_GPUDATA8to11_DATA10_Msk :
tle985x.h
PMU_GPUDATA8to11_DATA10_Pos :
tle985x.h
PMU_GPUDATA8to11_DATA11_Msk :
tle985x.h
PMU_GPUDATA8to11_DATA11_Pos :
tle985x.h
PMU_GPUDATA8to11_DATA8_Msk :
tle985x.h
PMU_GPUDATA8to11_DATA8_Pos :
tle985x.h
PMU_GPUDATA8to11_DATA9_Msk :
tle985x.h
PMU_GPUDATA8to11_DATA9_Pos :
tle985x.h
PMU_HIGHSIDE_CTRL_HS1_CYC_EN_Msk :
tle985x.h
PMU_HIGHSIDE_CTRL_HS1_CYC_EN_Pos :
tle985x.h
PMU_HIGHSIDE_CTRL_SPARE_Msk :
tle985x.h
PMU_HIGHSIDE_CTRL_SPARE_Pos :
tle985x.h
PMU_LIN_WAKE_EN_LIN_WAKE_EN_Msk :
tle985x.h
PMU_LIN_WAKE_EN_LIN_WAKE_EN_Pos :
tle985x.h
PMU_MON_CNF1_MON1_CYC_Msk :
tle985x.h
PMU_MON_CNF1_MON1_CYC_Pos :
tle985x.h
PMU_MON_CNF1_MON1_EN_Msk :
tle985x.h
PMU_MON_CNF1_MON1_EN_Pos :
tle985x.h
PMU_MON_CNF1_MON1_FALL_Msk :
tle985x.h
PMU_MON_CNF1_MON1_FALL_Pos :
tle985x.h
PMU_MON_CNF1_MON1_NSLEEP_SPARE_Msk :
tle985x.h
PMU_MON_CNF1_MON1_NSLEEP_SPARE_Pos :
tle985x.h
PMU_MON_CNF1_MON1_PD_Msk :
tle985x.h
PMU_MON_CNF1_MON1_PD_Pos :
tle985x.h
PMU_MON_CNF1_MON1_PU_Msk :
tle985x.h
PMU_MON_CNF1_MON1_PU_Pos :
tle985x.h
PMU_MON_CNF1_MON1_RISE_Msk :
tle985x.h
PMU_MON_CNF1_MON1_RISE_Pos :
tle985x.h
PMU_MON_CNF1_MON1_STS_Msk :
tle985x.h
PMU_MON_CNF1_MON1_STS_Pos :
tle985x.h
PMU_MON_CNF1_MON2_CYC_Msk :
tle985x.h
PMU_MON_CNF1_MON2_CYC_Pos :
tle985x.h
PMU_MON_CNF1_MON2_EN_Msk :
tle985x.h
PMU_MON_CNF1_MON2_EN_Pos :
tle985x.h
PMU_MON_CNF1_MON2_FALL_Msk :
tle985x.h
PMU_MON_CNF1_MON2_FALL_Pos :
tle985x.h
PMU_MON_CNF1_MON2_NSLEEP_SPARE_Msk :
tle985x.h
PMU_MON_CNF1_MON2_NSLEEP_SPARE_Pos :
tle985x.h
PMU_MON_CNF1_MON2_PD_Msk :
tle985x.h
PMU_MON_CNF1_MON2_PD_Pos :
tle985x.h
PMU_MON_CNF1_MON2_PU_Msk :
tle985x.h
PMU_MON_CNF1_MON2_PU_Pos :
tle985x.h
PMU_MON_CNF1_MON2_RISE_Msk :
tle985x.h
PMU_MON_CNF1_MON2_RISE_Pos :
tle985x.h
PMU_MON_CNF1_MON2_STS_Msk :
tle985x.h
PMU_MON_CNF1_MON2_STS_Pos :
tle985x.h
PMU_MON_CNF1_MON3_CYC_Msk :
tle985x.h
PMU_MON_CNF1_MON3_CYC_Pos :
tle985x.h
PMU_MON_CNF1_MON3_EN_Msk :
tle985x.h
PMU_MON_CNF1_MON3_EN_Pos :
tle985x.h
PMU_MON_CNF1_MON3_FALL_Msk :
tle985x.h
PMU_MON_CNF1_MON3_FALL_Pos :
tle985x.h
PMU_MON_CNF1_MON3_NSLEEP_SPARE_Msk :
tle985x.h
PMU_MON_CNF1_MON3_NSLEEP_SPARE_Pos :
tle985x.h
PMU_MON_CNF1_MON3_PD_Msk :
tle985x.h
PMU_MON_CNF1_MON3_PD_Pos :
tle985x.h
PMU_MON_CNF1_MON3_PU_Msk :
tle985x.h
PMU_MON_CNF1_MON3_PU_Pos :
tle985x.h
PMU_MON_CNF1_MON3_RISE_Msk :
tle985x.h
PMU_MON_CNF1_MON3_RISE_Pos :
tle985x.h
PMU_MON_CNF1_MON3_STS_Msk :
tle985x.h
PMU_MON_CNF1_MON3_STS_Pos :
tle985x.h
PMU_MON_CNF1_MON4_CYC_Msk :
tle985x.h
PMU_MON_CNF1_MON4_CYC_Pos :
tle985x.h
PMU_MON_CNF1_MON4_EN_Msk :
tle985x.h
PMU_MON_CNF1_MON4_EN_Pos :
tle985x.h
PMU_MON_CNF1_MON4_FALL_Msk :
tle985x.h
PMU_MON_CNF1_MON4_FALL_Pos :
tle985x.h
PMU_MON_CNF1_MON4_NSLEEP_SPARE_Msk :
tle985x.h
PMU_MON_CNF1_MON4_NSLEEP_SPARE_Pos :
tle985x.h
PMU_MON_CNF1_MON4_PD_Msk :
tle985x.h
PMU_MON_CNF1_MON4_PD_Pos :
tle985x.h
PMU_MON_CNF1_MON4_PU_Msk :
tle985x.h
PMU_MON_CNF1_MON4_PU_Pos :
tle985x.h
PMU_MON_CNF1_MON4_RISE_Msk :
tle985x.h
PMU_MON_CNF1_MON4_RISE_Pos :
tle985x.h
PMU_MON_CNF1_MON4_STS_Msk :
tle985x.h
PMU_MON_CNF1_MON4_STS_Pos :
tle985x.h
PMU_MON_CNF2_MON5_CYC_Msk :
tle985x.h
PMU_MON_CNF2_MON5_CYC_Pos :
tle985x.h
PMU_MON_CNF2_MON5_EN_Msk :
tle985x.h
PMU_MON_CNF2_MON5_EN_Pos :
tle985x.h
PMU_MON_CNF2_MON5_FALL_Msk :
tle985x.h
PMU_MON_CNF2_MON5_FALL_Pos :
tle985x.h
PMU_MON_CNF2_MON5_NSLEEP_SPARE_Msk :
tle985x.h
PMU_MON_CNF2_MON5_NSLEEP_SPARE_Pos :
tle985x.h
PMU_MON_CNF2_MON5_PD_Msk :
tle985x.h
PMU_MON_CNF2_MON5_PD_Pos :
tle985x.h
PMU_MON_CNF2_MON5_PU_Msk :
tle985x.h
PMU_MON_CNF2_MON5_PU_Pos :
tle985x.h
PMU_MON_CNF2_MON5_RISE_Msk :
tle985x.h
PMU_MON_CNF2_MON5_RISE_Pos :
tle985x.h
PMU_MON_CNF2_MON5_STS_Msk :
tle985x.h
PMU_MON_CNF2_MON5_STS_Pos :
tle985x.h
PMU_OT_CTRL_PMU_OT_EN_Msk :
tle985x.h
PMU_OT_CTRL_PMU_OT_EN_Pos :
tle985x.h
PMU_OT_CTRL_PMU_OT_INT_EN_Msk :
tle985x.h
PMU_OT_CTRL_PMU_OT_INT_EN_Pos :
tle985x.h
PMU_OT_CTRL_PMU_OT_TH_CNF_Msk :
tle985x.h
PMU_OT_CTRL_PMU_OT_TH_CNF_Pos :
tle985x.h
PMU_OT_CTRL_PMU_OT_WAKE_EN_Msk :
tle985x.h
PMU_OT_CTRL_PMU_OT_WAKE_EN_Pos :
tle985x.h
PMU_PORCFG_CNF_FILT_Msk :
tle985x.h
PMU_PORCFG_CNF_FILT_Pos :
tle985x.h
PMU_RESET_MASK :
pmu.h
PMU_RESET_STS_ClkWDT :
pmu.h
PMU_RESET_STS_IntWDT :
pmu.h
PMU_RESET_STS_LOCKUP :
pmu.h
PMU_RESET_STS_LOCKUP_Msk :
tle985x.h
PMU_RESET_STS_LOCKUP_Pos :
tle985x.h
PMU_RESET_STS_LPR :
pmu.h
PMU_RESET_STS_PIN :
pmu.h
PMU_RESET_STS_PMU_ClkWDT_Msk :
tle985x.h
PMU_RESET_STS_PMU_ClkWDT_Pos :
tle985x.h
PMU_RESET_STS_PMU_ExtWDT_Msk :
tle985x.h
PMU_RESET_STS_PMU_ExtWDT_Pos :
tle985x.h
PMU_RESET_STS_PMU_IntWDT_Msk :
tle985x.h
PMU_RESET_STS_PMU_IntWDT_Pos :
tle985x.h
PMU_RESET_STS_PMU_LPR_Msk :
tle985x.h
PMU_RESET_STS_PMU_LPR_Pos :
tle985x.h
PMU_RESET_STS_PMU_PIN_Msk :
tle985x.h
PMU_RESET_STS_PMU_PIN_Pos :
tle985x.h
PMU_RESET_STS_PMU_SleepEX_Msk :
tle985x.h
PMU_RESET_STS_PMU_SleepEX_Pos :
tle985x.h
PMU_RESET_STS_PMU_SOFT :
pmu.h
PMU_RESET_STS_PMU_SOFT_Msk :
tle985x.h
PMU_RESET_STS_PMU_SOFT_Pos :
tle985x.h
PMU_RESET_STS_PMU_VS_POR_Msk :
tle985x.h
PMU_RESET_STS_PMU_VS_POR_Pos :
tle985x.h
PMU_RESET_STS_PMU_WAKE_Msk :
tle985x.h
PMU_RESET_STS_PMU_WAKE_Pos :
tle985x.h
PMU_RESET_STS_POR :
pmu.h
PMU_RESET_STS_SLEEP :
pmu.h
PMU_RESET_STS_SYS_FAIL :
pmu.h
PMU_RESET_STS_SYS_FAIL_Msk :
tle985x.h
PMU_RESET_STS_SYS_FAIL_Pos :
tle985x.h
PMU_RESET_STS_WAKE :
pmu.h
PMU_RESET_STS_WDT1 :
pmu.h
PMU_SLEEP_CYC_SENSE_E01_Msk :
tle985x.h
PMU_SLEEP_CYC_SENSE_E01_Pos :
tle985x.h
PMU_SLEEP_CYC_SENSE_EN_Msk :
tle985x.h
PMU_SLEEP_CYC_SENSE_EN_Pos :
tle985x.h
PMU_SLEEP_CYC_SENSE_M03_Msk :
tle985x.h
PMU_SLEEP_CYC_SENSE_M03_Pos :
tle985x.h
PMU_SLEEP_CYC_SENSE_S_DEL_Msk :
tle985x.h
PMU_SLEEP_CYC_SENSE_S_DEL_Pos :
tle985x.h
PMU_SLEEP_CYC_WAKE_E01_Msk :
tle985x.h
PMU_SLEEP_CYC_WAKE_E01_Pos :
tle985x.h
PMU_SLEEP_CYC_WAKE_EN_Msk :
tle985x.h
PMU_SLEEP_CYC_WAKE_EN_Pos :
tle985x.h
PMU_SLEEP_CYC_WAKE_M03_Msk :
tle985x.h
PMU_SLEEP_CYC_WAKE_M03_Pos :
tle985x.h
PMU_SLEEP_EN_0V9_N_Msk :
tle985x.h
PMU_SLEEP_EN_0V9_N_Pos :
tle985x.h
PMU_SLEEP_WAKE_W_RST_Msk :
tle985x.h
PMU_SLEEP_WAKE_W_RST_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_FAIL_EN_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERLOAD_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERLOAD_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERLOAD_SC_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERLOAD_SC_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERVOLT_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERVOLT_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERVOLT_SC_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_1V5_OVERVOLT_SC_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_FAIL_EN_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERLOAD_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERLOAD_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERLOAD_SC_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERLOAD_SC_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERVOLT_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERVOLT_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERVOLT_SC_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_5V_OVERVOLT_SC_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_OVERTEMP_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_OVERTEMP_Pos :
tle985x.h
PMU_SUPPLY_STS_PMU_OVERTEMP_SC_Msk :
tle985x.h
PMU_SUPPLY_STS_PMU_OVERTEMP_SC_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_CYC_EN_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_CYC_EN_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_ENABLE_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_ENABLE_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_FAIL_EN_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_FAIL_EN_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_IS_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_IS_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_ISC_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_ISC_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_SC_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_SC_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_STS_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_OT_STS_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_STABLE_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_STABLE_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_UV_IS_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_UV_IS_Pos :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_UV_ISC_Msk :
tle985x.h
PMU_VDDEXT_CTRL_VDDEXT_UV_ISC_Pos :
tle985x.h
PMU_VDDEXT_CYC_EN :
pmu.h
PMU_VDDEXT_ENABLE :
pmu.h
PMU_VDDEXT_IE :
pmu.h
PMU_VDDEXT_OT_ISC :
pmu.h
PMU_VDDEXT_OT_SC :
pmu.h
PMU_VDDEXT_OVERTEMP :
pmu.h
PMU_VDDEXT_OVERTEMPIN :
pmu.h
PMU_VDDEXT_OVERTEMPST :
pmu.h
PMU_VDDEXT_STABLE :
pmu.h
PMU_VDDEXT_UNDERVOLT :
pmu.h
PMU_VDDEXT_UV_ISC :
pmu.h
PMU_WAKE_CNF_GPIO0_CYC_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_3_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_3_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_4_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_5_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_CYC_5_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_3_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_3_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_4_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_5_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_FA_5_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_3_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_3_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_4_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_5_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO0_RI_5_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_CYC_4_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_FA_4_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_0_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_0_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_1_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_1_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_2_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_2_Pos :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_4_Msk :
tle985x.h
PMU_WAKE_CNF_GPIO1_RI_4_Pos :
tle985x.h
PMU_WAKE_STATUS_CYC_WAKE_Msk :
tle985x.h
PMU_WAKE_STATUS_CYC_WAKE_Pos :
tle985x.h
PMU_WAKE_STATUS_FAIL_Msk :
tle985x.h
PMU_WAKE_STATUS_FAIL_Pos :
tle985x.h
PMU_WAKE_STATUS_GPIO0_Msk :
tle985x.h
PMU_WAKE_STATUS_GPIO0_Pos :
tle985x.h
PMU_WAKE_STATUS_GPIO1_Msk :
tle985x.h
PMU_WAKE_STATUS_GPIO1_Pos :
tle985x.h
PMU_WAKE_STATUS_GPIO2_Msk :
tle985x.h
PMU_WAKE_STATUS_GPIO2_Pos :
tle985x.h
PMU_WAKE_STATUS_LIN_WAKE_Msk :
tle985x.h
PMU_WAKE_STATUS_LIN_WAKE_Pos :
tle985x.h
PMU_WAKE_STATUS_MON1_WAKE_STS_Msk :
tle985x.h
PMU_WAKE_STATUS_MON1_WAKE_STS_Pos :
tle985x.h
PMU_WAKE_STATUS_MON2_WAKE_STS_Msk :
tle985x.h
PMU_WAKE_STATUS_MON2_WAKE_STS_Pos :
tle985x.h
PMU_WAKE_STATUS_MON3_WAKE_STS_Msk :
tle985x.h
PMU_WAKE_STATUS_MON3_WAKE_STS_Pos :
tle985x.h
PMU_WAKE_STATUS_MON4_WAKE_STS_Msk :
tle985x.h
PMU_WAKE_STATUS_MON4_WAKE_STS_Pos :
tle985x.h
PMU_WAKE_STATUS_MON5_WAKE_STS_Msk :
tle985x.h
PMU_WAKE_STATUS_MON5_WAKE_STS_Pos :
tle985x.h
PMU_WAKE_STATUS_MON_Msk :
tle985x.h
PMU_WAKE_STATUS_MON_Pos :
tle985x.h
PMU_WAKE_STATUS_PMU_OT_Msk :
tle985x.h
PMU_WAKE_STATUS_PMU_OT_Pos :
tle985x.h
PMU_WAKE_STATUS_VDDEXT_OT_Msk :
tle985x.h
PMU_WAKE_STATUS_VDDEXT_OT_Pos :
tle985x.h
PMU_WAKE_STATUS_VDDEXT_UV_Msk :
tle985x.h
PMU_WAKE_STATUS_VDDEXT_UV_Pos :
tle985x.h
PMU_WFS_LP_CLKWD_Msk :
tle985x.h
PMU_WFS_LP_CLKWD_Pos :
tle985x.h
PMU_WFS_PMU_1V5_OVL_Msk :
tle985x.h
PMU_WFS_PMU_1V5_OVL_Pos :
tle985x.h
PMU_WFS_PMU_5V_OVL_Msk :
tle985x.h
PMU_WFS_PMU_5V_OVL_Pos :
tle985x.h
PMU_WFS_PMU_OT_FAIL_Msk :
tle985x.h
PMU_WFS_PMU_OT_FAIL_Pos :
tle985x.h
PMU_WFS_SUPP_SHORT_Msk :
tle985x.h
PMU_WFS_SUPP_SHORT_Pos :
tle985x.h
PMU_WFS_SUPP_TMOUT_Msk :
tle985x.h
PMU_WFS_SUPP_TMOUT_Pos :
tle985x.h
PMU_WFS_SYS_CLK_WDT_Msk :
tle985x.h
PMU_WFS_SYS_CLK_WDT_Pos :
tle985x.h
PMU_WFS_SYS_OT_Msk :
tle985x.h
PMU_WFS_SYS_OT_Pos :
tle985x.h
PMU_WFS_WDT1_SEQ_FAIL_Msk :
tle985x.h
PMU_WFS_WDT1_SEQ_FAIL_Pos :
tle985x.h
PORT :
tle985x.h
PORT_ACTION_CLEAR :
port.h
PORT_ACTION_INPUT :
port.h
PORT_ACTION_OUTPUT :
port.h
PORT_ACTION_SET :
port.h
PORT_ACTION_TOGGLE :
port.h
PORT_BASE :
tle985x.h
PORT_P0 :
port.h
PORT_P0_ALTSEL0_PP0_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP0_Pos :
tle985x.h
PORT_P0_ALTSEL0_PP1_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP1_Pos :
tle985x.h
PORT_P0_ALTSEL0_PP2_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP2_Pos :
tle985x.h
PORT_P0_ALTSEL0_PP3_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP3_Pos :
tle985x.h
PORT_P0_ALTSEL0_PP4_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP4_Pos :
tle985x.h
PORT_P0_ALTSEL0_PP5_Msk :
tle985x.h
PORT_P0_ALTSEL0_PP5_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP0_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP0_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP1_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP1_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP2_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP2_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP3_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP3_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP4_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP4_Pos :
tle985x.h
PORT_P0_ALTSEL1_PP5_Msk :
tle985x.h
PORT_P0_ALTSEL1_PP5_Pos :
tle985x.h
PORT_P0_DATA_PP0_Msk :
tle985x.h
PORT_P0_DATA_PP0_Pos :
tle985x.h
PORT_P0_DATA_PP0_STS_Msk :
tle985x.h
PORT_P0_DATA_PP0_STS_Pos :
tle985x.h
PORT_P0_DATA_PP1_Msk :
tle985x.h
PORT_P0_DATA_PP1_Pos :
tle985x.h
PORT_P0_DATA_PP1_STS_Msk :
tle985x.h
PORT_P0_DATA_PP1_STS_Pos :
tle985x.h
PORT_P0_DATA_PP2_Msk :
tle985x.h
PORT_P0_DATA_PP2_Pos :
tle985x.h
PORT_P0_DATA_PP2_STS_Msk :
tle985x.h
PORT_P0_DATA_PP2_STS_Pos :
tle985x.h
PORT_P0_DATA_PP3_Msk :
tle985x.h
PORT_P0_DATA_PP3_Pos :
tle985x.h
PORT_P0_DATA_PP3_STS_Msk :
tle985x.h
PORT_P0_DATA_PP3_STS_Pos :
tle985x.h
PORT_P0_DATA_PP4_Msk :
tle985x.h
PORT_P0_DATA_PP4_Pos :
tle985x.h
PORT_P0_DATA_PP4_STS_Msk :
tle985x.h
PORT_P0_DATA_PP4_STS_Pos :
tle985x.h
PORT_P0_DATA_PP5_Msk :
tle985x.h
PORT_P0_DATA_PP5_Pos :
tle985x.h
PORT_P0_DATA_PP5_STS_Msk :
tle985x.h
PORT_P0_DATA_PP5_STS_Pos :
tle985x.h
PORT_P0_DIR_PP0_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP0_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP0_Msk :
tle985x.h
PORT_P0_DIR_PP0_Pos :
tle985x.h
PORT_P0_DIR_PP1_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP1_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP1_Msk :
tle985x.h
PORT_P0_DIR_PP1_Pos :
tle985x.h
PORT_P0_DIR_PP2_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP2_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP2_Msk :
tle985x.h
PORT_P0_DIR_PP2_Pos :
tle985x.h
PORT_P0_DIR_PP3_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP3_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP3_Msk :
tle985x.h
PORT_P0_DIR_PP3_Pos :
tle985x.h
PORT_P0_DIR_PP4_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP4_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP4_Msk :
tle985x.h
PORT_P0_DIR_PP4_Pos :
tle985x.h
PORT_P0_DIR_PP5_INEN_Msk :
tle985x.h
PORT_P0_DIR_PP5_INEN_Pos :
tle985x.h
PORT_P0_DIR_PP5_Msk :
tle985x.h
PORT_P0_DIR_PP5_Pos :
tle985x.h
PORT_P0_OD_PP0_Msk :
tle985x.h
PORT_P0_OD_PP0_Pos :
tle985x.h
PORT_P0_OD_PP1_Msk :
tle985x.h
PORT_P0_OD_PP1_Pos :
tle985x.h
PORT_P0_OD_PP2_Msk :
tle985x.h
PORT_P0_OD_PP2_Pos :
tle985x.h
PORT_P0_OD_PP3_Msk :
tle985x.h
PORT_P0_OD_PP3_Pos :
tle985x.h
PORT_P0_OD_PP4_Msk :
tle985x.h
PORT_P0_OD_PP4_Pos :
tle985x.h
PORT_P0_OD_PP5_Msk :
tle985x.h
PORT_P0_OD_PP5_Pos :
tle985x.h
PORT_P0_PUDEN_PP0_Msk :
tle985x.h
PORT_P0_PUDEN_PP0_Pos :
tle985x.h
PORT_P0_PUDEN_PP1_Msk :
tle985x.h
PORT_P0_PUDEN_PP1_Pos :
tle985x.h
PORT_P0_PUDEN_PP2_Msk :
tle985x.h
PORT_P0_PUDEN_PP2_Pos :
tle985x.h
PORT_P0_PUDEN_PP3_Msk :
tle985x.h
PORT_P0_PUDEN_PP3_Pos :
tle985x.h
PORT_P0_PUDEN_PP4_Msk :
tle985x.h
PORT_P0_PUDEN_PP4_Pos :
tle985x.h
PORT_P0_PUDEN_PP5_Msk :
tle985x.h
PORT_P0_PUDEN_PP5_Pos :
tle985x.h
PORT_P0_PUDSEL_PP0_Msk :
tle985x.h
PORT_P0_PUDSEL_PP0_Pos :
tle985x.h
PORT_P0_PUDSEL_PP1_Msk :
tle985x.h
PORT_P0_PUDSEL_PP1_Pos :
tle985x.h
PORT_P0_PUDSEL_PP2_Msk :
tle985x.h
PORT_P0_PUDSEL_PP2_Pos :
tle985x.h
PORT_P0_PUDSEL_PP3_Msk :
tle985x.h
PORT_P0_PUDSEL_PP3_Pos :
tle985x.h
PORT_P0_PUDSEL_PP4_Msk :
tle985x.h
PORT_P0_PUDSEL_PP4_Pos :
tle985x.h
PORT_P0_PUDSEL_PP5_Msk :
tle985x.h
PORT_P0_PUDSEL_PP5_Pos :
tle985x.h
PORT_P1 :
port.h
PORT_P1_ALTSEL0_PP0_Msk :
tle985x.h
PORT_P1_ALTSEL0_PP0_Pos :
tle985x.h
PORT_P1_ALTSEL0_PP1_Msk :
tle985x.h
PORT_P1_ALTSEL0_PP1_Pos :
tle985x.h
PORT_P1_ALTSEL0_PP2_Msk :
tle985x.h
PORT_P1_ALTSEL0_PP2_Pos :
tle985x.h
PORT_P1_ALTSEL0_PP4_Msk :
tle985x.h
PORT_P1_ALTSEL0_PP4_Pos :
tle985x.h
PORT_P1_ALTSEL1_PP0_Msk :
tle985x.h
PORT_P1_ALTSEL1_PP0_Pos :
tle985x.h
PORT_P1_ALTSEL1_PP1_Msk :
tle985x.h
PORT_P1_ALTSEL1_PP1_Pos :
tle985x.h
PORT_P1_ALTSEL1_PP2_Msk :
tle985x.h
PORT_P1_ALTSEL1_PP2_Pos :
tle985x.h
PORT_P1_ALTSEL1_PP4_Msk :
tle985x.h
PORT_P1_ALTSEL1_PP4_Pos :
tle985x.h
PORT_P1_DATA_PP0_Msk :
tle985x.h
PORT_P1_DATA_PP0_Pos :
tle985x.h
PORT_P1_DATA_PP0_STS_Msk :
tle985x.h
PORT_P1_DATA_PP0_STS_Pos :
tle985x.h
PORT_P1_DATA_PP1_Msk :
tle985x.h
PORT_P1_DATA_PP1_Pos :
tle985x.h
PORT_P1_DATA_PP1_STS_Msk :
tle985x.h
PORT_P1_DATA_PP1_STS_Pos :
tle985x.h
PORT_P1_DATA_PP2_Msk :
tle985x.h
PORT_P1_DATA_PP2_Pos :
tle985x.h
PORT_P1_DATA_PP2_STS_Msk :
tle985x.h
PORT_P1_DATA_PP2_STS_Pos :
tle985x.h
PORT_P1_DATA_PP4_Msk :
tle985x.h
PORT_P1_DATA_PP4_Pos :
tle985x.h
PORT_P1_DATA_PP4_STS_Msk :
tle985x.h
PORT_P1_DATA_PP4_STS_Pos :
tle985x.h
PORT_P1_DIR_PP0_INEN_Msk :
tle985x.h
PORT_P1_DIR_PP0_INEN_Pos :
tle985x.h
PORT_P1_DIR_PP0_Msk :
tle985x.h
PORT_P1_DIR_PP0_Pos :
tle985x.h
PORT_P1_DIR_PP1_INEN_Msk :
tle985x.h
PORT_P1_DIR_PP1_INEN_Pos :
tle985x.h
PORT_P1_DIR_PP1_Msk :
tle985x.h
PORT_P1_DIR_PP1_Pos :
tle985x.h
PORT_P1_DIR_PP2_INEN_Msk :
tle985x.h
PORT_P1_DIR_PP2_INEN_Pos :
tle985x.h
PORT_P1_DIR_PP2_Msk :
tle985x.h
PORT_P1_DIR_PP2_Pos :
tle985x.h
PORT_P1_DIR_PP4_INEN_Msk :
tle985x.h
PORT_P1_DIR_PP4_INEN_Pos :
tle985x.h
PORT_P1_DIR_PP4_Msk :
tle985x.h
PORT_P1_DIR_PP4_Pos :
tle985x.h
PORT_P1_OD_PP0_Msk :
tle985x.h
PORT_P1_OD_PP0_Pos :
tle985x.h
PORT_P1_OD_PP1_Msk :
tle985x.h
PORT_P1_OD_PP1_Pos :
tle985x.h
PORT_P1_OD_PP2_Msk :
tle985x.h
PORT_P1_OD_PP2_Pos :
tle985x.h
PORT_P1_OD_PP4_Msk :
tle985x.h
PORT_P1_OD_PP4_Pos :
tle985x.h
PORT_P1_PUDEN_PP0_Msk :
tle985x.h
PORT_P1_PUDEN_PP0_Pos :
tle985x.h
PORT_P1_PUDEN_PP1_Msk :
tle985x.h
PORT_P1_PUDEN_PP1_Pos :
tle985x.h
PORT_P1_PUDEN_PP2_Msk :
tle985x.h
PORT_P1_PUDEN_PP2_Pos :
tle985x.h
PORT_P1_PUDEN_PP4_Msk :
tle985x.h
PORT_P1_PUDEN_PP4_Pos :
tle985x.h
PORT_P1_PUDSEL_PP0_Msk :
tle985x.h
PORT_P1_PUDSEL_PP0_Pos :
tle985x.h
PORT_P1_PUDSEL_PP1_Msk :
tle985x.h
PORT_P1_PUDSEL_PP1_Pos :
tle985x.h
PORT_P1_PUDSEL_PP2_Msk :
tle985x.h
PORT_P1_PUDSEL_PP2_Pos :
tle985x.h
PORT_P1_PUDSEL_PP4_Msk :
tle985x.h
PORT_P1_PUDSEL_PP4_Pos :
tle985x.h
PORT_P2 :
port.h
PORT_P2_DATA_PP0_Msk :
tle985x.h
PORT_P2_DATA_PP0_Pos :
tle985x.h
PORT_P2_DATA_PP1_Msk :
tle985x.h
PORT_P2_DATA_PP1_Pos :
tle985x.h
PORT_P2_DATA_PP2_Msk :
tle985x.h
PORT_P2_DATA_PP2_Pos :
tle985x.h
PORT_P2_DATA_PP3_Msk :
tle985x.h
PORT_P2_DATA_PP3_Pos :
tle985x.h
PORT_P2_DATA_PP7_Msk :
tle985x.h
PORT_P2_DATA_PP7_Pos :
tle985x.h
PORT_P2_DIR_PP0_Msk :
tle985x.h
PORT_P2_DIR_PP0_Pos :
tle985x.h
PORT_P2_DIR_PP1_Msk :
tle985x.h
PORT_P2_DIR_PP1_Pos :
tle985x.h
PORT_P2_DIR_PP2_Msk :
tle985x.h
PORT_P2_DIR_PP2_Pos :
tle985x.h
PORT_P2_DIR_PP3_Msk :
tle985x.h
PORT_P2_DIR_PP3_Pos :
tle985x.h
PORT_P2_DIR_PP7_Msk :
tle985x.h
PORT_P2_DIR_PP7_Pos :
tle985x.h
PORT_P2_PUDEN_PP0_Msk :
tle985x.h
PORT_P2_PUDEN_PP0_Pos :
tle985x.h
PORT_P2_PUDEN_PP1_Msk :
tle985x.h
PORT_P2_PUDEN_PP1_Pos :
tle985x.h
PORT_P2_PUDEN_PP2_Msk :
tle985x.h
PORT_P2_PUDEN_PP2_Pos :
tle985x.h
PORT_P2_PUDEN_PP3_Msk :
tle985x.h
PORT_P2_PUDEN_PP3_Pos :
tle985x.h
PORT_P2_PUDEN_PP7_Msk :
tle985x.h
PORT_P2_PUDEN_PP7_Pos :
tle985x.h
PORT_P2_PUDSEL_PP0_Msk :
tle985x.h
PORT_P2_PUDSEL_PP0_Pos :
tle985x.h
PORT_P2_PUDSEL_PP1_Msk :
tle985x.h
PORT_P2_PUDSEL_PP1_Pos :
tle985x.h
PORT_P2_PUDSEL_PP2_Msk :
tle985x.h
PORT_P2_PUDSEL_PP2_Pos :
tle985x.h
PORT_P2_PUDSEL_PP3_Msk :
tle985x.h
PORT_P2_PUDSEL_PP3_Pos :
tle985x.h
PORT_P2_PUDSEL_PP7_Msk :
tle985x.h
PORT_P2_PUDSEL_PP7_Pos :
tle985x.h
PORT_TCC_RANGE_1 :
port.h
PORT_TCC_RANGE_2 :
port.h
PORT_TCC_RANGE_3 :
port.h
PORT_TCC_RANGE_4 :
port.h
ProgFlashSize :
tle_variants.h
ProgFlashStart :
tle_variants.h
PROTECTION_CLEAR :
scu.h
PROTECTION_SET :
scu.h
Generated by
1.9.1