76 #define HS_IRQ_BITS 0x000000E0
79 #define HS_CONF_MASK 0x0000000F
#define HS
Definition: tle985x.h:6271
#define CPU
Definition: tle985x.h:6269
#define HS_IRQEN_HS1_OL_IEN_Msk
Definition: tle985x.h:8975
#define HS_IRQEN_HS1_OT_IEN_Msk
Definition: tle985x.h:8977
#define HS_CTRL_HS1_EN_Pos
Definition: tle985x.h:8958
#define CPU_NVIC_ISER_Int_HS_Pos
Definition: tle985x.h:8653
#define HS_IRQEN_HS1_OL_IEN_Pos
Definition: tle985x.h:8974
#define CPU_NVIC_ISER_Int_HS_Msk
Definition: tle985x.h:8654
#define HS_IRQCLR_HS1_OL_ISC_Pos
Definition: tle985x.h:8967
#define HS_IRQCLR_HS1_OL_ISC_Msk
Definition: tle985x.h:8968
#define HS_IRQCLR_HS1_OL_SC_Pos
Definition: tle985x.h:8961
#define HS_IRQCLR_HS1_OC_ISC_Msk
Definition: tle985x.h:8966
#define HS_IRQCLR_HS1_OT_ISC_Msk
Definition: tle985x.h:8970
#define HS_IRQEN_HS1_OT_IEN_Pos
Definition: tle985x.h:8976
#define HS_IRQCLR_HS1_OL_SC_Msk
Definition: tle985x.h:8962
#define HS_IRQCLR_HS1_OT_SC_Msk
Definition: tle985x.h:8964
#define HS_IRQCLR_HS1_OC_ISC_Pos
Definition: tle985x.h:8965
#define HS_IRQEN_HS1_OC_IEN_Pos
Definition: tle985x.h:8972
#define HS_IRQEN_HS1_OC_IEN_Msk
Definition: tle985x.h:8973
#define HS_IRQCLR_HS1_OT_SC_Pos
Definition: tle985x.h:8963
#define HS_IRQCLR_HS1_OT_ISC_Pos
Definition: tle985x.h:8969
INLINE void HS_Set_Conf(THs_HS1_Cfg HS1_Cfg)
Sets the High-Side Switch in the desired state.
Definition: hs.h:420
INLINE void HS_HS1_OT_Int_Clr(void)
Clears HS1 Overtemperature interrupt flag.
Definition: hs.h:425
#define HS_IRQ_BITS
HS Interrupt Mask.
Definition: hs.h:76
INLINE void HS_HS1_OL_Int_En(void)
Enables HS1 Open Load interrupt.
Definition: hs.h:460
INLINE void HS_HS1_OL_SC_Clr(void)
Clears HS1 Open Load Status.
Definition: hs.h:445
INLINE void HS_HS1_OC_Int_Clr(void)
Clears HS1 Overcurrent interrupt flag.
Definition: hs.h:435
THs_HS1_Cfg
This enum lists the High Side channel configuration.
Definition: hs.h:88
@ Ch_HS_On
channel enabled and static on
Definition: hs.h:92
@ Ch_HS_PWM
channel enabled with PWM (CCU6 connection)
Definition: hs.h:91
@ Ch_HS_Ol
channel enabled and Open Load on
Definition: hs.h:93
@ Ch_HS_En
channel enabled
Definition: hs.h:90
@ Ch_HS_Off
channel disabled
Definition: hs.h:89
THs_Sts
This enum lists the High Side channel configuration Mask Status.
Definition: hs.h:100
@ HS_OL_ISC
Over-Load interrupt Mask
Definition: hs.h:102
@ HS_OT_SC
Over-Temperature Mask
Definition: hs.h:104
@ HS_OT_ISC
Over-Temperature interrupt Mask
Definition: hs.h:101
@ HS_OL_SC
Over-Load Mask
Definition: hs.h:105
@ HS_OC_ISC
Over-Current interrupt Mask
Definition: hs.h:103
INLINE void HS_HS1_OL_Int_Dis(void)
Disables HS1 Open Load interrupt.
Definition: hs.h:465
INLINE void HS_HS1_OT_Int_Dis(void)
Disables HS1 Overtemperature interrupt.
Definition: hs.h:455
INLINE void HS_HS1_OC_Int_Dis(void)
Disables HS1 Overcurrent interrupt.
Definition: hs.h:475
INLINE void HS_HS1_OT_Int_En(void)
Enables HS1 Overtemperature interrupt.
Definition: hs.h:450
INLINE void HS_HS1_OL_Int_Clr(void)
Clears HS1 Open Load interrupt flag.
Definition: hs.h:430
THs_Int
This enum lists the High Side channel Interrupt configuration.
Definition: hs.h:112
@ HS_Int_OL
Over-Load interrupt enable
Definition: hs.h:115
@ HS_Int_OC
Over-Current interrupt enable
Definition: hs.h:116
@ HS_Int_OT
Over-Temperature interrupt enable
Definition: hs.h:114
@ HS_Int_Off
all interrupts disable
Definition: hs.h:113
INLINE void HS_HS1_OC_Int_En(void)
Enables HS1 Overcurrent interrupt.
Definition: hs.h:470
INLINE void HS_HS1_OT_SC_Clr(void)
Clears HS1 Overtemperature Status.
Definition: hs.h:440
INLINE void HS_Clr_Sts(THs_Sts Sts_Bit)
Clears High-Side Switch individual status flags.
Definition: hs.h:412
INLINE void HS_Set_Int_Channel(THs_Int HS1_Int)
Sets High-Side Switch Interrupt Enable.
Definition: hs.h:400
void HS_Init(void)
Initializes the HS module.
#define HS_CONF_MASK
HS Interrupt Mask.
Definition: hs.h:79
SFR low level access library.
INLINE uint16 u16_Field_Rd32(const volatile uint32 *reg, uint8 pos, uint32 msk)
This function reads a 16-bit field of a 32-bit register.
Definition: sfr_access.h:448
INLINE void Field_Wrt32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:358
INLINE void Field_Wrt32all(volatile uint32 *reg, uint32 val)
This function writes an 32-bit register directly, no mask/position needed.
Definition: sfr_access.h:363
INLINE void Field_Mod32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:378
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:145
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint16_t uint16
16 bit unsigned value
Definition: types.h:154
uint32_t uint32
32 bit unsigned value
Definition: types.h:155