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Infineon MOTIX™ MCU TLE985x Device Family SDK
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Go to the source code of this file.
System Control Unit low level access library.
Macros | |
#define | PASSWD_Open (0x98U) |
PASSWD Phrases, PASSWD Opened. More... | |
#define | PASSWD_Close (0xA8U) |
PASSWD Phrases, PASSWD Closed. More... | |
#define | NVM_PASSWORD_BOOT (0U) |
NVM Protection indices, BOOT. More... | |
#define | NVM_PASSWORD_CODE (1U) |
NVM Protection indices, CODE. More... | |
#define | NVM_PASSWORD_DATA (2U) |
NVM Protection indices, DATA. More... | |
#define | PROTECTION_CLEAR (1U) |
NVM Protection actions, CLEAR ACTION. More... | |
#define | PROTECTION_SET (0U) |
NVM Protection actions, SET ACTION. More... | |
#define | PBA0_Div_1 (0U) |
PBA0 Clock Divider, DIV1. More... | |
#define | PBA0_Div_2 (1U) |
PBA0 Clock Divider, DIV2. More... | |
#define | VCO_BYP_Msk (0x80008U) |
VCO_BYP MASK. More... | |
#define | VCO_BYP_0 (0x80000U) |
VCO_BYP Initial Value. More... | |
#define | OSC_DISC_Msk (0x40004U) |
OSC_DISC MASK. More... | |
#define | OSC_DISC_0 (0x40000U) |
OSC_DISC Initial Value. More... | |
Enumerations | |
enum | TScu_Mod { Mod_ADC1 = 0x00 , Mod_SSC1 = 0x01 , Mod_CCU = 0x02 , Mod_Timer2 = 0x03 , Mod_GPT12 = 0x04 , Mod_SSC2 = 0x08 , Mod_Timer21 = 0x0A } |
This enum lists the SCU Modules Configuration. More... | |
enum | TSCU_System_Clock { SCU_System_Clock_LP_CLK = 2 , SCU_System_Clock_IntOsc = 3 } |
This enum lists the SCU System Clock Sources. More... | |
enum | TSCU_VTOR { SCU_VTOR_ROM = 0 , SCU_VTOR_RAM = 1 , SCU_VTOR_CBSL = 2 , SCU_VTOR_UCODE = 3 } |
This enum lists the SCU Vector Table Relocation. More... | |
Functions | |
void | SCU_Init (void) |
Initializes the SCU module. More... | |
void | SCU_ClkInit (void) |
Initializes the system clocks. More... | |
void | SCU_EnterSleepMode (void) |
Sets the device into Sleep Mode. More... | |
void | SCU_EnterStopMode (void) |
Sets the device into Stop Mode. More... | |
int32_t | SCU_ChangeNVMProtection (NVM_PASSWORD_SEGMENT_t Protection, uint8 Action) |
Sets the Write/Read Protection for the Code/Data Flash. More... | |
INLINE void | SCU_Disable_Module (TScu_Mod Module) |
Disables a given peripheral module. More... | |
INLINE void | SCU_Enable_Module (TScu_Mod Module) |
Enables a given peripheral module. More... | |
INLINE void | SCU_WDT_Start (void) |
Starts the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by the Bit Protection Register of SCU. More... | |
INLINE void | SCU_WDT_Stop (void) |
Stops the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by the Bit Protection Register of SCU. More... | |
INLINE void | SCU_WDT_Service (void) |
Services the Watchdog of SCU-DM in the Watchdog Timer Control Register. More... | |
INLINE void | SCU_OpenPASSWD (void) |
Opens the bit protection by writing PASSWD_Open to the Bit Protection Register. More... | |
INLINE void | SCU_ClosePASSWD (void) |
Closes the bit protection by writing PASSWD_Close to the Bit Protection Register. More... | |
INLINE void | SCU_Sel_PBA0_Clk_Div_Sel (uint8 div) |
Sets PBA0 Clock Divider. More... | |
INLINE void | SCU_VTOR_Sel (TSCU_VTOR a) |
Selects a Vector Table Bypass Mode. More... | |
INLINE void | SCU_System_Clock_Sel (TSCU_System_Clock a) |
Selects a System Clock. More... | |
INLINE void | SCU_APCLK1_Sts_Clr (void) |
Clears Analog Peripherals Clock 1 Status. More... | |
INLINE void | SCU_APCLK2_Sts_Clr (void) |
Clears Analog Peripherals Clock 2 Status. More... | |
INLINE void | SCU_APCLK3_Sts_Clr (void) |
Clears Analog Peripherals Clock 3 Status. More... | |
INLINE void | SCUPM_CLKWDT_PD_N_En (void) |
Enables Clock Watchdog. More... | |
INLINE void | SCUPM_CLKWDT_PD_N_Dis (void) |
Disables Clock Watchdog. More... | |
INLINE void | SCUPM_AMCLK1_UP_TH_Set (uint8 thld) |
Sets Analog Module Clock 1 Upper Limit Threshold. More... | |
INLINE void | SCUPM_AMCLK1_UP_HYS_Set (uint8 hyst) |
Sets Analog Module Clock 1 Upper Hysteresis. More... | |
INLINE void | SCUPM_AMCLK1_LOW_TH_Set (uint8 thld) |
Sets Analog Module Clock 1 Lower Limit Threshold. More... | |
INLINE void | SCUPM_AMCLK1_LOW_HYS_Set (uint8 hyst) |
Sets Analog Module Clock 1 Lower Hysteresis. More... | |
INLINE void | SCUPM_AMCLK2_UP_TH_Set (uint8 thld) |
Sets Analog Module Clock 2 Upper Limit Threshold. More... | |
INLINE void | SCUPM_AMCLK2_UP_HYS_Set (uint8 hyst) |
Sets Analog Module Clock 2 Upper Hysteresis. More... | |
INLINE void | SCUPM_AMCLK2_LOW_TH_Set (uint8 thld) |
Sets Analog Module Clock 2 Lower Limit Threshold. More... | |
INLINE void | SCUPM_AMCLK2_LOW_HYS_Set (uint8 hyst) |
Sets Analog Module Clock 2 Lower Hysteresis. More... | |
INLINE void | CPU_DeepSleep_Sel (void) |
Selects low power deep sleep mode. More... | |
INLINE void | CPU_SleepOnExit_Sel (void) |
Selects entering sleep or deep sleep on exit. More... | |
#define NVM_PASSWORD_BOOT (0U) |
NVM Protection indices, BOOT.
#define NVM_PASSWORD_CODE (1U) |
NVM Protection indices, CODE.
#define NVM_PASSWORD_DATA (2U) |
NVM Protection indices, DATA.
#define OSC_DISC_0 (0x40000U) |
OSC_DISC Initial Value.
#define OSC_DISC_Msk (0x40004U) |
OSC_DISC MASK.
#define PASSWD_Close (0xA8U) |
PASSWD Phrases, PASSWD Closed.
#define PASSWD_Open (0x98U) |
PASSWD Phrases, PASSWD Opened.
#define PBA0_Div_1 (0U) |
PBA0 Clock Divider, DIV1.
#define PBA0_Div_2 (1U) |
PBA0 Clock Divider, DIV2.
#define PROTECTION_CLEAR (1U) |
NVM Protection actions, CLEAR ACTION.
#define PROTECTION_SET (0U) |
NVM Protection actions, SET ACTION.
#define VCO_BYP_0 (0x80000U) |
VCO_BYP Initial Value.
#define VCO_BYP_Msk (0x80008U) |
VCO_BYP MASK.
enum TScu_Mod |
This enum lists the SCU Modules Configuration.
enum TSCU_System_Clock |
enum TSCU_VTOR |
INLINE void CPU_DeepSleep_Sel | ( | void | ) |
Selects low power deep sleep mode.
Example
This example selects low power deep sleep mode.
INLINE void CPU_SleepOnExit_Sel | ( | void | ) |
Selects entering sleep or deep sleep on exit.
Example
This example selects entering deep sleep on exit.
INLINE void SCU_APCLK1_Sts_Clr | ( | void | ) |
Clears Analog Peripherals Clock 1 Status.
Example
This example clears Analog Peripherals Clock 1 Status.
INLINE void SCU_APCLK2_Sts_Clr | ( | void | ) |
Clears Analog Peripherals Clock 2 Status.
Example
This example clears Analog Peripherals Clock 2 Status.
INLINE void SCU_APCLK3_Sts_Clr | ( | void | ) |
Clears Analog Peripherals Clock 3 Status.
Example
This example clears Analog Peripherals Clock 3 Status.
int32_t SCU_ChangeNVMProtection | ( | NVM_PASSWORD_SEGMENT_t | Protection, |
uint8 | Action | ||
) |
Sets the Write/Read Protection for the Code/Data Flash.
Protection | BOOT/CODE/DATA, see NVM_PASSWORD_SEGMENT_t |
Action | CLEAR/SET |
Example
This example writes Protection for the Code Flash.
void SCU_ClkInit | ( | void | ) |
Initializes the system clocks.
INLINE void SCU_ClosePASSWD | ( | void | ) |
Closes the bit protection by writing PASSWD_Close to the Bit Protection Register.
Example
This example closes the PASSWD Register protection scheme.
Disables a given peripheral module.
Module | SCU Modules, see TScu_Mod |
Example
This example disables ADC1 Module.
Enables a given peripheral module.
Module | SCU Modules, see TScu_Mod |
Example
This example enables ADC1 Module.
void SCU_EnterSleepMode | ( | void | ) |
Sets the device into Sleep Mode.
performed steps: Set LIN to sleep mode, clear Main wake status and Wake Source MON Input, stop WDT1 and trigger a short open window, disable interrupts set Sleep Mode Enable flag in Power Mode Control Register 0, execute the WFE instruction twice to exter sleep mode
Example
This example Sets the device into Sleep Mode.
void SCU_EnterStopMode | ( | void | ) |
Sets the device into Stop Mode.
performed steps: clear Main wake status and Wake Source MON Input, stop WDT1 and trigger a short open window, disable interrupts select LP_CLK as sys clk for a defined state, set Sleep Mode Enable flag in Power Mode Control Register 0, execute the WFE instruction twice to exter sleep mode
Example
This example Sets the device into Stop Mode.
void SCU_Init | ( | void | ) |
Initializes the SCU module.
INLINE void SCU_OpenPASSWD | ( | void | ) |
Opens the bit protection by writing PASSWD_Open to the Bit Protection Register.
Example
This example opens the PASSWD Register protection scheme.
Sets PBA0 Clock Divider.
div | PBA0 Clock Divider: 0 if div1, 1 if div2 |
Example
This example sets The PBA0 Clock Divider to 2.
INLINE void SCU_System_Clock_Sel | ( | TSCU_System_Clock | a | ) |
Selects a System Clock.
a | System Clock, see TSCU_System_Clock |
Example
This example sets The clock output signal to fINTOSC.
Selects a Vector Table Bypass Mode.
a | Vector Table Bypass Mode, see TSCU_VTOR |
Example
This example configures the VTOR to be remapped to RAM.
INLINE void SCU_WDT_Service | ( | void | ) |
Services the Watchdog of SCU-DM in the Watchdog Timer Control Register.
Example
This example starts the internal Watchdog and services the internal Watchdog.
INLINE void SCU_WDT_Start | ( | void | ) |
Starts the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by the Bit Protection Register of SCU.
Example
This example starts the internal Watchdog and services the internal Watchdog.
INLINE void SCU_WDT_Stop | ( | void | ) |
Stops the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by the Bit Protection Register of SCU.
Example
This example stops the internal Watchdog.
Sets Analog Module Clock 1 Lower Hysteresis.
hyst | Lower Hysteresis |
Example
This example sets Analog Module Clock 1 Lower Hysteresis to Maximum value.
Sets Analog Module Clock 1 Lower Limit Threshold.
thld | Lower Limit Threshold |
Example
This example sets Analog Module Clock 1 Lower Limit Threshold to Maximum value.
Sets Analog Module Clock 1 Upper Hysteresis.
hyst | Upper Hysteresis |
Example
This example sets Analog Module Clock 1 Upper Hysteresis to Maximum value.
Sets Analog Module Clock 1 Upper Limit Threshold.
thld | Upper Limit Threshold |
Example
This example sets Analog Module Clock 1 Upper Limit Threshold to Maximum value.
Sets Analog Module Clock 2 Lower Hysteresis.
hyst | Lower Hysteresis |
Example
This example sets Analog Module Clock 2 Lower Hysteresis to Maximum value.
Sets Analog Module Clock 2 Lower Limit Threshold.
thld | Lower Limit Threshold |
Example
This example sets Analog Module Clock 2 Lower Limit Threshold to Maximum value.
Sets Analog Module Clock 2 Upper Hysteresis.
hyst | Upper Hysteresis |
Example
This example sets Analog Module Clock 2 Upper Hysteresis to Maximum value.
Sets Analog Module Clock 2 Upper Limit Threshold.
thld | Upper Limit Threshold |
Example
This example sets Analog Module Clock 2 Upper Limit Threshold to Maximum value.
INLINE void SCUPM_CLKWDT_PD_N_Dis | ( | void | ) |
Disables Clock Watchdog.
Example
This example disables Clock Watchdog.
INLINE void SCUPM_CLKWDT_PD_N_En | ( | void | ) |
Enables Clock Watchdog.
Example
This example enables Clock Watchdog.