#define MATH
Definition: tle985x.h:6273
#define MATH_EVFCR_DIVEOCC_Pos
Definition: tle985x.h:9098
#define MATH_EVIER_DIVERRIEN_Msk
Definition: tle985x.h:9107
#define MATH_GLBCON_DVDRC_Pos
Definition: tle985x.h:9122
#define MATH_DIVCON_ST_Pos
Definition: tle985x.h:9084
#define MATH_DIVCON_STMODE_Pos
Definition: tle985x.h:9082
#define MATH_EVFCR_DIVERRC_Pos
Definition: tle985x.h:9096
#define MATH_DIVST_BSY_Pos
Definition: tle985x.h:9087
#define MATH_DVD_VAL_Msk
Definition: tle985x.h:9091
#define MATH_EVIER_DIVEOCIEN_Pos
Definition: tle985x.h:9108
#define MATH_DVS_VAL_Msk
Definition: tle985x.h:9094
#define MATH_DVS_VAL_Pos
Definition: tle985x.h:9093
#define MATH_DIVCON_STMODE_Msk
Definition: tle985x.h:9083
#define MATH_EVIER_DIVERRIEN_Pos
Definition: tle985x.h:9106
#define MATH_EVIER_DIVEOCIEN_Msk
Definition: tle985x.h:9109
#define MATH_DIVCON_DIVMODE_Pos
Definition: tle985x.h:9078
#define MATH_RMD_VAL_Msk
Definition: tle985x.h:9136
#define MATH_GLBCON_DVSRC_Pos
Definition: tle985x.h:9120
#define MATH_GLBCON_DVSRC_Msk
Definition: tle985x.h:9121
#define MATH_EVFCR_DIVEOCC_Msk
Definition: tle985x.h:9099
#define MATH_GLBCON_SUSCFG_Msk
Definition: tle985x.h:9119
#define MATH_DVD_VAL_Pos
Definition: tle985x.h:9090
#define MATH_QUOT_VAL_Pos
Definition: tle985x.h:9132
#define MATH_RMD_VAL_Pos
Definition: tle985x.h:9135
#define MATH_EVFCR_DIVERRC_Msk
Definition: tle985x.h:9097
#define MATH_GLBCON_SUSCFG_Pos
Definition: tle985x.h:9118
#define MATH_DIVST_BSY_Msk
Definition: tle985x.h:9088
#define MATH_GLBCON_DVDRC_Msk
Definition: tle985x.h:9123
#define MATH_QUOT_VAL_Msk
Definition: tle985x.h:9133
#define MATH_DIVCON_ST_Msk
Definition: tle985x.h:9085
#define MATH_DIVCON_DIVMODE_Msk
Definition: tle985x.h:9079
INLINE void MATH_DIVERR_Int_Dis(void)
Disables the Divider Error Interrupt.
Definition: mathdiv.h:599
INLINE void MATH_Suspend_Conf(TMath_Sus_Cfg MATH_SUS_Cfg)
Sets the Suspend Configuration.
Definition: mathdiv.h:604
INLINE void MATH_DVD_Chain(TMath_Chain_Cfg MATH_CHAIN_Cfg)
Sets the Dividend Chaining.
Definition: mathdiv.h:614
TMath_DIVMode_Cfg
This enum lists the MATH Division Configuation.
Definition: mathdiv.h:99
@ Ch_MATH_DIVMode_32_16
32-bit divide by 16-bit
Definition: mathdiv.h:101
@ Ch_MATH_DIVMode_32_32
32-bit divide by 32-bit
Definition: mathdiv.h:100
@ Ch_MATH_DIVMode_16_16
16-bit divide by 16-bit
Definition: mathdiv.h:102
INLINE void MATH_DIVEOC_Int_Dis(void)
Disables the Divider End of Calculation Interrupt.
Definition: mathdiv.h:589
void MATH_Init(void)
Initializes the math divider module.
TMath_Chain_Cfg
This enum lists the MATH Chain Configuration.
Definition: mathdiv.h:89
@ Ch_MATH_Chain_Off
No result chaining is selected
Definition: mathdiv.h:90
@ Ch_MATH_Chain_RMD
RMD register is the selected source
Definition: mathdiv.h:92
@ Ch_MATH_Chain_QUOT
QUOT register is the selected source
Definition: mathdiv.h:91
INLINE uint32 MATH_DVS_Read(void)
Reads the Divisor Value.
Definition: mathdiv.h:629
INLINE uint8 MATH_STMODE_Read(void)
Reads the Start Mode.
Definition: mathdiv.h:664
INLINE void MATH_DIVERR_Int_En(void)
Enables the Divider Error Interrupt.
Definition: mathdiv.h:594
INLINE void MATH_DIVEOC_Int_En(void)
Enables the Divider End of Calculation Interrupt.
Definition: mathdiv.h:584
INLINE void MATH_DIVEOC_Int_Clr(void)
Clears the Divider End of Calculation Event Flag.
Definition: mathdiv.h:574
INLINE uint32 MATH_QUOT_Read(void)
Reads the Quotient Value.
Definition: mathdiv.h:639
INLINE uint8 MATH_BSY_Sts(void)
Reads the Busy Indication.
Definition: mathdiv.h:569
INLINE void MATH_DIVERR_Int_Clr(void)
Clears the Divider Error Event Flag.
Definition: mathdiv.h:579
INLINE void MATH_DIV_START(void)
Starts the division operation.
Definition: mathdiv.h:564
TMath_STMode_Cfg
This enum lists the MATH Start MOde Configuation.
Definition: mathdiv.h:109
@ Ch_MATH_STMode_Auto
Start Automatically
Definition: mathdiv.h:110
@ Ch_MATH_STMode_Manual
Start Manually
Definition: mathdiv.h:111
INLINE void MATH_DVD_Set(uint32 VALUE)
Sets the Dividend Value.
Definition: mathdiv.h:624
INLINE uint8 MATH_DIVMODE_Read(void)
Reads the Division Mode.
Definition: mathdiv.h:659
INLINE void MATH_STMODE_Set(TMath_STMode_Cfg MATH_STMODE_Cfg)
Sets the Start Mode.
Definition: mathdiv.h:654
INLINE uint32 MATH_DVD_Read(void)
Reads the Dividend Value.
Definition: mathdiv.h:634
INLINE void MATH_DVS_Set(uint32 VALUE)
Sets the Divisor Value.
Definition: mathdiv.h:619
INLINE void MATH_DVS_Chain(TMath_Chain_Cfg MATH_CHAIN_Cfg)
Sets the Divisor Chaining.
Definition: mathdiv.h:609
INLINE uint32 MATH_RMD_Read(void)
Reads the Remainder Value.
Definition: mathdiv.h:644
TMath_Sus_Cfg
This enum lists the MATH Suspend Mode.
Definition: mathdiv.h:79
@ Ch_MATH_Sus_Off
Suspend disabled
Definition: mathdiv.h:80
@ Ch_MATH_Sus_Soft
Soft Suspend
Definition: mathdiv.h:82
@ Ch_MATH_Sus_Hard
Hard Suspend
Definition: mathdiv.h:81
INLINE void MATH_DIVMODE_Set(TMath_DIVMode_Cfg MATH_DIVMODE_Cfg)
Sets the Division Mode.
Definition: mathdiv.h:649
SFR low level access library.
INLINE uint8 u1_Field_Rd32(const volatile uint32 *reg, uint8 pos, uint32 msk)
This function reads a 1-bit field of a 32-bit register.
Definition: sfr_access.h:423
INLINE void Field_Wrt32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:358
INLINE uint8 u8_Field_Rd32(const volatile uint32 *reg, uint8 pos, uint32 msk)
This function reads a 8-bit field of a 32-bit register.
Definition: sfr_access.h:438
INLINE void Field_Mod32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:378
INLINE uint32 u32_Field_Rd32(const volatile uint32 *reg, uint8 pos, uint32 msk)
This function reads a 32-bit field of a 32-bit register.
Definition: sfr_access.h:453
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:145
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint32_t uint32
32 bit unsigned value
Definition: types.h:155