#include <tle985x.h>
◆ AREN
[12..12] Automatic Reset Enable
◆ BC
◆ BE
[27..27] Baud Rate Error Flag
◆ BECLR
[11..11] Baud Rate Error Flag Clear
◆ BEN
[11..11] Baud Rate Error Enable
◆ [1/6]
◆ [2/6]
◆ [3/6]
◆ [4/6]
◆ [5/6]
◆ [6/6]
◆ BM
[3..0] Data Width Selection
◆ BR_VALUE
[15..0] Baud Rate Timer/Reload Register Value
◆ BSY
◆ CIS
[2..2] Clock Input Select (Slave Mode only)
◆ EN
◆ GIS
[4..4] Global SSC12 Input Select
◆ HB
◆ LB
◆ MIS_0
[0..0] Master Mode Input Select Bit 0 (Master Mode only)
◆ MIS_1
[3..3] Master Mode Input Select Bit 1 (Master Mode only)
◆ MS
◆ PE
[26..26] Phase Error Flag
◆ PECLR
[10..10] Phase Error Flag Clear
◆ PEN
[10..10] Phase Error Enable
◆ PH
[5..5] Clock Phase Control
< (@ 0x48024000) SSC1 Structure
◆ PO
[6..6] Clock Polarity Control
◆ RB_VALUE
[15..0] Receive Data Register Value
◆ RE
[25..25] Receive Error Flag
◆ RECLR
[9..9] Receive Error Flag Clear
◆ reg
(@ 0x00000000) Port Input Select Register
(@ 0x00000004) Control Register
(@ 0x00000008) Transmitter Buffer Register
(@ 0x0000000C) Receiver Buffer Register
(@ 0x00000010) Baud Rate Timer Reload Register
(@ 0x00000014) Interrupt Status Register Clear
◆ REN
[9..9] Receive Error Enable
◆ SIS
[1..1] Slave Mode Input Select (Slave Mode only)
◆ TB_VALUE
[15..0] Transmit Data Register Value
◆ TE
[24..24] Transmit Error Flag
◆ TECLR
[8..8] Transmit Error Flag Clear
◆ TEN
[8..8] Transmit Error Enable
◆ uint32_t
The documentation for this struct was generated from the following file: