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Infineon MOTIX™ MCU TLE985x Device Family SDK
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CPU (CPU)
#include <tle985x.h>
union { ... } AIRCR |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
struct { ... } bit |
union { ... } CCR |
union { ... } CPUID |
union { ... } ICSR |
[3..3] Interrupt Set for ADC1
[3..3] Interrupt Clear for ADC1
[3..3] Interrupt Set Pending for ADC1
[3..3] Interrupt Clear Pending for ADC1
[2..2] Interrupt Set for MU, ADC2
[2..2] Interrupt Clear for MU, ADC2
[2..2] Interrupt Set Pending for MU, ADC2
[2..2] Interrupt Clear Pending for MU, ADC2
[18..18] Interrupt Set for Bridge Driver
[18..18] Interrupt Clear for Bridge Driver
[18..18] Interrupt Set Pending for Bridge Driver
[18..18] Interrupt Clear Pending for Bridge Driver
[4..4] Interrupt Set for CCU6 SR0
[4..4] Interrupt Clear for CCU6 SR0
[4..4] Interrupt Set Pending for CCU6 SR0
[4..4] Interrupt Clear Pending for CCU6 SR0
[5..5] Interrupt Set for CCU6 SR1
[5..5] Interrupt Clear for CCU6 SR1
[5..5] Interrupt Set Pending for CCU6 SR1
[5..5] Interrupt Clear Pending for CCU6 SR1
[6..6] Interrupt Set for CCU6 SR2
[6..6] Interrupt Clear for CCU6 SR2
[6..6] Interrupt Set Pending for CCU6 SR2
[6..6] Interrupt Clear Pending for CCU6 SR2
[7..7] Interrupt Set for CCU6 SR3
[7..7] Interrupt Clear for CCU6 SR3
[7..7] Interrupt Set Pending for CCU6 SR3
[7..7] Interrupt Clear Pending for CCU6 SR3
[17..17] Interrupt Set for Charge Pump
[17..17] Interrupt Clear for Charge Pump
[17..17] Interrupt Set Pending for Charge Pump
[17..17] Interrupt Clear Pending for Charge Pump
[21..21] Interrupt Set for Differential Unit
[21..21] Interrupt Clear for Differential Unit
[21..21] Interrupt Set Pending for Differential Unit
[21..21] Interrupt Clear Pending for Differential Unit
[12..12] Interrupt Set for External Int 0
[12..12] Interrupt Clear for External Int 0
[12..12] Interrupt Set Pending for External Int 0
[12..12] Interrupt Clear Pending for External Int 0
[13..13] Interrupt Set for External Int 1
[13..13] Interrupt Clear for External Int 1
[13..13] Interrupt Set Pending for External Int 1
[13..13] Interrupt Clear Pending for External Int 1
[0..0] Interrupt Set for GPT1
[0..0] Interrupt Clear for GPT1
[0..0] Interrupt Set Pending for GPT1
[0..0] Interrupt Clear Pending for GPT1
[1..1] Interrupt Set for GPT2
[1..1] Interrupt Clear for GPT2
[1..1] Interrupt Set Pending for GPT2
[1..1] Interrupt Clear Pending for GPT2
[19..19] Interrupt Set for High-Side Switch
[19..19] Interrupt Clear for High-Side Switch
[19..19] Interrupt Set Pending for High-Side Switch
[19..19] Interrupt Clear Pending for High-Side Switch
[15..15] Interrupt Set for Math Divider
[15..15] Interrupt Clear for Math Divider
[15..15] Interrupt Set Pending for Math Divider
[15..15] Interrupt Clear Pending for Math Divider
[22..22] Interrupt Set for MON
[22..22] Interrupt Clear for MON
[22..22] Interrupt Set Pending for MON
[22..22] Interrupt Clear Pending for MON
[20..20] Interrupt Set for Current Sense Amplifier
[20..20] Interrupt Clear for Current Sense Amplifier
[20..20] Interrupt Set Pending for Current Sense Amplifier
[20..20] Interrupt Clear Pending for Current Sense Amplifier
[23..23] Interrupt Set for PORT2
[23..23] Interrupt Clear for PORT2
[23..23] Interrupt Set Pending for PORT2
[23..23] Interrupt Clear Pending for PORT2
[8..8] Interrupt Set for SSC1
[8..8] Interrupt Clear for SSC1
[8..8] Interrupt Set Pending for SSC1
[8..8] Interrupt Clear Pending for SSC1
[9..9] Interrupt Set for SSC2
[9..9] Interrupt Clear for SSC2
[9..9] Interrupt Set Pending for SSC2
[9..9] Interrupt Clear Pending for SSC2
[10..10] Interrupt Set for UART1
[10..10] Interrupt Clear for UART1
[10..10] Interrupt Set Pending for UART1
[10..10] Interrupt Clear Pending for UART1
[11..11] Interrupt Set for UART2
[11..11] Interrupt Clear for UART2
[11..11] Interrupt Set Pending for UART2
[11..11] Interrupt Clear Pending for UART2
[14..14] Interrupt Set for WAKEUP
[14..14] Interrupt Clear for WAKEUP
[14..14] Interrupt Set Pending for WAKEUP
[14..14] Interrupt Clear Pending for WAKEUP
union { ... } NVIC_ICER |
union { ... } NVIC_ICPR |
union { ... } NVIC_IPR0 |
union { ... } NVIC_IPR1 |
union { ... } NVIC_IPR2 |
union { ... } NVIC_IPR3 |
union { ... } NVIC_IPR4 |
union { ... } NVIC_IPR5 |
union { ... } NVIC_ISER |
union { ... } NVIC_ISPR |
(@ 0x00000010) SysTick Control and Status Register
(@ 0x00000014) SysTick Reload Value Register
(@ 0x00000018) SysTick Current Value Register
(@ 0x0000001C) SysTick Calibration Value Register
(@ 0x00000100) Interrupt Set-Enable
(@ 0x00000180) Interrupt Clear-Enable
(@ 0x00000200) Interrupt Set-Pending
(@ 0x00000280) Interrupt Clear-Pending
(@ 0x00000400) Interrupt Priority
(@ 0x00000404) Interrupt Priority
(@ 0x00000408) Interrupt Priority
(@ 0x0000040C) Interrupt Priority
(@ 0x00000410) Interrupt Priority
(@ 0x00000414) Interrupt Priority
(@ 0x00000D00) CPU ID Base Register
(@ 0x00000D04) Interrupt Control and State Register
(@ 0x00000D0C) Application Interrupt/Reset Control Register
(@ 0x00000D10) System Control Register
(@ 0x00000D14) Configuration Control Register
(@ 0x00000D1C) System Handler Priority Register 2
(@ 0x00000D20) System Handler Priority Register 3
(@ 0x00000D24) System Handler Control and State Register
union { ... } SCR |
union { ... } SHCSR |
union { ... } SHPR2 |
union { ... } SHPR3 |
union { ... } SYSTICK_CALIB |
union { ... } SYSTICK_CSR |
union { ... } SYSTICK_CVR |
union { ... } SYSTICK_RVR |
__IM uint32_t |