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Infineon MOTIX™ MCU TLE985x Device Family SDK
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SCU (SCU)
#include <tle985x.h>
union { ... } ADC1_CLK |
union { ... } APCLK |
union { ... } APCLK_CTRL |
union { ... } APCLK_SCLR |
union { ... } APCLK_STS |
union { ... } BCON1 |
union { ... } BCON2 |
union { ... } BG1 |
union { ... } BG2 |
union { ... } BGL1 |
union { ... } BGL2 |
struct { ... } bit |
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union { ... } BRDRV_CLK |
union { ... } CMCON2 |
union { ... } COCON |
[17..17] Configuration of NVM Read Protection for Sector 1...n with EN_RD_* = 0
[18..18] Configuration of NVM Read Protection for Sector 0 with EN_RD_S0 = 0
union { ... } EDCCON |
union { ... } EDCSCLR |
union { ... } EDCSTAT |
union { ... } EXICON0 |
union { ... } EXICON1 |
union { ... } GPT12ICLR |
union { ... } GPT12IEN |
union { ... } GPT12IRC |
union { ... } GPT12PISEL |
union { ... } ID |
union { ... } IEN0 |
union { ... } IRCON0 |
union { ... } IRCON0CLR |
union { ... } IRCON1 |
union { ... } IRCON1CLR |
union { ... } IRCON2 |
union { ... } IRCON2CLR |
union { ... } IRCON3 |
union { ... } IRCON3CLR |
union { ... } IRCON4 |
union { ... } IRCON4CLR |
union { ... } IRCON5 |
union { ... } IRCON5CLR |
union { ... } LINSCLR |
union { ... } LINST |
union { ... } MEM_ACC_STS |
union { ... } MEMSTAT |
union { ... } MODIEN1 |
union { ... } MODIEN2 |
union { ... } MODIEN3 |
union { ... } MODIEN4 |
union { ... } MODPISEL |
union { ... } MODPISEL1 |
union { ... } MODPISEL2 |
union { ... } MODPISEL3 |
union { ... } MODPISEL4 |
union { ... } MODSUSP |
union { ... } MONIEN |
union { ... } NMICON |
union { ... } NMISR |
union { ... } NMISRCLR |
< (@ 0x50005000) SCU Structure
union { ... } NVM_PROT_STS |
union { ... } P0_POCON0 |
union { ... } P1_POCON0 |
union { ... } PASSWD |
union { ... } PMCON |
union { ... } PMCON0 |
(@ 0x00000000) NMI Status Clear Register
(@ 0x00000004) Interrupt Request Register 0
(@ 0x00000008) Interrupt Request Register 1
(@ 0x0000000C) Interrupt Request Register 2
(@ 0x00000010) Interrupt Request Register 3
(@ 0x00000014) Interrupt Request Register 4
(@ 0x00000018) NMI Status Register
(@ 0x0000001C) Interrupt Enable Register 0
(@ 0x00000020) Vector Table Reallocation Register
(@ 0x00000024) NMI Control Register
(@ 0x00000028) External Interrupt Control Register 0
(@ 0x0000002C) External Interrupt Control Register 1
(@ 0x00000030) Peripheral Interrupt Enable Register 1
(@ 0x00000034) Peripheral Interrupt Enable Register 2
(@ 0x00000038) Peripheral Interrupt Enable Register 3
(@ 0x0000003C) Peripheral Interrupt Enable Register 4
(@ 0x00000040) Power Mode Control Register 0
(@ 0x0000004C) Clock Control Register 2
(@ 0x00000050) Watchdog Timer Control Register
(@ 0x00000054) Analog Peripheral Clock Control Register
(@ 0x00000058) Analog Peripheral Clock Register
(@ 0x0000005C) Analog Peripheral Clock Status Register
(@ 0x00000060) Peripheral Management Control Register
(@ 0x00000064) Analog Peripheral Clock Status Clear Register
(@ 0x00000068) Reset Control Register
(@ 0x0000006C) ADC1 Peripheral Clock Register
(@ 0x00000070) System Control Register 0
(@ 0x00000074) System Startup Status Register
(@ 0x00000078) Watchdog Timer Reload Register
(@ 0x0000007C) Watchdog Window-Boundary Count
(@ 0x00000080) Watchdog Timer
(@ 0x00000088) Baud Rate Control Register 1
(@ 0x0000008C) Baud Rate Timer/Reload Register, Low Byte 1
(@ 0x00000090) Baud Rate Timer/Reload Register
(@ 0x00000094) LIN Status Register
(@ 0x00000098) Baud Rate Control Register 2
(@ 0x0000009C) Baud Rate Timer/Reload Register, Low Byte 2
(@ 0x000000A0) Baud Rate Timer/Reload Register
(@ 0x000000A4) LIN Status Clear Register
(@ 0x000000A8) Identity Register
(@ 0x000000AC) Password Register
(@ 0x000000B4) Clock Output Control Register
(@ 0x000000B8) Peripheral Input Select Register
(@ 0x000000BC) Peripheral Input Select Register 1
(@ 0x000000C0) Peripheral Input Select Register 2
(@ 0x000000C4) Peripheral Input Select Register 3
(@ 0x000000C8) Module Suspend Control Register
(@ 0x000000D0) GPT12 Peripheral Input Select Register
(@ 0x000000D4) Error Detection and Correction Control Register
(@ 0x000000D8) Error Detection and Correction Status Register
(@ 0x000000DC) Memory Status Register
(@ 0x000000E0) NVM Protection Status Register
(@ 0x000000E4) Memory Access Status Register
(@ 0x000000E8) Port Output Control Register
(@ 0x000000EC) Wakeup Interrupt Control Register
(@ 0x000000F0) Interrupt Request Register 5
(@ 0x000000F4) Temperature Compensation Control Register
(@ 0x000000F8) Port Output Control Register
(@ 0x000000FC) Peripheral Input Select Register 4
(@ 0x0000010C) Error Detection and Correction Status Clear Register
(@ 0x0000012C) Stack Overflow Status Clear Register
(@ 0x00000144) Stack Overflow Control Register
(@ 0x00000148) Stack Overflow Control Register
(@ 0x0000014C) Stack Overflow Status Register
(@ 0x00000150) ADC1 Peripheral Clock Register
(@ 0x0000015C) General Purpose Timer 12 Interrupt Enable Register
(@ 0x00000160) Timer and Counter Control/Status Register
(@ 0x00000178) Interrupt Request 0 Clear Register
(@ 0x0000017C) Interrupt Request 1 Clear Register
(@ 0x00000180) Timer and Counter Control/Status Clear Register
(@ 0x0000018C) Monitoring Input Interrupt Enable Register
(@ 0x00000190) Interrupt Request 2 Clear Register
(@ 0x00000194) Interrupt Request 3 Clear Register
(@ 0x00000198) Interrupt Request 4 Clear Register
(@ 0x0000019C) Interrupt Request 5 Clear Register
union { ... } RSTCON |
union { ... } STACK_OVF_ADDR |
union { ... } STACK_OVF_CTRL |
union { ... } STACK_OVF_STS |
union { ... } STACK_OVFCLR |
union { ... } SYS_STRTUP_STS |
union { ... } SYSCON0 |
union { ... } TCCR |
__IM uint32_t |
union { ... } VTOR |
union { ... } WAKECON |
union { ... } WDT |
union { ... } WDTCON |
union { ... } WDTREL |
union { ... } WDTWINB |