95 #define BDRV_IRQ_EN_BITS 0xD0505050u
98 #define BDRV_IRQ_CLR_BITS 0xF0707073u
101 #define BDRV_COMP_BITS 0x70700u
104 #define BDRV_DS_STS_BITS 0x20202020
143 #define BDRV_LS1_DS_ISC BDRV_IRQCLR_LS1_DS_ISC_Msk
144 #define BDRV_LS1_DS_SC BDRV_IRQCLR_LS1_DS_SC_Msk
145 #define BDRV_LS1_OC_ISC BDRV_IRQCLR_LS1_OC_ISC_Msk
146 #define BDRV_HS1_DS_ISC BDRV_IRQCLR_HS1_DS_ISC_Msk
147 #define BDRV_HS1_DS_SC BDRV_IRQCLR_HS1_DS_SC_Msk
148 #define BDRV_HS1_OC_ISC BDRV_IRQCLR_HS1_OC_ISC_Msk
151 #ifdef UC_FEATURE_HB2
152 #define BDRV_LS2_DS_ISC BDRV_IRQCLR_LS2_DS_ISC_Msk
153 #define BDRV_LS2_DS_SC BDRV_IRQCLR_LS2_DS_SC_Msk
154 #define BDRV_LS2_OC_ISC BDRV_IRQCLR_LS2_OC_ISC_Msk
155 #define BDRV_HS2_DS_ISC BDRV_IRQCLR_HS2_DS_ISC_Msk
156 #define BDRV_HS2_DS_SC BDRV_IRQCLR_HS2_DS_SC_Msk
157 #define BDRV_HS2_OC_ISC BDRV_IRQCLR_HS2_OC_ISC_Msk
160 #define BDRV_SEQ_ERR_ISC BDRV_IRQCLR_SEQ_ERR_ISC_Msk
218 #ifdef UC_FEATURE_HB2
343 #ifdef UC_FEATURE_HB2
368 #ifdef UC_FEATURE_HB2
416 #ifdef UC_FEATURE_HB2
529 #ifdef UC_FEATURE_HB2
758 #ifdef UC_FEATURE_HB2
916 #ifdef UC_FEATURE_HB2
1004 #ifdef UC_FEATURE_HB2
1036 #ifdef UC_FEATURE_HB2
1098 #ifdef UC_FEATURE_HB2
1140 #ifdef UC_FEATURE_HB2
INLINE void BDRV_SEQ_ERR_Int_En(void)
Enables Driver Sequence Error interrupt.
Definition: bdrv.h:1068
bool BDRV_Diag_OpenLoad(void)
Detects whether a motor is connected.
INLINE void BDRV_LS1_OC_Int_Dis(void)
Disables External Low Side 1 FET Over-current interrupt.
Definition: bdrv.h:1093
INLINE void BDRV_LS1_DS_Int_Dis(void)
Disables Low Side Driver 1 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1135
INLINE void BDRV_LS1_OC_Int_En(void)
Enables External Low Side 1 FET Over-current interrupt.
Definition: bdrv.h:1088
TBdrv_DSM_Threshold
This enum lists the Drain-Source Voltage Threshold.
Definition: bdrv.h:197
@ Threshold_0_75_V
Threshold 3 for VDS at 0.75 V.
Definition: bdrv.h:201
@ Threshold_0_50_V
Threshold 2 for VDS at 0.50 V.
Definition: bdrv.h:200
@ Threshold_0_125_V
Threshold 0 for VDS at 0.125 V.
Definition: bdrv.h:198
@ Threshold_1_75_V
Threshold 7 for VDS at 1.75 V.
Definition: bdrv.h:205
@ Threshold_1_00_V
Threshold 4 for VDS at 1.00 V.
Definition: bdrv.h:202
@ Threshold_1_50_V
Threshold 6 for VDS at 1.50 V.
Definition: bdrv.h:204
@ Threshold_1_25_V
Threshold 5 for VDS at 1.25 V.
Definition: bdrv.h:203
@ Threshold_0_25_V
Threshold 1 for VDS at 0.25 V.
Definition: bdrv.h:199
INLINE void BDRV_LS2_OC_Int_Clr(void)
Clears External Low Side 2 FET Over-current interrupt flag.
Definition: bdrv.h:1037
void BDRV_Clr_Sts(uint32 Sts_Bit)
Clears individual status flags and interrupt status flags of the BridgeDriver.
INLINE void BDRV_LS2_DS_Int_Clr(void)
Clears Low Side Driver 2 Drain Source Monitoring interrupt flag in OFF-State.
Definition: bdrv.h:1047
INLINE void BDRV_HS2_OC_Int_Dis(void)
Disables External High Side 2 FET Over-current interrupt.
Definition: bdrv.h:1104
INLINE void BDRV_HS2_DS_Int_En(void)
Enables High Side Driver 2 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1141
void BDRV_Set_Int_Channel(TBdrv_Ch BDRV_Ch, TBdrv_Ch_Int Ch_Int)
Sets Interrupt Enable for the individual MOSFETs.
TBdrv_Ch_LS_Cfg
This enum lists the Bridge Driver Low Side channel configuration.
Definition: bdrv.h:113
@ Ch_LS_Off
channel disabled
Definition: bdrv.h:114
@ Ch_LS_PWM
channel enabled with PWM (CCU6 connection)
Definition: bdrv.h:116
@ Ch_LS_En
channel enabled
Definition: bdrv.h:115
@ Ch_LS_On
channel enabled and static on
Definition: bdrv.h:117
INLINE void BDRV_HS1_DS_SC_Clr(void)
Clears High Side Driver 1 Drain Source Monitoring status flag in OFF-State.
Definition: bdrv.h:1026
INLINE void BDRV_HS2_DS_SC_Clr(void)
Clears High Side Driver 2 Drain Source Monitoring status flag in OFF-State.
Definition: bdrv.h:1010
INLINE void BDRV_HS2_OC_Int_Clr(void)
Clears External High Side 2 FET Over-current interrupt flag.
Definition: bdrv.h:1005
TBDRV_Off_Diag BDRV_Off_Diagnosis(void)
Off-diagnosis.
TBdrv_Ch_Int
This enum lists the Bridge Driver channel Interrupt configuration.
Definition: bdrv.h:186
@ Int_DS
Drain-Source interrupt enable
Definition: bdrv.h:188
@ Int_Off
all interrupts disable
Definition: bdrv.h:187
@ Int_OC
Over-Current interrupt enable
Definition: bdrv.h:189
@ Int_DS_OC
Drain-Source and Over-Current interrupt enable.
Definition: bdrv.h:190
INLINE void BDRV_HS1_OC_Int_En(void)
Enables External High Side 1 FET Over-current interrupt.
Definition: bdrv.h:1078
INLINE void BDRV_LS1_DS_Int_Clr(void)
Clears Low Side Driver 1 Drain Source Monitoring interrupt flag in OFF-State.
Definition: bdrv.h:1063
INLINE void BDRV_HS2_DS_Int_Clr(void)
Clears High Side Driver 2 Drain Source Monitoring status flag in OFF-State.
Definition: bdrv.h:1015
INLINE void BDRV_LS2_OC_Int_Dis(void)
Disables External Low Side 2 FET Over-current interrupt.
Definition: bdrv.h:1114
void BDRV_Set_Channel(TBdrv_Ch BDRV_Ch, TBdrv_Ch_Cfg Ch_Cfg)
sets an individual driver of the BridgeDriver in the desired state
INLINE void BDRV_LS1_DS_SC_Clr(void)
Clears Low Side Driver 1 Drain Source Monitoring status flag in OFF-State.
Definition: bdrv.h:1058
void BDRV_Set_Channel_Comp(uint8 gain_hs, uint8 gain_ls)
Sets Gain for Low/High Side Charge Current Compensation.
INLINE void BDRV_SEQ_ERR_Int_Clr(void)
Clears Driver Sequence Error interrupt flag.
Definition: bdrv.h:999
INLINE void BDRV_HS1_DS_Int_En(void)
Enables High Side Driver 1 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1120
INLINE void BDRV_LS2_DS_SC_Clr(void)
Clears Low Side Driver 2 Drain Source Monitoring status flag in OFF-State.
Definition: bdrv.h:1042
INLINE void BDRV_LS1_OC_Int_Clr(void)
Clears External Low Side 1 FET Over-current interrupt flag.
Definition: bdrv.h:1053
INLINE void BDRV_LS2_OC_Int_En(void)
Enables External Low Side 2 FET Over-current interrupt.
Definition: bdrv.h:1109
INLINE void BDRV_LS2_DS_Int_Dis(void)
Disables Low Side Driver 2 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1156
INLINE void BDRV_LS1_DS_Int_En(void)
Enables Low Side Driver 1 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1130
INLINE void BDRV_HS2_OC_Int_En(void)
Enables External High Side 2 FET Over-current interrupt.
Definition: bdrv.h:1099
INLINE void BDRV_LS2_DS_Int_En(void)
Enables Low Side Driver 2 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1151
TBDRV_Off_Diag_Sts
This enum lists the Bridge Driver Off Diagnosis Status configuration.
Definition: bdrv.h:166
@ Ch_Ok
Definition: bdrv.h:167
@ Ch_Short_to_Gnd
Definition: bdrv.h:168
@ Ch_Short_to_VBat
Definition: bdrv.h:169
TBdrv_Ch
This enum lists the Bridge Driver channel configuration.
Definition: bdrv.h:136
@ HS2
Phase2 High Side MOSFET.
Definition: bdrv.h:140
@ HS1
Phase1 High Side MOSFET.
Definition: bdrv.h:139
@ LS2
Phase2 Low Side MOSFET
Definition: bdrv.h:138
@ LS1
Phase1 Low Side MOSFET
Definition: bdrv.h:137
void BDRV_Set_DSM_Threshold(TBdrv_DSM_Threshold BDRV_Threshold)
Sets the Voltage Threshold for Drain-Source Monitoring of external FETs.
INLINE void BDRV_HS1_OC_Int_Dis(void)
Disables External High Side 1 FET Over-current interrupt.
Definition: bdrv.h:1083
INLINE void BDRV_SEQ_ERR_Int_Dis(void)
Disables Driver Sequence Error interrupt.
Definition: bdrv.h:1073
INLINE void BDRV_HS1_OC_Int_Clr(void)
Clears External High Side 1 FET Over-current interrupt flag.
Definition: bdrv.h:1021
TBdrv_Ch_Cfg
This enum lists the Bridge Driver High Side channel configuration.
Definition: bdrv.h:124
@ Ch_On
channel enabled and static on
Definition: bdrv.h:128
@ Ch_DCS
channel enabled with Diag.-Current Source (only for HS1/HS2)
Definition: bdrv.h:129
@ Ch_Off
channel disabled
Definition: bdrv.h:125
@ Ch_En
channel enabled
Definition: bdrv.h:126
@ Ch_PWM
channel enabled with PWM (CCU6 connection)
Definition: bdrv.h:127
void BDRV_Init(void)
Initializes the BridgeDriver based on the Config Wizard configuration.
INLINE void BDRV_HS1_DS_Int_Clr(void)
Clears High Side Driver 1 Drain Source Monitoring interrupt flag in OFF-State.
Definition: bdrv.h:1031
INLINE void BDRV_HS1_DS_Int_Dis(void)
Disables High Side Driver 1 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1125
INLINE void BDRV_HS2_DS_Int_Dis(void)
Disables High Side Driver 2 Drain Source Monitoring interrupt in OFF-State.
Definition: bdrv.h:1146
void BDRV_Set_Bridge(TBdrv_Ch_LS_Cfg LS1_Cfg, TBdrv_Ch_Cfg HS1_Cfg, TBdrv_Ch_LS_Cfg LS2_Cfg, TBdrv_Ch_Cfg HS2_Cfg)
Sets the bridge in the desired state. For each of the four drivers the state can be defined.
#define BDRV
Definition: tle985x.h:6267
#define BDRV_IRQEN_HS2_DS_IEN_Msk
Definition: tle985x.h:7851
#define BDRV_IRQEN_HS1_OC_IEN_Pos
Definition: tle985x.h:7852
#define BDRV_IRQCLR_HS1_DS_SC_Pos
Definition: tle985x.h:7825
#define BDRV_IRQCLR_SEQ_ERR_ISC_Pos
Definition: tle985x.h:7815
#define BDRV_IRQCLR_HS1_DS_ISC_Msk
Definition: tle985x.h:7828
#define BDRV_IRQCLR_HS2_DS_SC_Msk
Definition: tle985x.h:7820
#define BDRV_IRQCLR_LS2_OC_ISC_Pos
Definition: tle985x.h:7829
#define BDRV_IRQCLR_LS1_DS_SC_Msk
Definition: tle985x.h:7838
#define BDRV_IRQCLR_LS2_DS_SC_Msk
Definition: tle985x.h:7832
#define BDRV_IRQCLR_SEQ_ERR_ISC_Msk
Definition: tle985x.h:7816
#define BDRV_IRQCLR_LS1_DS_ISC_Pos
Definition: tle985x.h:7839
#define BDRV_IRQEN_LS2_DS_IEN_Pos
Definition: tle985x.h:7858
#define BDRV_IRQCLR_HS1_OC_ISC_Msk
Definition: tle985x.h:7824
#define BDRV_IRQEN_HS1_OC_IEN_Msk
Definition: tle985x.h:7853
#define BDRV_IRQCLR_LS1_DS_SC_Pos
Definition: tle985x.h:7837
#define BDRV_IRQCLR_HS1_DS_SC_Msk
Definition: tle985x.h:7826
#define BDRV_IRQCLR_HS2_OC_ISC_Pos
Definition: tle985x.h:7817
#define BDRV_IRQEN_LS1_DS_IEN_Msk
Definition: tle985x.h:7863
#define BDRV_IRQCLR_LS1_DS_ISC_Msk
Definition: tle985x.h:7840
#define BDRV_IRQCLR_HS2_DS_ISC_Pos
Definition: tle985x.h:7821
#define BDRV_IRQCLR_LS1_OC_ISC_Pos
Definition: tle985x.h:7835
#define BDRV_IRQCLR_HS2_OC_ISC_Msk
Definition: tle985x.h:7818
#define BDRV_IRQEN_SEQ_ERR_IEN_Pos
Definition: tle985x.h:7846
#define BDRV_IRQCLR_LS2_DS_ISC_Pos
Definition: tle985x.h:7833
#define BDRV_IRQEN_LS1_OC_IEN_Pos
Definition: tle985x.h:7860
#define BDRV_IRQEN_LS2_OC_IEN_Msk
Definition: tle985x.h:7857
#define BDRV_IRQEN_HS2_DS_IEN_Pos
Definition: tle985x.h:7850
#define BDRV_IRQEN_HS2_OC_IEN_Msk
Definition: tle985x.h:7849
#define BDRV_IRQCLR_LS2_DS_ISC_Msk
Definition: tle985x.h:7834
#define BDRV_IRQCLR_HS1_OC_ISC_Pos
Definition: tle985x.h:7823
#define BDRV_IRQEN_LS1_OC_IEN_Msk
Definition: tle985x.h:7861
#define BDRV_IRQCLR_LS2_DS_SC_Pos
Definition: tle985x.h:7831
#define BDRV_IRQEN_HS2_OC_IEN_Pos
Definition: tle985x.h:7848
#define BDRV_IRQEN_SEQ_ERR_IEN_Msk
Definition: tle985x.h:7847
#define BDRV_IRQEN_HS1_DS_IEN_Pos
Definition: tle985x.h:7854
#define BDRV_IRQEN_LS2_OC_IEN_Pos
Definition: tle985x.h:7856
#define BDRV_IRQCLR_HS2_DS_ISC_Msk
Definition: tle985x.h:7822
#define BDRV_IRQEN_LS1_DS_IEN_Pos
Definition: tle985x.h:7862
#define BDRV_IRQCLR_LS1_OC_ISC_Msk
Definition: tle985x.h:7836
#define BDRV_IRQCLR_HS1_DS_ISC_Pos
Definition: tle985x.h:7827
#define BDRV_IRQCLR_HS2_DS_SC_Pos
Definition: tle985x.h:7819
#define BDRV_IRQEN_HS1_DS_IEN_Msk
Definition: tle985x.h:7855
#define BDRV_IRQCLR_LS2_OC_ISC_Msk
Definition: tle985x.h:7830
#define BDRV_IRQEN_LS2_DS_IEN_Msk
Definition: tle985x.h:7859
SFR low level access library.
INLINE void Field_Wrt32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:358
INLINE void Field_Mod32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:378
This struct lists the Bridge Driver Off Diagnosis Status Phases configuration.
Definition: bdrv.h:176
TBDRV_Off_Diag_Sts Phase1
Definition: bdrv.h:178
bool GlobFailSts
Definition: bdrv.h:177
TBDRV_Off_Diag_Sts Phase2
Definition: bdrv.h:179
CMSIS register HeaderFile.
Device specific memory layout defines.
General type declarations.
#define INLINE
Definition: types.h:145
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint32_t uint32
32 bit unsigned value
Definition: types.h:155