112 #define PASSWD_Open (0x98U)
114 #define PASSWD_Close (0xA8U)
117 #define NVM_PASSWORD_BOOT (0U)
119 #define NVM_PASSWORD_CODE (1U)
121 #define NVM_PASSWORD_DATA (2U)
124 #define PROTECTION_CLEAR (1U)
126 #define PROTECTION_SET (0U)
129 #define PBA0_Div_1 (0U)
131 #define PBA0_Div_2 (1U)
134 #define VCO_BYP_Msk (0x80008U)
136 #define VCO_BYP_0 (0x80000U)
138 #define OSC_DISC_Msk (0x40004U)
140 #define OSC_DISC_0 (0x40000U)
BootROM low level access library.
NVM_PASSWORD_SEGMENT_t
This enum defines the NVM protection password segment.
Definition: bootrom.h:203
#define SCUPM
Definition: tle985x.h:6278
#define CPU
Definition: tle985x.h:6269
#define SCU
Definition: tle985x.h:6277
#define SCUPM_AMCLK_TH_HYS_AMCLK2_UP_TH_Msk
Definition: tle985x.h:10429
#define SCUPM_AMCLK_TH_HYS_AMCLK2_LOW_TH_Msk
Definition: tle985x.h:10425
#define SCUPM_AMCLK_TH_HYS_AMCLK2_LOW_TH_Pos
Definition: tle985x.h:10424
#define SCUPM_AMCLK_TH_HYS_AMCLK1_LOW_TH_Msk
Definition: tle985x.h:10433
#define SCUPM_AMCLK_TH_HYS_AMCLK2_LOW_HYS_Pos
Definition: tle985x.h:10422
#define CPU_SCR_SLEEPONEXIT_Msk
Definition: tle985x.h:8744
#define SCUPM_AMCLK_TH_HYS_AMCLK1_UP_HYS_Pos
Definition: tle985x.h:10434
#define SCU_APCLK_SCLR_APCLK3SCLR_Msk
Definition: tle985x.h:9813
#define SCUPM_AMCLK_TH_HYS_AMCLK2_UP_HYS_Msk
Definition: tle985x.h:10427
#define SCUPM_AMCLK_TH_HYS_AMCLK1_LOW_HYS_Pos
Definition: tle985x.h:10430
#define CPU_SCR_SLEEPONEXIT_Pos
Definition: tle985x.h:8743
#define SCUPM_AMCLK_CTRL_CLKWDT_PD_N_Msk
Definition: tle985x.h:10415
#define SCUPM_AMCLK_TH_HYS_AMCLK2_LOW_HYS_Msk
Definition: tle985x.h:10423
#define SCUPM_AMCLK_TH_HYS_AMCLK2_UP_TH_Pos
Definition: tle985x.h:10428
#define SCUPM_AMCLK_TH_HYS_AMCLK1_UP_HYS_Msk
Definition: tle985x.h:10435
#define SCU_CMCON2_PBA0CLKREL_Pos
Definition: tle985x.h:9861
#define SCUPM_AMCLK_TH_HYS_AMCLK1_UP_TH_Pos
Definition: tle985x.h:10436
#define SCU_CMCON2_PBA0CLKREL_Msk
Definition: tle985x.h:9862
#define SCU_APCLK_SCLR_APCLK1SCLR_Msk
Definition: tle985x.h:9817
#define SCU_VTOR_VTOR_BYP_Pos
Definition: tle985x.h:10382
#define SCUPM_AMCLK_TH_HYS_AMCLK1_UP_TH_Msk
Definition: tle985x.h:10437
#define SCU_APCLK_SCLR_APCLK2SCLR_Pos
Definition: tle985x.h:9814
#define SCU_SYSCON0_SYSCLKSEL_Pos
Definition: tle985x.h:10374
#define SCUPM_AMCLK_TH_HYS_AMCLK2_UP_HYS_Pos
Definition: tle985x.h:10426
#define SCUPM_AMCLK_TH_HYS_AMCLK1_LOW_TH_Pos
Definition: tle985x.h:10432
#define SCU_APCLK_SCLR_APCLK2SCLR_Msk
Definition: tle985x.h:9815
#define SCU_WDTCON_WDTRS_Msk
Definition: tle985x.h:10398
#define SCU_VTOR_VTOR_BYP_Msk
Definition: tle985x.h:10383
#define SCUPM_AMCLK_CTRL_CLKWDT_PD_N_Pos
Definition: tle985x.h:10414
#define SCU_WDTCON_WDTEN_Pos
Definition: tle985x.h:10395
#define SCU_WDTCON_WDTEN_Msk
Definition: tle985x.h:10396
#define CPU_SCR_SLEEPDEEP_Pos
Definition: tle985x.h:8741
#define SCUPM_AMCLK_TH_HYS_AMCLK1_LOW_HYS_Msk
Definition: tle985x.h:10431
#define SCU_SYSCON0_SYSCLKSEL_Msk
Definition: tle985x.h:10375
#define SCU_APCLK_SCLR_APCLK1SCLR_Pos
Definition: tle985x.h:9816
#define SCU_WDTCON_WDTRS_Pos
Definition: tle985x.h:10397
#define CPU_SCR_SLEEPDEEP_Msk
Definition: tle985x.h:8742
#define SCU_APCLK_SCLR_APCLK3SCLR_Pos
Definition: tle985x.h:9812
INLINE void CPU_SleepOnExit_Sel(void)
Selects entering sleep or deep sleep on exit.
Definition: scu.h:781
INLINE void CPU_DeepSleep_Sel(void)
Selects low power deep sleep mode.
Definition: scu.h:776
INLINE void SCUPM_AMCLK1_UP_TH_Set(uint8 thld)
Sets Analog Module Clock 1 Upper Limit Threshold.
Definition: scu.h:736
INLINE void SCU_APCLK2_Sts_Clr(void)
Clears Analog Peripherals Clock 2 Status.
Definition: scu.h:716
TSCU_System_Clock
This enum lists the SCU System Clock Sources.
Definition: scu.h:163
@ SCU_System_Clock_LP_CLK
Definition: scu.h:164
@ SCU_System_Clock_IntOsc
Definition: scu.h:165
INLINE void SCUPM_CLKWDT_PD_N_Dis(void)
Disables Clock Watchdog.
Definition: scu.h:731
int32_t SCU_ChangeNVMProtection(NVM_PASSWORD_SEGMENT_t Protection, uint8 Action)
Sets the Write/Read Protection for the Code/Data Flash.
INLINE void SCU_Enable_Module(TScu_Mod Module)
Enables a given peripheral module.
Definition: scu.h:656
INLINE void SCUPM_AMCLK1_LOW_HYS_Set(uint8 hyst)
Sets Analog Module Clock 1 Lower Hysteresis.
Definition: scu.h:751
#define PASSWD_Close
PASSWD Phrases, PASSWD Closed.
Definition: scu.h:114
TSCU_VTOR
This enum lists the SCU Vector Table Relocation.
Definition: scu.h:172
@ SCU_VTOR_RAM
Definition: scu.h:174
@ SCU_VTOR_CBSL
Definition: scu.h:175
@ SCU_VTOR_ROM
Definition: scu.h:173
@ SCU_VTOR_UCODE
Definition: scu.h:176
void SCU_ClkInit(void)
Initializes the system clocks.
INLINE void SCU_Sel_PBA0_Clk_Div_Sel(uint8 div)
Sets PBA0 Clock Divider.
Definition: scu.h:690
INLINE void SCU_System_Clock_Sel(TSCU_System_Clock a)
Selects a System Clock.
Definition: scu.h:704
INLINE void SCUPM_AMCLK2_LOW_HYS_Set(uint8 hyst)
Sets Analog Module Clock 2 Lower Hysteresis.
Definition: scu.h:771
INLINE void SCUPM_AMCLK2_UP_HYS_Set(uint8 hyst)
Sets Analog Module Clock 2 Upper Hysteresis.
Definition: scu.h:761
TScu_Mod
This enum lists the SCU Modules Configuration.
Definition: scu.h:149
@ Mod_Timer21
Definition: scu.h:156
@ Mod_CCU
Definition: scu.h:152
@ Mod_SSC2
Definition: scu.h:155
@ Mod_GPT12
Definition: scu.h:154
@ Mod_Timer2
Definition: scu.h:153
@ Mod_SSC1
Definition: scu.h:151
@ Mod_ADC1
Definition: scu.h:150
INLINE void SCU_Disable_Module(TScu_Mod Module)
Disables a given peripheral module.
Definition: scu.h:651
INLINE void SCU_VTOR_Sel(TSCU_VTOR a)
Selects a Vector Table Bypass Mode.
Definition: scu.h:697
void SCU_Init(void)
Initializes the SCU module.
INLINE void SCU_APCLK1_Sts_Clr(void)
Clears Analog Peripherals Clock 1 Status.
Definition: scu.h:711
INLINE void SCUPM_CLKWDT_PD_N_En(void)
Enables Clock Watchdog.
Definition: scu.h:726
INLINE void SCU_WDT_Start(void)
Starts the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by ...
Definition: scu.h:661
INLINE void SCUPM_AMCLK2_UP_TH_Set(uint8 thld)
Sets Analog Module Clock 2 Upper Limit Threshold.
Definition: scu.h:756
INLINE void SCUPM_AMCLK1_UP_HYS_Set(uint8 hyst)
Sets Analog Module Clock 1 Upper Hysteresis.
Definition: scu.h:741
INLINE void SCU_WDT_Service(void)
Services the Watchdog of SCU-DM in the Watchdog Timer Control Register.
Definition: scu.h:675
INLINE void SCU_APCLK3_Sts_Clr(void)
Clears Analog Peripherals Clock 3 Status.
Definition: scu.h:721
INLINE void SCUPM_AMCLK1_LOW_TH_Set(uint8 thld)
Sets Analog Module Clock 1 Lower Limit Threshold.
Definition: scu.h:746
void SCU_EnterStopMode(void)
Sets the device into Stop Mode.
#define PASSWD_Open
PASSWD Phrases, PASSWD Opened.
Definition: scu.h:112
INLINE void SCU_OpenPASSWD(void)
Opens the bit protection by writing PASSWD_Open to the Bit Protection Register.
Definition: scu.h:680
INLINE void SCU_ClosePASSWD(void)
Closes the bit protection by writing PASSWD_Close to the Bit Protection Register.
Definition: scu.h:685
INLINE void SCUPM_AMCLK2_LOW_TH_Set(uint8 thld)
Sets Analog Module Clock 2 Lower Limit Threshold.
Definition: scu.h:766
INLINE void SCU_WDT_Stop(void)
Stops the Watchdog of SCU-DM in the Watchdog Timer Control Register The written bit is protected by t...
Definition: scu.h:668
void SCU_EnterSleepMode(void)
Sets the device into Sleep Mode.
SFR low level access library.
INLINE void Field_Wrt32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:358
INLINE void Field_Wrt32all(volatile uint32 *reg, uint32 val)
This function writes an 32-bit register directly, no mask/position needed.
Definition: sfr_access.h:363
INLINE void Field_Mod32(volatile uint32 *reg, uint8 pos, uint32 msk, uint32 val)
This function writes a bit field in a 32-bit register.
Definition: sfr_access.h:378
CMSIS register HeaderFile.
General type declarations.
#define INLINE
Definition: types.h:145
uint8_t uint8
8 bit unsigned value
Definition: types.h:153
uint32_t uint32
32 bit unsigned value
Definition: types.h:155