ADuCM4x50 Device Drivers API Reference Manual
Release 4.0.0.0
adi_spi_config.h
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#ifndef ADI_SPI_CONFIG_H__
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#define ADI_SPI_CONFIG_H__
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#include <adi_global_config.h>
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#define ADI_CFG_SYSTEM_CLOCK_HZ (26000000u)
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#define ADI_SPI_TRAP_RXOVR (1u)
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#define ADI_SPI_TRAP_TXUNDR (1u)
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/************* SPI controller configurations ***************/
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/* There are three SPI instances SPI0, SPI1 and SPI2 */
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/* Each SPI has its own configuration macros */
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/*----------------------------------------------------------*/
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/* -------------------- SPI0 -------------------------------*/
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/*----------------------------------------------------------*/
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#define ADI_SPI0_MASTER_MODE (1u)
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#define ADI_SPI0_CFG_BIT_RATE (2000000u)
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#define ADI_SPI0_CFG_ENABLE (0u)
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#define ADI_SPI0_CFG_CLK_PHASE (0u)
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#define ADI_SPI0_CFG_CLK_POLARITY (0u)
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#define ADI_SPI0_CFG_WIRED_OR (0u)
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#define ADI_SPI0_CFG_LSB_MSB (0u)
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#define ADI_SPI0_CFG_TRANSFER_INITIATE (0u)
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#define ADI_SPI0_CFG_TX_UNDERFLOW (0u)
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#define ADI_SPI0_CFG_RX_OVERFLOW (0u)
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#define ADI_SPI0_CFG_MISO_ENABLE (0u)
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#define ADI_SPI0_CFG_LOOPBACK (0u)
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#define ADI_SPI0_CFG_CONTINUOUS (0u)
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#define ADI_SPI0_CFG_RX_FLUSH (0u)
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#define ADI_SPI0_CFG_TX_FLUSH (0u)
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#define ADI_SPI0_CFG_CSERR_RESET (0u)
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#define ADI_SPI0_CFG_CLK_DIV (0u)
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#define ADI_SPI0_CFG_HFM (0u)
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#define ADI_SPI0_CFG_CS_ERR (0u)
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#define ADI_SPI0_CFG_CS_IRQ (0u)
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/*----------------------------------------------------------*/
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/* -------------------- SPI1 -------------------------------*/
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/*----------------------------------------------------------*/
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#define ADI_SPI1_MASTER_MODE (1u)
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#define ADI_SPI1_CFG_BIT_RATE (2000000u)
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#define ADI_SPI1_CFG_ENABLE (0u)
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#define ADI_SPI1_CFG_CLK_PHASE (0u)
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#define ADI_SPI1_CFG_CLK_POLARITY (0u)
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#define ADI_SPI1_CFG_WIRED_OR (0u)
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#define ADI_SPI1_CFG_LSB_MSB (0u)
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#define ADI_SPI1_CFG_TRANSFER_INITIATE (0u)
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#define ADI_SPI1_CFG_TX_UNDERFLOW (0u)
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#define ADI_SPI1_CFG_RX_OVERFLOW (0u)
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#define ADI_SPI1_CFG_MISO_ENABLE (0u)
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#define ADI_SPI1_CFG_LOOPBACK (0u)
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#define ADI_SPI1_CFG_CONTINUOUS (0u)
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#define ADI_SPI1_CFG_RX_FLUSH (0u)
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#define ADI_SPI1_CFG_TX_FLUSH (0u)
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#define ADI_SPI1_CFG_CSERR_RESET (0u)
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#define ADI_SPI1_CFG_CLK_DIV (0u)
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#define ADI_SPI1_CFG_HFM (0u)
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#define ADI_SPI1_CFG_CS_ERR (0u)
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#define ADI_SPI1_CFG_CS_IRQ
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/*----------------------------------------------------------*/
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/* -------------------- SPI2 -------------------------------*/
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/*----------------------------------------------------------*/
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#define ADI_SPI2_MASTER_MODE (1u)
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#define ADI_SPI2_CFG_BIT_RATE (2000000u)
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#define ADI_SPI2_CFG_ENABLE (0u)
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#define ADI_SPI2_CFG_CLK_PHASE (0u)
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#define ADI_SPI2_CFG_CLK_POLARITY (0u)
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#define ADI_SPI2_CFG_WIRED_OR (0u)
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#define ADI_SPI2_CFG_LSB_MSB (0u)
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#define ADI_SPI2_CFG_TRANSFER_INITIATE (0u)
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#define ADI_SPI2_CFG_TX_UNDERFLOW (0u)
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#define ADI_SPI2_CFG_RX_OVERFLOW (0u)
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#define ADI_SPI2_CFG_MISO_ENABLE (0u)
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#define ADI_SPI2_CFG_LOOPBACK (0u)
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#define ADI_SPI2_CFG_CONTINUOUS (0u)
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#define ADI_SPI2_CFG_RX_FLUSH (0u)
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#define ADI_SPI2_CFG_TX_FLUSH (0u)
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#define ADI_SPI2_CFG_CSERR_RESET (0u)
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#define ADI_SPI2_CFG_CLK_DIV (0u)
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#define ADI_SPI2_CFG_HFM (0u)
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#define ADI_SPI2_CFG_CS_ERR (0u)
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#define ADI_SPI2_CFG_CS_IRQ
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/************** Macro validation *****************************/
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#if ( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
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( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
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( ADI_SPI0_CFG_BIT_RATE > (13000000u) )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_ENABLE > 1u ) || \
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( ADI_SPI1_CFG_ENABLE > 1u ) || \
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( ADI_SPI2_CFG_ENABLE > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_CLK_PHASE > 1u ) || \
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( ADI_SPI1_CFG_CLK_PHASE > 1u ) || \
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( ADI_SPI2_CFG_CLK_PHASE > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_CLK_POLARITY > 1u ) || \
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( ADI_SPI1_CFG_CLK_POLARITY > 1u ) || \
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( ADI_SPI2_CFG_CLK_POLARITY > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_WIRED_OR > 1u ) || \
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( ADI_SPI1_CFG_WIRED_OR > 1u ) || \
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( ADI_SPI2_CFG_WIRED_OR > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_LSB_MSB > 1u ) || \
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( ADI_SPI1_CFG_LSB_MSB > 1u ) || \
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( ADI_SPI2_CFG_LSB_MSB > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_TRANSFER_INITIATE > 1u ) || \
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( ADI_SPI1_CFG_TRANSFER_INITIATE > 1u ) || \
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( ADI_SPI2_CFG_TRANSFER_INITIATE > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_TX_UNDERFLOW > 1u ) || \
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( ADI_SPI1_CFG_TX_UNDERFLOW > 1u ) || \
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( ADI_SPI2_CFG_TX_UNDERFLOW > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_RX_OVERFLOW > 1u ) || \
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( ADI_SPI1_CFG_RX_OVERFLOW > 1u ) || \
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( ADI_SPI2_CFG_RX_OVERFLOW > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_MISO_ENABLE > 1u ) || \
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( ADI_SPI1_CFG_MISO_ENABLE > 1u ) || \
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( ADI_SPI2_CFG_MISO_ENABLE > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_LOOPBACK > 1u ) || \
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( ADI_SPI1_CFG_LOOPBACK > 1u ) || \
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( ADI_SPI2_CFG_LOOPBACK > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_CONTINUOUS > 1u ) || \
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( ADI_SPI1_CFG_CONTINUOUS > 1u ) || \
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( ADI_SPI2_CFG_CONTINUOUS > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_RX_FLUSH > 1u ) || \
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( ADI_SPI1_CFG_RX_FLUSH > 1u ) || \
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( ADI_SPI2_CFG_RX_FLUSH > 1u )
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#error "Invalid configuration"
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#endif
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#if ( ADI_SPI0_CFG_TX_FLUSH > 1u ) || \
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( ADI_SPI1_CFG_TX_FLUSH > 1u ) || \
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( ADI_SPI2_CFG_TX_FLUSH > 1u )
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#error "Invalid configuration"
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#endif
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#endif
/* ADI_SPI_CONFIG_H__ */
Include
config
adi_spi_config.h
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