23 #if defined(__ADUCM302x__) 24 #define BITP_CLKG_OSC_CTL_LFX_FAIL_STA BITP_CLKG_OSC_CTL_LFX_FAIL_STAT 27 #if defined ( __ADSPGCC__ ) 28 #define UNUSED __attribute__ ((unused)) 36 #include <rtos_map/adi_rtos_map.h> 74 #pragma diag_suppress=Pm011,Pm123,Pm073,Pm143,Pm050,Pm109,Pm150,Pm140,Pm129,Pm029,Pm126,Pm031 79 #include <drivers/rtc/adi_rtc.h> 93 #include <RTE_Components.h> 97 #include "adi_rtc_data.c" 99 #define RTC_SNAPSHOT_KEY (0x7627u) 100 #define RTC_FRZCNT_KEY (0x9376u) 103 struct adi_rtc_snapshots
110 #if defined(__ADUCM302x__) 111 #define BITP_RTC_SSMSK_SS1MSK BITP_RTC_SSMSK_SSMSK 114 #if defined(__ADUCM4x50__) 119 #ifndef ADUCM4050_SI_REV 120 #define ADUCM4050_SI_REV (1) 127 #define WA_21000023 (1) 131 static uint16_t cr0 = 0u, cr1 = 0u, cr3oc = 0u, cr4oc = 0u, cr2ic = 0u, cr5ocs = 0u;
136 uint16_t bitPositionl;
141 { &cr0, BITP_RTC_CR0_ALMINTEN },
142 { &cr0, BITP_RTC_CR0_MOD60ALMINTEN },
143 { &cr0, BITP_RTC_CR0_ISOINTEN },
144 { &cr0, BITP_RTC_CR0_WPNDERRINTEN },
145 { &cr0, BITP_RTC_CR0_WSYNCINTEN },
146 { &cr0, BITP_RTC_CR0_WPNDINTEN },
147 { &cr1, BITP_RTC_CR1_CNTINTEN },
148 { &cr1, BITP_RTC_CR1_PSINTEN },
149 { &cr1, BITP_RTC_CR1_TRMINTEN },
150 { &cr1, BITP_RTC_CR1_CNTROLLINTEN },
151 { &cr1, BITP_RTC_CR1_CNTMOD60ROLLINTEN },
152 { &cr3oc, BITP_RTC_CR3SS_SS1IRQEN },
153 { &cr3oc, BITP_RTC_CR3SS_SS2IRQEN },
154 { &cr3oc, BITP_RTC_CR3SS_SS2IRQEN },
155 { &cr3oc, BITP_RTC_CR3SS_SS4IRQEN },
156 { &cr2ic, BITP_RTC_CR2IC_IC0IRQEN },
157 { &cr2ic, BITP_RTC_CR2IC_IC2IRQEN },
158 { &cr2ic, BITP_RTC_CR2IC_IC3IRQEN },
159 { &cr2ic, BITP_RTC_CR2IC_IC4IRQEN },
160 { &cr2ic, BITP_CLKG_OSC_CTL_LFX_FAIL_STA },
161 { &cr3oc, BITM_RTC_CR3SS_SS4FEIRQEN},
162 { &cr3oc, BITM_RTC_CR3SS_SS3FEIRQEN},
163 { &cr3oc, BITM_RTC_CR3SS_SS2FEIRQEN},
164 { &cr3oc, BITM_RTC_CR3SS_SS1FEIRQEN},
165 { &cr4oc, BITP_RTC_CR4SS_SS4MSKEN},
166 { &cr4oc, BITP_RTC_CR4SS_SS3MSKEN},
167 { &cr4oc, BITP_RTC_CR4SS_SS2MSKEN},
168 { &cr4oc, BITP_RTC_CR4SS_SS1MSKEN},
169 { &cr5ocs, BITP_RTC_CR5SSS_SS3SMPMTCHIRQEN},
170 { &cr5ocs, BITP_RTC_CR5SSS_SS2SMPMTCHIRQEN},
171 { &cr5ocs, BITP_RTC_CR5SSS_SS1SMPMTCHIRQEN}
175 #elif defined(__ADUCM302x__) 178 static uint16_t cr0 = 0u, cr1 = 0u, cr3oc = 0u, cr4oc = 0u, cr2ic = 0u;
183 uint16_t bitPositionl;
188 { &cr0, BITP_RTC_CR0_ALMINTEN },
189 { &cr0, BITP_RTC_CR0_MOD60ALMINTEN },
190 { &cr0, BITP_RTC_CR0_ISOINTEN },
191 { &cr0, BITP_RTC_CR0_WPNDERRINTEN },
192 { &cr0, BITP_RTC_CR0_WSYNCINTEN },
193 { &cr0, BITP_RTC_CR0_WPNDINTEN },
194 { &cr1, BITP_RTC_CR1_CNTINTEN },
195 { &cr1, BITP_RTC_CR1_PSINTEN },
196 { &cr1, BITP_RTC_CR1_TRMINTEN },
197 { &cr1, BITP_RTC_CR1_CNTROLLINTEN },
198 { &cr1, BITP_RTC_CR1_CNTMOD60ROLLINTEN },
199 { &cr3oc, BITP_RTC_CR3SS_SS1IRQEN },
200 { &cr2ic, BITP_RTC_CR2IC_IC0IRQEN },
201 { &cr2ic, BITP_RTC_CR2IC_IC2IRQEN },
202 { &cr2ic, BITP_RTC_CR2IC_IC3IRQEN },
203 { &cr2ic, BITP_RTC_CR2IC_IC4IRQEN },
206 #error RTC is not ported for this processor 211 void RTC0_Int_Handler(
void);
212 void RTC1_Int_Handler(
void);
223 for(i = 0u; i < ADI_RTC_NUM_INSTANCE; i++)
225 if(aRTCDeviceInfo[i].hDevice == pInDevice)
267 uint32_t DeviceNumber,
273 ADI_RTC_DEVICE *pDevice = pDeviceMemory;
279 if ( DeviceNumber >= ADI_RTC_NUM_INSTANCE)
284 if (aRTCDeviceInfo[DeviceNumber].hDevice != NULL)
295 memset(pDeviceMemory,0,MemorySize);
297 pDevice->pRTCRegs = aRTCDeviceInfo[DeviceNumber].pRTCRegs;
306 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
307 pDevice->pRTCRegs->CR0 = 0u;
308 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
309 pDevice->pRTCRegs->CR1 = 0u;
310 ALWAYS_SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
311 ALWAYS_SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
318 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0)
320 ALWAYS_SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCSR0)
325 if(pDevice->pRTCRegs == pADI_RTC1)
339 ALWAYS_PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSR3)
341 ALWAYS_SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSR3)
350 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
351 pDevice->pRTCRegs->CNT0 = 0u;
352 pDevice->pRTCRegs->CNT1 = 0u;
353 ALWAYS_SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1))
356 aRTCDeviceInfo[DeviceNumber].hDevice = pDevice;
357 pDevice->pDeviceInfo = &aRTCDeviceInfo[DeviceNumber];
360 rtc_init(pDevice,&aRTCConfig[DeviceNumber]);
364 pDevice->eIRQn = aRTCDeviceInfo[DeviceNumber].eIRQn;
366 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
387 ADI_RTC_DEVICE *pDevice = hDevice;
398 NVIC_DisableIRQ( pDevice->eIRQn);
400 pDevice->pRTCRegs = NULL;
401 pDevice->pfCallback = NULL;
402 pDevice->pCBParam = NULL;
403 pDevice->cbWatch = 0u;
405 pDevice->pDeviceInfo->hDevice = NULL;
449 ADI_RTC_DEVICE *pDevice = hDevice;
459 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
461 ADI_INT_STATUS_ALLOC();
462 ADI_ENTER_CRITICAL_REGION();
466 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_ALMEN;
470 pDevice->pRTCRegs->CR0 &= (uint16_t)(~BITM_RTC_CR0_ALMEN);
472 ADI_EXIT_CRITICAL_REGION();
475 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
512 ADI_RTC_DEVICE *pDevice = hDevice;
520 if(pDevice->pRTCRegs == pADI_RTC0)
528 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
530 ADI_INT_STATUS_ALLOC();
531 ADI_ENTER_CRITICAL_REGION();
535 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_MOD60ALMEN;
539 pDevice->pRTCRegs->CR0 &= (uint16_t)(~BITM_RTC_CR0_MOD60ALMEN);
541 ADI_EXIT_CRITICAL_REGION();
544 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
574 ADI_RTC_DEVICE *pDevice = hDevice;
585 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
588 ADI_INT_STATUS_ALLOC();
589 ADI_ENTER_CRITICAL_REGION();
593 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_CNTEN;
597 pDevice->pRTCRegs->CR0 &=(uint16_t)(~BITM_RTC_CR0_CNTEN);
599 ADI_EXIT_CRITICAL_REGION();
602 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
634 ADI_RTC_DEVICE *pDevice = hDevice;
646 )) & (uint16_t)Interrupts) != 0u))
654 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
655 PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
658 cr0 = 0u; cr1 = 0u; cr3oc = 0u; cr4oc = 0u; cr2ic = 0u;
660 #if defined(__ADUCM4x50__) 666 if( 0u != (Interrupts & 1u) )
668 uint16_t *cr = Interrupt_Details[ndx].cr;
669 uint16_t enableBitPosition = Interrupt_Details[ndx].bitPositionl;
670 *cr = *cr | (1u << enableBitPosition);
678 pDevice->pRTCRegs->CR0 |= cr0;
679 pDevice->pRTCRegs->CR1 |= cr1;
680 pDevice->pRTCRegs->CR3SS |= cr3oc;
681 pDevice->pRTCRegs->CR4SS |= cr4oc;
682 pDevice->pRTCRegs->CR2IC |= cr2ic;
684 #if defined(__ADUCM4x50__) 685 pDevice->pRTCRegs->CR5SSS |= cr5ocs;
690 pDevice->pRTCRegs->CR0 &= ~cr0;
691 pDevice->pRTCRegs->CR1 &= ~cr1;
692 pDevice->pRTCRegs->CR3SS &= ~cr3oc;
693 pDevice->pRTCRegs->CR4SS &= ~cr4oc;
694 pDevice->pRTCRegs->CR2IC &= ~cr2ic;
695 #if defined(__ADUCM4x50__) 696 pDevice->pRTCRegs->CR5SSS &= ~cr5ocs;
699 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
700 SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
733 ADI_RTC_DEVICE *pDevice = hDevice;
743 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
745 ADI_INT_STATUS_ALLOC();
746 ADI_ENTER_CRITICAL_REGION();
750 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_TRMEN;
754 pDevice->pRTCRegs->CR0 &=(uint16_t)(~BITM_RTC_CR0_TRMEN);
756 ADI_EXIT_CRITICAL_REGION();
759 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
779 ADI_RTC_DEVICE *pDevice = hDevice;
789 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
791 ADI_INT_STATUS_ALLOC();
792 ADI_ENTER_CRITICAL_REGION();
796 pDevice->pRTCRegs->CR2IC |=(uint16_t)eInpChannel;
800 pDevice->pRTCRegs->CR2IC &= (uint16_t)(~(uint16_t)eInpChannel);
802 ADI_EXIT_CRITICAL_REGION();
805 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
825 ADI_RTC_DEVICE *pDevice = hDevice;
835 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
837 ADI_INT_STATUS_ALLOC();
838 ADI_ENTER_CRITICAL_REGION();
842 pDevice->pRTCRegs->CR2IC |= BITM_RTC_CR2IC_ICOWUSEN;
846 pDevice->pRTCRegs->CR2IC &= (uint16_t)~BITM_RTC_CR2IC_ICOWUSEN;
848 ADI_EXIT_CRITICAL_REGION();
851 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
872 ADI_RTC_DEVICE *pDevice = hDevice;
873 uint32_t nInpChannel = (uint16_t)eInpChannel;
883 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
885 ADI_INT_STATUS_ALLOC();
886 ADI_ENTER_CRITICAL_REGION();
890 pDevice->pRTCRegs->CR2IC |= (uint16_t)(nInpChannel << BITP_RTC_CR2IC_IC0LH);
894 pDevice->pRTCRegs->CR2IC &= (uint16_t)~(nInpChannel << BITP_RTC_CR2IC_IC0LH);
896 ADI_EXIT_CRITICAL_REGION();
899 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
919 ADI_RTC_DEVICE *pDevice = hDevice;
929 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR3SS)
931 ADI_INT_STATUS_ALLOC();
932 ADI_ENTER_CRITICAL_REGION();
936 pDevice->pRTCRegs->CR3SS |=(uint16_t)eSSChannel;
940 pDevice->pRTCRegs->CR3SS &= (uint16_t)(~(uint16_t)eSSChannel);
942 ADI_EXIT_CRITICAL_REGION();
945 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR3SS)
966 ADI_RTC_DEVICE *pDevice = hDevice;
976 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR4SS)
978 ADI_INT_STATUS_ALLOC();
979 ADI_ENTER_CRITICAL_REGION();
987 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS1ARLEN;
989 #if defined(__ADUCM4x50__) 991 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS2ARLEN;
994 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS3ARLEN;
1007 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS1ARLEN;
1009 #if defined(__ADUCM4x50__) 1011 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS2ARLEN;
1014 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS3ARLEN;
1021 ADI_EXIT_CRITICAL_REGION();
1024 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR4SS)
1028 #if defined(__ADUCM302x__) 1046 #elif defined(__ADUCM4x50__) 1065 uint16_t nHighValue)
1068 ADI_RTC_DEVICE *pDevice = hDevice;
1078 switch( eSSChannel )
1082 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1083 #if defined(__ADUCM4x50__) 1084 pDevice->pRTCRegs->SS1LOWDUR = nLowValue;
1085 pDevice->pRTCRegs->SS1HIGHDUR= nHighValue;
1087 pDevice->pRTCRegs->SS1ARL = nValue;
1090 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS1)
1092 #if defined(__ADUCM4x50__) 1095 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1096 pDevice->pRTCRegs->SS2LOWDUR = nLowValue;
1097 pDevice->pRTCRegs->SS2HIGHDUR= nHighValue;
1099 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS2)
1104 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1105 pDevice->pRTCRegs->SS3LOWDUR = nLowValue;
1106 pDevice->pRTCRegs->SS3HIGHDUR= nHighValue;
1108 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS3)
1136 ADI_RTC_DEVICE *pDevice = hDevice;
1146 PEND_BEFORE_WRITE(SR5, BITM_RTC_SR5_WPENDCR4SS)
1148 ADI_INT_STATUS_ALLOC();
1149 ADI_ENTER_CRITICAL_REGION();
1153 pDevice->pRTCRegs->CR4SS |= (uint16_t)eSSChannel;
1157 pDevice->pRTCRegs->CR4SS &= (uint16_t)~(uint16_t)eSSChannel;
1159 ADI_EXIT_CRITICAL_REGION();
1162 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR4SS)
1181 ADI_RTC_DEVICE *pDevice = hDevice;
1182 uint16_t MaskPos = 0u;
1192 switch( eSSChannel )
1195 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS1MSK;
1197 #if defined(__ADUCM4x50__) 1199 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS2MSK;
1203 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS3MSK;
1207 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS4MSK;
1215 PEND_BEFORE_WRITE(SR5, BITM_RTC_SR5_WPENDSSMSK)
1218 pDevice->pRTCRegs->SSMSK |= ((uint16_t)nMask & 0xFu) << MaskPos;
1221 SYNC_AFTER_WRITE(SR4, BITM_RTC_SR4_WSYNCSSMSK)
1251 ADI_RTC_DEVICE *pDevice = hDevice;
1262 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1265 NVIC_DisableIRQ(pDevice->eIRQn);
1266 nAlarm =(uint32_t) pDevice->pRTCRegs->ALM1 << 16u;
1267 nAlarm |= (uint32_t)pDevice->pRTCRegs->ALM0;
1268 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
1292 ADI_RTC_DEVICE *pDevice = hDevice;
1293 uint32_t nAlarm,nTemp;
1305 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1306 nPreScale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
1308 NVIC_DisableIRQ(pDevice->eIRQn);
1309 nAlarm = (uint32_t)pDevice->pRTCRegs->ALM1 << 16u;
1310 nAlarm |= (uint32_t)pDevice->pRTCRegs->ALM0;
1311 NVIC_EnableIRQ((IRQn_Type)pDevice->eIRQn);
1312 nTemp = 1lu<<nPreScale;
1313 fFraction = (float)pDevice->pRTCRegs->ALM2 /(
float)(nTemp);
1315 *pAlarm = (float)nAlarm+fFraction;
1340 ADI_RTC_DEVICE *pDevice = hDevice;
1351 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1354 NVIC_DisableIRQ(pDevice->eIRQn);
1355 *pAlarm0= pDevice->pRTCRegs->ALM0;
1356 *pAlarm1= pDevice->pRTCRegs->ALM1;
1357 *pAlarm2= pDevice->pRTCRegs->ALM2;
1358 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
1384 ADI_RTC_DEVICE *pDevice = hDevice;
1394 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
1399 *pControl = pDevice->pRTCRegs->CR0;
1402 *pControl = pDevice->pRTCRegs->CR1;
1432 struct adi_rtc_snapshots snapshots;
1442 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1445 *pCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1468 struct adi_rtc_snapshots snapshots;
1470 uint32_t nCount,nTemp;
1472 ADI_RTC_DEVICE *pDevice = hDevice;
1482 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1484 nPrescale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
1485 nCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1486 nTemp = (1lu<<nPrescale);
1487 fFraction = ((float)snapshots.snapshot2)/((float)nTemp);
1488 *pfCount = ((float)nCount) + fFraction;
1513 struct adi_rtc_snapshots snapshots;
1516 ADI_RTC_DEVICE *pDevice = hDevice;
1524 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1526 *pnCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1527 *pfCount = (uint32_t)snapshots.snapshot2;
1565 ADI_RTC_DEVICE *pDevice = hDevice;
1566 uint32_t nInterrupt = 0u;
1582 if( pDevice->pRTCRegs == pADI_RTC1)
1631 ADI_RTC_DEVICE *pDevice = hDevice;
1650 if( pDevice->pRTCRegs == pADI_RTC1)
1660 if ((((uint32_t)Status) & validInput) == 0u)
1667 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0)
1673 pDevice->pRTCRegs->SR0 |= (uint16_t) nStatus;
1676 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCSR0)
1680 if(pDevice->pRTCRegs == pADI_RTC1)
1689 pDevice->pRTCRegs->SR2 |= (uint16_t) nStatus;
1695 pDevice->pRTCRegs->SR3 |= (uint16_t) nStatus;
1723 ADI_RTC_DEVICE *pDevice = hDevice;
1737 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDTRM);
1762 ADI_RTC_DEVICE *pDevice = hDevice;
1771 switch( eSSChannel )
1774 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1775 *pValue = pDevice->pRTCRegs->SS1;
1777 #if defined(__ADUCM4x50__) 1780 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1781 *pValue = pDevice->pRTCRegs->SS2;
1786 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1787 *pValue = pDevice->pRTCRegs->SS3;
1791 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS4)
1792 *pValue = pDevice->pRTCRegs->SS4;
1822 ADI_RTC_DEVICE *pDevice = hDevice;
1831 switch( eSSChannel )
1835 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1836 pDevice->pRTCRegs->SS1 = nValue;
1838 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS1)
1841 #if defined(__ADUCM4x50__) 1844 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1845 pDevice->pRTCRegs->SS2 = nValue;
1847 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS2)
1852 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1853 pDevice->pRTCRegs->SS3 = nValue;
1855 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS3)
1860 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS4)
1861 pDevice->pRTCRegs->SS4 = nValue;
1863 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS4)
1907 ADI_RTC_DEVICE *pDevice = hDevice;
1918 *pSnap0=pDevice->pRTCRegs->SNAP0;
1919 *pSnap1=pDevice->pRTCRegs->SNAP1;
1920 *pSnap2=pDevice->pRTCRegs->SNAP2;
1923 *pSnap2= pDevice->pRTCRegs->IC2;
1924 *pSnap0 = *pSnap1 = 0u;
1927 *pSnap2= pDevice->pRTCRegs->IC3;
1928 *pSnap0 = *pSnap1 = 0u;
1931 *pSnap2= pDevice->pRTCRegs->IC4;
1932 *pSnap0 = *pSnap1 = 0u;
1963 ADI_RTC_DEVICE *pDevice = hDevice;
1975 *pValue = pDevice->pRTCRegs->IC2;
1978 *pValue = pDevice->pRTCRegs->IC3;
1982 *pValue = pDevice->pRTCRegs->IC4;
2013 ADI_RTC_DEVICE *pDevice = hDevice;
2028 *pFraction = pDevice->pRTCRegs->SNAP2;
2029 *pValue = (uint32_t)pDevice->pRTCRegs->SNAP1 << 16u;
2030 *pValue |= (uint32_t)pDevice->pRTCRegs->SNAP0;
2078 ADI_RTC_DEVICE *pDevice = hDevice;
2088 nPendBits = pDevice->pRTCRegs->SR1 & ADI_RTC_WRITE_STATUS_MASK;
2137 ADI_RTC_DEVICE *pDevice = hDevice;
2147 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0);
2150 nSyncBits = pDevice->pRTCRegs->SR0 & ADI_RTC_WRITE_STATUS_MASK;
2170 ADI_RTC_DEVICE *pDevice = hDevice;
2179 *pValue = (pDevice->pRTCRegs->SR0 & BITM_RTC_SR0_ISOENB) >> BITP_RTC_SR0_ISOENB;
2215 ADI_RTC_DEVICE *pDevice = hDevice;
2225 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2227 ADI_INT_STATUS_ALLOC();
2228 ADI_ENTER_CRITICAL_REGION();
2230 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2231 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2232 pDevice->pRTCRegs->ALM2 = 0u;
2233 ADI_EXIT_CRITICAL_REGION();
2236 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2237 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2267 ADI_RTC_DEVICE *pDevice = hDevice;
2279 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2281 ADI_INT_STATUS_ALLOC();
2282 ADI_ENTER_CRITICAL_REGION();
2284 pDevice->pRTCRegs->ALM0 = nAlarm0;
2285 pDevice->pRTCRegs->ALM1 = nAlarm1;
2286 pDevice->pRTCRegs->ALM2 = nAlarm2;
2287 ADI_EXIT_CRITICAL_REGION();
2290 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2291 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2323 ADI_RTC_DEVICE *pDevice = hDevice;
2333 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2335 ADI_INT_STATUS_ALLOC();
2336 ADI_ENTER_CRITICAL_REGION();
2338 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2339 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2340 pDevice->pRTCRegs->ALM2 = 0u;
2341 ADI_EXIT_CRITICAL_REGION();
2373 ADI_RTC_DEVICE *pDevice = hDevice;
2385 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2387 ADI_INT_STATUS_ALLOC();
2388 ADI_ENTER_CRITICAL_REGION();
2390 pDevice->pRTCRegs->ALM0 = nAlarm0;
2391 pDevice->pRTCRegs->ALM1 = nAlarm1;
2392 pDevice->pRTCRegs->ALM2 = nAlarm2;
2393 ADI_EXIT_CRITICAL_REGION();
2421 ADI_RTC_DEVICE *pDevice = hDevice;
2431 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2432 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2457 ADI_RTC_DEVICE *pDevice = hDevice;
2466 if(pDevice->pRTCRegs == pADI_RTC0)
2471 PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
2472 ADI_INT_STATUS_ALLOC();
2473 ADI_ENTER_CRITICAL_REGION();
2476 nTemp = pDevice->pRTCRegs->CR1 & (uint16_t)~BITM_RTC_CR1_PRESCALE2EXP;
2477 nTemp |= (uint16_t)((uint16_t)nPreScale << BITP_RTC_CR1_PRESCALE2EXP);
2478 pDevice->pRTCRegs->CR1 = nTemp;
2479 ADI_EXIT_CRITICAL_REGION();
2481 SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
2504 ADI_RTC_DEVICE *pDevice = hDevice;
2514 if(pDevice->pRTCRegs == pADI_RTC0)
2522 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2524 ADI_INT_STATUS_ALLOC();
2525 ADI_ENTER_CRITICAL_REGION();
2528 nTemp = pDevice->pRTCRegs->CR0 & BITM_RTC_CR0_MOD60ALM;
2529 nTemp |= (uint16_t)((uint16_t)nPeriod << BITP_RTC_CR0_MOD60ALM);
2530 pDevice->pRTCRegs->CR0 = nTemp;
2531 ADI_EXIT_CRITICAL_REGION();
2533 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
2560 ADI_RTC_DEVICE *pDevice = hDevice;
2561 uint32_t nAlarm = (uint32_t)fAlarm,nTemp;
2571 if(pDevice->pRTCRegs == pADI_RTC0)
2579 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2580 nPreScale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
2581 ADI_INT_STATUS_ALLOC();
2582 ADI_ENTER_CRITICAL_REGION();
2585 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2586 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2587 nTemp = 1lu<<nPreScale;
2588 fFraction = (fAlarm - (float)nAlarm) *(float)(nTemp);
2589 pDevice->pRTCRegs->ALM2 = (uint16_t)(fFraction);
2590 ADI_EXIT_CRITICAL_REGION();
2592 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2593 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2621 ADI_RTC_DEVICE *pDevice = hDevice;
2631 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2636 pDevice->pRTCRegs->CR0 = (uint16_t)Control;
2639 pDevice->pRTCRegs->CR1 = (uint16_t)Control;
2645 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
2669 ADI_CALLBACK
const pfCallback,
2670 void *
const pCBparam
2674 ADI_RTC_DEVICE *pDevice = hDevice;
2684 #if (ADI_RTC_CFG_ENABLE_SAFE_WRITE == 1) 2691 pDevice->pfCallback = pfCallback;
2693 pDevice->pCBParam = pCBparam;
2721 ADI_RTC_DEVICE *pDevice = hDevice;
2731 #if (ADI_RTC_CFG_ENABLE_SAFE_WRITE == 1) 2740 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
2742 ADI_INT_STATUS_ALLOC();
2743 ADI_ENTER_CRITICAL_REGION();
2745 pDevice->pRTCRegs->CNT0 = (uint16_t)nCount;
2746 pDevice->pRTCRegs->CNT1 = (uint16_t)(nCount >> 16);
2747 ADI_EXIT_CRITICAL_REGION();
2750 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1))
2779 ADI_RTC_DEVICE *pDevice = hDevice;
2789 pDevice->pRTCRegs->GWY = Command;
2821 ADI_RTC_DEVICE *pDevice = hDevice;
2822 uint32_t trm = (uint32_t)eInterval | (uint32_t)eTrimValue | (uint32_t)eOperation;
2834 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDTRM)
2836 pDevice->pRTCRegs->TRM = (uint16_t)trm;
2839 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCTRM)
2869 ADI_RTC_DEVICE *pDevice = hDevice;
2880 while (ADI_RTC_WRITE_STATUS_MASK != (pDevice->pRTCRegs->SR0 & ADI_RTC_WRITE_STATUS_MASK))
2899 static void rtc_init(ADI_RTC_DEVICE *pDevice,ADI_RTC_CONFIG *pConfig)
2902 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2903 pDevice->pRTCRegs->CR0 = pConfig->CR0;
2906 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
2907 pDevice->pRTCRegs->CR1 = pConfig->CR1;
2911 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
2912 pDevice->pRTCRegs->CNT0 = pConfig->CNT0;
2913 pDevice->pRTCRegs->CNT1 = pConfig->CNT1;
2917 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2918 pDevice->pRTCRegs->ALM0 = pConfig->ALM0;
2919 pDevice->pRTCRegs->ALM1 = pConfig->ALM1;
2922 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDALM2MIR)
2923 pDevice->pRTCRegs->ALM2 = pConfig->ALM2;
2926 if(pDevice->pRTCRegs == pADI_RTC1)
2928 ALWAYS_PEND_BEFORE_WRITE(SR5,(BITM_RTC_SR5_WPENDCR2IC|BITM_RTC_SR5_WPENDCR3SS|BITM_RTC_SR5_WPENDCR4SS|BITM_RTC_SR5_WPENDSSMSK|BITM_RTC_SR5_WPENDSS1))
2929 pDevice->pRTCRegs->CR2IC = pConfig->CR2IC;
2930 pDevice->pRTCRegs->CR3SS = pConfig->CR3SS;
2931 pDevice->pRTCRegs->CR4SS = pConfig->CR4SS;
2932 pDevice->pRTCRegs->SSMSK = pConfig->SSMSK;
2933 pDevice->pRTCRegs->SS1 = pConfig->SS1;
2934 #if defined(__ADUCM4x50__) 2935 ALWAYS_PEND_BEFORE_WRITE(SR9,(BITM_RTC_SR9_WPENDCR5SSS|BITM_RTC_SR9_WPENDCR6SSS|BITM_RTC_SR9_WPENDCR7SSS|BITM_RTC_SR9_WPENDGPMUX0|BITM_RTC_SR9_WPENDGPMUX1))
2936 pDevice->pRTCRegs->CR5SSS = pConfig->CR5SSS;
2937 pDevice->pRTCRegs->CR6SSS = pConfig->CR6SSS;
2938 pDevice->pRTCRegs->CR7SSS = pConfig->CR7SSS;
2939 pDevice->pRTCRegs->GPMUX0 = pConfig->GPMUX0;
2940 pDevice->pRTCRegs->GPMUX1 = pConfig->GPMUX1;
2943 ALWAYS_SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCR0|BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1|BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2944 ALWAYS_SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCCR1MIR|BITM_RTC_SR2_WSYNCALM2MIR))
2945 ALWAYS_SYNC_AFTER_WRITE(SR4,(BITM_RTC_SR4_WSYNCCR2IC|BITM_RTC_SR4_WSYNCCR3SS|BITM_RTC_SR4_WSYNCCR4SS|BITM_RTC_SR4_WSYNCSSMSK|BITM_RTC_SR4_WSYNCSS1))
2946 #if defined(__ADUCM4x50__) 2947 ALWAYS_SYNC_AFTER_WRITE(SR8,(BITM_RTC_SR8_WSYNCCR5SSS|BITM_RTC_SR8_WSYNCCR6SSS|BITM_RTC_SR8_WSYNCCR7SSS|BITM_RTC_SR8_WSYNCGPMUX0|BITM_RTC_SR8_WSYNCGPMUX1))
2954 void RTC0_Int_Handler(
void)
2957 uint16_t nIntSrc0, nIntSrc2, nIntSrc3;
2958 uint32_t fired = 0u, enables = 0u;
2959 ADI_RTC_DEVICE *pDevice = aRTCDeviceInfo[0].hDevice;
2966 enables = (uint32_t)pDevice->pRTCRegs->CR0 & ADI_RTC_INT_ENA_MASK_CR0;
2968 if( nIntSrc0 && enables )
2970 if( (enables & BITM_RTC_CR0_MOD60ALMEN) && (nIntSrc0 & BITM_RTC_SR0_MOD60ALMINT))
2974 if( (enables & BITM_RTC_CR0_ALMINTEN) && (nIntSrc0 & BITM_RTC_SR0_ALMINT))
2978 if( (enables & BITM_RTC_CR0_ISOINTEN) && (nIntSrc0 & BITM_RTC_SR0_ISOINT))
2982 if( (enables & BITM_RTC_CR0_WPNDINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDINT))
2986 if( (enables & BITM_RTC_CR0_WSYNCINTEN) && (nIntSrc0 & BITM_RTC_SR0_WSYNCINT))
2990 if( (enables & BITM_RTC_CR0_WPNDERRINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDERRINT))
2997 enables = (uint32_t)pDevice->pRTCRegs->CR1 & ADI_RTC_INT_ENA_MASK_CR1;
2999 if( nIntSrc2 && enables )
3001 if( (enables & BITM_RTC_CR1_CNTROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTROLLINT))
3005 if( (enables & BITM_RTC_CR1_TRMINTEN) && (nIntSrc2 & BITM_RTC_SR2_TRMINT))
3009 if( (enables & BITM_RTC_CR1_PSINTEN) && (nIntSrc2 & BITM_RTC_SR2_PSINT))
3013 if( (enables & BITM_RTC_CR1_CNTINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTINT))
3020 enables = pDevice->pRTCRegs->CR3SS & (uint16_t)ADI_RTC_INT_ENA_MASK_CR3SS;
3022 if( nIntSrc3 && enables )
3024 #if defined(__ADUCM4x50__) 3025 if( (enables & BITM_RTC_CR3SS_SS4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4IRQ))
3029 if( (enables & BITM_RTC_CR3SS_SS3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3IRQ))
3033 if( (enables & BITM_RTC_CR3SS_SS2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2IRQ))
3039 if( (enables & BITM_RTC_CR3SS_SS1IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1IRQ))
3044 #if defined(__ADUCM4x50__) 3045 if( (enables & BITM_RTC_CR3SS_SS4FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4FEIRQ))
3049 if( (enables & BITM_RTC_CR3SS_SS3FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2FEIRQ))
3053 if( (enables & BITM_RTC_CR3SS_SS2FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3FEIRQ))
3057 if( (enables & BITM_RTC_CR3SS_SS1FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1FEIRQ))
3063 enables = pDevice->pRTCRegs->CR3SS & (uint16_t)ADI_RTC_INT_ENA_MASK_CR2IC;
3064 if( nIntSrc3 && enables )
3066 if( (enables & BITM_RTC_CR2IC_IC4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC4IRQ))
3070 if( (enables & BITM_RTC_CR2IC_IC3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC3IRQ))
3074 if( (enables & BITM_RTC_CR2IC_IC2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC2IRQ))
3078 if( (enables & BITM_RTC_CR2IC_IC0IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC0IRQ))
3085 if (pDevice->pfCallback != NULL) {
3091 pDevice->pfCallback (pDevice->pCBParam, fired, NULL);
3096 pDevice->pRTCRegs->SR0 = nIntSrc0;
3097 pDevice->pRTCRegs->SR2 = nIntSrc2;
3098 pDevice->pRTCRegs->SR3 = nIntSrc3;
3103 void RTC1_Int_Handler(
void)
3106 uint16_t nIntSrc0, nIntSrc2, nIntSrc3;
3107 uint32_t fired = 0u, enables = 0u;
3108 ADI_RTC_DEVICE *pDevice = aRTCDeviceInfo[1].hDevice;
3115 enables = (uint32_t)pDevice->pRTCRegs->CR0 & ADI_RTC_INT_ENA_MASK_CR0;
3117 if( nIntSrc0 && enables )
3119 if( (enables & BITM_RTC_CR0_MOD60ALMEN) && (nIntSrc0 & BITM_RTC_SR0_MOD60ALMINT))
3123 if( (enables & BITM_RTC_CR0_ALMINTEN) && (nIntSrc0 & BITM_RTC_SR0_ALMINT))
3127 if( (enables & BITM_RTC_CR0_ISOINTEN) && (nIntSrc0 & BITM_RTC_SR0_ISOINT))
3131 if( (enables & BITM_RTC_CR0_WPNDINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDINT))
3135 if( (enables & BITM_RTC_CR0_WSYNCINTEN) && (nIntSrc0 & BITM_RTC_SR0_WSYNCINT))
3139 if( (enables & BITM_RTC_CR0_WPNDERRINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDERRINT))
3146 enables = (uint32_t)pDevice->pRTCRegs->CR1 & ADI_RTC_INT_ENA_MASK_CR1;
3148 if( nIntSrc2 && enables )
3150 if( (enables & BITM_RTC_CR1_CNTMOD60ROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTMOD60ROLLINT))
3154 if( (enables & BITM_RTC_CR1_CNTROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTROLLINT))
3158 if( (enables & BITM_RTC_CR1_TRMINTEN) && (nIntSrc2 & BITM_RTC_SR2_TRMINT))
3162 if( (enables & BITM_RTC_CR1_PSINTEN) && (nIntSrc2 & BITM_RTC_SR2_PSINT))
3166 if( (enables & BITM_RTC_CR1_CNTINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTINT))
3173 enables = pDevice->pRTCRegs->CR3SS & (uint32_t)ADI_RTC_INT_ENA_MASK_CR3SS;
3175 if( nIntSrc3 && enables )
3177 #if defined(__ADUCM4x50__) 3178 if( (enables & BITM_RTC_CR3SS_SS4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4IRQ))
3182 if( (enables & BITM_RTC_CR3SS_SS3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3IRQ))
3186 if( (enables & BITM_RTC_CR3SS_SS2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2IRQ))
3191 if( (enables & BITM_RTC_CR3SS_SS1IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1IRQ))
3195 #if defined(__ADUCM4x50__) 3196 if( (enables & BITM_RTC_CR3SS_SS4FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4FEIRQ))
3200 if( (enables & BITM_RTC_CR3SS_SS3FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2FEIRQ))
3204 if( (enables & BITM_RTC_CR3SS_SS2FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3FEIRQ))
3208 if( (enables & BITM_RTC_CR3SS_SS1FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1FEIRQ))
3214 enables = pDevice->pRTCRegs->CR2IC & (uint32_t)ADI_RTC_INT_ENA_MASK_CR2IC;
3215 if( nIntSrc3 && enables )
3217 if( (enables & BITM_RTC_CR2IC_IC4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC4IRQ))
3221 if( (enables & BITM_RTC_CR2IC_IC3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC3IRQ))
3225 if( (enables & BITM_RTC_CR2IC_IC2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC2IRQ))
3229 if( (enables & BITM_RTC_CR2IC_IC0IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC0IRQ))
3235 if (pDevice->pfCallback != NULL) {
3241 pDevice->pfCallback (pDevice->pCBParam, fired, NULL);
3246 pDevice->pRTCRegs->SR0 |= nIntSrc0;
3247 pDevice->pRTCRegs->SR2 |= nIntSrc2;
3248 pDevice->pRTCRegs->SR3 |= nIntSrc3;
3253 #ifndef ADI_TIME_WA_21000023 3256 #define ADI_TIME_WA_21000023 (0) 3261 uint32_t cycleCountId_WA_21000023 = 0u;
3263 #if defined(ADUCM4050_SI_REV) && (ADUCM4050_SI_REV==0) && (WA_21000023!=0) 3266 #define ADI_WA_21000023_SAMPLES_NUMBER (3u) 3268 #define ADI_RTC_PRESCALE_POS (5u) 3271 #define ADI_RTC_PRESCALE_MSK (0x01E0u) 3294 #if (0!=ADI_TIME_WA_21000023) 3300 struct adi_rtc_snapshots snapshots[ADI_WA_21000023_SAMPLES_NUMBER];
3301 uint64_t samples[ADI_WA_21000023_SAMPLES_NUMBER];
3303 uint64_t prescale = 0u;
3306 size_t selectedSample = 2u;
3307 ADI_RTC_DEVICE *pDevice = hDevice;
3317 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
3320 ADI_INT_STATUS_ALLOC();
3321 ADI_ENTER_CRITICAL_REGION();
3323 #if (0!=ADI_TIME_WA_21000023) 3324 cycStart = DWT->CYCCNT;
3332 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3333 snapshots[0].snapshot0 = pDevice->pRTCRegs->SNAP0;
3334 snapshots[0].snapshot1 = pDevice->pRTCRegs->SNAP1;
3335 snapshots[0].snapshot2 = pDevice->pRTCRegs->SNAP2;
3342 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3343 snapshots[1].snapshot0 = pDevice->pRTCRegs->SNAP0;
3344 snapshots[1].snapshot1 = pDevice->pRTCRegs->SNAP1;
3345 snapshots[1].snapshot2 = pDevice->pRTCRegs->SNAP2;
3352 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3353 snapshots[2].snapshot0 = pDevice->pRTCRegs->SNAP0;
3354 snapshots[2].snapshot1 = pDevice->pRTCRegs->SNAP1;
3355 snapshots[2].snapshot2 = pDevice->pRTCRegs->SNAP2;
3357 #if (0!=ADI_TIME_WA_21000023) 3358 cycEnd = DWT->CYCCNT;
3362 rtc_cr1 = pDevice->pRTCRegs->CR1;
3365 ADI_EXIT_CRITICAL_REGION();
3377 if (aRTCDeviceInfo[0].pRTCRegs != pDevice->pRTCRegs)
3380 prescale = (rtc_cr1 & ADI_RTC_PRESCALE_MSK) >> ADI_RTC_PRESCALE_POS;
3383 mask = (1llu << prescale) - 1llu;
3389 for (i=0u; i<ADI_WA_21000023_SAMPLES_NUMBER; i++)
3391 samples[i] = ( ( (((uint64_t) snapshots[i].snapshot1) << (uint64_t) 16u)
3392 | ((uint64_t) snapshots[i].snapshot0)
3395 | (((uint64_t) snapshots[i].snapshot2) & mask)
3409 if ( (! ((samples[2] == samples[1]) || (samples[2] == (samples[1] + 1llu))))
3410 && (! ((samples[2] == samples[0]) || (samples[2] == (samples[0] + 1llu))))
3415 if ((samples[1] == samples[0]) || (samples[1] == (samples[0] + 1llu)))
3418 selectedSample = 1u;
3429 #if (0!=ADI_TIME_WA_21000023) 3437 if (cycStart < cycEnd)
3439 cycleCountId_WA_21000023 = cycEnd - cycStart;
3443 cycleCountId_WA_21000023 = 0xFFFFFFFFu - cycStart + cycEnd;
3449 *pSnapshots = snapshots[selectedSample];
3468 ADI_RTC_DEVICE *pDevice = hDevice;
3469 struct adi_rtc_snapshots snapshots;
3470 #if (0!=ADI_TIME_WA_21000023) 3485 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
3488 ADI_INT_STATUS_ALLOC();
3489 ADI_ENTER_CRITICAL_REGION();
3491 #if (0!=ADI_TIME_WA_21000023) 3492 cycStart = DWT->CYCCNT;
3500 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3501 snapshots.snapshot0 = pDevice->pRTCRegs->SNAP0;
3502 snapshots.snapshot1 = pDevice->pRTCRegs->SNAP1;
3503 snapshots.snapshot2 = pDevice->pRTCRegs->SNAP2;
3505 #if (0!=ADI_TIME_WA_21000023) 3506 cycEnd = DWT->CYCCNT;
3510 ADI_EXIT_CRITICAL_REGION();
3512 #if (0!=ADI_TIME_WA_21000023) 3520 if (cycStart < cycEnd)
3522 cycleCountId_WA_21000023 = cycEnd - cycStart;
3526 cycleCountId_WA_21000023 = 0xFFFFFFFFu - cycStart + cycEnd;
3531 *pSnapshots = snapshots;
#define ADI_RTC_SENSOR_STROBE_CH4_INT
#define ADI_RTC_RTCSS2_FE_INT
ADI_RTC_RESULT adi_rtc_ClearInterruptStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE Status)
Clear an RTC interrupt status bit(s).
#define ADI_RTC_INPUT_CAPTURE_CH4_INT
ADI_RTC_RESULT adi_rtc_GetInputCaptureValueEx(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint16_t *pSnap0, uint16_t *pSnap1, uint16_t *pSnap2)
Get input capture value for specified input channel.
#define ADI_RTC_RTCSS3_FE_INT
#define ADI_RTC_WRITE_PEND_INT
ADI_RTC_RESULT adi_rtc_GetCount(ADI_RTC_HANDLE const hDevice, uint32_t *pCount)
Get current RTC count value.
#define ADI_RTC_SENSOR_STROBE_CH1_INT
ADI_RTC_RESULT adi_rtc_SetSensorStrobeValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t nValue)
Set Sensor Strobe value for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_SetGateway(ADI_RTC_HANDLE const hDevice, uint16_t Command)
Set an RTC gateway command.
#define ADI_RTC_IRQ_SOURCE_MASK_SR0
ADI_RTC_RESULT adi_rtc_Close(ADI_RTC_HANDLE const hDevice)
Uninitialize and deallocate an RTC device.
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR2
#define ADI_RTC_SENSOR_STROBE_CH3_INT
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR3
ADI_RTC_RESULT adi_rtc_SetAlarm(ADI_RTC_HANDLE const hDevice, uint32_t nAlarm)
Set a new RTC alarm value.
#define ADI_RTC_RTCSS4_FE_INT
ADI_RTC_RESULT adi_rtc_GetTrim(ADI_RTC_HANDLE hDevice, ADI_RTC_TRIM_VALUE *peTrim)
Get current RTC clock trim value.
uint32_t ADI_RTC_INT_TYPE
ADI_RTC_RESULT adi_rtc_GetInterruptStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE *pStatus)
Get current RTC interrupt source status.
#define ADI_RTC_ISO_DONE_INT
ADI_RTC_RESULT adi_rtc_SetAlarmRegsAsync(ADI_RTC_HANDLE const hDevice, uint16_t nAlarm0, uint16_t nAlarm1, uint16_t nAlarm2)
Set a new RTC alarm value for RTC ALM0, ALM1 and ALM2 Registers without waiting for synchronization.
ADI_RTC_RESULT adi_rtc_SynchronizeAllWrites(ADI_RTC_HANDLE const hDevice)
Force synchronization of all pending writes.
ADI_RTC_RESULT adi_rtc_GetInputCaptureValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint16_t *pValue)
Get input capture value for specified input channel.
#define ADI_RTC_INPUT_CAPTURE_CH0_INT
#define ADI_RTC0_IRQ_SOURCE_MASK_SR2
#define ADI_RTC_SENSOR_STROBE_CH2_INT
#define ADI_RTC_ALARM_INT
ADI_RTC_RESULT adi_rtc_GetSensorStrobeValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t *pValue)
Get Sensor Strobe value for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_GetCountRegs(ADI_RTC_HANDLE const hDevice, uint32_t *pnCount, uint32_t *pfCount)
Get current RTC count value of all registers.
ADI_RTC_RESULT adi_rtc_GetWriteSyncStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_WRITE_STATUS *pSyncBits)
Get current RTC posted write synchronization status.
ADI_RTC_RESULT adi_rtc_SyncAlarm(ADI_RTC_HANDLE const hDevice)
Sync after writing RTC alarm registers.
ADI_RTC_RESULT adi_rtc_SetTrim(ADI_RTC_HANDLE const hDevice, ADI_RTC_TRIM_INTERVAL eInterval, ADI_RTC_TRIM_VALUE eTrimValue, ADI_RTC_TRIM_POLARITY eOperation)
Set a new RTC trim value.
ADI_RTC_RESULT adi_rtc_GetCountEx(ADI_RTC_HANDLE const hDevice, float *pfCount)
Get current RTC count value with fraction.
ADI_RTC_RESULT adi_rtc_Open(uint32_t DeviceNumber, void *pDeviceMemory, uint32_t MemorySize, ADI_RTC_HANDLE *phDevice)
RTC Initialization.
#define ADI_RTC_INPUT_CAPTURE_CH2_INT
ADI_RTC_RESULT adi_rtc_SetAutoReloadValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t nLowValue, uint16_t nHighValue)
Set auto reload value for the given Sensor Strobe channel.
#define ADI_RTC_IRQ_SOURCE_MASK_SR3
ADI_RTC_RESULT adi_rtc_SetPreScale(ADI_RTC_HANDLE const hDevice, uint8_t nPreScale)
Set Prescale. This is power of 2 division factor for the RTC base clock.
#define ADI_RTC1_IRQ_SOURCE_MASK_SR2
ADI_RTC_RESULT adi_rtc_EnableMod60Alarm(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable MOD60 RTC alarm.
#define ADI_RTC_MOD60ALM_INT
ADI_RTC_RESULT adi_rtc_GetAlarmEx(ADI_RTC_HANDLE hDevice, float *pAlarm)
Get current RTC alarm value with fractional part also.
ADI_RTC_RESULT adi_rtc_EnableTrim(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC automatic clock trimming.
#define ADI_RTC_COUNT_INT
ADI_RTC_RESULT adi_rtc_GetAlarmRegs(ADI_RTC_HANDLE hDevice, uint16_t *pAlarm0, uint16_t *pAlarm1, uint16_t *pAlarm2)
Get current RTC alarm value from RTC Alarm register.
ADI_RTC_RESULT adi_rtc_RegisterCallback(ADI_RTC_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void *const pCBparam)
Registers a Callback function with the RTC device driver. The registered call back function will be c...
ADI_RTC_RESULT adi_rtc_SetInputCapturePolarity(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eInpChannel, bool bEnable)
Set input capture polarity for the specified channel.
#define ADI_RTC_INPUT_CAPTURE_CH3_INT
#define ADI_RTC_NUM_INTERRUPTS
ADI_RTC_RESULT adi_rtc_SetAlarmAsync(ADI_RTC_HANDLE const hDevice, uint32_t nAlarm)
Set a new RTC alarm value without waiting for synchronization.
ADI_RTC_RESULT adi_rtc_GetControl(ADI_RTC_HANDLE hDevice, ADI_RTC_CONTROL_REGISTER eRegister, uint32_t *pControl)
Get current RTC control register value.
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR0
#define ADI_RTC_WRITE_PENDERR_INT
ADI_RTC_RESULT adi_rtc_EnableInputCapture(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eInpChannel, bool bEnable)
Enable input capture for the specified channel.
ADI_RTC_RESULT adi_rtc_SetAlarmEx(ADI_RTC_HANDLE const hDevice, float fAlarm)
Set a new RTC alarm value with fractional value.
#define ADI_RTC_MOD60_ROLLOVER_INT
ADI_RTC_RESULT adi_rtc_Enable(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC device.
ADI_RTC_RESULT adi_rtc_EnableAlarm(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC alarm.
ADI_RTC_RESULT adi_rtc_SetSensorStrobeChannelMask(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint8_t nMask)
To set channel mask for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_SetControlRegister(ADI_RTC_HANDLE const hDevice, ADI_RTC_CONTROL_REGISTER eRegister, uint32_t Control)
Set a new RTC control register value.
#define ADI_RTC_COUNT_ROLLOVER_INT
ADI_RTC_RESULT adi_rtc_GetSnapShot(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint32_t *pValue, uint16_t *pFraction)
Read RTC snapshot registers values.
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeOutput(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable output for the specified Sensor Strobe Channel.
#define ADI_RTC_RTCSS1_FE_INT
ADI_RTC_RESULT adi_rtc_EnableAutoReload(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable auto reload for given Sensor Strobe Channel.
ADI_RTC_RESULT adi_rtc_GetAlarm(ADI_RTC_HANDLE hDevice, uint32_t *pAlarm)
Get current RTC alarm value.
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeChannelMask(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable or disable thermometer-code masking for the given Sensor Strobe Channel.
#define ADI_RTC_MEMORY_SIZE
ADI_RTC_RESULT adi_rtc_GetWritePendStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_WRITE_STATUS *pPendBits)
Get current RTC posted write pending status.
ADI_RTC_RESULT adi_rtc_GetISOENB(ADI_RTC_HANDLE const hDevice, uint16_t *pValue)
Get the value of the ISOENB bit.
ADI_RTC_RESULT adi_rtc_SetCount(ADI_RTC_HANDLE const hDevice, uint32_t nCount)
Set a new RTC count value.
ADI_RTC_RESULT adi_rtc_SetMod60AlarmPeriod(ADI_RTC_HANDLE const hDevice, uint8_t nPeriod)
Set the modulo-60 alarm value. This positions a periodic (repeating) alarm interrupt from the RTC at ...
ADI_RTC_RESULT adi_rtc_SetAlarmRegs(ADI_RTC_HANDLE const hDevice, uint16_t nAlarm0, uint16_t nAlarm1, uint16_t nAlarm2)
Set a new RTC alarm value for RTC ALM0,ALM1 and ALM2 Register.
ADI_RTC_RESULT adi_rtc_EnableInterrupts(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE Interrupts, bool bEnable)
Manage interrupt enable/disable in the RTC and NVIC controller.
#define ADI_RTC_WRITE_SYNC_INT
ADI_RTC_RESULT adi_rtc_EnableOverwriteSnapshot(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable Overwrite of Unread Snapshots for all RTC Input Capture Channels.