29 #include <adi_processor.h> 34 #include <drivers/general/adi_drivers_general.h> 35 #include <drivers/i2c/adi_i2c.h> 39 #include <drivers/pwr/adi_pwr.h> 63 #pragma diag_suppress=Pm011,Pm123,Pm073,Pm143,Pm088,Pm140 67 #include "adi_i2c_data.c" 71 uint16_t uZero16 = 0u;
74 #define I2C_BUSY (uZero16 != ((hDevice->pDev->MSTAT) & (uint16_t)(BITM_I2C_MSTAT_MBUSY | BITM_I2C_MSTAT_LINEBUSY))) 79 #define READ_NOT_WRITE (1u) 83 extern void I2C0_Master_Int_Handler(
void);
86 #define I2C_GPIO_PORT0_DS4 ((uint16_t) ((uint16_t) 1<<4)) 87 #define I2C_GPIO_PORT0_DS5 ((uint16_t) ((uint16_t) 1<<5)) 89 #define ADI_ADUCM302X_CHIPID_SI_1_2 0x284u 92 #if defined(ADI_DEBUG) 100 if ((i2c_device_info[0].hDevice != (hDevice)) && ((hDevice)->pDevInfo->hDevice != NULL)) {
108 #if defined(__ADUCM302x__) 109 static ADI_SYS_REGISTERS adi_sys_base = { pADI_SYS };
155 #if defined(__ADUCM302x__) 162 ADI_SYS_REGISTERS *sys = &adi_sys_base;
164 if( sys->pReg->CHIPID == ADI_ADUCM302X_CHIPID_SI_1_2 )
166 *((
volatile uint32_t *)REG_GPIO0_DS) |= ( I2C_GPIO_PORT0_DS4 | I2C_GPIO_PORT0_DS5 );
170 #if defined(ADI_DEBUG) 172 if (DeviceNum >= (uint32_t)ADI_I2C_NUM_INSTANCES) {
177 if (i2c_device_info[DeviceNum].hDevice != NULL) {
202 i2c_device_info[DeviceNum].hDevice = (ADI_I2C_DEV_DATA_TYPE *)pMemory;
203 memset(pMemory, 0, MemorySize);
206 hDevice->pDevInfo = &i2c_device_info[DeviceNum];
213 hDevice->pDev = i2c_device_info[DeviceNum].pDev;
216 hDevice->pDevInfo->pConfig = (ADI_I2C_CONFIG*)&gConfigInfo[DeviceNum];
251 if (IsDeviceHandle(hDevice)) {
264 hDevice->pDevInfo->hDevice = NULL;
328 if (IsDeviceHandle(hDevice)) {
335 if ((NULL == pTransaction->
pData) || (0u == pTransaction->
nDataSize)) {
341 hDevice->bSubmitCalled =
false;
344 submitTransaction(hDevice, pTransaction);
360 *pHwErrors = hDevice->hwErrors;
361 if (0u != hDevice->hwErrors) {
364 }
else if (pTransaction->
nDataSize > 0 && pTransaction->
bReadNotWrite && (hDevice->pDev->ADDR1 & 0x1) == 0) {
370 return hDevice->result;
426 if (IsDeviceHandle(hDevice)) {
433 if ((NULL == pTransaction->
pData) || (0u == pTransaction->
nDataSize)) {
439 hDevice->bSubmitCalled =
true;
442 submitTransaction(hDevice, pTransaction);
445 return hDevice->result;
487 if (IsDeviceHandle(hDevice)) {
493 if (
false == hDevice->bSubmitCalled) {
499 *pbCompletionState =
false;
501 *pbCompletionState =
true;
522 if (IsDeviceHandle(hDevice)) {
527 *pDataCount = hDevice->nBytesProcessed;
570 if (IsDeviceHandle(hDevice)) {
576 if (
false == hDevice->bSubmitCalled) {
589 *pHwErrors = hDevice->hwErrors;
590 if (0u != hDevice->hwErrors) {
596 return hDevice->result;
613 if (IsDeviceHandle(hDevice)) {
618 *pHwMaskedErrors = hDevice->hwMaskedErrors;
637 if (IsDeviceHandle(hDevice)) {
649 return i2cReset(hDevice);
678 uint32_t clockFrequency32, halfClock32;
679 uint16_t halfClock16;
680 uint16_t highTime16, lowTime16;
683 if (IsDeviceHandle(hDevice)) {
702 halfClock32 = (clockFrequency32 / requestedBitRate32) >> 1;
705 halfClock16 = (uint16_t)(halfClock32 & 0x0000ffffu);
708 if (halfClock32 != halfClock16) {
713 highTime16 = halfClock16 - 7u;
714 lowTime16 = halfClock16 - 1u;
717 highTime16 <<= BITP_I2C_DIV_HIGH;
718 lowTime16 <<= BITP_I2C_DIV_LOW;
721 if ( (uZero16 != ((uint16_t)highTime16 & (uint16_t)(~(BITM_I2C_DIV_HIGH))))
723 (uZero16 != ((uint16_t)lowTime16 & (uint16_t)(~(BITM_I2C_DIV_LOW))))
729 hDevice->pDev->DIV = highTime16 | lowTime16;
758 if (IsDeviceHandle(hDevice)) {
767 if (uZero16 != (SlaveAddress & (uint16_t)(~(BITM_I2C_ADDR1_VALUE >> 1)))) {
772 hDevice->i2cDeviceAddress = SlaveAddress;
791 if (IsDeviceHandle(hDevice)) {
804 hDevice->hwMaskedErrors = eMaskedErrors;
847 if (IsDeviceHandle(hDevice)) {
856 uint16_t savedSlaveAddress = hDevice->i2cDeviceAddress;
857 hDevice->i2cDeviceAddress = 0u;
871 hDevice->i2cDeviceAddress = savedSlaveAddress;
876 return hDevice->result;
895 if (IsDeviceHandle(hDevice)) {
900 uint16_t mctl = hDevice->pDev->MCTL;
903 mctl |= BITM_I2C_MCTL_BUSCLR;
905 mctl &= (~BITM_I2C_MCTL_BUSCLR);
909 mctl |= BITM_I2C_MCTL_STOPBUSCLR;
911 mctl &= (~BITM_I2C_MCTL_STOPBUSCLR);
914 hDevice->pDev->MCTL = mctl;
935 hDevice->nBytesProcessed = 0;
943 hDevice->pNextPrologueByte = pTransaction->
pPrologue;
944 hDevice->remainingPrologueCount = pTransaction->
nPrologueSize;
948 hDevice->i2cEncodedDeviceAddress = (hDevice->i2cDeviceAddress & (BITM_I2C_ADDR1_VALUE >> 1)) << 1;
954 hDevice->pNextReadByte = pTransaction->
pData;
955 hDevice->remainingReadCount = pTransaction->
nDataSize;
956 hDevice->pNextWriteByte = NULL;
957 hDevice->remainingWriteCount = 0u;
960 hDevice->i2cEncodedDeviceAddress |= READ_NOT_WRITE;
963 commenceReceive(hDevice);
968 hDevice->pNextReadByte = NULL;
969 hDevice->remainingReadCount = 0u;
970 hDevice->pNextWriteByte = pTransaction->
pData;
971 hDevice->remainingWriteCount = pTransaction->
nDataSize;
974 hDevice->i2cEncodedDeviceAddress &= (~READ_NOT_WRITE);
977 commenceTransmit(hDevice);
987 NVIC_EnableIRQ(hDevice->pDevInfo->pioIRQn);
990 hDevice->pDev->MCTL |= (BITM_I2C_MCTL_IENMTX | BITM_I2C_MCTL_MASEN);
993 uint16_t writableBytes = 2u - ((hDevice->pDev->STAT & (uint16_t)BITM_I2C_STAT_MTXF) >> BITP_I2C_STAT_MTXF);
996 while ((hDevice->remainingPrologueCount) && (0u < writableBytes)) {
997 hDevice->pDev->MTX = *hDevice->pNextPrologueByte;
998 hDevice->pNextPrologueByte++;
999 hDevice->remainingPrologueCount--;
1004 while ((hDevice->remainingWriteCount) && (0u < writableBytes) ) {
1005 hDevice->pDev->MTX = *hDevice->pNextWriteByte;
1006 hDevice->pNextWriteByte++;
1007 hDevice->remainingWriteCount--;
1008 hDevice->nBytesProcessed++;
1013 hDevice->pDev->ADDR1 = hDevice->i2cEncodedDeviceAddress;
1024 NVIC_EnableIRQ(hDevice->pDevInfo->pioIRQn);
1027 hDevice->pDev->MCTL |= (uint16_t)(BITM_I2C_MCTL_IENMRX | BITM_I2C_MCTL_MASEN);
1030 if (hDevice->remainingReadCount > BITM_I2C_MRXCNT_EXTEND) {
1031 hDevice->pDev->MRXCNT = BITM_I2C_MRXCNT_EXTEND;
1032 hDevice->remainingReadCount -= BITM_I2C_MRXCNT_EXTEND;
1034 hDevice->pDev->MRXCNT = hDevice->remainingReadCount - 1u;
1035 hDevice->remainingReadCount = 0u;
1039 if (hDevice->remainingPrologueCount) {
1042 hDevice->pDev->MCTL |= BITM_I2C_MCTL_IENMTX;
1045 uint16_t writableBytes = 2u - ((hDevice->pDev->STAT & (uint16_t)BITM_I2C_STAT_MTXF) >> BITP_I2C_STAT_MTXF);
1048 while ((hDevice->remainingPrologueCount) && (0u < writableBytes)) {
1049 hDevice->pDev->MTX = *hDevice->pNextPrologueByte;
1050 hDevice->pNextPrologueByte++;
1051 hDevice->remainingPrologueCount--;
1057 hDevice->pDev->ADDR1 = hDevice->i2cEncodedDeviceAddress & (uint16_t)(~READ_NOT_WRITE);
1062 hDevice->pDev->ADDR1 = hDevice->i2cEncodedDeviceAddress;
1070 volatile uint16_t temp;
1072 NVIC_DisableIRQ(hDevice->pDevInfo->pioIRQn);
1075 temp = hDevice->pDev->MSTAT;
1076 hDevice->pDev->MSTAT = temp;
1079 while (uZero16 != (hDevice->pDev->STAT & (uint16_t)BITM_I2C_STAT_MRXF)) {
1080 volatile uint16_t delme ADI_UNUSED_ATTRIBUTE = hDevice->pDev->MTX;
1084 hDevice->pDev->MCTL = 0u;
1087 hDevice->pDev->SHCTL = 1u;
1090 hDevice->pDev->MCTL = hDevice->pDevInfo->pConfig->MasterControlRegister;
1091 hDevice->pDev->DIV = hDevice->pDevInfo->pConfig->ClockDividerRegister;
1092 hDevice->pDev->SHCTL = hDevice->pDevInfo->pConfig->SharedControlRegister;
1093 hDevice->pDev->TCTL = hDevice->pDevInfo->pConfig->TimingControlRegister;
1094 hDevice->pDev->ASTRETCH_SCL = hDevice->pDevInfo->pConfig->ClockStretchRegister;
1095 hDevice->i2cDeviceAddress = hDevice->pDevInfo->pConfig->TargetSlaveAddress;
1111 uint16_t writableBytes = 2u - ((hDevice->pDev->STAT & (uint16_t)BITM_I2C_STAT_MTXF) >> BITP_I2C_STAT_MTXF);
1114 while ((hDevice->remainingPrologueCount) && (0u < writableBytes)) {
1115 hDevice->pDev->MTX = *hDevice->pNextPrologueByte;
1116 hDevice->pNextPrologueByte++;
1117 hDevice->remainingPrologueCount--;
1122 if (0u == hDevice->remainingPrologueCount) {
1125 if (0u < hDevice->remainingReadCount) {
1128 hDevice->pDev->ADDR1 = hDevice->i2cEncodedDeviceAddress;
1133 while ((hDevice->remainingWriteCount) && (0u < writableBytes)) {
1134 hDevice->pDev->MTX = *hDevice->pNextWriteByte;
1135 hDevice->pNextWriteByte++;
1136 hDevice->remainingWriteCount--;
1137 hDevice->nBytesProcessed++;
1148 if ((0u == hDevice->remainingPrologueCount) && (0 == hDevice->remainingWriteCount)) {
1149 const uint16_t bit_IENMTX = (uint16_t) BITM_I2C_MCTL_IENMTX;
1150 const uint16_t mctl = hDevice->pDev->MCTL & ~bit_IENMTX;
1151 hDevice->pDev->MCTL = mctl;
1155 if (0u == hDevice->remainingWriteCount) {
1156 hDevice->pDev->MSTAT = BITM_I2C_MSTAT_MTXREQ;
1166 uint16_t readableBytes = (hDevice->pDev->STAT & (uint16_t)BITM_I2C_STAT_MRXF) >> BITP_I2C_STAT_MRXF;
1169 while (0u < readableBytes) {
1172 hDevice->nBytesProcessed++;
1175 *hDevice->pNextReadByte = (uint8_t)hDevice->pDev->MRX;
1176 hDevice->pNextReadByte++;
1178 if (0u == hDevice->pDev->MCRXCNT) {
1181 if (hDevice->remainingReadCount > BITM_I2C_MRXCNT_EXTEND) {
1183 hDevice->pDev->MRXCNT = BITM_I2C_MRXCNT_EXTEND;
1184 hDevice->remainingReadCount -= BITM_I2C_MRXCNT_EXTEND;
1186 if (hDevice->remainingReadCount) {
1188 hDevice->pDev->MRXCNT = hDevice->remainingReadCount - 1u;
1189 hDevice->remainingReadCount = 0u;
1206 NVIC_DisableIRQ(hDevice->pDevInfo->pioIRQn);
1209 hDevice->pDev->MCTL = (uint16_t)gConfigInfo->MasterControlRegister;
1218 if (uZero16 != (hDevice->hwStatus & (uint16_t)BITM_I2C_MSTAT_NACKADDR)) {
1222 if (uZero16 != (hDevice->hwStatus & (uint16_t)BITM_I2C_MSTAT_NACKDATA)) {
1226 if (uZero16 != (hDevice->hwStatus & (uint16_t)BITM_I2C_MSTAT_ALOST)) {
1230 if (uZero16 != (hDevice->hwStatus & (uint16_t) BITM_I2C_MSTAT_MRXOVR)) {
1234 if (uZero16 != (hDevice->hwStatus & (uint16_t) BITM_I2C_MSTAT_MTXUNDR)) {
1239 hDevice->hwErrors &= ~hDevice->hwMaskedErrors;
1255 void I2C0_Master_Int_Handler(
void) {
1265 hDevice->hwStatus = hDevice->pDev->MSTAT;
1268 if (hDevice->bRepeatStart) {
1269 hDevice->pDev->ADDR1 = hDevice->i2cEncodedDeviceAddress;
1270 hDevice->bRepeatStart =
false;
1274 if (uZero16 != (hDevice->hwStatus & (uint16_t)BITM_I2C_MSTAT_MTXREQ)) {
1275 transmitHandler(hDevice);
1279 if (uZero16 != (hDevice->hwStatus & (uint16_t)BITM_I2C_MSTAT_MRXREQ)) {
1280 receiveHandler(hDevice);
1284 if (uZero16 != (hDevice->hwStatus & ADI_I2C_STATUS_ERROR_MASK)) {
1285 errorHandler(hDevice);
1289 if (uZero16 != (hDevice->hwStatus & BITM_I2C_MSTAT_TCOMP)) {
1290 completeHandler(hDevice);
ADI_I2C_RESULT adi_i2c_IssueGeneralCall(ADI_I2C_HANDLE const hDevice, uint8_t *const pData, uint8_t const nDataSize, uint32_t *const pHwErrors)
Transmit a General Call command to all slave devices on the I2C bus.
ADI_I2C_RESULT adi_i2c_Open(uint32_t const DeviceNum, void *const pMemory, uint32_t const MemorySize, ADI_I2C_HANDLE *const phDevice)
Initialize and allocate an I2C device for use in Master Mode.
ADI_I2C_RESULT adi_i2c_ReadWrite(ADI_I2C_HANDLE const hDevice, ADI_I2C_TRANSACTION *const pTransaction, uint32_t *const pHwErrors)
Blocking I2C Master-Mode data read/write API.
ADI_I2C_RESULT adi_i2c_IsBufferAvailable(ADI_I2C_HANDLE const hDevice, bool *const pbCompletionState)
Query if a non-blocking I2C transfer is complete.
#define ADI_I2C_MEMORY_SIZE
ADI_I2C_RESULT adi_i2c_SetBusClear(ADI_I2C_HANDLE const hDevice, const bool busClr, const bool stopBusClr)
Assign BUSCLR and STOPBUSCLR bit values.
ADI_I2C_RESULT adi_i2c_GetHWMaskedErrors(ADI_I2C_HANDLE const hDevice, uint16_t *pHwMaskedErrors)
Get the errors that have been masked out.
struct __ADI_I2C_DEV_DATA_TYPE * ADI_I2C_HANDLE
ADI_I2C_RESULT adi_i2c_SetBitRate(ADI_I2C_HANDLE const hDevice, uint32_t const requestedBitRate32)
Set the I2C serial bus speed.
ADI_I2C_RESULT adi_i2c_Reset(ADI_I2C_HANDLE const hDevice)
Reset an I2C device and driver instance.
ADI_PWR_RESULT adi_pwr_GetClockFrequency(const ADI_CLOCK_ID eClockId, uint32_t *pClock)
Get the frequency of the given clock. Obtain individual peripheral clock frequencies.
ADI_I2C_RESULT adi_i2c_GetNumberOfDataProcessed(ADI_I2C_HANDLE const hDevice, uint32_t *pDataCount)
Get the number of data written into MTX or read from MRX following the transmission/reception of a tr...
ADI_I2C_RESULT adi_i2c_SetHWMaskedErrors(ADI_I2C_HANDLE const hDevice, ADI_I2C_HW_ERRORS eMaskedErrors)
Mask out errors. Errors will not be reported.
ADI_I2C_RESULT adi_i2c_SetSlaveAddress(ADI_I2C_HANDLE const hDevice, uint16_t const SlaveAddress)
Set the I2C serial bus slave address.
ADI_I2C_RESULT adi_i2c_SubmitBuffer(ADI_I2C_HANDLE const hDevice, ADI_I2C_TRANSACTION *const pTransaction)
Non-Blocking I2C Master-Mode data read or data write API.
ADI_I2C_RESULT adi_i2c_Close(ADI_I2C_HANDLE const hDevice)
Uninitialize and deallocate an I2C device.
ADI_I2C_RESULT adi_i2c_GetBuffer(ADI_I2C_HANDLE const hDevice, uint32_t *const pHwErrors)
Request ownership of a submitted buffer.