ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
adi_pwr.h
1 
19 #ifndef ADI_PWR_H
20 #define ADI_PWR_H
21 
22 #include <adi_callback.h>
23 #include <adi_processor.h>
24 #include <stdbool.h>
25 
26 #ifdef __ICCARM__
27 /* IAR MISRA C 2004 error suppressions.
28  *
29  * Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
30  * IAR compiler supports longer identifiers.
31  * Pm011 (rule 6.3): The basic types of char, int, long, float cannot be used.
32  * bool is used in the APIs as it is not affending the rule. Disabling this as IAR treats it as an error.
33  */
34 #pragma diag_suppress=Pm009,Pm011
35 #endif /* __ICCARM__ */
36 
37 #ifdef __cplusplus
38  extern "C" {
39 #endif
40 
42 typedef enum {
49 
50 } ADI_CLOCK_ID;
51 
53 typedef enum {
67 
68 
76 typedef enum {
77 
82 
83 #if defined(__ADUCM4x50__)
84 
86 #endif
87 
92 
104 
113 
115 
116 
120 typedef enum {
129 
131 
135 typedef enum
136 {
139 
142 
145 
148 
151 
154 
157 
160 
163 
166 
169 
172 
175 
178 
181 
184 
186 
187 
189 typedef enum {
191  ADI_CLOCK_GATE_GPT0_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK0OFF,
193  ADI_CLOCK_GATE_GPT1_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK1OFF,
195  ADI_CLOCK_GATE_GPT2_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK2OFF,
197  ADI_CLOCK_GATE_I2C_CLK = 1 << BITP_CLKG_CLK_CTL5_UCLKI2COFF,
199  ADI_CLOCK_GATE_GPIO_CLK = 1 << BITP_CLKG_CLK_CTL5_GPIOCLKOFF,
201  ADI_CLOCK_GATE_PCLK = 1 << BITP_CLKG_CLK_CTL5_PERCLKOFF,
202 
203 #if defined(__ADUCM4x50__)
204 
205  ADI_CLOCK_GATE_TMR_RGB_CLK = 1 << BITP_CLKG_CLK_CTL5_TMRRGBCLKOFF
206 #endif
207 
209 
210 #if defined(__ADUCM4x50__)
211 
214 typedef enum
215 {
228 
230 #endif /* __ADUCM4x50__ */
231 
236 typedef enum
237 {
260 
262 
266 typedef enum
267 {
269  ADI_PWR_MODE_FLEXI = 0 << BITP_PMG_PWRMOD_MODE,
271  ADI_PWR_MODE_ACTIVE = 1 << BITP_PMG_PWRMOD_MODE,
273  ADI_PWR_MODE_HIBERNATE = 2 << BITP_PMG_PWRMOD_MODE,
275  ADI_PWR_MODE_SHUTDOWN = 3 << BITP_PMG_PWRMOD_MODE
276 
278 
279 
283 typedef enum
284 {
286  ADI_PWR_LOW_BATTERY_VOLTAGE_IEN = 1 << BITP_PMG_IEN_VBAT,
288  ADI_PWR_UNDER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGUNDR,
290  ADI_PWR_OVER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGOVR,
292  ADI_PWR_BATTERY_VOLTAGE_RANGE_IEN = 1 << BITP_PMG_IEN_IENBAT
293 
295 
296 
300 typedef enum
301 {
302 #if defined(__ADUCM4x50__)
303 
304  ADI_PWR_ROOT_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_ROOT_MON_EN,
306  ADI_PWR_LFXTAL_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_LFX_MON_EN,
308  ADI_PWR_LFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_LFXTALIE,
310  ADI_PWR_HFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_HFXTALIE,
312  ADI_PWR_PLL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL3_SPLLIE
313 #elif defined(__ADUCM302x__)
314 
315  ADI_PWR_LFXTAL_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_LFXTAL_MON_EN,
317  ADI_PWR_LFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_LFXTALIE,
319  ADI_PWR_HFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_HFXTALIE,
321  ADI_PWR_PLL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL3_SPLLIE
322 #endif
323 
325 
329 typedef enum
330 {
335 
338 
339 #if defined(__ADUCM4x50__)
340 
346 
355 #endif
356 
370 
371 } ADI_PWR_EVENT;
372 
373 
377 typedef enum
378 {
387 
389 
393 typedef enum
394 {
402 
403 #if defined(__ADUCM4x50__)
404 
408 typedef enum
409 {
413 
417 
419 #endif /* __ADUCM4x50__ */
420 
421 /* Related clock APIs */
422 
423 /*
424  * Initialize the dynamic power management service
425  */
427 
428 /*
429  * =================================================================
430  * Clock Management related APIs
431  * =================================================================
432 */
433 
434 /*
435  * Update the internal clock variable based on current configuration
436  */
438 
439 /*
440  * Set the external clock frequency.
441  */
443  const uint32_t ExtClkFreq
444  );
445 
446 /*
447  * To Configure the root clock muxing
448  */
450  const ADI_CLOCK_MUX_ID eClockID
451  );
452 
453 /*
454  * To Configure the root clock muxing
455  */
457  const ADI_CLOCK_MUX_ID eClockID
458  );
459 
460 /*
461  * To Configure the root clock muxing
462  */
464  const ADI_CLOCK_MUX_ID eClockID
465  );
466 
467 #if defined(__ADUCM4x50__)
468 /*
469  * To Enable/Disable the LFXTAL Fail Auto switch.
470  */
472  const bool bEnable
473  );
474 
475 
476 /*
477  * To enable/disable auto switching of root clock to HFOSC upon detection
478  * of Root clock failure.
479  */
481  const bool bEnable
482  );
483 
484 /*
485  * To set the HF Oscillator divide factor
486  */
488  const ADI_PWR_HFOSC_DIV eDivFactor
489  );
490 
491 /*
492  * To set the HF oscillator automatic divide by 1 during wakeup from Flexi mode
493  */
495  const bool bEnable
496  );
497 
498 #endif /* __ADUCM4x50__ */
499 
500 
501 
502 /*
503  * To Configure the reference clock muxing
504  */
506  const ADI_CLOCK_MUX_ID eClockID
507  );
508 
509 /*
510  * Get external clock frequency.
511  */
513  uint32_t *pExtClock
514  );
515 
516 /*
517  * Get current clock frequency. This API can be used to know PCLK, HCLK.
518  */
520  const ADI_CLOCK_ID eClockId,
521  uint32_t *pClock
522  );
523 /*
524  * To enable/disable the specific clock.
525  */
527  const ADI_CLOCK_GATE eClockGate,
528  const bool bEnable
529  );
530 
531 /*
532  * To enable/disable the specific clock source.
533  */
535  const ADI_CLOCK_SOURCE_ID eClockSource,
536  const bool bEnable
537  );
538 /*
539  * To set the specific clock divider.
540 */
542  const ADI_CLOCK_ID eClockId,
543  const uint16_t nDiv
544  );
545 /*
546  * To Get the clock status.
547 */
549  const ADI_CLOCK_SOURCE_ID eClockSource,
550  ADI_CLOCK_SOURCE_STATUS *peStatus
551  );
552 /*
553  * To configure the PLL to generate the SPLL
554 */
556  uint8_t nDivFactor,
557  const uint8_t nMulFactor,
558  const bool bDiv2,
559  const bool bMul2
560  );
561 
562 /* To enable the interrupt for clock monitoring LFXTAL/HFXTAL/PLL.*/
564  const ADI_PWR_CLOCK_IRQ eIrq,
565  const bool bEnable
566  );
567 
568 /* Enabling the LFXTAL bypass mode */
570  const bool bEnable
571  );
572 
573 
574 /*
575  * =================================================================
576  * Power Management related APIs
577  * =================================================================
578 */
579 /* To enable the interrupt for voltage monitoring.*/
581  const ADI_PWR_PMG_IRQ eIrq,
582  const bool bEnable
583  );
584 
585 /*
586  * To know which is interrupt caused the processor to wake up from SHUTDOWN mode.
587  */
589  ADI_PWR_WAKEUP_STATUS *peStatus
590  );
591 
592 /*
593  * To select the voltage range of the battery for monitoring.
594 */
596  const ADI_PWR_VOLTAGE_RANGE eRange
597  );
598 
599 /*
600  * For entering the low power mode.
601 */
603  const ADI_PWR_POWER_MODE PowerMode,
604  uint32_t volatile * pnInterruptOccurred,
605  const uint8_t PriorityMask
606  );
607 
608 /*
609  * For exiting the low power mode.
610 */
612  uint32_t volatile * pnInterruptOccurred
613  );
614 
615 /* To enable the HPBUCK */
617  const bool bEnable
618  );
619 
620 #if defined(__ADUCM4x50__)
621 
622 /* Set the clock output through the GPIO */
624  const ADI_CLOCK_OUTPUT_ID eClockOutput
625  );
626 
627 
628 /* To enable the HPBUCK Low Power mode */
630  const bool bEnable
631  );
632 
633 /* To enable the HPBUCK Load mode */
635  const ADI_PWR_HPBUCK_LD_MODE eLoadMode
636  );
637 
638 #endif /* __ADUCM4x50__ */
639 /*
640  * For registering the call back function .
641 */
643  const ADI_CALLBACK pfCallback,
644  void *pcbParam
645  );
646 
647 #ifdef __cplusplus
648 }
649 #endif
650 
651 #endif /* ADI_PWR_H */
652 
653 
656 /*
657 ** EOF
658 */
ADI_PWR_RESULT adi_pwr_SetClockDivider(const ADI_CLOCK_ID eClockId, const uint16_t nDiv)
Sets the clock divide factor for an individual clock group.
Definition: adi_pwr.c:533
ADI_PWR_HPBUCK_LD_MODE
Definition: adi_pwr.h:408
ADI_PWR_RESULT adi_pwr_SetVoltageRange(const ADI_PWR_VOLTAGE_RANGE eRange)
To Monitor voltage range of battery.
Definition: adi_pwr.c:1368
ADI_PWR_POWER_MODE
Definition: adi_pwr.h:266
ADI_CLOCK_SOURCE_ID
Definition: adi_pwr.h:53
ADI_CLOCK_MUX_ID
Definition: adi_pwr.h:76
ADI_PWR_PMG_IRQ
Definition: adi_pwr.h:283
ADI_PWR_RESULT adi_pwr_SetPLLClockMux(const ADI_CLOCK_MUX_ID eClockID)
Sets the input clock source for PLL multiplexer.
Definition: adi_pwr.c:219
ADI_PWR_WAKEUP_STATUS
Definition: adi_pwr.h:377
ADI_CLOCK_ID
Definition: adi_pwr.h:42
ADI_PWR_RESULT adi_pwr_SetHPBuckLoadMode(const ADI_PWR_HPBUCK_LD_MODE eLoadMode)
Set the HP Buck load mode.
Definition: adi_pwr.c:1305
ADI_CLOCK_OUTPUT_ID
Definition: adi_pwr.h:135
ADI_PWR_RESULT adi_pwr_EnablePMGInterrupt(const ADI_PWR_PMG_IRQ eIrq, const bool bEnable)
Enable/Disable the power management interrupt.
Definition: adi_pwr.c:1012
ADI_PWR_CLOCK_IRQ
Definition: adi_pwr.h:300
ADI_PWR_RESULT adi_pwr_UpdateCoreClock(void)
Updates the internal SystemCoreClock variable with current core Clock retrieved from cpu registers.
Definition: adi_pwr.c:147
ADI_PWR_RESULT
Definition: adi_pwr.h:236
ADI_PWR_RESULT adi_pwr_SetGPIOClockOutput(const ADI_CLOCK_OUTPUT_ID eClockOutput)
Set the clock output through the GPIO.
Definition: adi_pwr.c:1257
ADI_PWR_RESULT adi_pwr_EnableHPBuck(const bool bEnable)
Enables or disables the HP Buck.
Definition: adi_pwr.c:1329
ADI_PWR_RESULT adi_pwr_EnableHPBuckLowPowerMode(const bool bEnable)
Enable or disable the HPBuck Low Power mode. The HPBUCK Low Power mode can be selected,...
Definition: adi_pwr.c:1279
ADI_PWR_RESULT adi_pwr_SetPll(uint8_t nDivFactor, const uint8_t nMulFactor, const bool bDiv2, const bool bMul2)
Program PLL frequency.
Definition: adi_pwr.c:942
ADI_PWR_RESULT adi_pwr_EnableClockSource(const ADI_CLOCK_SOURCE_ID eClockSource, const bool bEnable)
To Enable/disable clock sources.
Definition: adi_pwr.c:661
ADI_PWR_RESULT adi_pwr_EnterLowPowerMode(const ADI_PWR_POWER_MODE PowerMode, uint32_t volatile *pnInterruptOccurred, const uint8_t PriorityMask)
Puts the processor into given low power mode.
Definition: adi_pwr.c:1687
ADI_PWR_RESULT adi_pwr_ExitLowPowerMode(uint32_t volatile *pnInterruptOccurred)
Definition: adi_pwr.c:1839
ADI_PWR_RESULT adi_pwr_GetExtClkFreq(uint32_t *pExtClock)
Gets the system external clock frequency. Gets the clock frequency of the source connected to the ext...
Definition: adi_pwr.c:402
ADI_PWR_RESULT adi_pwr_EnableClockInterrupt(const ADI_PWR_CLOCK_IRQ eIrq, const bool bEnable)
Enable/Disable the clock interrupt to monitor status of LFXTAL, HFXTAL and PLL.
Definition: adi_pwr.c:859
ADI_PWR_RESULT adi_pwr_RegisterCallback(const ADI_CALLBACK pfCallback, void *pcbParam)
Registers or unregister the callback function.
Definition: adi_pwr.c:166
ADI_CLOCK_GATE
Definition: adi_pwr.h:189
ADI_PWR_RESULT adi_pwr_EnableClock(const ADI_CLOCK_GATE eClockGate, const bool bEnable)
Enable/disable individual peripheral clocks.
Definition: adi_pwr.c:491
ADI_PWR_RESULT adi_pwr_EnableLFXTALBypass(const bool bEnable)
Enable/disable LFXTAL bypass mode.
Definition: adi_pwr.c:1050
ADI_PWR_EVENT
Definition: adi_pwr.h:329
ADI_PWR_RESULT adi_pwr_GetClockFrequency(const ADI_CLOCK_ID eClockId, uint32_t *pClock)
Get the frequency of the given clock. Obtain individual peripheral clock frequencies.
Definition: adi_pwr.c:435
ADI_PWR_RESULT adi_pwr_SetExtClkFreq(const uint32_t ExtClkFreq)
Sets the system external clock frequency.
Definition: adi_pwr.c:196
ADI_PWR_RESULT adi_pwr_EnableRootClockFailAutoSwitch(const bool bEnable)
To enable/disable auto switching of root clock to HFOSC upon detection of Root clock failure....
Definition: adi_pwr.c:1163
ADI_PWR_RESULT adi_pwr_SetHFOscDivFactor(const ADI_PWR_HFOSC_DIV eDivFactor)
Sets the HF Oscillator divide factor.
Definition: adi_pwr.c:1197
ADI_PWR_RESULT adi_pwr_SetRootClockMux(const ADI_CLOCK_MUX_ID eClockID)
Sets the source for the root clock multiplexer.
Definition: adi_pwr.c:358
ADI_PWR_RESULT adi_pwr_EnableHFOscAutoDivBy1(const bool bEnable)
Enable or disable the HF oscillator automatic divide by 1 during wakeup from Flexi mode.
Definition: adi_pwr.c:1229
ADI_PWR_HFOSC_DIV
Definition: adi_pwr.h:214
ADI_PWR_RESULT adi_pwr_SetRefClockMux(const ADI_CLOCK_MUX_ID eClockID)
Sets clock source for the Reference clock multiplexer.
Definition: adi_pwr.c:314
ADI_PWR_VOLTAGE_RANGE
Definition: adi_pwr.h:393
ADI_PWR_RESULT adi_pwr_GetWakeUpStatus(ADI_PWR_WAKEUP_STATUS *peStatus)
Function to retrieve the wakeup from shut down mode status.
Definition: adi_pwr.c:1351
ADI_PWR_RESULT adi_pwr_GetClockStatus(const ADI_CLOCK_SOURCE_ID eClockSource, ADI_CLOCK_SOURCE_STATUS *peStatus)
Return the status of a clock source.
Definition: adi_pwr.c:763
ADI_PWR_RESULT adi_pwr_Init(void)
Definition: adi_pwr.c:77
ADI_PWR_RESULT adi_pwr_EnableLFXTALFailAutoSwitch(const bool bEnable)
Enable/Disable the LFXTAL Fail Auto switch. Enables/Disable automatic Switching of the LF Mux to LF O...
Definition: adi_pwr.c:1133
ADI_PWR_RESULT adi_pwr_SetLFClockMux(const ADI_CLOCK_MUX_ID eClockID)
Sets the input clock for low frequency clock multiplexer.
Definition: adi_pwr.c:266
ADI_CLOCK_SOURCE_STATUS
Definition: adi_pwr.h:120