ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
UART0 Static Configuration

Macros

#define ADI_UART0_CFG_WORD_LENGTH   3
 
#define ADI_UART0_CFG_STOP_BIT   1
 
#define ADI_UART0_CFG_ENABLE_PARITY   0
 
#define ADI_UART0_CFG_PARITY_SELECTION   0
 
#define ADI_UART0_CFG_ENABLE_STICKY_PARITY   0
 
#define ADI_UART0_CFG_DIVN   1078
 
#define ADI_UART0_CFG_DIVM   3
 
#define ADI_UART0_CFG_DIVC   24
 
#define ADI_UART0_CFG_OSR   3
 
#define ADI_UART0_CFG_ENABLE_FIFO   1
 
#define ADI_UART0_CFG_TRIG_LEVEL   0
 
#define ADI_UART0_CFG_HOLD_TX   0
 
#define ADI_UART0_CFG_DISABLE_RX   0
 
#define ADI_UART0_CFG_DEASSERTION   0
 
#define ADI_UART0_CFG_SOUT_POLARITY   0
 
#define ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT   1
 
#define ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT   0
 

Detailed Description

Macro Definition Documentation

◆ ADI_UART0_CFG_WORD_LENGTH

#define ADI_UART0_CFG_WORD_LENGTH   3

Word length Select.
0 - 5 Bits word length.
1 - 6 Bits word length.
2 - 7 Bits word length.
3 - 8 Bits word length.

Definition at line 56 of file adi_uart_config.h.

◆ ADI_UART0_CFG_STOP_BIT

#define ADI_UART0_CFG_STOP_BIT   1

Stop bit selection.
0 - Send 1 stop bit regardless of the word length.
1 - Send a number of stop bits based on the word length.
WORD-LENGTH 5 Bits => 1.5 Stop Bits.
WORD-LENGTH (6/7/8) Bits => 2 Stop Bits.

Definition at line 66 of file adi_uart_config.h.

◆ ADI_UART0_CFG_ENABLE_PARITY

#define ADI_UART0_CFG_ENABLE_PARITY   0

Parity Enable. Used to control the parity bit.
0 - Parity will not be transmitted or checked.
1 - Parity will be transmitted and checked.

Definition at line 74 of file adi_uart_config.h.

◆ ADI_UART0_CFG_PARITY_SELECTION

#define ADI_UART0_CFG_PARITY_SELECTION   0

Parity Select. This bit only has meaning if parity is enabled.
0 - Odd parity will be transmitted and checked.
1 - Even parity will be transmitted and checked.

Definition at line 82 of file adi_uart_config.h.

◆ ADI_UART0_CFG_ENABLE_STICKY_PARITY

#define ADI_UART0_CFG_ENABLE_STICKY_PARITY   0

Stick Parity. Used to force parity to defined values.
0 - Parity will not be forced.
1 - Set parity based on the following bit settings:
EPS = 1 and PEN = 1, parity will be forced to 0.
EPS = 0 and PEN = 1, parity will be forced to 1.
EPS = 1/0 and PEN = 0, no parity will be transmitted.

Definition at line 93 of file adi_uart_config.h.

◆ ADI_UART0_CFG_DIVN

#define ADI_UART0_CFG_DIVN   1078

Fractional baud rate N divide value.
Range: 0 to 2047.

Definition at line 117 of file adi_uart_config.h.

◆ ADI_UART0_CFG_DIVM

#define ADI_UART0_CFG_DIVM   3

Fractional baud rate M divide value.
Range: 1 to 3.

Definition at line 124 of file adi_uart_config.h.

◆ ADI_UART0_CFG_DIVC

#define ADI_UART0_CFG_DIVC   24

Fractional baud rate C divide value.
Range: 1 to 65535.

Definition at line 131 of file adi_uart_config.h.

◆ ADI_UART0_CFG_OSR

#define ADI_UART0_CFG_OSR   3

Over Sample Rate value.
Range: 0 to 3.
0 - Over sample by 4.
1 - Over sample by 8.
2 - Over sample by 16.
3 - Over sample by 32.

Definition at line 143 of file adi_uart_config.h.

◆ ADI_UART0_CFG_ENABLE_FIFO

#define ADI_UART0_CFG_ENABLE_FIFO   1

Enable Internal FIFO.
Range: 0 to 1.

Definition at line 150 of file adi_uart_config.h.

◆ ADI_UART0_CFG_TRIG_LEVEL

#define ADI_UART0_CFG_TRIG_LEVEL   0

TRIG Level for UART device.
Range: 0 to 3.
0 - 1 byte to trig RX interrupt.
1 - 4 bytes to trig RX interrupt.
2 - 8 bytes to trig RX interrupt.
3 - 14 bytes to trig RX interrupt.

Definition at line 161 of file adi_uart_config.h.

◆ ADI_UART0_CFG_HOLD_TX

#define ADI_UART0_CFG_HOLD_TX   0

Hold TX while RX is active.
Range: 0 to 1.

Definition at line 168 of file adi_uart_config.h.

◆ ADI_UART0_CFG_DISABLE_RX

#define ADI_UART0_CFG_DISABLE_RX   0

Disable RX when TX is active.
Range: 0 to 1.
0 - 1 byte to trig RX interrupt.
1 - 4 bytes to trig RX interrupt.

Definition at line 177 of file adi_uart_config.h.

◆ ADI_UART0_CFG_DEASSERTION

#define ADI_UART0_CFG_DEASSERTION   0

Configure the SOUT de-assertion earlier than full stop bit(s).
Range: 0 to 1.
0 - SOUT_EN de-assert same time as full stop bit(s).
1 - SOUT_EN de-assert half-bit earlier than full stop bit(s).

Definition at line 186 of file adi_uart_config.h.

◆ ADI_UART0_CFG_SOUT_POLARITY

#define ADI_UART0_CFG_SOUT_POLARITY   0

Set the SOUT polarity low.
Range: 0 to 1.
0 - Active high.
1 - Active low.

Definition at line 195 of file adi_uart_config.h.

◆ ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT

#define ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT   1

Enable the RX status interrupt.
Range: 0 to 1.

Definition at line 201 of file adi_uart_config.h.

◆ ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT

#define ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT   0

Enable the Modem status interrupt.
Range: 0 to 1.

Definition at line 208 of file adi_uart_config.h.