ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
adi_uart_config.h
1 
15 #ifndef ADI_UART_CONFIG_H
16 #define ADI_UART_CONFIG_H
17 
24 #include <adi_global_config.h>
25 
26 /************** Common UART Driver configurations ************** */
31 #define ADI_UART_CFG_ENABLE_AUTOBAUD 1
32 
33 
41 #define ADI_UART_DMA_EXTENSION_ENABLE 0
42 
48 /************** UART Driver configurations FOR UART 0 ************** */
56 #define ADI_UART0_CFG_WORD_LENGTH 3
57 
58 
66 #define ADI_UART0_CFG_STOP_BIT 1
67 
68 
74 #define ADI_UART0_CFG_ENABLE_PARITY 0
75 
76 
82 #define ADI_UART0_CFG_PARITY_SELECTION 0
83 
84 
93 #define ADI_UART0_CFG_ENABLE_STICKY_PARITY 0
94 
95 
96 /*
97  Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
98  Baud Rate OSR COMDIV DIVM DIVN
99  9600 3 24 3 1078
100  19200 3 12 3 1078
101  38400 3 8 2 1321
102  57600 3 4 3 1078
103  115200 3 4 1 1563
104  230400 3 2 1 1563
105  460800 3 1 1 1563
106  921,600 2 1 1 1563
107  1,000,000 2 1 1 1280
108  1,500,000 2 1 1 171
109 
110 These are calculated with the UarDivCalculator tool.
111 */
112 
117 #define ADI_UART0_CFG_DIVN 1078
118 
119 
124 #define ADI_UART0_CFG_DIVM 3
125 
126 
131 #define ADI_UART0_CFG_DIVC 24
132 
133 
143 #define ADI_UART0_CFG_OSR 3
144 
145 
150 #define ADI_UART0_CFG_ENABLE_FIFO 1
151 
152 
161 #define ADI_UART0_CFG_TRIG_LEVEL 0
162 
163 
168 #define ADI_UART0_CFG_HOLD_TX 0
169 
170 
177 #define ADI_UART0_CFG_DISABLE_RX 0
178 
179 
186 #define ADI_UART0_CFG_DEASSERTION 0
187 
188 
195 #define ADI_UART0_CFG_SOUT_POLARITY 0
196 
201 #define ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT 1
202 
203 
208 #define ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
209 
213 /*************** UART Driver configurations FOR UART 1 **************/
214 
227 #define ADI_UART1_CFG_WORD_LENGTH 3
228 
229 
237 #define ADI_UART1_CFG_STOP_BIT 1
238 
239 
245 #define ADI_UART1_CFG_ENABLE_PARITY 0
246 
247 
253 #define ADI_UART1_CFG_PARITY_SELECTION 0
254 
255 
264 #define ADI_UART1_CFG_ENABLE_STICKY_PARITY 0
265 
266 
267 /*
268  Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
269  Baud Rate OSR COMDIV DIVM DIVN
270  9600 3 24 3 1078
271  19200 3 12 3 1078
272  38400 3 8 2 1321
273  57600 3 4 3 1078
274  115200 3 4 1 1563
275  230400 3 2 1 1563
276  460800 3 1 1 1563
277  921,600 2 1 1 1563
278  1,000,000 2 1 1 1280
279  1,500,000 2 1 1 171
280 
281 These are calculated with the UarDivCalculator tool.
282 */
283 
288 #define ADI_UART1_CFG_DIVN 1563
289 
290 
295 #define ADI_UART1_CFG_DIVM 1
296 
297 
302 #define ADI_UART1_CFG_DIVC 1
303 
304 
314 #define ADI_UART1_CFG_OSR 3
315 
316 
321 #define ADI_UART1_CFG_ENABLE_FIFO 1
322 
323 
332 #define ADI_UART1_CFG_TRIG_LEVEL 0
333 
334 
339 #define ADI_UART1_CFG_HOLD_TX 0
340 
341 
348 #define ADI_UART1_CFG_DISABLE_RX 0
349 
350 
357 #define ADI_UART1_CFG_DEASSERTION 0
358 
359 
366 #define ADI_UART1_CFG_SOUT_POLARITY 0
367 
372 #define ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT 1
373 
374 
379 #define ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
380 
385 /*************** UART Driver Debug Checks ************** */
386 
387 /* Check word length */
388 #if (((ADI_UART0_CFG_WORD_LENGTH < 0) || (ADI_UART0_CFG_WORD_LENGTH > 3)) || ((ADI_UART1_CFG_WORD_LENGTH < 0) || (ADI_UART1_CFG_WORD_LENGTH > 3)))
389 #error "Word length needs to be between 0 and 3"
390 #endif
391 
392 /* Check stop bit */
393 #if (((ADI_UART0_CFG_STOP_BIT < 0) || (ADI_UART0_CFG_STOP_BIT > 1)) || ((ADI_UART1_CFG_STOP_BIT < 0) || (ADI_UART1_CFG_STOP_BIT > 1)))
394 #error "Stop bit selection needs to be 0 or 1"
395 #endif
396 
397 /* Check parity enable */
398 #if (((ADI_UART0_CFG_ENABLE_PARITY < 0) || (ADI_UART0_CFG_ENABLE_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_PARITY < 0) || (ADI_UART1_CFG_ENABLE_PARITY > 1)))
399 #error "Parity Enable bit needs to be 0 or 1"
400 #endif
401 
402 /* Check parity select */
403 #if (((ADI_UART0_CFG_PARITY_SELECTION < 0) || (ADI_UART0_CFG_PARITY_SELECTION > 1)) || ((ADI_UART1_CFG_PARITY_SELECTION < 0) || (ADI_UART1_CFG_PARITY_SELECTION > 1)))
404 #error "Parity bit selection needs to be 0 or 1"
405 #endif
406 
407 /* Check enable sticky parity */
408 #if (((ADI_UART0_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART0_CFG_ENABLE_STICKY_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART1_CFG_ENABLE_STICKY_PARITY > 1)))
409 #error "Sticky parity enable needs to be 0 or 1"
410 #endif
411 
412 /* Check fractional baudrate N divider value */
413 #if (((ADI_UART0_CFG_DIVN < 0) || (ADI_UART0_CFG_DIVN > 2047)) || ((ADI_UART1_CFG_DIVN < 0) || (ADI_UART1_CFG_DIVN > 2047)))
414 #error "Fractional baudrate N divider value needs to be between 0 and 2047"
415 #endif
416 
417 /* Check fractional baudrate M divider value */
418 #if (((ADI_UART0_CFG_DIVM < 1) || (ADI_UART0_CFG_DIVM > 3)) || ((ADI_UART1_CFG_DIVM < 1) || (ADI_UART1_CFG_DIVM > 3)))
419 #error "Fractional baudrate M divider value needs to be between 1 and 3"
420 #endif
421 
422 /* Check fractional baudrate C divider value */
423 #if (((ADI_UART0_CFG_DIVC < 1) || (ADI_UART0_CFG_DIVC > 65535)) || ((ADI_UART1_CFG_DIVC < 1) || (ADI_UART1_CFG_DIVC > 65535)))
424 #error "Fractional baudrate C divider value needs to be between 1 and 65535"
425 #endif
426 
427 /* Check over same rate value */
428 #if (((ADI_UART0_CFG_OSR < 0) || (ADI_UART0_CFG_OSR > 3)) || ((ADI_UART1_CFG_OSR < 0) || (ADI_UART1_CFG_OSR > 3)))
429 #error "over sample rate value needs to be between 0 and 3"
430 #endif
431 
432 /* Check enable internal FIFO */
433 #if (((ADI_UART0_CFG_ENABLE_FIFO < 0) || (ADI_UART0_CFG_ENABLE_FIFO > 1)) || ((ADI_UART1_CFG_ENABLE_FIFO < 0) || (ADI_UART1_CFG_ENABLE_FIFO > 1)))
434 #error "Enable internal FIFO needs to be 0 or 1"
435 #endif
436 
437 /* Check UART trig level */
438 #if (((ADI_UART0_CFG_TRIG_LEVEL < 0) || (ADI_UART0_CFG_TRIG_LEVEL > 3)) || ((ADI_UART1_CFG_TRIG_LEVEL < 0) || (ADI_UART1_CFG_TRIG_LEVEL > 3)))
439 #error "Trig level for the UART device needs to be 0 or 1"
440 #endif
441 
442 /* Check value for holding tx while rx is active */
443 #if (((ADI_UART0_CFG_HOLD_TX < 0) || (ADI_UART0_CFG_HOLD_TX > 1)) || ((ADI_UART1_CFG_HOLD_TX < 0) || (ADI_UART1_CFG_HOLD_TX > 1)))
444 #error "Value for holding Tx while Rx is active needs to be 0 or 1"
445 #endif
446 
447 /* Check value de-assertion */
448 #if (((ADI_UART0_CFG_DEASSERTION < 0) || (ADI_UART0_CFG_DEASSERTION > 1)) || ((ADI_UART1_CFG_DEASSERTION < 0) || (ADI_UART1_CFG_DEASSERTION > 1)))
449 #error "Value for de-assertion needs to be 0 or 1"
450 #endif
451 
452 /* Check value for SOUT polarity */
453 #if (((ADI_UART0_CFG_SOUT_POLARITY < 0) || (ADI_UART0_CFG_SOUT_POLARITY > 1)) || ((ADI_UART1_CFG_SOUT_POLARITY < 0) || (ADI_UART1_CFG_SOUT_POLARITY > 1)))
454 #error "Value for SOUT polarity needs to be 0 or 1"
455 #endif
456 
457 /* Check value to enable autobaud detection */
458 #if ((ADI_UART_CFG_ENABLE_AUTOBAUD < 0) || (ADI_UART_CFG_ENABLE_AUTOBAUD > 1))
459 #error "Value for autobaud enable needs to be 0 or 1"
460 #endif
461 
462 /* Check value to enable Rx status interrupt */
463 #if (((ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)))
464 #error "Value to enable Rx status interrupt needs to be 0 or 1"
465 #endif
466 
467 /* Check value to enable modem status interrupt */
468 #if (((ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)))
469 #error "Value to enable modem status interrupt needs to be 0 or 1"
470 #endif
471 
472 #endif /* ADI_UART_CONFIG_H */