ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
adi_i2c_data.c
1 
13 #ifndef ADI_I2C_DATA_C
14 #define ADI_I2C_DATA_C
15 
18 #include "adi_i2c_def.h"
19 #include "adi_i2c_config.h"
20 
21 #if !defined(ADI_I2C_CFG_MCTL_BUSCLR)
22 
28 #pragma message("!!! I2C configuration parameters have been extended.")
29 #pragma message("!!! Consider defining ADI_I2C_CFG_MCTL_BUSCLR in the")
30 #pragma message("!!! adi_i2c_config.h used by your project.")
31 #pragma message("!!! (Macro ADI_I2C_CFG_MCTL_BUSCLR is defaulted to 0.)")
32 
36 #define ADI_I2C_CFG_MCTL_BUSCLR (0)
37 #endif
38 
39 #if !defined(ADI_I2C_CFG_MCTL_STOPBUSCLR)
40 
46 #pragma message("!!! I2C configuration parameters have been extended.")
47 #pragma message("!!! Consider defining ADI_I2C_CFG_MCTL_STOPBUSCLR in the")
48 #pragma message("!!! adi_i2c_config.h used by your project.")
49 #pragma message("!!! (Macro ADI_I2C_CFG_MCTL_STOPBUSCLR is defaulted to 0.)")
50 
54 #define ADI_I2C_CFG_MCTL_STOPBUSCLR (0)
55 #endif
56 
57 
58 /* Stores the information about the specific device */
59 static ADI_I2C_DEVICE_INFO i2c_device_info [ADI_I2C_NUM_INSTANCES] =
60 {
61  /* fixed instance data for the singular I2C0 controller */
62  {
63  I2C_MST_EVT_IRQn, /* pio interrupt number */
64  (ADI_I2C_TypeDef *)pADI_I2C0, /* i2c controller pointer */
65  NULL, /* pointer to user config data */
66  NULL /* i2c device handle (user mem) */
67  },
68 
69  /* no other i2c instances at this time */
70 };
71 
72 /* build I2C Application configuration array */
73 static ADI_I2C_CONFIG gConfigInfo[ADI_I2C_NUM_INSTANCES] =
74 {
75  /* the one-and-only (so far) instance data for I2C, I2C0... */
76  {
77  /**** I2C_MCTL Master Control register *** */
78  (
79  /* note: Master IENMTX and IENMRX (transmit and receive interrupts)
80  are managed dynamically */
81  ( ADI_I2C_CFG_MCTL_STOPBUSCLR << BITP_I2C_MCTL_STOPBUSCLR ) |
82  ( ADI_I2C_CFG_MCTL_BUSCLR << BITP_I2C_MCTL_BUSCLR ) |
83  ( ADI_I2C_CFG_MCTL_MXMITDEC << BITP_I2C_MCTL_MXMITDEC ) |
84  ( ADI_I2C_CFG_MCTL_IENCMP << BITP_I2C_MCTL_IENCMP ) |
85  ( ADI_I2C_CFG_MCTL_IENACK << BITP_I2C_MCTL_IENACK ) |
86  ( ADI_I2C_CFG_MCTL_IENALOST << BITP_I2C_MCTL_IENALOST ) |
87  ( ADI_I2C_CFG_MCTL_STRETCHSCL << BITP_I2C_MCTL_STRETCHSCL ) |
88  ( ADI_I2C_CFG_MCTL_LOOPBACK << BITP_I2C_MCTL_LOOPBACK ) |
89  ( ADI_I2C_CFG_MCTL_COMPLETE << BITP_I2C_MCTL_COMPLETE ) |
90  ( ADI_I2C_CFG_MCTL_MASEN << BITP_I2C_MCTL_MASEN )
91  ),
92 
93  /**** I2C_DIV Clock Divider register *** */
94  (
95  ( ADI_I2C_CFG_DIV_HIGH << BITP_I2C_DIV_HIGH ) |
96  ( ADI_I2C_CFG_DIV_LOW << BITP_I2C_DIV_LOW )
97  ),
98 
99  /**** I2C_SHCTL Shared Control register *** */
100  (
101  ( ADI_I2C_CFG_SHCTL_RST << BITP_I2C_SHCTL_RST )
102  ),
103 
104  /**** I2C_TCTL Timing control register *** */
105  (
106  ( ADI_I2C_CFG_TCTL_FILTEROFF << BITP_I2C_TCTL_FILTEROFF ) |
107  ( ADI_I2C_CFG_TCTL_THDATIN << BITP_I2C_TCTL_THDATIN )
108  ),
109 
110  /**** I2C_ASTRETCH Master Clock Stretch register *** */
111  (
112  ( ADI_I2C_CFG_ASTRETCH_MST << BITP_I2C_ASTRETCH_SCL_MST )
113  ),
114 
115  /**** Target Slave configuration value (not a register) *** */
116  (
118  ),
119  }
120 };
121 
125 #endif /* ADI_I2C_DATA_C */
#define ADI_I2C_CFG_MCTL_COMPLETE
#define ADI_I2C_CFG_MCTL_STRETCHSCL
#define ADI_I2C_CFG_ASTRETCH_MST
#define ADI_I2C_CFG_TCTL_FILTEROFF
#define ADI_I2C_CFG_SHCTL_RST
#define ADI_I2C_CFG_MCTL_IENCMP
#define ADI_I2C_CFG_MCTL_MXMITDEC
#define ADI_I2C_CFG_SLAVE_ADDRESS
#define ADI_I2C_CFG_DIV_HIGH
#define ADI_I2C_CFG_MCTL_IENALOST
#define ADI_I2C_CFG_MCTL_STOPBUSCLR
#define ADI_I2C_CFG_MCTL_MASEN
#define ADI_I2C_CFG_MCTL_IENACK
#define ADI_I2C_CFG_MCTL_LOOPBACK
#define ADI_I2C_CFG_MCTL_BUSCLR
#define ADI_I2C_CFG_TCTL_THDATIN
#define ADI_I2C_CFG_DIV_LOW