ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
System Interfaces

Macros

#define ADI_SRAM_BANK_0   (1u << 0)
 
#define ADI_SRAM_BANK_1   (1u << 1)
 
#define ADI_SRAM_BANK_2   (1u << 2)
 
#define ADI_SRAM_BANK_3   (1u << 3)
 
#define ADI_SRAM_BANK_4   (1u << 4)
 
#define ADI_SRAM_BANK_5   (1u << 5)
 
#define ADI_SRAM_BANK_6   (1u << 6)
 
#define ADI_SRAM_BANK_7   (1u << 7)
 

Typedefs

typedef uint32_t ADI_SRAM_BANK
 

Enumerations

enum  ADI_SYS_RESULT {
  ADI_SYS_SUCCESS = 0,
  ADI_SYS_FAILURE
}
 

Functions

void SystemInit (void)
 Sets up the microcontroller system. Initializes the System and updates the relocate vector table. More...
 
void SystemCoreClockUpdate (void)
 Update the clock. More...
 
void adi_system_EnableCache (bool bEnable)
 Enables or disables the cache. More...
 
ADI_SYS_RESULT adi_system_EnableRetention (ADI_SRAM_BANK eBank, bool bEnable)
 This enables/disable SRAM retention during the hibernation. More...
 
void adi_system_SetGlobalIrqPriority (void)
 This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined). More...
 

Variables

uint32_t SystemCoreClock = 0u
 

Detailed Description

System global interfaces and CMSIS required variables

Macro Definition Documentation

◆ ADI_SRAM_BANK_0

#define ADI_SRAM_BANK_0   (1u << 0)

SRAM_BANK_0

Definition at line 131 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_1

#define ADI_SRAM_BANK_1   (1u << 1)

SRAM_BANK_1

Definition at line 133 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_2

#define ADI_SRAM_BANK_2   (1u << 2)

SRAM_BANK_2

Definition at line 135 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_3

#define ADI_SRAM_BANK_3   (1u << 3)

SRAM_BANK_3

Definition at line 137 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_4

#define ADI_SRAM_BANK_4   (1u << 4)

SRAM_BANK_4

Definition at line 139 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_5

#define ADI_SRAM_BANK_5   (1u << 5)

SRAM_BANK_5

Definition at line 141 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_6

#define ADI_SRAM_BANK_6   (1u << 6)

SRAM_BANK_6

Definition at line 143 of file system_ADuCM4050.h.

◆ ADI_SRAM_BANK_7

#define ADI_SRAM_BANK_7   (1u << 7)

SRAM_BANK_7

Definition at line 145 of file system_ADuCM4050.h.

Typedef Documentation

◆ ADI_SRAM_BANK

typedef uint32_t ADI_SRAM_BANK

SRAM banks

Definition at line 128 of file system_ADuCM4050.h.

Enumeration Type Documentation

◆ ADI_SYS_RESULT

System API function return codes

Enumerator
ADI_SYS_SUCCESS 

No error detected.

ADI_SYS_FAILURE 

The API call failed.

Definition at line 73 of file system_ADuCM4050.h.

Function Documentation

◆ SystemInit()

void SystemInit ( void  )

Sets up the microcontroller system. Initializes the System and updates the relocate vector table.

Returns
none
Note
This function is called by the start-up code and does not need to be called directly by applications

Definition at line 238 of file system_ADuCM4050.c.

◆ SystemCoreClockUpdate()

void SystemCoreClockUpdate ( void  )

Update the clock.

Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution.

Returns
none

Definition at line 139 of file system_ADuCM4050.c.

Referenced by adi_pwr_GetClockFrequency(), adi_pwr_Init(), adi_pwr_SetClockDivider(), and adi_pwr_UpdateCoreClock().

◆ adi_system_EnableCache()

void adi_system_EnableCache ( bool  bEnable)

Enables or disables the cache.

Parameters
bEnableSpecify whether to enable/disable cache.
  • true : Enable cache.
  • false: Disable cache.
Returns
none

Definition at line 340 of file system_ADuCM4050.c.

Referenced by SystemInit().

◆ adi_system_EnableRetention()

ADI_SYS_RESULT adi_system_EnableRetention ( ADI_SRAM_BANK  eBank,
bool  bEnable 
)

This enables/disable SRAM retention during the hibernation.

Parameters
eBankSpecify which SRAM banks. Multiple banks can be set / using a logical OR of the banks.
bEnableEnable/disable the retention for specified SRAM bank.
  • true : Enable retention during hibernation.
  • false: Disable retention during hibernation.
Returns
ADI_SYS_SUCCESS Configured successfully.
ADI_SYS_FAILURE Invalid bank, or banks, specified. Any incorrect or invalid bank options will result in failure and no changes will have been applied.
Note
The appropriate linker file needs to support the configuration. BANK 0 is always retained. BANKS 1 can be retained individually. BANK 2 is never retained. BANKS 3 and 4 can only be mutually retained. BANKS 5 can be retained individually. BANKS 6 and 7 can only be mutually retained.

Definition at line 373 of file system_ADuCM4050.c.

Referenced by SystemInit().

◆ adi_system_SetGlobalIrqPriority()

void adi_system_SetGlobalIrqPriority ( void  )

This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined).

At reset the hardware default priority 0, which is the highest. For any applications that use BASEPRI to mask interrupts, such as any application using FreeRTOS, then any interrupts using default priority will never be masked. Defining ADI_MAX_IRQ_PRIORITY to a value will enable this function call at startup and set all IRQ interrupts to that priority value.

Returns
none

Definition at line 443 of file system_ADuCM4050.c.

Referenced by SystemInit().

Variable Documentation

◆ SystemCoreClock

uint32_t SystemCoreClock = 0u

System Clock Frequency (Core Clock)

Definition at line 125 of file system_ADuCM4050.c.

Referenced by SystemCoreClockUpdate().