ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
adi_dma.h
1 
22 #ifndef ADI_DMA__H__
23 #define ADI_DMA__H__
24 
25 #include <adi_callback.h>
26 
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif /* __cplusplus */
31 
32 /*============= D E F I N E S =============*/
37 /*============= D A T A T Y P E S =============*/
38 
39 
43 typedef enum
44 {
55 
59 typedef enum
60 {
65 
66 
70 typedef enum
71 {
76 
77 
81 typedef enum
82 {
95 
96 
100 typedef enum
101 {
108 } ADI_DMA_MODE;
109 
110 
114 typedef enum
115 {
119 
120 
124 typedef enum {
129 
135 typedef enum
136 {
137  SPI2_TX_CHANn = 0,
138  SPI2_RX_CHANn = 1,
139  SPORT0A_CHANn = 2,
140  SPORT0B_CHANn = 3,
141  SPI0_TX_CHANn = 4,
142  SPI0_RX_CHANn = 5,
143  SPI1_TX_CHANn = 6,
144  SPI1_RX_CHANn = 7,
145  UART0_TX_CHANn = 8,
146  UART0_RX_CHANn = 9,
147  I2CS_TX_CHANn = 10,
148  I2CS_RX_CHANn = 11,
149  I2CM_CHANn = 12,
150  AES0_IN_CHANn = 13,
151  AES0_OUT_CHANn = 14,
152  FLASH_CHANn = 15,
153  SIP0_CHANn = 16,
154  SIP1_CHANn = 17,
155  SIP2_CHANn = 18,
156  SIP3_CHANn = 19,
157  SIP4_CHANn = 20,
158  SIP5_CHANn = 21,
159  SIP6_CHANn = 22,
160  SIP7_CHANn = 23,
161  ADC0_CHANn = 24,
162 #if defined(__ADUCM4x50__)
163  UART1_TX_CHANn = 25,
164  UART1_RX_CHANn = 26,
165 #endif /* __ADUCM4x50__ */
166  NUM_DMA_CHANNELSn = 27
167 } DMA_CHANn_TypeDef;
174 typedef struct
175 {
176  __IO uint32_t DMASRCEND;
177  __IO uint32_t DMADSTEND;
178  __IO uint32_t DMACDC;
179  uint32_t RESERVED;
181 
182 
184 /* Bit Position for DMA Descriptor Control */
185 #define DMA_BITP_CTL_DST_INC (30u)
186 #define DMA_BITP_CTL_SRC_INC (26u)
187 #define DMA_BITP_CTL_SRC_SIZE (24u)
188 #define DMA_BITP_CTL_R_POWER (14u)
189 #define DMA_BITP_CTL_N_MINUS_1 (4u)
190 #define DMA_BITP_CTL_CYCLE_CTL (0u)
191 
192 /* Bit Mask for DMA Descriptor Control */
193 #define DMA_BITM_CTL_DST_INC ((0x00000003u) << DMA_BITP_CTL_DST_INC)
194 #define DMA_BITM_CTL_SRC_INC ((0x00000003u) << DMA_BITP_CTL_SRC_INC)
195 #define DMA_BITM_CTL_SRC_SIZE ((0x00000003u) << DMA_BITP_CTL_SRC_SIZE)
196 #define DMA_BITM_CTL_R_POWER ((0x0000000Fu) << DMA_BITP_CTL_R_POWER)
197 #define DMA_BITM_CTL_N_MINUS_1 ((0x000003FFu) << DMA_BITP_CTL_N_MINUS_1)
198 #define DMA_BITM_CTL_CYCLE_CTL ((0x00000007u) << DMA_BITP_CTL_CYCLE_CTL)
199 
200 /* Enum for the DMA Descriptor Cycle Control */
201 #define DMA_ENUM_CTL_CYCLE_CTL_INVALID (0u)
202 #define DMA_ENUM_CTL_CYCLE_CTL_BASIC (1u)
203 #define DMA_ENUM_CTL_CYCLE_CTL_AUTO_REQ (2u)
204 #define DMA_ENUM_CTL_CYCLE_CTL_PING_PONG (3u)
205 #define DMA_ENUM_CTL_CYCLE_CTL_MSG_PRI (4u)
206 #define DMA_ENUM_CTL_CYCLE_CTL_MSG_ALT (5u)
207 #define DMA_ENUM_CTL_CYCLE_CTL_PSG_PRI (6u)
208 #define DMA_ENUM_CTL_CYCLE_CTL_PSG_ALT (7u)
209 
210 
211 #define DMA_BITM_INCR_TYPE_DECR (0x10u)
212 
213 #define DMA_BITM_OCTL_SRC_DECR (0x01u)
214 #define DMA_BITM_OCTL_DST_DECR (0x02u)
215 
216 #define DMA_BITM_OCTL_SRC_INCR (0x04u)
217 #define DMA_BITM_OCTL_DST_INCR (0x08u)
218 
219 #define DMA_TRANSFER_LIMIT (1024u)
221 /* pointer to the primary CCD array */
222 extern ADI_DCC_TypeDef* const pPrimaryCCD;
223 /* pointer to the alternate CCD array */
224 extern ADI_DCC_TypeDef* const pAlternateCCD;
226 /*========== DMA API DECLARATIONS ==========*/
227 
228 /* Initialize the DMA and enable it */
229 extern void adi_dma_Init(void);
230 
231 /* Force a DMA re-initialization */
232 extern void adi_dma_ReInit(void);
233 
234 /* Enable/Disable the DMA */
235 extern void adi_dma_Enable(const bool enable);
236 
238  DMA_CHANn_TypeDef const eChannelID,
239  ADI_CALLBACK const pfCallback,
240  void* const pCBParam
241  );
242 
243 #ifdef __cplusplus
244 }
245 #endif
246 
247 #endif /* include guard */
248 
249 /*
250 ** EOF
251 */
252 
ADI_DMA_RESULT adi_dma_RegisterCallback(DMA_CHANn_TypeDef const eChannelID, ADI_CALLBACK const pfCallback, void *const pCBParam)
Register a call-back function for a DMA channel.
Definition: adi_dma.c:232
__IO uint32_t DMASRCEND
Definition: adi_dma.h:176
void adi_dma_Enable(const bool enable)
Enable/Disable the DMA.
Definition: adi_dma.c:206
ADI_DMA_PRIORITY
Definition: adi_dma.h:114
void adi_dma_ReInit(void)
Force a DMA re-initialization.
Definition: adi_dma.c:193
ADI_DMA_RPOWER
Definition: adi_dma.h:81
ADI_DMA_MODE
Definition: adi_dma.h:100
ADI_DMA_EVENT
Definition: adi_dma.h:59
ADI_DMA_WIDTH_TYPE
Definition: adi_dma.h:70
ADI_DMA_INCR_TYPE
Definition: adi_dma.h:43
__IO uint32_t DMADSTEND
Definition: adi_dma.h:177
__IO uint32_t DMACDC
Definition: adi_dma.h:178
void adi_dma_Init(void)
Initialize the DMA peripheral.
Definition: adi_dma.c:155
ADI_DMA_RESULT
Definition: adi_dma.h:124