ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
system_ADuCM4050.h
1 
11 /* Copyright (c) 2012 ARM LIMITED
12 
13  All rights reserved.
14  Redistribution and use in source and binary forms, with or without
15  modification, are permitted provided that the following conditions are met:
16  - Redistributions of source code must retain the above copyright
17  notice, this list of conditions and the following disclaimer.
18  - Redistributions in binary form must reproduce the above copyright
19  notice, this list of conditions and the following disclaimer in the
20  documentation and/or other materials provided with the distribution.
21  - Neither the name of ARM nor the names of its contributors may be used
22  to endorse or promote products derived from this software without
23  specific prior written permission.
24  *
25  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
29  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  POSSIBILITY OF SUCH DAMAGE.
36 
37  Portions Copyright (c) 2016-2019 Analog Devices, Inc.
38  ---------------------------------------------------------------------------*/
39 
40 
41 #ifndef SYSTEM_ADUCM4050_H
42 #define SYSTEM_ADUCM4050_H
43 
44 #include <stddef.h> /* for 'NULL' */
45 #include <stdbool.h>
46 #include <stdint.h>
47 
48 
49 extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif /* __cplusplus */
54 
55 #if defined (__ICCARM__)
56 /*
57 * IAR MISRA C 2004 error suppressions.
58 *
59 * Pm011 (rule 6.3): Types which specify sign and size should be used
60 * We use bool which is accepted by MISRA but the toolchain does not accept it
61 *
62 */
63 #pragma diag_suppress=Pm011
64 
65 #endif
66 
73 typedef enum
74 {
78 
79 
81 /* System clock constant */
82 #define __HFOSC 26000000u
83 
84 /* System clock constant (may also be 16000000) */
85 #define __HFXTAL 26000000u
86 
87  /*System clock constant (same whether internal osc or external xtal) */
88 #define __LFCLK 32768u
89 
90  /*Selecting HFOSC as input for generating root clock*/
91 #define HFMUX_INTERNAL_OSC_VAL (0u << BITP_CLKG_CLK_CTL0_CLKMUX)
92 
93  /*Selecting HFXTAL as input for generating root clock*/
94 #define HFMUX_EXTERNAL_XTAL_VAL (1u << BITP_CLKG_CLK_CTL0_CLKMUX)
95 
96  /*Selecting SPLL as input for generating root clock*/
97 #define HFMUX_SYSTEM_SPLL_VAL (2u << BITP_CLKG_CLK_CTL0_CLKMUX)
98 
99  /*Selecting GPIO as input for generating root clock*/
100 #define HFMUX_GPIO_VAL (3u << BITP_CLKG_CLK_CTL0_CLKMUX)
101 
103 #define CACHE_CONTROLLER_KEY 0xF123F456u
104 
105 #define PWRKEY_VALUE_KEY 0x4859u
106 
108 #define NVIC_INTS (72u)
109 
113 // coverity[no_ctor_but_const_or_ref_member]
114 typedef struct {
115  const uint32_t ReadProtectKeyHash[4];
116  const uint32_t CrcOfReadProtectKeyHash;
117  const uint32_t LastCRCPage;
118  const uint32_t InCircuitWriteProtectCode;
119  const uint32_t FlashBlockWriteProtect;
120 
121 } ADI_ADUCM4X50_SECURITY_OPTIONS;
122 
128 typedef uint32_t ADI_SRAM_BANK;
129 
131 #define ADI_SRAM_BANK_0 (1u << 0)
132 
133 #define ADI_SRAM_BANK_1 (1u << 1)
134 
135 #define ADI_SRAM_BANK_2 (1u << 2)
136 
137 #define ADI_SRAM_BANK_3 (1u << 3)
138 
139 #define ADI_SRAM_BANK_4 (1u << 4)
140 
141 #define ADI_SRAM_BANK_5 (1u << 5)
142 
143 #define ADI_SRAM_BANK_6 (1u << 6)
144 
145 #define ADI_SRAM_BANK_7 (1u << 7)
146 
147 extern void SystemInit(void);
148 extern void SystemCoreClockUpdate(void);
149 void adi_system_EnableCache(bool bEnable);
152 
153 #ifdef __GNUC__
154 #define KEEP_VAR(var) var __attribute__((used))
155 #define SECTION_PLACE(def,sectionname) __attribute__ ((section(sectionname))) def
156 #endif // __GNUC__
157 
158 #ifdef __ARMCC_VERSION
159 #define KEEP_VAR(var) var __attribute__((used))
160 #define SECTION_PLACE(def,sectionname) __attribute__ ((section(sectionname))) def
161 #endif // __ARMCC_VERSION
162 
163 #ifdef __ICCARM__
164 
165 /*
166 * Pm154 (rule 19.10): in the definition of a function-like macro, each instance
167 * of a parameter shall be enclosed in parentheses
168 * The parameters in the following macros cannot be enclosed in parentheses.
169 */
170 #pragma diag_suppress=Pm154
171 
172 #define KEEP_VAR(var) __root var
173 #define SECTION_PLACE(def,sectionname) def @ sectionname
174 
175 #endif /* __ICCARM__ */
176 
177 #if !defined(KEEP_VAR) || !defined(SECTION_PLACE)
178 #error "This compiler is not yet supported"
179 #endif
180 
181 
182 #if defined (__ICCARM__)
183 #pragma diag_default=Pm011
184 #pragma diag_default=Pm154
185 #endif /* __ICCARM__ */
186 
187 #ifdef __cplusplus
188 }
189 #endif
190 
191 #endif /* SYSTEM_ADUCM4050_H */
192 
194 /*
195 ** EOF
196 */
void SystemInit(void)
Sets up the microcontroller system. Initializes the System and updates the relocate vector table.
void SystemCoreClockUpdate(void)
Update the clock.
void adi_system_EnableCache(bool bEnable)
Enables or disables the cache.
uint32_t SystemCoreClock
void adi_system_SetGlobalIrqPriority(void)
This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (...
ADI_SYS_RESULT
ADI_SYS_RESULT adi_system_EnableRetention(ADI_SRAM_BANK eBank, bool bEnable)
This enables/disable SRAM retention during the hibernation.
uint32_t ADI_SRAM_BANK