ADuCM4x50 Device Drivers API Reference Manual
Release 4.0.0.0
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Macros | |
#define | ADI_ADC_CFG_RESOLUTION (12) |
#define | ADI_ADC_CFG_VREF (1) |
#define | ADI_ADC_ENABLE_MULTI_ACQUIRE (0) |
#define | ADI_ADC_ENABLE_STATIC_COMPARATOR (0) |
#define | ADI_ADC_COMPARATOR_AIN0_HI_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN0_HI_VAL (4095) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN0_LO_EN (1) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN0_LO_VAL (0) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN0_HYS_EN (1) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN0_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
#define | ADI_ADC_COMPARATOR_AIN0_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
#define | ADI_ADC_COMPARATOR_AIN1_HI_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN1_HI_VAL (4095) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN1_LO_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN1_LO_VAL (0) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN1_HYS_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN1_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
#define | ADI_ADC_COMPARATOR_AIN1_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
#define | ADI_ADC_COMPARATOR_AIN2_HI_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN2_HI_VAL (4095) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN2_LO_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN2_LO_VAL (0) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN2_HYS_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN2_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
#define | ADI_ADC_COMPARATOR_AIN2_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
#define | ADI_ADC_COMPARATOR_AIN3_HI_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN3_HI_VAL (4095) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN3_LO_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN3_LO_VAL (0) /* Range: 0 to 4095 */ |
#define | ADI_ADC_COMPARATOR_AIN3_HYS_EN (0) /* 0 or 1 */ |
#define | ADI_ADC_COMPARATOR_AIN3_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
#define | ADI_ADC_COMPARATOR_AIN3_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
#define ADI_ADC_CFG_RESOLUTION (12) |
Configure the default ADC configuration. Oversampling support must be enabled for resolution >12-bits.
Valid values are 12 to 16
Definition at line 32 of file adi_adc_config.h.
#define ADI_ADC_CFG_VREF (1) |
Configure the default Vref
3 - External Reference 2 - Battery Voltage 1 - 2.5V Internal Reference
0 - 1.25V Internal Reference
Definition at line 41 of file adi_adc_config.h.
#define ADI_ADC_ENABLE_MULTI_ACQUIRE (0) |
Enable/Disable MULTI acquisitions of ADC data. When enabled, DMA will be used for ADC readings which is the preferred transfer method for multiple transactions. Otherwise all will be interrupt driven.
1 - Enable MULTI (DMA) acquisitions
0 - Disable MULTI (use Interrupt) acquisitions
Definition at line 50 of file adi_adc_config.h.
#define ADI_ADC_ENABLE_STATIC_COMPARATOR (0) |
Enable/Disable HI/LO Digital Comparator limits
1 - Enable HI/LO Digital Comparator limits
0 - Disable HI/LO Digital Comparator limits
Definition at line 56 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_HI_EN (0) /* 0 or 1 */ |
Enable/Disable Channel0 limit comparator
1 - Enable HI Digital Comparator limit
0 - Disable HI Digital Comparator limit
Definition at line 62 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_HI_VAL (4095) /* Range: 0 to 4095 */ |
Set the Channel0 limit comparator value
Sets the HI limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN0_HI_EN is set to 1.
Definition at line 68 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_LO_EN (1) /* 0 or 1 */ |
Enable/Disable Channel0 limit comparator
1 - Enable LO Digital Comparator limit
0 - Disable LO Digital Comparator limit
Definition at line 74 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_LO_VAL (0) /* Range: 0 to 4095 */ |
Set the Channel0 limit comparator value.
Sets the LO limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN0_LO_EN is set to 1.
Definition at line 80 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_HYS_EN (1) /* 0 or 1 */ |
Enable/Disable Channel0 hysteresis and monitor cycles
1 - Enable hysteresis and monitor cycles
0 - Disable hysteresis and monitor cycles
Definition at line 86 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
Set the Channel0 limit comparator hysteresis value.
Sets the hysteresis value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN0_HYS_EN is set to 1.
Definition at line 92 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN0_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
Set the Channel0 limit comparator hysteresis monitor value.
Sets the monitor value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN0_HYS_EN is set to 1.
Definition at line 98 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_HI_EN (0) /* 0 or 1 */ |
Enable/Disable Channel1 limit comparator
1 - Enable HI Digital Comparator limit
0 - Disable HI Digital Comparator limit
Definition at line 104 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_HI_VAL (4095) /* Range: 0 to 4095 */ |
Set the Channel1 limit comparator value
Sets the HI limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN1_HI_EN is set to 1.
Definition at line 110 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_LO_EN (0) /* 0 or 1 */ |
Enable/Disable Channel1 limit comparator
1 - Enable LO Digital Comparator limit
0 - Disable LO Digital Comparator limit
Definition at line 116 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_LO_VAL (0) /* Range: 0 to 4095 */ |
Set the Channel1 limit comparator value.
Sets the LO limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN1_LO_EN is set to 1.
Definition at line 122 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_HYS_EN (0) /* 0 or 1 */ |
Enable/Disable Channel1 hysteresis and monitor cycles
1 - Enable hysteresis and monitor cycles
0 - Disable hysteresis and monitor cycles
Definition at line 128 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
Set the Channel1 limit comparator hysteresis value.
Sets the hysteresis value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN1_HYS_EN is set to 1.
Definition at line 134 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN1_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
Set the Channel1 limit comparator hysteresis monitor value.
Sets the monitor value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN1_HYS_EN is set to 1.
Definition at line 140 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_HI_EN (0) /* 0 or 1 */ |
Enable/Disable Channel2 limit comparator
1 - Enable HI Digital Comparator limit
0 - Disable HI Digital Comparator limit
Definition at line 146 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_HI_VAL (4095) /* Range: 0 to 4095 */ |
Set the Channel2 limit comparator value
Sets the HI limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN2_HI_EN is set to 1.
Definition at line 152 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_LO_EN (0) /* 0 or 1 */ |
Enable/Disable Channel2 limit comparator
1 - Enable LO Digital Comparator limit
0 - Disable LO Digital Comparator limit
Definition at line 158 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_LO_VAL (0) /* Range: 0 to 4095 */ |
Set the Channel2 limit comparator value.
Sets the LO limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN2_LO_EN is set to 1.
Definition at line 164 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_HYS_EN (0) /* 0 or 1 */ |
Enable/Disable Channel2 hysteresis and monitor cycles
1 - Enable hysteresis and monitor cycles
0 - Disable hysteresis and monitor cycles
Definition at line 170 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
Set the Channel2 limit comparator hysteresis value.
Sets the hysteresis value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN2_HYS_EN is set to 1.
Definition at line 176 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN2_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
Set the Channel2 limit comparator hysteresis monitor value.
Sets the monitor value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN2_HYS_EN is set to 1.
Definition at line 182 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_HI_EN (0) /* 0 or 1 */ |
Enable/Disable Channel3 limit comparator
1 - Enable HI Digital Comparator limit
0 - Disable HI Digital Comparator limit
Definition at line 188 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_HI_VAL (4095) /* Range: 0 to 4095 */ |
Set the Channel3 limit comparator value
Sets the HI limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN3_HI_EN is set to 1.
Definition at line 194 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_LO_EN (0) /* 0 or 1 */ |
Enable/Disable Channel3 limit comparator
1 - Enable LO Digital Comparator limit
0 - Disable LO Digital Comparator limit
Definition at line 200 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_LO_VAL (0) /* Range: 0 to 4095 */ |
Set the Channel3 limit comparator value.
Sets the LO limit value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN3_LO_EN is set to 1.
Definition at line 206 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_HYS_EN (0) /* 0 or 1 */ |
Enable/Disable Channel3 hysteresis and monitor cycles
1 - Enable hysteresis and monitor cycles
0 - Disable hysteresis and monitor cycles
Definition at line 212 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_HYS_VAL (0) /* 9 bits, 0 to 511 */ |
Set the Channel3 limit comparator hysteresis value.
Sets the hysteresis value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN3_HYS_EN is set to 1.
Definition at line 218 of file adi_adc_config.h.
#define ADI_ADC_COMPARATOR_AIN3_HYS_CYC (0) /* 3 bits, 0 to 7 */ |
Set the Channel3 limit comparator hysteresis monitor value.
Sets the monitor value for the channel, only
relevant if ADI_ADC_COMPARATOR_AIN3_HYS_EN is set to 1.
Definition at line 224 of file adi_adc_config.h.