ADuCM4x50 Device Drivers API Reference Manual  Release 4.0.0.0
RTC1 Static Configuration

Macros

#define RTC1_CFG_ENABLE_ALARM   0
 
#define RTC1_CFG_ENABLE_ALARM_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_TRIM   0
 
#define RTC1_CFG_ENABLE_MOD60_ALARM   0
 
#define RTC1_CFG_ENABLE_MOD60_ALARM_PERIOD   0
 
#define RTC1_CFG_ENABLE_MOD60_ALARM_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_ISO_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_PENDERROR_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_WSYNC_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_WRITEPEND_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_COUNT_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_MOD1_COUNT_INTERRUPT   0
 
#define RTC1_CFG_ENABLE_TRIM_INTERRUPT   0
 
#define RTC1_CFG_CNT_MOD60_ROLLLOVER_INTERRUPT   0
 
#define RTC1_CFG_PRESCALE   0
 
#define RTC1_CFG_CNT_ROLLLOVER_INTERRUPT   0
 
#define RTC1_CFG_COUNT_VALUE_0   0
 
#define RTC1_CFG_COUNT_VALUE_1   0
 
#define RTC1_CFG_ALARM_VALUE_0   0
 
#define RTC1_CFG_ALARM_VALUE_1   0
 
#define RTC1_CFG_ALARM_VALUE_2   0
 
#define RTC1_CFG_TRIM_INTERVAL   0
 
#define RTC1_CFG_POW2_TRIM_INTERVAL   0
 
#define RTC1_CFG_TRIM_OPERATION   0
 
#define RTC1_CFG_TRIM_VALUE   0
 
#define RTC1_CFG_IC0_ENABLE   0
 
#define RTC1_CFG_IC2_ENABLE   0
 
#define RTC1_CFG_IC3_ENABLE   0
 
#define RTC1_CFG_IC4_ENABLE   0
 
#define RTC1_CFG_SS1_ENABLE   0
 
#define RTC1_CFG_SS2_ENABLE   0
 
#define RTC1_CFG_SS3_ENABLE   0
 
#define RTC1_CFG_SS4_ENABLE   0
 
#define RTC1_CFG_IC0_INT_ENABLE   0
 
#define RTC1_CFG_IC2_INT_ENABLE   0
 
#define RTC1_CFG_IC3_INT_ENABLE   0
 
#define RTC1_CFG_IC4_INT_ENABLE   0
 
#define RTC1_CFG_IC_OVER_WRITE_ENABLE   0
 
#define RTC1_CFG_IC0_EDGE_POLARITY   0
 
#define RTC1_CFG_IC2_EDGE_POLARITY   0
 
#define RTC1_CFG_IC3_EDGE_POLARITY   0
 
#define RTC1_CFG_IC4_EDGE_POLARITY   0
 
#define RTC1_CFG_SS1_INT_ENABLE   0
 
#define RTC1_CFG_SS2_INT_ENABLE   0
 
#define RTC1_CFG_SS3_INT_ENABLE   0
 
#define RTC1_CFG_SS4_INT_ENABLE   0
 
#define RTC1_CFG_SS1_MASK_ENABLE   0
 
#define RTC1_CFG_SS2_MASK_ENABLE   0
 
#define RTC1_CFG_SS3_MASK_ENABLE   0
 
#define RTC1_CFG_SS4_MASK_ENABLE   0
 
#define RTC1_CFG_SS1_AUTO_RELOADING_ENABLE   0
 
#define RTC1_CFG_SS2_AUTO_RELOADING_ENABLE   0
 
#define RTC1_CFG_SS3_AUTO_RELOADING_ENABLE   0
 
#define RTC1_CFG_SS1_MASK_VALUE   0
 
#define RTC1_CFG_SS2_MASK_VALUE   0
 
#define RTC1_CFG_SS3_MASK_VALUE   0
 
#define RTC1_CFG_SS4_MASK_VALUE   0
 
#define RTC_CFG_SS1_VALUE   32768/2
 
#define RTC1_CFG_SS1_AUTO_RELOAD_VALUE_HIGH   32768/2
 
#define RTC1_CFG_SS1_AUTO_RELOAD_VALUE_LOW   32768/2
 
#define RTC1_CFG_SS2_AUTO_RELOAD_VALUE_HIGH   32768/2
 
#define RTC1_CFG_SS2_AUTO_RELOAD_VALUE_LOW   32768/2
 
#define RTC1_CFG_SS3_AUTO_RELOAD_VALUE_HIGH   32768/2
 
#define RTC1_CFG_SS3_AUTO_RELOAD_VALUE_LOW   32768/2
 
#define RTC1_SS2_GPIN1SEL   0x4
 
#define RTC1_SS2_GPIN0SEL   0x3
 
#define RTC1_SS1_GPIN2SEL   0x2
 
#define RTC1_SS1_GPIN1SEL   0x1
 
#define RTC1_SS1_GPIN0SEL   0x0
 
#define RTC1_SS3_GPIN2SEL   0x0
 
#define RTC1_SS3_GPIN1SEL   0x7
 
#define RTC1_SS3_GPIN0SEL   0x6
 
#define RTC1_SS2_GPIN2SEL   0x5
 
#define RTC1_SS3_DIFFOUT   0
 
#define RTC1_SS1_DIFFOUT   0
 
#define RTC1_CFG_CR5SSS_OC1SMPEN   0
 
#define RTC1_CFG_CR5SSS_OC1SMPMTCHIRQEN   0
 
#define RTC1_CFG_CR5SSS_OC2SMPEN   0
 
#define RTC1_CFG_CR5SSS_OC2SMPMTCHIRQEN   0
 
#define RTC1_CFG_CR5SSS_OC3SMPEN   0
 
#define RTC1_CFG_CR5SSS_OC3SMPMTCHIRQEN   0
 
#define RTC1_CFG_CR6SSS_OC1SMPONFE   0
 
#define RTC1_CFG_CR6SSS_OC1SMPONRE   0
 
#define RTC1_CFG_CR6SSS_OC2SMPONFE   0
 
#define RTC1_CFG_CR6SSS_OC2SMPONRE   0
 
#define RTC1_CFG_CR6SSS_OC3SMPONFE   0
 
#define RTC1_CFG_CR6SSS_OC3SMPONRE   0
 
#define RTC1_CFG_CR7SSS_OC1SMPEXP   0
 
#define RTC1_CFG_CR7SSS_OC1SMPPTRN   0
 
#define RTC1_CFG_CR7SSS_OC2SMPEXP   0
 
#define RTC1_CFG_CR7SSS_OC2SMPPTRN   0
 
#define RTC1_CFG_CR7SSS_OC3SMPEXP   0
 
#define RTC1_CFG_CR7SSS_OC3SMPPTRN   0
 
#define RTC1_CFG_GPMUX0_OC1GPIN0SEL   0
 
#define RTC1_CFG_GPMUX0_OC1GPIN1SEL   1
 
#define RTC1_CFG_GPMUX0_OC1GPIN2SEL   2
 
#define RTC1_CFG_GPMUX0_OC2GPIN0SEL   3
 
#define RTC1_CFG_GPMUX0_OC2GPIN1SEL   4
 
#define RTC1_CFG_GPMUX1_OC2GPIN2SEL   5
 
#define RTC1_CFG_GPMUX1_OC3GPIN0SEL   6
 
#define RTC1_CFG_GPMUX1_OC3GPIN1SEL   7
 
#define RTC1_CFG_GPMUX1_OC3GPIN2SEL   0
 
#define RTC1_CFG_GPMUX1_OC1DIFFOUT   0
 
#define RTC1_CFG_GPMUX1_OC3DIFFOUT   0
 

Detailed Description

Macro Definition Documentation

◆ RTC1_CFG_ENABLE_ALARM

#define RTC1_CFG_ENABLE_ALARM   0

Enable the Alarm

Definition at line 170 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_ALARM_INTERRUPT

#define RTC1_CFG_ENABLE_ALARM_INTERRUPT   0

Enable the Alarm interrupt

Definition at line 173 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_TRIM

#define RTC1_CFG_ENABLE_TRIM   0

Enable the Trim

Definition at line 176 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_MOD60_ALARM

#define RTC1_CFG_ENABLE_MOD60_ALARM   0

Enable the mod-60 Alarm

Definition at line 179 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_MOD60_ALARM_PERIOD

#define RTC1_CFG_ENABLE_MOD60_ALARM_PERIOD   0

Enable the mod-60 Alarm period

Definition at line 182 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_MOD60_ALARM_INTERRUPT

#define RTC1_CFG_ENABLE_MOD60_ALARM_INTERRUPT   0

Enable the Alarm interrupt

Definition at line 185 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_ISO_INTERRUPT

#define RTC1_CFG_ENABLE_ISO_INTERRUPT   0

Enable the ISOINT interrupt

Definition at line 188 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_PENDERROR_INTERRUPT

#define RTC1_CFG_ENABLE_PENDERROR_INTERRUPT   0

Enable the PENDERROR interrupt

Definition at line 191 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_WSYNC_INTERRUPT

#define RTC1_CFG_ENABLE_WSYNC_INTERRUPT   0

Enable the write sync interrupt

Definition at line 194 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_WRITEPEND_INTERRUPT

#define RTC1_CFG_ENABLE_WRITEPEND_INTERRUPT   0

Enable the pend write interrupt

Definition at line 197 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_COUNT_INTERRUPT

#define RTC1_CFG_ENABLE_COUNT_INTERRUPT   0

Enable the RTC count interrupt

Definition at line 200 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_MOD1_COUNT_INTERRUPT

#define RTC1_CFG_ENABLE_MOD1_COUNT_INTERRUPT   0

Enable the prescaled modulo-1 interrupt

Definition at line 203 of file adi_rtc_config.h.

◆ RTC1_CFG_ENABLE_TRIM_INTERRUPT

#define RTC1_CFG_ENABLE_TRIM_INTERRUPT   0

Enable the Trim interrupt

Definition at line 206 of file adi_rtc_config.h.

◆ RTC1_CFG_CNT_MOD60_ROLLLOVER_INTERRUPT

#define RTC1_CFG_CNT_MOD60_ROLLLOVER_INTERRUPT   0

Enable the Mod60 roll over interrupt

Definition at line 209 of file adi_rtc_config.h.

◆ RTC1_CFG_PRESCALE

#define RTC1_CFG_PRESCALE   0

Prescale value for the RTC1

Definition at line 212 of file adi_rtc_config.h.

◆ RTC1_CFG_CNT_ROLLLOVER_INTERRUPT

#define RTC1_CFG_CNT_ROLLLOVER_INTERRUPT   0

Enable the counter roll over interrupt

Definition at line 215 of file adi_rtc_config.h.

◆ RTC1_CFG_COUNT_VALUE_0

#define RTC1_CFG_COUNT_VALUE_0   0

Initial the count Value-0

Definition at line 218 of file adi_rtc_config.h.

◆ RTC1_CFG_COUNT_VALUE_1

#define RTC1_CFG_COUNT_VALUE_1   0

Initial the count Value-1

Definition at line 221 of file adi_rtc_config.h.

◆ RTC1_CFG_ALARM_VALUE_0

#define RTC1_CFG_ALARM_VALUE_0   0

Alarm Value-0

Definition at line 224 of file adi_rtc_config.h.

◆ RTC1_CFG_ALARM_VALUE_1

#define RTC1_CFG_ALARM_VALUE_1   0

Alarm Value-1

Definition at line 227 of file adi_rtc_config.h.

◆ RTC1_CFG_ALARM_VALUE_2

#define RTC1_CFG_ALARM_VALUE_2   0

Alarm Value-2

Definition at line 230 of file adi_rtc_config.h.

◆ RTC1_CFG_TRIM_INTERVAL

#define RTC1_CFG_TRIM_INTERVAL   0

Trim interval

Definition at line 233 of file adi_rtc_config.h.

◆ RTC1_CFG_POW2_TRIM_INTERVAL

#define RTC1_CFG_POW2_TRIM_INTERVAL   0

Trim interval with power of 2

Definition at line 236 of file adi_rtc_config.h.

◆ RTC1_CFG_TRIM_OPERATION

#define RTC1_CFG_TRIM_OPERATION   0

Trim operation to be performed for RTC1

Definition at line 239 of file adi_rtc_config.h.

◆ RTC1_CFG_TRIM_VALUE

#define RTC1_CFG_TRIM_VALUE   0

Trim Value for RTC-1

Definition at line 242 of file adi_rtc_config.h.

◆ RTC1_CFG_IC0_ENABLE

#define RTC1_CFG_IC0_ENABLE   0

Enable the input capture channel-0

Definition at line 245 of file adi_rtc_config.h.

◆ RTC1_CFG_IC2_ENABLE

#define RTC1_CFG_IC2_ENABLE   0

Enable the input capture channel-2

Definition at line 248 of file adi_rtc_config.h.

◆ RTC1_CFG_IC3_ENABLE

#define RTC1_CFG_IC3_ENABLE   0

Enable the input capture channel-3

Definition at line 251 of file adi_rtc_config.h.

◆ RTC1_CFG_IC4_ENABLE

#define RTC1_CFG_IC4_ENABLE   0

Enable the input capture channel-4

Definition at line 254 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_ENABLE

#define RTC1_CFG_SS1_ENABLE   0

Enable the Sensor Strobe channel-1

Definition at line 257 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_ENABLE

#define RTC1_CFG_SS2_ENABLE   0

Enable the Sensor Strobe channel-2

Definition at line 259 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_ENABLE

#define RTC1_CFG_SS3_ENABLE   0

Enable the Sensor Strobe channel-3

Definition at line 261 of file adi_rtc_config.h.

◆ RTC1_CFG_SS4_ENABLE

#define RTC1_CFG_SS4_ENABLE   0

Enable the Sensor Strobe channel-4

Definition at line 263 of file adi_rtc_config.h.

◆ RTC1_CFG_IC0_INT_ENABLE

#define RTC1_CFG_IC0_INT_ENABLE   0

Enable the interrupt for input capture channel-0

Definition at line 266 of file adi_rtc_config.h.

◆ RTC1_CFG_IC2_INT_ENABLE

#define RTC1_CFG_IC2_INT_ENABLE   0

Enable the interrupt for input capture channel-2

Definition at line 269 of file adi_rtc_config.h.

◆ RTC1_CFG_IC3_INT_ENABLE

#define RTC1_CFG_IC3_INT_ENABLE   0

Enable the interrupt for input capture channel-3

Definition at line 272 of file adi_rtc_config.h.

◆ RTC1_CFG_IC4_INT_ENABLE

#define RTC1_CFG_IC4_INT_ENABLE   0

Enable the interrupt for input capture channel-4

Definition at line 275 of file adi_rtc_config.h.

◆ RTC1_CFG_IC_OVER_WRITE_ENABLE

#define RTC1_CFG_IC_OVER_WRITE_ENABLE   0

Enable the over write input capture channels

Definition at line 278 of file adi_rtc_config.h.

◆ RTC1_CFG_IC0_EDGE_POLARITY

#define RTC1_CFG_IC0_EDGE_POLARITY   0

Polarity for input capture channel-0

Definition at line 281 of file adi_rtc_config.h.

◆ RTC1_CFG_IC2_EDGE_POLARITY

#define RTC1_CFG_IC2_EDGE_POLARITY   0

Polarity for input capture channel-2

Definition at line 284 of file adi_rtc_config.h.

◆ RTC1_CFG_IC3_EDGE_POLARITY

#define RTC1_CFG_IC3_EDGE_POLARITY   0

Polarity for input capture channel-3

Definition at line 287 of file adi_rtc_config.h.

◆ RTC1_CFG_IC4_EDGE_POLARITY

#define RTC1_CFG_IC4_EDGE_POLARITY   0

Polarity for input capture channel-4

Definition at line 290 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_INT_ENABLE

#define RTC1_CFG_SS1_INT_ENABLE   0

Enable the interrupt for Sensor Strobe channel-1

Definition at line 293 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_INT_ENABLE

#define RTC1_CFG_SS2_INT_ENABLE   0

Enable the interrupt for Sensor Strobe channel-2

Definition at line 295 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_INT_ENABLE

#define RTC1_CFG_SS3_INT_ENABLE   0

Enable the interrupt for Sensor Strobe channel-3

Definition at line 297 of file adi_rtc_config.h.

◆ RTC1_CFG_SS4_INT_ENABLE

#define RTC1_CFG_SS4_INT_ENABLE   0

Enable the interrupt for Sensor Strobe channel-4

Definition at line 299 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_MASK_ENABLE

#define RTC1_CFG_SS1_MASK_ENABLE   0

Enable the masking for Sensor Strobe channel-1

Definition at line 302 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_MASK_ENABLE

#define RTC1_CFG_SS2_MASK_ENABLE   0

Enable the masking for Sensor Strobe channel-2

Definition at line 304 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_MASK_ENABLE

#define RTC1_CFG_SS3_MASK_ENABLE   0

Enable the masking for Sensor Strobe channel-3

Definition at line 306 of file adi_rtc_config.h.

◆ RTC1_CFG_SS4_MASK_ENABLE

#define RTC1_CFG_SS4_MASK_ENABLE   0

Enable the masking for Sensor Strobe channel-4

Definition at line 308 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_AUTO_RELOADING_ENABLE

#define RTC1_CFG_SS1_AUTO_RELOADING_ENABLE   0

Enable the auto-reloading for Sensor Strobe channel-0

Definition at line 311 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_AUTO_RELOADING_ENABLE

#define RTC1_CFG_SS2_AUTO_RELOADING_ENABLE   0

Enable the auto-reloading for Sensor Strobe channel-2 for aducm4050

Definition at line 315 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_AUTO_RELOADING_ENABLE

#define RTC1_CFG_SS3_AUTO_RELOADING_ENABLE   0

Enable the auto-reloading for Sensor Strobe channel-3 for aducm4050

Definition at line 317 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_MASK_VALUE

#define RTC1_CFG_SS1_MASK_VALUE   0

Mask for Sensor Strobe channel-0

Definition at line 321 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_MASK_VALUE

#define RTC1_CFG_SS2_MASK_VALUE   0

Mask for Sensor Strobe channel-2 for adumcm4050

Definition at line 325 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_MASK_VALUE

#define RTC1_CFG_SS3_MASK_VALUE   0

Mask for Sensor Strobe channel-3 for adumcm4050

Definition at line 327 of file adi_rtc_config.h.

◆ RTC1_CFG_SS4_MASK_VALUE

#define RTC1_CFG_SS4_MASK_VALUE   0

Mask for Sensor Strobe channel-4 for adumcm4050

Definition at line 329 of file adi_rtc_config.h.

◆ RTC_CFG_SS1_VALUE

#define RTC_CFG_SS1_VALUE   32768/2

Value for Sensor Strobe channel 1

Definition at line 338 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_AUTO_RELOAD_VALUE_HIGH

#define RTC1_CFG_SS1_AUTO_RELOAD_VALUE_HIGH   32768/2

Auto reload value for Sensor Strobe channel-1 for aducm4050 (high part)

Definition at line 342 of file adi_rtc_config.h.

◆ RTC1_CFG_SS1_AUTO_RELOAD_VALUE_LOW

#define RTC1_CFG_SS1_AUTO_RELOAD_VALUE_LOW   32768/2

Auto reload value for Sensor Strobe channel-1 for aducm4050 (low part)

Definition at line 344 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_AUTO_RELOAD_VALUE_HIGH

#define RTC1_CFG_SS2_AUTO_RELOAD_VALUE_HIGH   32768/2

Auto reload value for Sensor Strobe channel-2 for aducm4050 (high part)

Definition at line 347 of file adi_rtc_config.h.

◆ RTC1_CFG_SS2_AUTO_RELOAD_VALUE_LOW

#define RTC1_CFG_SS2_AUTO_RELOAD_VALUE_LOW   32768/2

Auto reload value for Sensor Strobe channel-2 for aducm4050 (low part)

Definition at line 349 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_AUTO_RELOAD_VALUE_HIGH

#define RTC1_CFG_SS3_AUTO_RELOAD_VALUE_HIGH   32768/2

Auto reload value for Sensor Strobe channel-3 for aducm4050 (high part)

Definition at line 352 of file adi_rtc_config.h.

◆ RTC1_CFG_SS3_AUTO_RELOAD_VALUE_LOW

#define RTC1_CFG_SS3_AUTO_RELOAD_VALUE_LOW   32768/2

Auto reload value for Sensor Strobe channel-3 for aducm4050 (low part)

Definition at line 354 of file adi_rtc_config.h.

◆ RTC1_SS2_GPIN1SEL

#define RTC1_SS2_GPIN1SEL   0x4

Sensor Strobe GP Input Sampling Mux SS2 GPIO Pin 1

GPMUX0/1.SSxGPINySEL 3’b000 3’b001 3’b010 3’b011 3’b100 3’b101 3’b110 3’b111 RTCSSxGPIny p0[12] p2[0] p0[9] p0[8] p1[13] p1[2] p2[7] p2[9]

Definition at line 363 of file adi_rtc_config.h.

◆ RTC1_SS2_GPIN0SEL

#define RTC1_SS2_GPIN0SEL   0x3

Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 0

Definition at line 365 of file adi_rtc_config.h.

◆ RTC1_SS1_GPIN2SEL

#define RTC1_SS1_GPIN2SEL   0x2

Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 2

Definition at line 367 of file adi_rtc_config.h.

◆ RTC1_SS1_GPIN1SEL

#define RTC1_SS1_GPIN1SEL   0x1

Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 1

Definition at line 369 of file adi_rtc_config.h.

◆ RTC1_SS1_GPIN0SEL

#define RTC1_SS1_GPIN0SEL   0x0

Sensor Strobe's GP Input Sampling Mux SS 1 GPIO Pin 0

Definition at line 371 of file adi_rtc_config.h.

◆ RTC1_SS3_GPIN2SEL

#define RTC1_SS3_GPIN2SEL   0x0

Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 2

Definition at line 373 of file adi_rtc_config.h.

◆ RTC1_SS3_GPIN1SEL

#define RTC1_SS3_GPIN1SEL   0x7

Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 1

Definition at line 375 of file adi_rtc_config.h.

◆ RTC1_SS3_GPIN0SEL

#define RTC1_SS3_GPIN0SEL   0x6

Sensor Strobe's GP Input Sampling Mux SS 3 GPIO Pin 0

Definition at line 377 of file adi_rtc_config.h.

◆ RTC1_SS2_GPIN2SEL

#define RTC1_SS2_GPIN2SEL   0x5

Sensor Strobe's GP Input Sampling Mux SS 2 GPIO Pin 2

Definition at line 379 of file adi_rtc_config.h.

◆ RTC1_SS3_DIFFOUT

#define RTC1_SS3_DIFFOUT   0

Differential output option for Sensor Strobe channel 3. Sensor Strobe channel3 is used as differential signal, actual RTC_SS3 out for this channel is available in corresponding GPIO. RTC_SS4 of Sensor Strobe channel 4 is used to provided inverted signal of RTC_SS3.

Definition at line 386 of file adi_rtc_config.h.

◆ RTC1_SS1_DIFFOUT

#define RTC1_SS1_DIFFOUT   0

Differential output option for Sensor Strobe channel 1. Sensor Strobe channel 1 is used as differential signal, actual RTC_SS1 out for this channel is available in corresponding GPIO. RTC_SS1 of Sensor Strobe channel 2 is used to provided inverted signal of RTC_SS1.

Definition at line 392 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC1SMPEN

#define RTC1_CFG_CR5SSS_OC1SMPEN   0

GPIO input sample enable for RTC SensorStrobe Channel 1.

Definition at line 395 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC1SMPMTCHIRQEN

#define RTC1_CFG_CR5SSS_OC1SMPMTCHIRQEN   0

Sample activity Interrupt enable for RTC SensorStrobe Channel 1.

Definition at line 398 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC2SMPEN

#define RTC1_CFG_CR5SSS_OC2SMPEN   0

GPIO input sample enable for RTC SensorStrobe Channel 2.

Definition at line 401 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC2SMPMTCHIRQEN

#define RTC1_CFG_CR5SSS_OC2SMPMTCHIRQEN   0

Sample activity Interrupt enable for RTC SensorStrobe Channel 2.

Definition at line 404 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC3SMPEN

#define RTC1_CFG_CR5SSS_OC3SMPEN   0

GPIO input sample enable for RTC SensorStrobe Channel 3.

Definition at line 407 of file adi_rtc_config.h.

◆ RTC1_CFG_CR5SSS_OC3SMPMTCHIRQEN

#define RTC1_CFG_CR5SSS_OC3SMPMTCHIRQEN   0

Sample activity Interrupt enable for RTC SensorStrobe Channel 3.

Definition at line 410 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC1SMPONFE

#define RTC1_CFG_CR6SSS_OC1SMPONFE   0

GPIO Sample around Falling Edge of SensorStrobe Channel 1.

Definition at line 413 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC1SMPONRE

#define RTC1_CFG_CR6SSS_OC1SMPONRE   0

GPIO Sample around Rising Edge of SensorStrobe Channel 1.

Definition at line 416 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC2SMPONFE

#define RTC1_CFG_CR6SSS_OC2SMPONFE   0

GPIO Sample around Falling Edge of SensorStrobe Channel 2.

Definition at line 419 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC2SMPONRE

#define RTC1_CFG_CR6SSS_OC2SMPONRE   0

GPIO Sample around Rising Edge of SensorStrobe Channel 2.

Definition at line 422 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC3SMPONFE

#define RTC1_CFG_CR6SSS_OC3SMPONFE   0

GPIO Sample around Falling Edge of SensorStrobe Channel 3.

Definition at line 425 of file adi_rtc_config.h.

◆ RTC1_CFG_CR6SSS_OC3SMPONRE

#define RTC1_CFG_CR6SSS_OC3SMPONRE   0

GPIO Sample around Rising Edge of SensorStrobe Channel 3.

Definition at line 428 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC1SMPEXP

#define RTC1_CFG_CR7SSS_OC1SMPEXP   0

Expected GPIO Sample for SensorStrobe Channel 1.

Definition at line 431 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC1SMPPTRN

#define RTC1_CFG_CR7SSS_OC1SMPPTRN   0

sample activity selection for SensorStrobe Channel 1.

Definition at line 434 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC2SMPEXP

#define RTC1_CFG_CR7SSS_OC2SMPEXP   0

Expected GPIO Sample for SensorStrobe Channel 2.

Definition at line 437 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC2SMPPTRN

#define RTC1_CFG_CR7SSS_OC2SMPPTRN   0

Sample activity selection for SensorStrobe Channel 2.

Definition at line 440 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC3SMPEXP

#define RTC1_CFG_CR7SSS_OC3SMPEXP   0

Expected GPIO Sample for SensorStrobe Channel 3.

Definition at line 443 of file adi_rtc_config.h.

◆ RTC1_CFG_CR7SSS_OC3SMPPTRN

#define RTC1_CFG_CR7SSS_OC3SMPPTRN   0

Sample activity selection for SensorStrobe Channel 3.

Definition at line 446 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX0_OC1GPIN0SEL

#define RTC1_CFG_GPMUX0_OC1GPIN0SEL   0

GPIO mux selection for SensorStrobe channel 1 input0.

Definition at line 449 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX0_OC1GPIN1SEL

#define RTC1_CFG_GPMUX0_OC1GPIN1SEL   1

GPIO mux selection for SensorStrobe channel 1 input1.

Definition at line 452 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX0_OC1GPIN2SEL

#define RTC1_CFG_GPMUX0_OC1GPIN2SEL   2

GPIO mux selection for SensorStrobe channel 1 input2.

Definition at line 455 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX0_OC2GPIN0SEL

#define RTC1_CFG_GPMUX0_OC2GPIN0SEL   3

GPIO mux selection for SensorStrobe channel 2 input0.

Definition at line 458 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX0_OC2GPIN1SEL

#define RTC1_CFG_GPMUX0_OC2GPIN1SEL   4

GPIO mux selection for SensorStrobe channel 2 input1.

Definition at line 461 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC2GPIN2SEL

#define RTC1_CFG_GPMUX1_OC2GPIN2SEL   5

GPIO mux selection for SensorStrobe channel 2 input2.

Definition at line 464 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC3GPIN0SEL

#define RTC1_CFG_GPMUX1_OC3GPIN0SEL   6

GPIO mux selection for SensorStrobe channel 3 input0.

Definition at line 467 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC3GPIN1SEL

#define RTC1_CFG_GPMUX1_OC3GPIN1SEL   7

GPIO mux selection for SensorStrobe channel 3 input1.

Definition at line 470 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC3GPIN2SEL

#define RTC1_CFG_GPMUX1_OC3GPIN2SEL   0

GPIO mux selection for SensorStrobe channel 3 input2.

Definition at line 473 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC1DIFFOUT

#define RTC1_CFG_GPMUX1_OC1DIFFOUT   0

Differential OPC out option for SensorStrobe channel 1.

Definition at line 476 of file adi_rtc_config.h.

◆ RTC1_CFG_GPMUX1_OC3DIFFOUT

#define RTC1_CFG_GPMUX1_OC3DIFFOUT   0

Differential OPC out option for SensorStrobe channel 3.

Definition at line 479 of file adi_rtc_config.h.