51 #include <adi_tmr_config.h> 52 #include <drivers/tmr/adi_tmr.h> 55 #if defined(__ADUCM302x__) 56 #define BITM_TMR_RGB_CTL_EN BITM_TMR_CTL_EN 57 #define PWM0CTL PWMCTL 58 #define PWM0MATCH PWMMATCH 59 #define BITM_TMR_RGB_STAT_BUSY BITM_TMR_STAT_BUSY 60 #define BITM_TMR_RGB_CTL_EVTEN BITM_TMR_CTL_EVTEN 61 #define BITM_TMR_RGB_CTL_RSTEN BITM_TMR_CTL_RSTEN 62 #define BITP_TMR_RGB_CTL_RSTEN BITP_TMR_CTL_RSTEN 63 #define BITP_TMR_RGB_CTL_EVTEN BITP_TMR_CTL_EVTEN 64 #define BITP_TMR_RGB_CTL_PRE BITP_TMR_CTL_PRE 65 #define BITP_TMR_RGB_CTL_CLK BITP_TMR_CTL_CLK 66 #define BITP_TMR_RGB_CTL_MODE BITP_TMR_CTL_MODE 67 #define BITP_TMR_RGB_CTL_UP BITP_TMR_CTL_UP 68 #define BITP_TMR_RGB_CTL_RLD BITP_TMR_CTL_RLD 69 #define BITP_TMR_RGB_CTL_SYNCBYP BITP_TMR_CTL_SYNCBYP 70 #define BITP_TMR_RGB_PWM0CTL_IDLESTATE BITP_TMR_PWMCTL_IDLESTATE 71 #define BITP_TMR_RGB_PWM0CTL_MATCH BITP_TMR_PWMCTL_MATCH 72 #define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT 73 #define BITM_TMR_RGB_STAT_PDOK BITM_TMR_STAT_PDOK 74 #define BITM_TMR_RGB_STAT_TIMEOUT BITM_TMR_STAT_TIMEOUT 75 #define BITM_TMR_RGB_STAT_CAPTURE BITM_TMR_STAT_CAPTURE 76 #define BITM_TMR_RGB_CLRINT_EVTCAPT BITM_TMR_CLRINT_EVTCAPT 77 #define BITM_TMR_RGB_CLRINT_TIMEOUT BITM_TMR_CLRINT_TIMEOUT 78 #define BITM_TMR_RGB_CTL_RLD BITM_TMR_CTL_RLD 82 static uint16_t aTimerCtlConfig[] =
111 #if defined(__ADUCM4x50__) 112 (TMR3_CFG_COUNT_UP << BITP_TMR_RGB_CTL_UP) |
113 (TMR3_CFG_MODE << BITP_TMR_RGB_CTL_MODE) |
114 (TMR3_CFG_PRESCALE_FACTOR << BITP_TMR_RGB_CTL_PRE) |
115 (TMR3_CFG_CLOCK_SOURCE << BITP_TMR_RGB_CTL_CLK) |
116 (TMR3_CFG_ENABLE_RELOADING << BITP_TMR_RGB_CTL_RLD) |
117 (TMR3_CFG_ENABLE_SYNC_BYPASS << BITP_TMR_RGB_CTL_SYNCBYP) |
118 (TMR3_CFG_ENABLE_PRESCALE_RESET << BITP_TMR_RGB_CTL_RSTEN) |
119 (TMR3_CFG_ENABLE_EVENT_CAPTURE << BITP_TMR_RGB_CTL_EVTEN),
124 static uint16_t aTimerLoadConfig[] =
129 #if defined(__ADUCM4x50__) 135 static uint16_t aTimerALoadConfig[] =
140 #if defined(__ADUCM4x50__) 141 TMR3_CFG_ASYNC_LOAD_VALUE,
146 #if defined(__ADUCM4x50__) 147 static uint16_t aTimerEventConfig[] =
152 TMR3_CFG_EVENT_CAPTURE,
157 static uint16_t aTimerPwmCtlConfig[] =
168 #if defined(__ADUCM4x50__) 169 (TMR3_CFG_PWM0_IDLE_STATE << BITP_TMR_RGB_PWM0CTL_IDLESTATE) |
170 (TMR3_CFG_PWM0_MATCH_VALUE << BITP_TMR_RGB_PWM0CTL_MATCH),
172 (TMR3_CFG_PWM1_IDLE_STATE << BITP_TMR_RGB_PWM1CTL_IDLESTATE) |
173 (TMR3_CFG_PWM1_MATCH_VALUE << BITP_TMR_RGB_PWM1CTL_MATCH),
175 (TMR3_CFG_PWM2_IDLE_STATE << BITP_TMR_RGB_PWM2CTL_IDLESTATE) |
176 (TMR3_CFG_PWM2_MATCH_VALUE << BITP_TMR_RGB_PWM2CTL_MATCH),
181 static uint16_t aTimerPwmMatchConfig[] = {
185 #if defined(__ADUCM4x50__) 186 TMR3_CFG_PWM0_MATCH_VALUE,
187 TMR3_CFG_PWM1_MATCH_VALUE,
188 TMR3_CFG_PWM2_MATCH_VALUE
#define TMR0_CFG_PWM0_MATCH_VALUE
#define TMR2_CFG_LOAD_VALUE
#define TMR2_CFG_ENABLE_PRESCALE_RESET
#define TMR0_CFG_ENABLE_RELOADING
#define TMR2_CFG_ENABLE_SYNC_BYPASS
#define TMR1_CFG_LOAD_VALUE
#define TMR0_CFG_PWM0_IDLE_STATE
#define TMR1_CFG_PRESCALE_FACTOR
#define TMR2_CFG_COUNT_UP
#define TMR0_CFG_ENABLE_SYNC_BYPASS
#define TMR1_CFG_PWM0_MATCH_VALUE
#define TMR1_CFG_CLOCK_SOURCE
#define TMR1_CFG_ENABLE_RELOADING
#define TMR2_CFG_ENABLE_RELOADING
#define TMR2_CFG_PRESCALE_FACTOR
#define TMR1_CFG_EVENT_CAPTURE
#define TMR0_CFG_CLOCK_SOURCE
#define TMR1_CFG_PWM0_IDLE_STATE
#define TMR1_CFG_ENABLE_SYNC_BYPASS
#define TMR1_CFG_ASYNC_LOAD_VALUE
#define TMR2_CFG_CLOCK_SOURCE
#define TMR2_CFG_PWM0_MATCH_VALUE
#define TMR1_CFG_ENABLE_EVENT_CAPTURE
#define TMR2_CFG_PWM0_IDLE_STATE
#define TMR1_CFG_COUNT_UP
#define TMR1_CFG_ENABLE_PRESCALE_RESET
#define TMR0_CFG_COUNT_UP
#define TMR0_CFG_LOAD_VALUE
#define TMR0_CFG_ASYNC_LOAD_VALUE
#define TMR2_CFG_ENABLE_EVENT_CAPTURE
#define TMR0_CFG_ENABLE_EVENT_CAPTURE
#define TMR0_CFG_EVENT_CAPTURE
#define TMR0_CFG_PRESCALE_FACTOR
#define TMR2_CFG_ASYNC_LOAD_VALUE
#define TMR2_CFG_EVENT_CAPTURE
#define TMR0_CFG_ENABLE_PRESCALE_RESET