58 #if defined(__ADUCM302x__) 59 #define BITP_CLKG_OSC_CTL_LFX_FAIL_STA BITP_CLKG_OSC_CTL_LFX_FAIL_STAT 62 #if defined ( __ADSPGCC__ ) 63 #define UNUSED __attribute__ ((unused)) 71 #include <rtos_map/adi_rtos_map.h> 109 #pragma diag_suppress=Pm011,Pm123,Pm073,Pm143,Pm050,Pm109,Pm150,Pm140,Pm129,Pm029,Pm126,Pm031 114 #include <drivers/rtc/adi_rtc.h> 128 #include <RTE_Components.h> 132 #include "adi_rtc_data.c" 134 #define RTC_SNAPSHOT_KEY (0x7627u) 135 #define RTC_FRZCNT_KEY (0x9376u) 138 struct adi_rtc_snapshots
145 #if defined(__ADUCM302x__) 146 #define BITP_RTC_SSMSK_SS1MSK BITP_RTC_SSMSK_SSMSK 149 #if defined(__ADUCM4x50__) 154 #ifndef ADUCM4050_SI_REV 155 #define ADUCM4050_SI_REV (1) 162 #define WA_21000023 (1) 166 static uint16_t cr0 = 0u, cr1 = 0u, cr3oc = 0u, cr4oc = 0u, cr2ic = 0u, cr5ocs = 0u;
171 uint16_t bitPositionl;
176 { &cr0, BITP_RTC_CR0_ALMINTEN },
177 { &cr0, BITP_RTC_CR0_MOD60ALMINTEN },
178 { &cr0, BITP_RTC_CR0_ISOINTEN },
179 { &cr0, BITP_RTC_CR0_WPNDERRINTEN },
180 { &cr0, BITP_RTC_CR0_WSYNCINTEN },
181 { &cr0, BITP_RTC_CR0_WPNDINTEN },
182 { &cr1, BITP_RTC_CR1_CNTINTEN },
183 { &cr1, BITP_RTC_CR1_PSINTEN },
184 { &cr1, BITP_RTC_CR1_TRMINTEN },
185 { &cr1, BITP_RTC_CR1_CNTROLLINTEN },
186 { &cr1, BITP_RTC_CR1_CNTMOD60ROLLINTEN },
187 { &cr3oc, BITP_RTC_CR3SS_SS1IRQEN },
188 { &cr3oc, BITP_RTC_CR3SS_SS2IRQEN },
189 { &cr3oc, BITP_RTC_CR3SS_SS2IRQEN },
190 { &cr3oc, BITP_RTC_CR3SS_SS4IRQEN },
191 { &cr2ic, BITP_RTC_CR2IC_IC0IRQEN },
192 { &cr2ic, BITP_RTC_CR2IC_IC2IRQEN },
193 { &cr2ic, BITP_RTC_CR2IC_IC3IRQEN },
194 { &cr2ic, BITP_RTC_CR2IC_IC4IRQEN },
195 { &cr2ic, BITP_CLKG_OSC_CTL_LFX_FAIL_STA },
196 { &cr3oc, BITM_RTC_CR3SS_SS4FEIRQEN},
197 { &cr3oc, BITM_RTC_CR3SS_SS3FEIRQEN},
198 { &cr3oc, BITM_RTC_CR3SS_SS2FEIRQEN},
199 { &cr3oc, BITM_RTC_CR3SS_SS1FEIRQEN},
200 { &cr4oc, BITP_RTC_CR4SS_SS4MSKEN},
201 { &cr4oc, BITP_RTC_CR4SS_SS3MSKEN},
202 { &cr4oc, BITP_RTC_CR4SS_SS2MSKEN},
203 { &cr4oc, BITP_RTC_CR4SS_SS1MSKEN},
204 { &cr5ocs, BITP_RTC_CR5SSS_SS3SMPMTCHIRQEN},
205 { &cr5ocs, BITP_RTC_CR5SSS_SS2SMPMTCHIRQEN},
206 { &cr5ocs, BITP_RTC_CR5SSS_SS1SMPMTCHIRQEN}
210 #elif defined(__ADUCM302x__) 213 static uint16_t cr0 = 0u, cr1 = 0u, cr3oc = 0u, cr4oc = 0u, cr2ic = 0u;
218 uint16_t bitPositionl;
223 { &cr0, BITP_RTC_CR0_ALMINTEN },
224 { &cr0, BITP_RTC_CR0_MOD60ALMINTEN },
225 { &cr0, BITP_RTC_CR0_ISOINTEN },
226 { &cr0, BITP_RTC_CR0_WPNDERRINTEN },
227 { &cr0, BITP_RTC_CR0_WSYNCINTEN },
228 { &cr0, BITP_RTC_CR0_WPNDINTEN },
229 { &cr1, BITP_RTC_CR1_CNTINTEN },
230 { &cr1, BITP_RTC_CR1_PSINTEN },
231 { &cr1, BITP_RTC_CR1_TRMINTEN },
232 { &cr1, BITP_RTC_CR1_CNTROLLINTEN },
233 { &cr1, BITP_RTC_CR1_CNTMOD60ROLLINTEN },
234 { &cr3oc, BITP_RTC_CR3SS_SS1IRQEN },
235 { &cr2ic, BITP_RTC_CR2IC_IC0IRQEN },
236 { &cr2ic, BITP_RTC_CR2IC_IC2IRQEN },
237 { &cr2ic, BITP_RTC_CR2IC_IC3IRQEN },
238 { &cr2ic, BITP_RTC_CR2IC_IC4IRQEN },
241 #error RTC is not ported for this processor 246 void RTC0_Int_Handler(
void);
247 void RTC1_Int_Handler(
void);
258 for(i = 0u; i < ADI_RTC_NUM_INSTANCE; i++)
260 if(aRTCDeviceInfo[i].hDevice == pInDevice)
302 uint32_t DeviceNumber,
308 ADI_RTC_DEVICE *pDevice = pDeviceMemory;
314 if ( DeviceNumber >= ADI_RTC_NUM_INSTANCE)
319 if (aRTCDeviceInfo[DeviceNumber].hDevice != NULL)
330 memset(pDeviceMemory,0,MemorySize);
332 pDevice->pRTCRegs = aRTCDeviceInfo[DeviceNumber].pRTCRegs;
341 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
342 pDevice->pRTCRegs->CR0 = 0u;
343 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
344 pDevice->pRTCRegs->CR1 = 0u;
345 ALWAYS_SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
346 ALWAYS_SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
353 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0)
355 ALWAYS_SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCSR0)
364 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
365 pDevice->pRTCRegs->CNT0 = 0u;
366 pDevice->pRTCRegs->CNT1 = 0u;
367 ALWAYS_SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1))
370 aRTCDeviceInfo[DeviceNumber].hDevice = pDevice;
371 pDevice->pDeviceInfo = &aRTCDeviceInfo[DeviceNumber];
374 rtc_init(pDevice,&aRTCConfig[DeviceNumber]);
378 pDevice->eIRQn = aRTCDeviceInfo[DeviceNumber].eIRQn;
380 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
401 ADI_RTC_DEVICE *pDevice = hDevice;
412 NVIC_DisableIRQ( pDevice->eIRQn);
414 pDevice->pRTCRegs = NULL;
415 pDevice->pfCallback = NULL;
416 pDevice->pCBParam = NULL;
417 pDevice->cbWatch = 0u;
419 pDevice->pDeviceInfo->hDevice = NULL;
463 ADI_RTC_DEVICE *pDevice = hDevice;
473 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
475 ADI_INT_STATUS_ALLOC();
476 ADI_ENTER_CRITICAL_REGION();
480 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_ALMEN;
484 pDevice->pRTCRegs->CR0 &= (uint16_t)(~BITM_RTC_CR0_ALMEN);
486 ADI_EXIT_CRITICAL_REGION();
489 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
526 ADI_RTC_DEVICE *pDevice = hDevice;
534 if(pDevice->pRTCRegs == pADI_RTC0)
542 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
544 ADI_INT_STATUS_ALLOC();
545 ADI_ENTER_CRITICAL_REGION();
549 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_MOD60ALMEN;
553 pDevice->pRTCRegs->CR0 &= (uint16_t)(~BITM_RTC_CR0_MOD60ALMEN);
555 ADI_EXIT_CRITICAL_REGION();
558 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
588 ADI_RTC_DEVICE *pDevice = hDevice;
599 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
602 ADI_INT_STATUS_ALLOC();
603 ADI_ENTER_CRITICAL_REGION();
607 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_CNTEN;
611 pDevice->pRTCRegs->CR0 &=(uint16_t)(~BITM_RTC_CR0_CNTEN);
613 ADI_EXIT_CRITICAL_REGION();
616 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
648 ADI_RTC_DEVICE *pDevice = hDevice;
660 )) & (uint16_t)Interrupts) != 0u))
668 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
669 PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
672 cr0 = 0u; cr1 = 0u; cr3oc = 0u; cr4oc = 0u; cr2ic = 0u;
674 #if defined(__ADUCM4x50__) 680 if( 0u != (Interrupts & 1u) )
682 uint16_t *cr = Interrupt_Details[ndx].cr;
683 uint16_t enableBitPosition = Interrupt_Details[ndx].bitPositionl;
684 *cr = *cr | (1u << enableBitPosition);
692 pDevice->pRTCRegs->CR0 |= cr0;
693 pDevice->pRTCRegs->CR1 |= cr1;
694 pDevice->pRTCRegs->CR3SS |= cr3oc;
695 pDevice->pRTCRegs->CR4SS |= cr4oc;
696 pDevice->pRTCRegs->CR2IC |= cr2ic;
698 #if defined(__ADUCM4x50__) 699 pDevice->pRTCRegs->CR5SSS |= cr5ocs;
704 pDevice->pRTCRegs->CR0 &= ~cr0;
705 pDevice->pRTCRegs->CR1 &= ~cr1;
706 pDevice->pRTCRegs->CR3SS &= ~cr3oc;
707 pDevice->pRTCRegs->CR4SS &= ~cr4oc;
708 pDevice->pRTCRegs->CR2IC &= ~cr2ic;
709 #if defined(__ADUCM4x50__) 710 pDevice->pRTCRegs->CR5SSS &= ~cr5ocs;
713 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
714 SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
747 ADI_RTC_DEVICE *pDevice = hDevice;
757 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
759 ADI_INT_STATUS_ALLOC();
760 ADI_ENTER_CRITICAL_REGION();
764 pDevice->pRTCRegs->CR0 |= BITM_RTC_CR0_TRMEN;
768 pDevice->pRTCRegs->CR0 &=(uint16_t)(~BITM_RTC_CR0_TRMEN);
770 ADI_EXIT_CRITICAL_REGION();
773 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
793 ADI_RTC_DEVICE *pDevice = hDevice;
803 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
805 ADI_INT_STATUS_ALLOC();
806 ADI_ENTER_CRITICAL_REGION();
810 pDevice->pRTCRegs->CR2IC |=(uint16_t)eInpChannel;
814 pDevice->pRTCRegs->CR2IC &= (uint16_t)(~(uint16_t)eInpChannel);
816 ADI_EXIT_CRITICAL_REGION();
819 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
839 ADI_RTC_DEVICE *pDevice = hDevice;
849 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
851 ADI_INT_STATUS_ALLOC();
852 ADI_ENTER_CRITICAL_REGION();
856 pDevice->pRTCRegs->CR2IC |= BITM_RTC_CR2IC_ICOWUSEN;
860 pDevice->pRTCRegs->CR2IC &= (uint16_t)~BITM_RTC_CR2IC_ICOWUSEN;
862 ADI_EXIT_CRITICAL_REGION();
865 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
886 ADI_RTC_DEVICE *pDevice = hDevice;
887 uint32_t nInpChannel = (uint16_t)eInpChannel;
897 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR2IC)
899 ADI_INT_STATUS_ALLOC();
900 ADI_ENTER_CRITICAL_REGION();
904 pDevice->pRTCRegs->CR2IC |= (uint16_t)(nInpChannel << BITP_RTC_CR2IC_IC0LH);
908 pDevice->pRTCRegs->CR2IC &= (uint16_t)~(nInpChannel << BITP_RTC_CR2IC_IC0LH);
910 ADI_EXIT_CRITICAL_REGION();
913 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR2IC)
933 ADI_RTC_DEVICE *pDevice = hDevice;
943 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR3SS)
945 ADI_INT_STATUS_ALLOC();
946 ADI_ENTER_CRITICAL_REGION();
950 pDevice->pRTCRegs->CR3SS |=(uint16_t)eSSChannel;
954 pDevice->pRTCRegs->CR3SS &= (uint16_t)(~(uint16_t)eSSChannel);
956 ADI_EXIT_CRITICAL_REGION();
959 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR3SS)
980 ADI_RTC_DEVICE *pDevice = hDevice;
990 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDCR4SS)
992 ADI_INT_STATUS_ALLOC();
993 ADI_ENTER_CRITICAL_REGION();
1001 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS1ARLEN;
1003 #if defined(__ADUCM4x50__) 1004 case ADI_RTC_SS_CHANNEL_2:
1005 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS2ARLEN;
1007 case ADI_RTC_SS_CHANNEL_3:
1008 pDevice->pRTCRegs->CR4SS |= BITM_RTC_CR4SS_SS3ARLEN;
1021 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS1ARLEN;
1023 #if defined(__ADUCM4x50__) 1024 case ADI_RTC_SS_CHANNEL_2:
1025 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS2ARLEN;
1027 case ADI_RTC_SS_CHANNEL_3:
1028 pDevice->pRTCRegs->CR4SS &= (uint16_t)~BITM_RTC_CR4SS_SS3ARLEN;
1035 ADI_EXIT_CRITICAL_REGION();
1038 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR4SS)
1042 #if defined(__ADUCM302x__) 1060 #elif defined(__ADUCM4x50__) 1079 uint16_t nHighValue)
1082 ADI_RTC_DEVICE *pDevice = hDevice;
1092 switch( eSSChannel )
1096 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1097 #if defined(__ADUCM4x50__) 1098 pDevice->pRTCRegs->SS1LOWDUR = nLowValue;
1099 pDevice->pRTCRegs->SS1HIGHDUR= nHighValue;
1101 pDevice->pRTCRegs->SS1ARL = nValue;
1104 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS1)
1106 #if defined(__ADUCM4x50__) 1107 case ADI_RTC_SS_CHANNEL_2:
1109 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1110 pDevice->pRTCRegs->SS2LOWDUR = nLowValue;
1111 pDevice->pRTCRegs->SS2HIGHDUR= nHighValue;
1113 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS2)
1116 case ADI_RTC_SS_CHANNEL_3:
1118 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1119 pDevice->pRTCRegs->SS3LOWDUR = nLowValue;
1120 pDevice->pRTCRegs->SS3HIGHDUR= nHighValue;
1122 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS3)
1150 ADI_RTC_DEVICE *pDevice = hDevice;
1160 PEND_BEFORE_WRITE(SR5, BITM_RTC_SR5_WPENDCR4SS)
1162 ADI_INT_STATUS_ALLOC();
1163 ADI_ENTER_CRITICAL_REGION();
1167 pDevice->pRTCRegs->CR4SS |= (uint16_t)eSSChannel;
1171 pDevice->pRTCRegs->CR4SS &= (uint16_t)~(uint16_t)eSSChannel;
1173 ADI_EXIT_CRITICAL_REGION();
1176 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCCR4SS)
1195 ADI_RTC_DEVICE *pDevice = hDevice;
1196 uint16_t MaskPos = 0u;
1206 switch( eSSChannel )
1209 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS1MSK;
1211 #if defined(__ADUCM4x50__) 1212 case ADI_RTC_SS_CHANNEL_2:
1213 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS2MSK;
1216 case ADI_RTC_SS_CHANNEL_3:
1217 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS3MSK;
1220 case ADI_RTC_SS_CHANNEL_4:
1221 MaskPos = (uint16_t)BITP_RTC_SSMSK_SS4MSK;
1229 PEND_BEFORE_WRITE(SR5, BITM_RTC_SR5_WPENDSSMSK)
1232 pDevice->pRTCRegs->SSMSK |= ((uint16_t)nMask & 0xFu) << MaskPos;
1235 SYNC_AFTER_WRITE(SR4, BITM_RTC_SR4_WSYNCSSMSK)
1265 ADI_RTC_DEVICE *pDevice = hDevice;
1276 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1279 NVIC_DisableIRQ(pDevice->eIRQn);
1280 nAlarm =(uint32_t) pDevice->pRTCRegs->ALM1 << 16u;
1281 nAlarm |= (uint32_t)pDevice->pRTCRegs->ALM0;
1282 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
1306 ADI_RTC_DEVICE *pDevice = hDevice;
1307 uint32_t nAlarm,nTemp;
1319 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1320 nPreScale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
1322 NVIC_DisableIRQ(pDevice->eIRQn);
1323 nAlarm = (uint32_t)pDevice->pRTCRegs->ALM1 << 16u;
1324 nAlarm |= (uint32_t)pDevice->pRTCRegs->ALM0;
1325 NVIC_EnableIRQ((IRQn_Type)pDevice->eIRQn);
1326 nTemp = 1lu<<nPreScale;
1327 fFraction = (float)pDevice->pRTCRegs->ALM2 /(
float)(nTemp);
1329 *pAlarm = (float)nAlarm+fFraction;
1354 ADI_RTC_DEVICE *pDevice = hDevice;
1365 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
1368 NVIC_DisableIRQ(pDevice->eIRQn);
1369 *pAlarm0= pDevice->pRTCRegs->ALM0;
1370 *pAlarm1= pDevice->pRTCRegs->ALM1;
1371 *pAlarm2= pDevice->pRTCRegs->ALM2;
1372 NVIC_EnableIRQ((IRQn_Type)(pDevice->eIRQn));
1398 ADI_RTC_DEVICE *pDevice = hDevice;
1408 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
1413 *pControl = pDevice->pRTCRegs->CR0;
1416 *pControl = pDevice->pRTCRegs->CR1;
1446 struct adi_rtc_snapshots snapshots;
1456 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1459 *pCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1482 struct adi_rtc_snapshots snapshots;
1484 uint32_t nCount,nTemp;
1486 ADI_RTC_DEVICE *pDevice = hDevice;
1496 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1498 nPrescale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
1499 nCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1500 nTemp = (1lu<<nPrescale);
1501 fFraction = ((float)snapshots.snapshot2)/((float)nTemp);
1502 *pfCount = ((float)nCount) + fFraction;
1527 struct adi_rtc_snapshots snapshots;
1530 ADI_RTC_DEVICE *pDevice = hDevice;
1538 eResult = adi_rtc_GetCoherentCounterValues(hDevice, &snapshots);
1540 *pnCount = (((uint32_t)snapshots.snapshot1) << 16u) | snapshots.snapshot0;
1541 *pfCount = (uint32_t)snapshots.snapshot2;
1579 ADI_RTC_DEVICE *pDevice = hDevice;
1580 uint32_t nInterrupt = 0u;
1596 if( pDevice->pRTCRegs == pADI_RTC1)
1645 ADI_RTC_DEVICE *pDevice = hDevice;
1664 if( pDevice->pRTCRegs == pADI_RTC1)
1674 if ((((uint32_t)Status) & validInput) == 0u)
1681 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0)
1687 pDevice->pRTCRegs->SR0 |= (uint16_t) nStatus;
1690 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCSR0)
1694 if(pDevice->pRTCRegs == pADI_RTC1)
1703 pDevice->pRTCRegs->SR2 |= (uint16_t) nStatus;
1709 pDevice->pRTCRegs->SR3 |= (uint16_t) nStatus;
1737 ADI_RTC_DEVICE *pDevice = hDevice;
1751 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDTRM);
1776 ADI_RTC_DEVICE *pDevice = hDevice;
1785 switch( eSSChannel )
1788 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1789 *pValue = pDevice->pRTCRegs->SS1;
1791 #if defined(__ADUCM4x50__) 1792 case ADI_RTC_SS_CHANNEL_2:
1794 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1795 *pValue = pDevice->pRTCRegs->SS2;
1798 case ADI_RTC_SS_CHANNEL_3:
1800 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1801 *pValue = pDevice->pRTCRegs->SS3;
1804 case ADI_RTC_SS_CHANNEL_4:
1805 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS4)
1806 *pValue = pDevice->pRTCRegs->SS4;
1836 ADI_RTC_DEVICE *pDevice = hDevice;
1845 switch( eSSChannel )
1849 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS1)
1850 pDevice->pRTCRegs->SS1 = nValue;
1852 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS1)
1855 #if defined(__ADUCM4x50__) 1856 case ADI_RTC_SS_CHANNEL_2:
1858 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS2)
1859 pDevice->pRTCRegs->SS2 = nValue;
1861 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS2)
1864 case ADI_RTC_SS_CHANNEL_3:
1866 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS3)
1867 pDevice->pRTCRegs->SS3 = nValue;
1869 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS3)
1872 case ADI_RTC_SS_CHANNEL_4:
1874 PEND_BEFORE_WRITE(SR5,BITM_RTC_SR5_WPENDSS4)
1875 pDevice->pRTCRegs->SS4 = nValue;
1877 SYNC_AFTER_WRITE(SR4,BITM_RTC_SR4_WSYNCSS4)
1921 ADI_RTC_DEVICE *pDevice = hDevice;
1932 *pSnap0=pDevice->pRTCRegs->SNAP0;
1933 *pSnap1=pDevice->pRTCRegs->SNAP1;
1934 *pSnap2=pDevice->pRTCRegs->SNAP2;
1937 *pSnap2= pDevice->pRTCRegs->IC2;
1938 *pSnap0 = *pSnap1 = 0u;
1941 *pSnap2= pDevice->pRTCRegs->IC3;
1942 *pSnap0 = *pSnap1 = 0u;
1945 *pSnap2= pDevice->pRTCRegs->IC4;
1946 *pSnap0 = *pSnap1 = 0u;
1977 ADI_RTC_DEVICE *pDevice = hDevice;
1989 *pValue = pDevice->pRTCRegs->IC2;
1992 *pValue = pDevice->pRTCRegs->IC3;
1996 *pValue = pDevice->pRTCRegs->IC4;
2027 ADI_RTC_DEVICE *pDevice = hDevice;
2042 *pFraction = pDevice->pRTCRegs->SNAP2;
2043 *pValue = (uint32_t)pDevice->pRTCRegs->SNAP1 << 16u;
2044 *pValue |= (uint32_t)pDevice->pRTCRegs->SNAP0;
2092 ADI_RTC_DEVICE *pDevice = hDevice;
2102 nPendBits = pDevice->pRTCRegs->SR1 & ADI_RTC_WRITE_STATUS_MASK;
2151 ADI_RTC_DEVICE *pDevice = hDevice;
2161 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDSR0);
2164 nSyncBits = pDevice->pRTCRegs->SR0 & ADI_RTC_WRITE_STATUS_MASK;
2201 ADI_RTC_DEVICE *pDevice = hDevice;
2211 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2213 ADI_INT_STATUS_ALLOC();
2214 ADI_ENTER_CRITICAL_REGION();
2216 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2217 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2218 pDevice->pRTCRegs->ALM2 = 0u;
2219 ADI_EXIT_CRITICAL_REGION();
2222 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2223 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2253 ADI_RTC_DEVICE *pDevice = hDevice;
2265 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2267 ADI_INT_STATUS_ALLOC();
2268 ADI_ENTER_CRITICAL_REGION();
2270 pDevice->pRTCRegs->ALM0 = nAlarm0;
2271 pDevice->pRTCRegs->ALM1 = nAlarm1;
2272 pDevice->pRTCRegs->ALM2 = nAlarm2;
2273 ADI_EXIT_CRITICAL_REGION();
2276 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2277 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2309 ADI_RTC_DEVICE *pDevice = hDevice;
2319 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2321 ADI_INT_STATUS_ALLOC();
2322 ADI_ENTER_CRITICAL_REGION();
2324 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2325 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2326 pDevice->pRTCRegs->ALM2 = 0u;
2327 ADI_EXIT_CRITICAL_REGION();
2359 ADI_RTC_DEVICE *pDevice = hDevice;
2371 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2373 ADI_INT_STATUS_ALLOC();
2374 ADI_ENTER_CRITICAL_REGION();
2376 pDevice->pRTCRegs->ALM0 = nAlarm0;
2377 pDevice->pRTCRegs->ALM1 = nAlarm1;
2378 pDevice->pRTCRegs->ALM2 = nAlarm2;
2379 ADI_EXIT_CRITICAL_REGION();
2408 ADI_RTC_DEVICE *pDevice = hDevice;
2418 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2419 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2444 ADI_RTC_DEVICE *pDevice = hDevice;
2453 if(pDevice->pRTCRegs == pADI_RTC0)
2458 PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
2459 ADI_INT_STATUS_ALLOC();
2460 ADI_ENTER_CRITICAL_REGION();
2463 nTemp = pDevice->pRTCRegs->CR1 & (uint16_t)~BITM_RTC_CR1_PRESCALE2EXP;
2464 nTemp |= (uint16_t)((uint16_t)nPreScale << BITP_RTC_CR1_PRESCALE2EXP);
2465 pDevice->pRTCRegs->CR1 = nTemp;
2466 ADI_EXIT_CRITICAL_REGION();
2468 SYNC_AFTER_WRITE(SR2,BITM_RTC_SR2_WSYNCCR1MIR)
2490 ADI_RTC_DEVICE *pDevice = hDevice;
2500 if(pDevice->pRTCRegs == pADI_RTC0)
2508 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2510 ADI_INT_STATUS_ALLOC();
2511 ADI_ENTER_CRITICAL_REGION();
2514 nTemp = pDevice->pRTCRegs->CR0 & BITM_RTC_CR0_MOD60ALM;
2515 nTemp |= (uint16_t)((uint16_t)nPeriod << BITP_RTC_CR0_MOD60ALM);
2516 pDevice->pRTCRegs->CR0 = nTemp;
2517 ADI_EXIT_CRITICAL_REGION();
2519 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
2546 ADI_RTC_DEVICE *pDevice = hDevice;
2547 uint32_t nAlarm = (uint32_t)fAlarm,nTemp;
2557 if(pDevice->pRTCRegs == pADI_RTC0)
2565 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2566 nPreScale = (pDevice->pRTCRegs->CR1&BITM_RTC_CR1_PRESCALE2EXP)>>BITP_RTC_CR1_PRESCALE2EXP;
2567 ADI_INT_STATUS_ALLOC();
2568 ADI_ENTER_CRITICAL_REGION();
2571 pDevice->pRTCRegs->ALM0 = (uint16_t)nAlarm;
2572 pDevice->pRTCRegs->ALM1 = (uint16_t)(nAlarm >> 16);
2573 nTemp = 1lu<<nPreScale;
2574 fFraction = (fAlarm - (float)nAlarm) *(float)(nTemp);
2575 pDevice->pRTCRegs->ALM2 = (uint16_t)(fFraction);
2576 ADI_EXIT_CRITICAL_REGION();
2578 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2579 SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCALM2MIR))
2607 ADI_RTC_DEVICE *pDevice = hDevice;
2617 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2622 pDevice->pRTCRegs->CR0 = (uint16_t)Control;
2625 pDevice->pRTCRegs->CR1 = (uint16_t)Control;
2631 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCCR0)
2655 ADI_CALLBACK
const pfCallback,
2656 void *
const pCBparam
2660 ADI_RTC_DEVICE *pDevice = hDevice;
2670 #if (ADI_RTC_CFG_ENABLE_SAFE_WRITE == 1) 2677 pDevice->pfCallback = pfCallback;
2679 pDevice->pCBParam = pCBparam;
2707 ADI_RTC_DEVICE *pDevice = hDevice;
2717 #if (ADI_RTC_CFG_ENABLE_SAFE_WRITE == 1) 2726 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
2728 ADI_INT_STATUS_ALLOC();
2729 ADI_ENTER_CRITICAL_REGION();
2731 pDevice->pRTCRegs->CNT0 = (uint16_t)nCount;
2732 pDevice->pRTCRegs->CNT1 = (uint16_t)(nCount >> 16);
2733 ADI_EXIT_CRITICAL_REGION();
2736 SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1))
2765 ADI_RTC_DEVICE *pDevice = hDevice;
2775 pDevice->pRTCRegs->GWY = Command;
2807 ADI_RTC_DEVICE *pDevice = hDevice;
2808 uint32_t trm = (uint32_t)eInterval | (uint32_t)eTrimValue | (uint32_t)eOperation;
2820 PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDTRM)
2822 pDevice->pRTCRegs->TRM = (uint16_t)trm;
2825 SYNC_AFTER_WRITE(SR0,BITM_RTC_SR0_WSYNCTRM)
2855 ADI_RTC_DEVICE *pDevice = hDevice;
2866 while (ADI_RTC_WRITE_STATUS_MASK != (pDevice->pRTCRegs->SR0 & ADI_RTC_WRITE_STATUS_MASK))
2885 static void rtc_init(ADI_RTC_DEVICE *pDevice,ADI_RTC_CONFIG *pConfig)
2888 ALWAYS_PEND_BEFORE_WRITE(SR1,BITM_RTC_SR1_WPNDCR0)
2889 pDevice->pRTCRegs->CR0 = pConfig->CR0;
2892 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDCR1MIR)
2893 pDevice->pRTCRegs->CR1 = pConfig->CR1;
2897 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
2898 pDevice->pRTCRegs->CNT0 = pConfig->CNT0;
2899 pDevice->pRTCRegs->CNT1 = pConfig->CNT1;
2903 ALWAYS_PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDALM0|BITM_RTC_SR1_WPNDALM1))
2904 pDevice->pRTCRegs->ALM0 = pConfig->ALM0;
2905 pDevice->pRTCRegs->ALM1 = pConfig->ALM1;
2908 ALWAYS_PEND_BEFORE_WRITE(SR2,BITM_RTC_SR2_WPNDALM2MIR)
2909 pDevice->pRTCRegs->ALM2 = pConfig->ALM2;
2912 if(pDevice->pRTCRegs == pADI_RTC1)
2914 ALWAYS_PEND_BEFORE_WRITE(SR5,(BITM_RTC_SR5_WPENDCR2IC|BITM_RTC_SR5_WPENDCR3SS|BITM_RTC_SR5_WPENDCR4SS|BITM_RTC_SR5_WPENDSSMSK|BITM_RTC_SR5_WPENDSS1))
2915 pDevice->pRTCRegs->CR2IC = pConfig->CR2IC;
2916 pDevice->pRTCRegs->CR3SS = pConfig->CR3SS;
2917 pDevice->pRTCRegs->CR4SS = pConfig->CR4SS;
2918 pDevice->pRTCRegs->SSMSK = pConfig->SSMSK;
2919 pDevice->pRTCRegs->SS1 = pConfig->SS1;
2920 #if defined(__ADUCM4x50__) 2921 ALWAYS_PEND_BEFORE_WRITE(SR9,(BITM_RTC_SR9_WPENDCR5SSS|BITM_RTC_SR9_WPENDCR6SSS|BITM_RTC_SR9_WPENDCR7SSS|BITM_RTC_SR9_WPENDGPMUX0|BITM_RTC_SR9_WPENDGPMUX1))
2922 pDevice->pRTCRegs->CR5SSS = pConfig->CR5SSS;
2923 pDevice->pRTCRegs->CR6SSS = pConfig->CR6SSS;
2924 pDevice->pRTCRegs->CR7SSS = pConfig->CR7SSS;
2925 pDevice->pRTCRegs->GPMUX0 = pConfig->GPMUX0;
2926 pDevice->pRTCRegs->GPMUX1 = pConfig->GPMUX1;
2929 ALWAYS_SYNC_AFTER_WRITE(SR0,(BITM_RTC_SR0_WSYNCCR0|BITM_RTC_SR0_WSYNCCNT0|BITM_RTC_SR0_WSYNCCNT1|BITM_RTC_SR0_WSYNCALM0|BITM_RTC_SR0_WSYNCALM1))
2930 ALWAYS_SYNC_AFTER_WRITE(SR2,(BITM_RTC_SR2_WSYNCCR1MIR|BITM_RTC_SR2_WSYNCALM2MIR))
2931 ALWAYS_SYNC_AFTER_WRITE(SR4,(BITM_RTC_SR4_WSYNCCR2IC|BITM_RTC_SR4_WSYNCCR3SS|BITM_RTC_SR4_WSYNCCR4SS|BITM_RTC_SR4_WSYNCSSMSK|BITM_RTC_SR4_WSYNCSS1))
2932 #if defined(__ADUCM4x50__) 2933 ALWAYS_SYNC_AFTER_WRITE(SR8,(BITM_RTC_SR8_WSYNCCR5SSS|BITM_RTC_SR8_WSYNCCR6SSS|BITM_RTC_SR8_WSYNCCR7SSS|BITM_RTC_SR8_WSYNCGPMUX0|BITM_RTC_SR8_WSYNCGPMUX1))
2940 void RTC0_Int_Handler(
void)
2943 uint16_t nIntSrc0, nIntSrc2, nIntSrc3;
2944 uint32_t fired = 0u, enables = 0u;
2945 ADI_RTC_DEVICE *pDevice = aRTCDeviceInfo[0].hDevice;
2952 enables = (uint32_t)pDevice->pRTCRegs->CR0 & ADI_RTC_INT_ENA_MASK_CR0;
2954 if( nIntSrc0 && enables )
2956 if( (enables & BITM_RTC_CR0_MOD60ALMEN) && (nIntSrc0 & BITM_RTC_SR0_MOD60ALMINT))
2960 if( (enables & BITM_RTC_CR0_ALMINTEN) && (nIntSrc0 & BITM_RTC_SR0_ALMINT))
2964 if( (enables & BITM_RTC_CR0_ISOINTEN) && (nIntSrc0 & BITM_RTC_SR0_ISOINT))
2968 if( (enables & BITM_RTC_CR0_WPNDINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDINT))
2972 if( (enables & BITM_RTC_CR0_WSYNCINTEN) && (nIntSrc0 & BITM_RTC_SR0_WSYNCINT))
2976 if( (enables & BITM_RTC_CR0_WPNDERRINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDERRINT))
2983 enables = (uint32_t)pDevice->pRTCRegs->CR1 & ADI_RTC_INT_ENA_MASK_CR1;
2985 if( nIntSrc2 && enables )
2987 if( (enables & BITM_RTC_CR1_CNTROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTROLLINT))
2991 if( (enables & BITM_RTC_CR1_TRMINTEN) && (nIntSrc2 & BITM_RTC_SR2_TRMINT))
2995 if( (enables & BITM_RTC_CR1_PSINTEN) && (nIntSrc2 & BITM_RTC_SR2_PSINT))
2999 if( (enables & BITM_RTC_CR1_CNTINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTINT))
3006 enables = pDevice->pRTCRegs->CR3SS & (uint16_t)ADI_RTC_INT_ENA_MASK_CR3SS;
3008 if( nIntSrc3 && enables )
3010 #if defined(__ADUCM4x50__) 3011 if( (enables & BITM_RTC_CR3SS_SS4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4IRQ))
3013 fired |= ADI_RTC_SENSOR_STROBE_CH4_INT;
3015 if( (enables & BITM_RTC_CR3SS_SS3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3IRQ))
3017 fired |= ADI_RTC_SENSOR_STROBE_CH3_INT;
3019 if( (enables & BITM_RTC_CR3SS_SS2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2IRQ))
3021 fired |= ADI_RTC_SENSOR_STROBE_CH2_INT;
3025 if( (enables & BITM_RTC_CR3SS_SS1IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1IRQ))
3030 #if defined(__ADUCM4x50__) 3031 if( (enables & BITM_RTC_CR3SS_SS4FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4FEIRQ))
3033 fired |= ADI_RTC_RTCSS4_FE_INT;
3035 if( (enables & BITM_RTC_CR3SS_SS3FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2FEIRQ))
3037 fired |= ADI_RTC_RTCSS3_FE_INT;
3039 if( (enables & BITM_RTC_CR3SS_SS2FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3FEIRQ))
3041 fired |= ADI_RTC_RTCSS2_FE_INT;
3043 if( (enables & BITM_RTC_CR3SS_SS1FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1FEIRQ))
3045 fired |= ADI_RTC_RTCSS1_FE_INT;
3049 enables = pDevice->pRTCRegs->CR3SS & (uint16_t)ADI_RTC_INT_ENA_MASK_CR2IC;
3050 if( nIntSrc3 && enables )
3052 if( (enables & BITM_RTC_CR2IC_IC4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC4IRQ))
3056 if( (enables & BITM_RTC_CR2IC_IC3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC3IRQ))
3060 if( (enables & BITM_RTC_CR2IC_IC2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC2IRQ))
3064 if( (enables & BITM_RTC_CR2IC_IC0IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC0IRQ))
3071 if (pDevice->pfCallback != NULL) {
3077 pDevice->pfCallback (pDevice->pCBParam, fired, NULL);
3082 pDevice->pRTCRegs->SR0 |= nIntSrc0;
3083 pDevice->pRTCRegs->SR2 |= nIntSrc2;
3084 pDevice->pRTCRegs->SR3 |= nIntSrc3;
3089 void RTC1_Int_Handler(
void)
3092 uint16_t nIntSrc0, nIntSrc2, nIntSrc3;
3093 uint32_t fired = 0u, enables = 0u;
3094 ADI_RTC_DEVICE *pDevice = aRTCDeviceInfo[1].hDevice;
3101 enables = (uint32_t)pDevice->pRTCRegs->CR0 & ADI_RTC_INT_ENA_MASK_CR0;
3103 if( nIntSrc0 && enables )
3105 if( (enables & BITM_RTC_CR0_MOD60ALMEN) && (nIntSrc0 & BITM_RTC_SR0_MOD60ALMINT))
3109 if( (enables & BITM_RTC_CR0_ALMINTEN) && (nIntSrc0 & BITM_RTC_SR0_ALMINT))
3113 if( (enables & BITM_RTC_CR0_ISOINTEN) && (nIntSrc0 & BITM_RTC_SR0_ISOINT))
3117 if( (enables & BITM_RTC_CR0_WPNDINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDINT))
3121 if( (enables & BITM_RTC_CR0_WSYNCINTEN) && (nIntSrc0 & BITM_RTC_SR0_WSYNCINT))
3125 if( (enables & BITM_RTC_CR0_WPNDERRINTEN) && (nIntSrc0 & BITM_RTC_SR0_WPNDERRINT))
3132 enables = (uint32_t)pDevice->pRTCRegs->CR1 & ADI_RTC_INT_ENA_MASK_CR1;
3134 if( nIntSrc2 && enables )
3136 if( (enables & BITM_RTC_CR1_CNTMOD60ROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTMOD60ROLLINT))
3140 if( (enables & BITM_RTC_CR1_CNTROLLINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTROLLINT))
3144 if( (enables & BITM_RTC_CR1_TRMINTEN) && (nIntSrc2 & BITM_RTC_SR2_TRMINT))
3148 if( (enables & BITM_RTC_CR1_PSINTEN) && (nIntSrc2 & BITM_RTC_SR2_PSINT))
3152 if( (enables & BITM_RTC_CR1_CNTINTEN) && (nIntSrc2 & BITM_RTC_SR2_CNTINT))
3159 enables = pDevice->pRTCRegs->CR3SS & (uint32_t)ADI_RTC_INT_ENA_MASK_CR3SS;
3161 if( nIntSrc3 && enables )
3163 #if defined(__ADUCM4x50__) 3164 if( (enables & BITM_RTC_CR3SS_SS4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4IRQ))
3166 fired |= ADI_RTC_SENSOR_STROBE_CH4_INT;
3168 if( (enables & BITM_RTC_CR3SS_SS3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3IRQ))
3170 fired |= ADI_RTC_SENSOR_STROBE_CH3_INT;
3172 if( (enables & BITM_RTC_CR3SS_SS2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2IRQ))
3174 fired |= ADI_RTC_SENSOR_STROBE_CH2_INT;
3177 if( (enables & BITM_RTC_CR3SS_SS1IRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1IRQ))
3181 #if defined(__ADUCM4x50__) 3182 if( (enables & BITM_RTC_CR3SS_SS4FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS4FEIRQ))
3184 fired |= ADI_RTC_RTCSS4_FE_INT;
3186 if( (enables & BITM_RTC_CR3SS_SS3FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS2FEIRQ))
3188 fired |= ADI_RTC_RTCSS3_FE_INT;
3190 if( (enables & BITM_RTC_CR3SS_SS2FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS3FEIRQ))
3192 fired |= ADI_RTC_RTCSS2_FE_INT;
3194 if( (enables & BITM_RTC_CR3SS_SS1FEIRQEN) && (nIntSrc3 & BITM_RTC_SR3_SS1FEIRQ))
3196 fired |= ADI_RTC_RTCSS1_FE_INT;
3200 enables = pDevice->pRTCRegs->CR2IC & (uint32_t)ADI_RTC_INT_ENA_MASK_CR2IC;
3201 if( nIntSrc3 && enables )
3203 if( (enables & BITM_RTC_CR2IC_IC4IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC4IRQ))
3207 if( (enables & BITM_RTC_CR2IC_IC3IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC3IRQ))
3211 if( (enables & BITM_RTC_CR2IC_IC2IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC2IRQ))
3215 if( (enables & BITM_RTC_CR2IC_IC0IRQEN) && (nIntSrc3 & BITM_RTC_SR3_IC0IRQ))
3221 if (pDevice->pfCallback != NULL) {
3227 pDevice->pfCallback (pDevice->pCBParam, fired, NULL);
3232 pDevice->pRTCRegs->SR0 |= nIntSrc0;
3233 pDevice->pRTCRegs->SR2 |= nIntSrc2;
3234 pDevice->pRTCRegs->SR3 |= nIntSrc3;
3239 #ifndef ADI_TIME_WA_21000023 3242 #define ADI_TIME_WA_21000023 (0) 3247 uint32_t cycleCountId_WA_21000023 = 0u;
3249 #if defined(ADUCM4050_SI_REV) && (ADUCM4050_SI_REV==0) && (WA_21000023!=0) 3252 #define ADI_WA_21000023_SAMPLES_NUMBER (3u) 3254 #define ADI_RTC_PRESCALE_POS (5u) 3257 #define ADI_RTC_PRESCALE_MSK (0x01E0u) 3280 #if (0!=ADI_TIME_WA_21000023) 3286 struct adi_rtc_snapshots snapshots[ADI_WA_21000023_SAMPLES_NUMBER];
3287 uint64_t samples[ADI_WA_21000023_SAMPLES_NUMBER];
3289 uint64_t prescale = 0u;
3292 size_t selectedSample = 2u;
3293 ADI_RTC_DEVICE *pDevice = hDevice;
3303 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
3306 ADI_INT_STATUS_ALLOC();
3307 ADI_ENTER_CRITICAL_REGION();
3309 #if (0!=ADI_TIME_WA_21000023) 3310 cycStart = DWT->CYCCNT;
3318 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3319 snapshots[0].snapshot0 = pDevice->pRTCRegs->SNAP0;
3320 snapshots[0].snapshot1 = pDevice->pRTCRegs->SNAP1;
3321 snapshots[0].snapshot2 = pDevice->pRTCRegs->SNAP2;
3328 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3329 snapshots[1].snapshot0 = pDevice->pRTCRegs->SNAP0;
3330 snapshots[1].snapshot1 = pDevice->pRTCRegs->SNAP1;
3331 snapshots[1].snapshot2 = pDevice->pRTCRegs->SNAP2;
3338 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3339 snapshots[2].snapshot0 = pDevice->pRTCRegs->SNAP0;
3340 snapshots[2].snapshot1 = pDevice->pRTCRegs->SNAP1;
3341 snapshots[2].snapshot2 = pDevice->pRTCRegs->SNAP2;
3343 #if (0!=ADI_TIME_WA_21000023) 3344 cycEnd = DWT->CYCCNT;
3348 rtc_cr1 = pDevice->pRTCRegs->CR1;
3351 ADI_EXIT_CRITICAL_REGION();
3363 if (aRTCDeviceInfo[0].pRTCRegs != pDevice->pRTCRegs)
3366 prescale = (rtc_cr1 & ADI_RTC_PRESCALE_MSK) >> ADI_RTC_PRESCALE_POS;
3368 mask = (1u << prescale) - 1u;
3374 for (i=0u; i<ADI_WA_21000023_SAMPLES_NUMBER; i++)
3376 samples[i] = ( ( (((uint64_t) snapshots[i].snapshot1) << (uint64_t) 16u)
3377 | ((uint64_t) snapshots[i].snapshot0)
3380 | (((uint64_t) snapshots[i].snapshot2) & mask)
3394 if ( (! ((samples[2] == samples[1]) || (samples[2] == (samples[1] + 1u))))
3395 && (! ((samples[2] == samples[0]) || (samples[2] == (samples[0] + 1u))))
3400 if ((samples[1] == samples[0]) || (samples[1] == (samples[0] + 1u)))
3403 selectedSample = 1u;
3414 #if (0!=ADI_TIME_WA_21000023) 3422 if (cycStart < cycEnd)
3424 cycleCountId_WA_21000023 = cycEnd - cycStart;
3428 cycleCountId_WA_21000023 = 0xFFFFFFFFu - cycStart + cycEnd;
3434 *pSnapshots = snapshots[selectedSample];
3453 ADI_RTC_DEVICE *pDevice = hDevice;
3454 struct adi_rtc_snapshots snapshots;
3455 #if (0!=ADI_TIME_WA_21000023) 3470 PEND_BEFORE_WRITE(SR1,(BITM_RTC_SR1_WPNDCNT0|BITM_RTC_SR1_WPNDCNT1))
3473 ADI_INT_STATUS_ALLOC();
3474 ADI_ENTER_CRITICAL_REGION();
3476 #if (0!=ADI_TIME_WA_21000023) 3477 cycStart = DWT->CYCCNT;
3485 pDevice->pRTCRegs->GWY = RTC_SNAPSHOT_KEY;
3486 snapshots.snapshot0 = pDevice->pRTCRegs->SNAP0;
3487 snapshots.snapshot1 = pDevice->pRTCRegs->SNAP1;
3488 snapshots.snapshot2 = pDevice->pRTCRegs->SNAP2;
3490 #if (0!=ADI_TIME_WA_21000023) 3491 cycEnd = DWT->CYCCNT;
3495 ADI_EXIT_CRITICAL_REGION();
3497 #if (0!=ADI_TIME_WA_21000023) 3505 if (cycStart < cycEnd)
3507 cycleCountId_WA_21000023 = cycEnd - cycStart;
3511 cycleCountId_WA_21000023 = 0xFFFFFFFFu - cycStart + cycEnd;
3516 *pSnapshots = snapshots;
ADI_RTC_RESULT adi_rtc_ClearInterruptStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE Status)
Clear an RTC interrupt status bit(s).
#define ADI_RTC_INPUT_CAPTURE_CH4_INT
ADI_RTC_RESULT adi_rtc_GetInputCaptureValueEx(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint16_t *pSnap0, uint16_t *pSnap1, uint16_t *pSnap2)
Get input capture value for specified input channel.
ADI_RTC_RESULT adi_rtc_SetAutoReloadValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t nValue)
Set auto reload value for the given Sensor Strobe channel.
#define ADI_RTC_WRITE_PEND_INT
ADI_RTC_RESULT adi_rtc_GetCount(ADI_RTC_HANDLE const hDevice, uint32_t *pCount)
Get current RTC count value.
#define ADI_RTC_SENSOR_STROBE_CH1_INT
ADI_RTC_RESULT adi_rtc_SetSensorStrobeValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t nValue)
Set Sensor Strobe value for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_SetGateway(ADI_RTC_HANDLE const hDevice, uint16_t Command)
Set an RTC gateway command.
#define ADI_RTC_IRQ_SOURCE_MASK_SR0
ADI_RTC_RESULT adi_rtc_Close(ADI_RTC_HANDLE const hDevice)
Uninitialize and deallocate an RTC device.
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR2
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR3
ADI_RTC_RESULT adi_rtc_SetAlarm(ADI_RTC_HANDLE const hDevice, uint32_t nAlarm)
Set a new RTC alarm value.
ADI_RTC_RESULT adi_rtc_GetTrim(ADI_RTC_HANDLE hDevice, ADI_RTC_TRIM_VALUE *peTrim)
Get current RTC clock trim value.
uint32_t ADI_RTC_INT_TYPE
ADI_RTC_RESULT adi_rtc_GetInterruptStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE *pStatus)
Get current RTC interrupt source status.
#define ADI_RTC_ISO_DONE_INT
ADI_RTC_RESULT adi_rtc_SetAlarmRegsAsync(ADI_RTC_HANDLE const hDevice, uint16_t nAlarm0, uint16_t nAlarm1, uint16_t nAlarm2)
Set a new RTC alarm value for RTC ALM0, ALM1 and ALM2 Registers without waiting for synchronization...
ADI_RTC_RESULT adi_rtc_SynchronizeAllWrites(ADI_RTC_HANDLE const hDevice)
Force synchronization of all pending writes.
ADI_RTC_RESULT adi_rtc_GetInputCaptureValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint16_t *pValue)
Get input capture value for specified input channel.
#define ADI_RTC_INPUT_CAPTURE_CH0_INT
#define ADI_RTC0_IRQ_SOURCE_MASK_SR2
#define ADI_RTC_ALARM_INT
ADI_RTC_RESULT adi_rtc_GetSensorStrobeValue(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint16_t *pValue)
Get Sensor Strobe value for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_GetCountRegs(ADI_RTC_HANDLE const hDevice, uint32_t *pnCount, uint32_t *pfCount)
Get current RTC count value of all registers.
ADI_RTC_RESULT adi_rtc_GetWriteSyncStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_WRITE_STATUS *pSyncBits)
Get current RTC posted write synchronization status.
ADI_RTC_RESULT adi_rtc_SyncAlarm(ADI_RTC_HANDLE const hDevice)
Sync after writing RTC alarm registers.
ADI_RTC_RESULT adi_rtc_SetTrim(ADI_RTC_HANDLE const hDevice, ADI_RTC_TRIM_INTERVAL eInterval, ADI_RTC_TRIM_VALUE eTrimValue, ADI_RTC_TRIM_POLARITY eOperation)
Set a new RTC trim value.
ADI_RTC_RESULT adi_rtc_GetCountEx(ADI_RTC_HANDLE const hDevice, float *pfCount)
Get current RTC count value with fraction.
ADI_RTC_RESULT adi_rtc_Open(uint32_t DeviceNumber, void *pDeviceMemory, uint32_t MemorySize, ADI_RTC_HANDLE *phDevice)
RTC Initialization.
#define ADI_RTC_INPUT_CAPTURE_CH2_INT
#define ADI_RTC_IRQ_SOURCE_MASK_SR3
ADI_RTC_RESULT adi_rtc_SetPreScale(ADI_RTC_HANDLE const hDevice, uint8_t nPreScale)
Set Prescale. This is power of 2 division factor for the RTC base clock.
#define ADI_RTC1_IRQ_SOURCE_MASK_SR2
ADI_RTC_RESULT adi_rtc_EnableMod60Alarm(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable MOD60 RTC alarm.
#define ADI_RTC_MOD60ALM_INT
ADI_RTC_RESULT adi_rtc_GetAlarmEx(ADI_RTC_HANDLE hDevice, float *pAlarm)
Get current RTC alarm value with fractional part also.
ADI_RTC_RESULT adi_rtc_EnableTrim(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC automatic clock trimming.
#define ADI_RTC_COUNT_INT
ADI_RTC_RESULT adi_rtc_GetAlarmRegs(ADI_RTC_HANDLE hDevice, uint16_t *pAlarm0, uint16_t *pAlarm1, uint16_t *pAlarm2)
Get current RTC alarm value from RTC Alarm register.
ADI_RTC_RESULT adi_rtc_RegisterCallback(ADI_RTC_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void *const pCBparam)
Registers a Callback function with the RTC device driver. The registered call back function will be c...
ADI_RTC_RESULT adi_rtc_SetInputCapturePolarity(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eInpChannel, bool bEnable)
Set input capture polarity for the specified channel.
#define ADI_RTC_INPUT_CAPTURE_CH3_INT
#define ADI_RTC_NUM_INTERRUPTS
ADI_RTC_RESULT adi_rtc_SetAlarmAsync(ADI_RTC_HANDLE const hDevice, uint32_t nAlarm)
Set a new RTC alarm value without waiting for synchronization.
ADI_RTC_RESULT adi_rtc_GetControl(ADI_RTC_HANDLE hDevice, ADI_RTC_CONTROL_REGISTER eRegister, uint32_t *pControl)
Get current RTC control register value.
#define ADI_RTC_IRQ_SOURCE_OFFSET_SR0
#define ADI_RTC_WRITE_PENDERR_INT
ADI_RTC_RESULT adi_rtc_EnableInputCapture(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eInpChannel, bool bEnable)
Enable input capture for the specified channel.
ADI_RTC_RESULT adi_rtc_SetAlarmEx(ADI_RTC_HANDLE const hDevice, float fAlarm)
Set a new RTC alarm value with fractional value.
#define ADI_RTC_MOD60_ROLLOVER_INT
ADI_RTC_RESULT adi_rtc_Enable(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC device.
ADI_RTC_RESULT adi_rtc_EnableAlarm(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable RTC alarm.
ADI_RTC_RESULT adi_rtc_SetSensorStrobeChannelMask(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, uint8_t nMask)
To set channel mask for the given Sensor Strobe channel.
ADI_RTC_RESULT adi_rtc_SetControlRegister(ADI_RTC_HANDLE const hDevice, ADI_RTC_CONTROL_REGISTER eRegister, uint32_t Control)
Set a new RTC control register value.
#define ADI_RTC_COUNT_ROLLOVER_INT
ADI_RTC_RESULT adi_rtc_GetSnapShot(ADI_RTC_HANDLE const hDevice, ADI_RTC_INPUT_CHANNEL eChannel, uint32_t *pValue, uint16_t *pFraction)
Read RTC snapshot registers values.
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeOutput(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable output for the specified Sensor Strobe Channel.
ADI_RTC_RESULT adi_rtc_EnableAutoReload(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable auto reload for given Sensor Strobe Channel.
ADI_RTC_RESULT adi_rtc_GetAlarm(ADI_RTC_HANDLE hDevice, uint32_t *pAlarm)
Get current RTC alarm value.
ADI_RTC_RESULT adi_rtc_EnableSensorStrobeChannelMask(ADI_RTC_HANDLE const hDevice, ADI_RTC_SS_CHANNEL eSSChannel, bool bEnable)
Enable or disable thermometer-code masking for the given Sensor Strobe Channel.
#define ADI_RTC_MEMORY_SIZE
ADI_RTC_RESULT adi_rtc_GetWritePendStatus(ADI_RTC_HANDLE const hDevice, ADI_RTC_WRITE_STATUS *pPendBits)
Get current RTC posted write pending status.
ADI_RTC_RESULT adi_rtc_SetCount(ADI_RTC_HANDLE const hDevice, uint32_t nCount)
Set a new RTC count value.
ADI_RTC_RESULT adi_rtc_SetMod60AlarmPeriod(ADI_RTC_HANDLE const hDevice, uint8_t nPeriod)
Set the pre-scale. This is power of 2 division factor for the RTC base clock.
ADI_RTC_RESULT adi_rtc_SetAlarmRegs(ADI_RTC_HANDLE const hDevice, uint16_t nAlarm0, uint16_t nAlarm1, uint16_t nAlarm2)
Set a new RTC alarm value for RTC ALM0,ALM1 and ALM2 Register.
ADI_RTC_RESULT adi_rtc_EnableInterrupts(ADI_RTC_HANDLE const hDevice, ADI_RTC_INT_TYPE Interrupts, bool bEnable)
Manage interrupt enable/disable in the RTC and NVIC controller.
#define ADI_RTC_WRITE_SYNC_INT
ADI_RTC_RESULT adi_rtc_EnableOverwriteSnapshot(ADI_RTC_HANDLE const hDevice, bool bEnable)
Enable Overwrite of Unread Snapshots for all RTC Input Capture Channels.