47 #ifndef _ADI_SPI_DATA_C_ 48 #define _ADI_SPI_DATA_C_ 52 #include "adi_spi_def.h" 53 #include "adi_spi_config.h" 54 #include <drivers/dma/adi_dma.h> 57 static ADI_SPI_DEVICE_INFO spi_device_info [ADI_SPI_NUM_INSTANCES]=
64 (
volatile ADI_SPI_TypeDef *)pADI_SPI0,
73 (
volatile ADI_SPI_TypeDef *)pADI_SPI1,
83 (
volatile ADI_SPI_TypeDef *)pADI_SPI2,
90 static const ADI_SPI_CFG_TYPE gSPICfg[ADI_SPI_NUM_INSTANCES] =
112 << BITP_SPI_DIV_VALUE )
134 << BITP_SPI_DIV_VALUE )
156 << BITP_SPI_DIV_VALUE )
#define ADI_SPI2_CFG_ENABLE
#define ADI_SPI1_CFG_RX_OVERFLOW
#define ADI_SPI0_CFG_TRANSFER_INITIATE
#define ADI_SPI2_CFG_WIRED_OR
#define ADI_SPI1_CFG_CONTINUOUS
#define ADI_SPI1_CFG_CSERR_RESET
#define ADI_SPI1_CFG_WIRED_OR
#define ADI_SPI0_CFG_MISO_ENABLE
#define ADI_SPI1_CFG_BIT_RATE
#define ADI_SPI1_CFG_TX_FLUSH
#define ADI_CFG_SYSTEM_CLOCK_HZ
#define ADI_SPI2_CFG_BIT_RATE
#define ADI_SPI0_CFG_LOOPBACK
#define ADI_SPI2_CFG_TX_FLUSH
#define ADI_SPI0_CFG_LSB_MSB
#define ADI_SPI1_CFG_MISO_ENABLE
#define ADI_SPI2_CFG_RX_OVERFLOW
#define ADI_SPI1_CFG_CLK_PHASE
#define ADI_SPI0_CFG_CONTINUOUS
#define ADI_SPI0_CFG_CLK_POLARITY
#define ADI_SPI0_CFG_RX_OVERFLOW
#define ADI_SPI0_CFG_WIRED_OR
#define ADI_SPI1_CFG_CLK_POLARITY
#define ADI_SPI1_CFG_ENABLE
#define ADI_SPI0_CFG_ENABLE
#define ADI_SPI1_CFG_TRANSFER_INITIATE
#define ADI_SPI0_CFG_BIT_RATE
#define ADI_SPI1_CFG_LSB_MSB
#define ADI_SPI0_CFG_CSERR_RESET
#define ADI_SPI2_CFG_TRANSFER_INITIATE
#define ADI_SPI2_CFG_MISO_ENABLE
#define ADI_SPI0_CFG_TX_FLUSH
#define ADI_SPI1_CFG_RX_FLUSH
#define ADI_SPI1_CFG_LOOPBACK
#define ADI_SPI2_CFG_LOOPBACK
#define ADI_SPI2_CFG_CSERR_RESET
#define ADI_SPI0_CFG_RX_FLUSH
#define ADI_SPI0_CFG_CLK_PHASE
#define ADI_SPI2_CFG_CONTINUOUS
#define ADI_SPI2_CFG_CLK_PHASE
#define ADI_SPI2_CFG_CLK_POLARITY
#define ADI_SPI2_CFG_LSB_MSB
#define ADI_SPI0_CFG_TX_UNDERFLOW
#define ADI_SPI2_CFG_TX_UNDERFLOW
#define ADI_SPI1_CFG_TX_UNDERFLOW
#define ADI_SPI2_CFG_RX_FLUSH