ADuCM302x Device Drivers API Reference Manual
Release 3.1.2.0
adi_spi_config.h
1
48
#ifndef ADI_SPI_CONFIG_H__
49
#define ADI_SPI_CONFIG_H__
50
#include <adi_global_config.h>
58
#define ADI_CFG_SYSTEM_CLOCK_HZ (26000000u)
59
60
/************* SPI controller configurations ***************/
61
62
/* There are three SPI instances SPI0, SPI1 and SPI2 */
63
/* Each SPI has its own configuration macros */
64
65
66
/*----------------------------------------------------------*/
67
/* -------------------- SPI0 -------------------------------*/
68
/*----------------------------------------------------------*/
69
76
#define ADI_SPI0_MASTER_MODE (1u)
77
78
80
#define ADI_SPI0_CFG_BIT_RATE (2000000u)
81
86
#define ADI_SPI0_CFG_ENABLE (0u)
87
92
#define ADI_SPI0_CFG_CLK_PHASE (0u)
93
94
95
96
97
102
#define ADI_SPI0_CFG_CLK_POLARITY (0u)
103
104
109
#define ADI_SPI0_CFG_WIRED_OR (0u)
110
111
116
#define ADI_SPI0_CFG_LSB_MSB (0u)
117
118
123
#define ADI_SPI0_CFG_TRANSFER_INITIATE (0u)
124
125
130
#define ADI_SPI0_CFG_TX_UNDERFLOW (0u)
131
132
137
#define ADI_SPI0_CFG_RX_OVERFLOW (0u)
138
139
144
#define ADI_SPI0_CFG_MISO_ENABLE (0u)
145
146
151
#define ADI_SPI0_CFG_LOOPBACK (0u)
152
157
#define ADI_SPI0_CFG_CONTINUOUS (0u)
158
163
#define ADI_SPI0_CFG_RX_FLUSH (0u)
164
165
170
#define ADI_SPI0_CFG_TX_FLUSH (0u)
171
172
180
#define ADI_SPI0_CFG_CSERR_RESET (0u)
181
182
187
#define ADI_SPI0_CFG_CLK_DIV (0u)
188
189
194
#define ADI_SPI0_CFG_HFM (0u)
195
196
201
#define ADI_SPI0_CFG_CS_ERR (0u)
202
203
208
#define ADI_SPI0_CFG_CS_IRQ (0u)
209
210
213
/*----------------------------------------------------------*/
214
/* -------------------- SPI1 -------------------------------*/
215
/*----------------------------------------------------------*/
216
223
#define ADI_SPI1_MASTER_MODE (1u)
224
226
#define ADI_SPI1_CFG_BIT_RATE (2000000u)
227
232
#define ADI_SPI1_CFG_ENABLE (0u)
233
238
#define ADI_SPI1_CFG_CLK_PHASE (0u)
239
240
241
242
243
248
#define ADI_SPI1_CFG_CLK_POLARITY (0u)
249
250
255
#define ADI_SPI1_CFG_WIRED_OR (0u)
256
257
262
#define ADI_SPI1_CFG_LSB_MSB (0u)
263
264
269
#define ADI_SPI1_CFG_TRANSFER_INITIATE (0u)
270
271
276
#define ADI_SPI1_CFG_TX_UNDERFLOW (0u)
277
278
283
#define ADI_SPI1_CFG_RX_OVERFLOW (0u)
284
285
290
#define ADI_SPI1_CFG_MISO_ENABLE (0u)
291
292
297
#define ADI_SPI1_CFG_LOOPBACK (0u)
298
303
#define ADI_SPI1_CFG_CONTINUOUS (0u)
304
309
#define ADI_SPI1_CFG_RX_FLUSH (0u)
310
311
316
#define ADI_SPI1_CFG_TX_FLUSH (0u)
317
318
326
#define ADI_SPI1_CFG_CSERR_RESET (0u)
327
328
333
#define ADI_SPI1_CFG_CLK_DIV (0u)
334
335
340
#define ADI_SPI1_CFG_HFM (0u)
341
342
347
#define ADI_SPI1_CFG_CS_ERR (0u)
348
349
354
#define ADI_SPI1_CFG_CS_IRQ
355
358
/*----------------------------------------------------------*/
359
/* -------------------- SPI2 -------------------------------*/
360
/*----------------------------------------------------------*/
361
368
#define ADI_SPI2_MASTER_MODE (1u)
369
371
#define ADI_SPI2_CFG_BIT_RATE (2000000u)
372
377
#define ADI_SPI2_CFG_ENABLE (0u)
378
383
#define ADI_SPI2_CFG_CLK_PHASE (0u)
384
385
386
387
388
393
#define ADI_SPI2_CFG_CLK_POLARITY (0u)
394
395
400
#define ADI_SPI2_CFG_WIRED_OR (0u)
401
402
407
#define ADI_SPI2_CFG_LSB_MSB (0u)
408
409
414
#define ADI_SPI2_CFG_TRANSFER_INITIATE (0u)
415
416
421
#define ADI_SPI2_CFG_TX_UNDERFLOW (0u)
422
423
428
#define ADI_SPI2_CFG_RX_OVERFLOW (0u)
429
430
435
#define ADI_SPI2_CFG_MISO_ENABLE (0u)
436
437
442
#define ADI_SPI2_CFG_LOOPBACK (0u)
443
448
#define ADI_SPI2_CFG_CONTINUOUS (0u)
449
454
#define ADI_SPI2_CFG_RX_FLUSH (0u)
455
456
461
#define ADI_SPI2_CFG_TX_FLUSH (0u)
462
463
471
#define ADI_SPI2_CFG_CSERR_RESET (0u)
472
473
478
#define ADI_SPI2_CFG_CLK_DIV (0u)
479
480
485
#define ADI_SPI2_CFG_HFM (0u)
486
487
492
#define ADI_SPI2_CFG_CS_ERR (0u)
493
494
499
#define ADI_SPI2_CFG_CS_IRQ
500
503
/************** Macro validation *****************************/
504
505
#if ( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
506
( ADI_SPI0_CFG_BIT_RATE > (13000000u) ) || \
507
( ADI_SPI0_CFG_BIT_RATE > (13000000u) )
508
#error "Invalid configuration"
509
#endif
510
511
#if ( ADI_SPI0_CFG_ENABLE > 1u ) || \
512
( ADI_SPI1_CFG_ENABLE > 1u ) || \
513
( ADI_SPI2_CFG_ENABLE > 1u )
514
#error "Invalid configuration"
515
#endif
516
517
#if ( ADI_SPI0_CFG_CLK_PHASE > 1u ) || \
518
( ADI_SPI1_CFG_CLK_PHASE > 1u ) || \
519
( ADI_SPI2_CFG_CLK_PHASE > 1u )
520
#error "Invalid configuration"
521
#endif
522
523
#if ( ADI_SPI0_CFG_CLK_POLARITY > 1u ) || \
524
( ADI_SPI1_CFG_CLK_POLARITY > 1u ) || \
525
( ADI_SPI2_CFG_CLK_POLARITY > 1u )
526
#error "Invalid configuration"
527
#endif
528
529
#if ( ADI_SPI0_CFG_WIRED_OR > 1u ) || \
530
( ADI_SPI1_CFG_WIRED_OR > 1u ) || \
531
( ADI_SPI2_CFG_WIRED_OR > 1u )
532
#error "Invalid configuration"
533
#endif
534
535
#if ( ADI_SPI0_CFG_LSB_MSB > 1u ) || \
536
( ADI_SPI1_CFG_LSB_MSB > 1u ) || \
537
( ADI_SPI2_CFG_LSB_MSB > 1u )
538
#error "Invalid configuration"
539
#endif
540
541
#if ( ADI_SPI0_CFG_TRANSFER_INITIATE > 1u ) || \
542
( ADI_SPI1_CFG_TRANSFER_INITIATE > 1u ) || \
543
( ADI_SPI2_CFG_TRANSFER_INITIATE > 1u )
544
#error "Invalid configuration"
545
#endif
546
547
#if ( ADI_SPI0_CFG_TX_UNDERFLOW > 1u ) || \
548
( ADI_SPI1_CFG_TX_UNDERFLOW > 1u ) || \
549
( ADI_SPI2_CFG_TX_UNDERFLOW > 1u )
550
#error "Invalid configuration"
551
#endif
552
553
#if ( ADI_SPI0_CFG_RX_OVERFLOW > 1u ) || \
554
( ADI_SPI1_CFG_RX_OVERFLOW > 1u ) || \
555
( ADI_SPI2_CFG_RX_OVERFLOW > 1u )
556
#error "Invalid configuration"
557
#endif
558
559
#if ( ADI_SPI0_CFG_MISO_ENABLE > 1u ) || \
560
( ADI_SPI1_CFG_MISO_ENABLE > 1u ) || \
561
( ADI_SPI2_CFG_MISO_ENABLE > 1u )
562
#error "Invalid configuration"
563
#endif
564
565
#if ( ADI_SPI0_CFG_LOOPBACK > 1u ) || \
566
( ADI_SPI1_CFG_LOOPBACK > 1u ) || \
567
( ADI_SPI2_CFG_LOOPBACK > 1u )
568
#error "Invalid configuration"
569
#endif
570
571
#if ( ADI_SPI0_CFG_CONTINUOUS > 1u ) || \
572
( ADI_SPI1_CFG_CONTINUOUS > 1u ) || \
573
( ADI_SPI2_CFG_CONTINUOUS > 1u )
574
#error "Invalid configuration"
575
#endif
576
577
#if ( ADI_SPI0_CFG_RX_FLUSH > 1u ) || \
578
( ADI_SPI1_CFG_RX_FLUSH > 1u ) || \
579
( ADI_SPI2_CFG_RX_FLUSH > 1u )
580
#error "Invalid configuration"
581
#endif
582
583
#if ( ADI_SPI0_CFG_TX_FLUSH > 1u ) || \
584
( ADI_SPI1_CFG_TX_FLUSH > 1u ) || \
585
( ADI_SPI2_CFG_TX_FLUSH > 1u )
586
#error "Invalid configuration"
587
#endif
588
589
592
#endif
/* ADI_SPI_CONFIG_H__ */
Include
config
adi_spi_config.h
Generated on Mon Aug 6 2018 21:48:22 for ADuCM302x Device Drivers API Reference Manual by
1.8.13