ADuCM302x Device Drivers API Reference Manual
Release 3.1.2.0
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Macros | |
#define | CACHE_CONTROLLER_KEY 0xF123F456u |
#define | PWRKEY_VALUE_KEY 0x4859u |
#define | NVIC_INTS (65u) |
#define | ADI_SRAM_BANK_0 (1u << 0) |
#define | ADI_SRAM_BANK_1 (1u << 1) |
#define | ADI_SRAM_BANK_2 (1u << 2) |
#define | ADI_SRAM_BANK_3 (1u << 3) |
#define | ADI_SRAM_BANK_4 (1u << 4) |
#define | ADI_SRAM_BANK_5 (1u << 5) |
#define | ADI_SRAM_BANK_6 (1u << 6) |
#define | ADI_SRAM_BANK_7 (1u << 7) |
Typedefs | |
typedef uint32_t | ADI_SRAM_BANK |
Functions | |
void | SystemInit (void) |
Sets up the microcontroller system. Initializes the System and updates the relocate vector table. More... | |
void | SystemCoreClockUpdate (void) |
Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution. More... | |
void | adi_system_EnableCache (bool bEnable) |
This enables or disables the cache. More... | |
uint32_t | adi_system_EnableRetention (ADI_SRAM_BANK eBank, bool bEnable) |
This enables/disable SRAM retention during the hibernation. More... | |
void | adi_system_SetGlobalIrqPriority (void) |
This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined). More... | |
Variables | |
uint32_t | SystemCoreClock = 0u |
uint32_t | SystemCoreClock = 0u |
add result types to doxygen
#define CACHE_CONTROLLER_KEY 0xF123F456u |
Cache controller key
Definition at line 83 of file system_ADuCM3029.h.
Referenced by adi_system_EnableCache().
#define PWRKEY_VALUE_KEY 0x4859u |
Power key
Definition at line 85 of file system_ADuCM3029.h.
Referenced by adi_system_EnableRetention().
#define NVIC_INTS (65u) |
Used NVIC IRQ range for this part
Definition at line 88 of file system_ADuCM3029.h.
Referenced by adi_system_SetGlobalIrqPriority().
#define ADI_SRAM_BANK_0 (1u << 0) |
SRAM_BANK_0
Definition at line 96 of file system_ADuCM3029.h.
#define ADI_SRAM_BANK_1 (1u << 1) |
SRAM_BANK_1
Definition at line 98 of file system_ADuCM3029.h.
Referenced by adi_system_EnableRetention(), and SystemInit().
#define ADI_SRAM_BANK_2 (1u << 2) |
SRAM_BANK_2
Definition at line 100 of file system_ADuCM3029.h.
Referenced by adi_system_EnableRetention(), and SystemInit().
#define ADI_SRAM_BANK_3 (1u << 3) |
SRAM_BANK_3
Definition at line 102 of file system_ADuCM3029.h.
#define ADI_SRAM_BANK_4 (1u << 4) |
SRAM_BANK_4
Definition at line 104 of file system_ADuCM3029.h.
#define ADI_SRAM_BANK_5 (1u << 5) |
SRAM_BANK_5
Definition at line 106 of file system_ADuCM3029.h.
#define ADI_SRAM_BANK_6 (1u << 6) |
SRAM_BANK_6
Definition at line 108 of file system_ADuCM3029.h.
#define ADI_SRAM_BANK_7 (1u << 7) |
SRAM_BANK_7
Definition at line 110 of file system_ADuCM3029.h.
typedef uint32_t ADI_SRAM_BANK |
SRAM banks
Definition at line 93 of file system_ADuCM3029.h.
void SystemInit | ( | void | ) |
Sets up the microcontroller system. Initializes the System and updates the relocate vector table.
Definition at line 238 of file system_ADuCM3027.c.
void SystemCoreClockUpdate | ( | void | ) |
Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution.
Update the clock.
Definition at line 139 of file system_ADuCM3027.c.
Referenced by adi_pwr_GetClockFrequency(), adi_pwr_Init(), adi_pwr_SetClockDivider(), and adi_pwr_UpdateCoreClock().
void adi_system_EnableCache | ( | bool | bEnable | ) |
This enables or disables the cache.
bEnable | : To specify whether to enable/disable cache. true : To enable cache. false : To disable cache. |
Definition at line 299 of file system_ADuCM3027.c.
Referenced by SystemInit().
uint32_t adi_system_EnableRetention | ( | ADI_SRAM_BANK | eBank, |
bool | bEnable | ||
) |
This enables/disable SRAM retention during the hibernation.
Enable/disable SRAM retention during hibernation for SRAM bank1 and/or bank2.
eBank | Specify which SRAM bank. Only BANK1 and BANK2 are valid. |
bEnable | To enable/disable the retention for specified SRAM bank. true : To enable retention during the hibernation. false : To disable retention during the hibernation. |
eBank | SRAM bank(s) to be retained/not retained when the processor enters hibernation mode. The only valid arguments are ADI_SRAM_BANK_1, ADI_SRAM_BANK_2 or a combination of both. |
bEnable | Enable/disable the retention for specified SRAM bank.
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Definition at line 327 of file system_ADuCM3027.c.
Referenced by SystemInit().
void adi_system_SetGlobalIrqPriority | ( | void | ) |
This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined).
At reset the hardware default priority 0, which is the highest. For any applications that use BASEPRI to mask interrupts, such as any application using FreeRTOS, then any interrupts using default priority will never be masked. Defining ADI_MAX_IRQ_PRIORITY to a value will enable this function call at startup and set all IRQ interrupts to that priority value.
Definition at line 368 of file system_ADuCM3029.c.
uint32_t SystemCoreClock = 0u |
Variable to hold the system core clock value.
Definition at line 125 of file system_ADuCM3027.c.
uint32_t SystemCoreClock = 0u |
Variable to hold the system core clock value.
Definition at line 125 of file system_ADuCM3029.c.