ADuCM302x Device Drivers API Reference Manual  Release 3.1.2.0
Power Driver

Power Management Driver. More...

Modules

 Static Configuration
 

Enumerations

enum  ADI_CLOCK_ID {
  ADI_CLOCK_PCLK,
  ADI_CLOCK_HCLK,
  ADI_CLOCK_ACLK
}
 
enum  ADI_CLOCK_SOURCE_ID {
  ADI_CLOCK_SOURCE_HFXTAL,
  ADI_CLOCK_SOURCE_LFXTAL,
  ADI_CLOCK_SOURCE_HFOSC,
  ADI_CLOCK_SOURCE_LFOSC,
  ADI_CLOCK_SOURCE_SPLL,
  ADI_CLOCK_SOURCE_GPIO
}
 
enum  ADI_CLOCK_MUX_ID {
  ADI_CLOCK_MUX_SPLL_HFOSC,
  ADI_CLOCK_MUX_SPLL_HFXTAL,
  ADI_CLOCK_MUX_LFCLK_LFOSC,
  ADI_CLOCK_MUX_LFCLK_LFXTAL,
  ADI_CLOCK_MUX_REF_HFOSC_CLK,
  ADI_CLOCK_MUX_REF_RESERVED,
  ADI_CLOCK_MUX_REF_HFXTAL_26MHZ_CLK,
  ADI_CLOCK_MUX_REF_HFXTAL_16MHZ_CLK,
  ADI_CLOCK_MUX_ROOT_HFOSC,
  ADI_CLOCK_MUX_ROOT_HFXTAL,
  ADI_CLOCK_MUX_ROOT_SPLL,
  ADI_CLOCK_MUX_ROOT_GPIO
}
 
enum  ADI_CLOCK_SOURCE_STATUS {
  ADI_CLOCK_SOURCE_DISABLED = 0,
  ADI_CLOCK_SOURCE_ENABLED_NOT_STABLE,
  ADI_CLOCK_SOURCE_ENABLED_STABLE,
  ADI_CLOCK_SOURCE_ID_NOT_VALID
}
 
enum  ADI_CLOCK_OUTPUT_ID {
  ADI_CLOCK_OUTPUT_ROOT_CLK,
  ADI_CLOCK_OUTPUT_LF_CLK,
  ADI_CLOCK_OUTPUT_ACLK,
  ADI_CLOCK_OUTPUT_HCLK_BUS,
  ADI_CLOCK_OUTPUT_HCLK_CORE,
  ADI_CLOCK_OUTPUT_PCLK,
  ADI_CLOCK_OUTPUT_RCLK,
  ADI_CLOCK_OUTPUT_RHP_CLK,
  ADI_CLOCK_OUTPUT_GPT0_CLK,
  ADI_CLOCK_OUTPUT_GPT1_CLK,
  ADI_CLOCK_OUTPUT_HCLK_PERIPHERAL,
  ADI_CLOCK_OUTPUT_PLL_OUTPUT,
  ADI_CLOCK_OUTPUT_RTC0_CLK,
  ADI_CLOCK_OUTPUT_HPBUCK_CLK,
  ADI_CLOCK_OUTPUT_HPBUCK_NO_OVERLAP_CLK,
  ADI_CLOCK_OUTPUT_RTC1_CLK
}
 
enum  ADI_CLOCK_GATE {
  ADI_CLOCK_GATE_GPT0_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK0OFF,
  ADI_CLOCK_GATE_GPT1_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK1OFF,
  ADI_CLOCK_GATE_GPT2_CLK = 1 << BITP_CLKG_CLK_CTL5_GPTCLK2OFF,
  ADI_CLOCK_GATE_I2C_CLK = 1 << BITP_CLKG_CLK_CTL5_UCLKI2COFF,
  ADI_CLOCK_GATE_GPIO_CLK = 1 << BITP_CLKG_CLK_CTL5_GPIOCLKOFF,
  ADI_CLOCK_GATE_PCLK = 1 << BITP_CLKG_CLK_CTL5_PERCLKOFF
}
 
enum  ADI_PWR_RESULT {
  ADI_PWR_SUCCESS = 0,
  ADI_PWR_FAILURE,
  ADI_PWR_NULL_POINTER,
  ADI_PWR_INVALID_CLOCK_DIVIDER,
  ADI_PWR_INVALID_CLOCK_ID,
  ADI_PWR_INVALID_CLOCK_RATIO,
  ADI_PWR_INVALID_POWER_MODE,
  ADI_PWR_INVALID_CLOCK_SPEED,
  ADI_PWR_OPERATION_NOT_ALLOWED,
  ADI_PWR_INVALID_PARAM,
  ADI_PWR_SYSTEM_NOT_INITIALIZED
}
 
enum  ADI_PWR_POWER_MODE {
  ADI_PWR_MODE_FLEXI = 0 << BITP_PMG_PWRMOD_MODE,
  ADI_PWR_MODE_ACTIVE = 1 << BITP_PMG_PWRMOD_MODE,
  ADI_PWR_MODE_HIBERNATE = 2 << BITP_PMG_PWRMOD_MODE,
  ADI_PWR_MODE_SHUTDOWN = 3 << BITP_PMG_PWRMOD_MODE
}
 
enum  ADI_PWR_PMG_IRQ {
  ADI_PWR_LOW_BATTERY_VOLTAGE_IEN = 1 << BITP_PMG_IEN_VBAT,
  ADI_PWR_UNDER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGUNDR,
  ADI_PWR_OVER_VOLATAGE_IEN = 1 << BITP_PMG_IEN_VREGOVR,
  ADI_PWR_BATTERY_VOLTAGE_RANGE_IEN = 1 << BITP_PMG_IEN_IENBAT
}
 
enum  ADI_PWR_CLOCK_IRQ {
  ADI_PWR_LFXTAL_CLOCK_MON_IEN = 1 << BITP_CLKG_OSC_CTL_LFXTAL_MON_EN,
  ADI_PWR_LFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_LFXTALIE,
  ADI_PWR_HFXTAL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL0_HFXTALIE,
  ADI_PWR_PLL_STATUS_IEN = 1 << BITP_CLKG_CLK_CTL3_SPLLIE
}
 
enum  ADI_PWR_EVENT {
  ADI_PWR_EVENT_VREG_OVER_VOLTAGE,
  ADI_PWR_EVENT_VREG_UNDER_VOLTAGE,
  ADI_PWR_EVENT_BATTERY_VOLTAGE_LOW,
  ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_OK,
  ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_NO_OK,
  ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_OK,
  ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_NO_OK,
  ADI_PWR_EVENT_PLLC_LOCK,
  ADI_PWR_EVENT_PLLC_UNLOCK
}
 
enum  ADI_PWR_WAKEUP_STATUS {
  ADI_PWR_INT_EXT0,
  ADI_PWR_INT_EXT1,
  ADI_PWR_INT_EXT2,
  ADI_PWR_INT_RTC
}
 
enum  ADI_PWR_VOLTAGE_RANGE {
  ADI_PWR_BAT_VOLTAGE_RANGE_SAFE,
  ADI_PWR_VOLTAGE_RANGE_2_2_TO_2_75,
  ADI_PWR_VOLTAGE_RANGE_1_6_TO_2_2
}
 

Functions

ADI_PWR_RESULT adi_pwr_Init (void)
 
ADI_PWR_RESULT adi_pwr_UpdateCoreClock (void)
 Updates the internal SystemCoreClock variable with current core Clock retrieved from cpu registers. More...
 
ADI_PWR_RESULT adi_pwr_SetExtClkFreq (const uint32_t ExtClkFreq)
 Sets the system external clock frequency. More...
 
ADI_PWR_RESULT adi_pwr_SetRootClockMux (const ADI_CLOCK_MUX_ID eClockID)
 Sets the source for the root clock multiplexer. More...
 
ADI_PWR_RESULT adi_pwr_SetPLLClockMux (const ADI_CLOCK_MUX_ID eClockID)
 Sets the input clock source for PLL multiplexer. More...
 
ADI_PWR_RESULT adi_pwr_SetLFClockMux (const ADI_CLOCK_MUX_ID eClockID)
 Sets the input clock for low frequency clock multiplexer. More...
 
ADI_PWR_RESULT adi_pwr_SetRefClockMux (const ADI_CLOCK_MUX_ID eClockID)
 Sets clock source for the Reference clock multiplexer. More...
 
ADI_PWR_RESULT adi_pwr_GetExtClkFreq (uint32_t *pExtClock)
 Gets the system external clock frequency. Gets the clock frequency of the source connected to the external GPIO clock input source. More...
 
ADI_PWR_RESULT adi_pwr_GetClockFrequency (const ADI_CLOCK_ID eClockId, uint32_t *pClock)
 Get the frequency of the given clock. Obtain individual peripheral clock frequencies. More...
 
ADI_PWR_RESULT adi_pwr_EnableClock (const ADI_CLOCK_GATE eClockGate, const bool bEnable)
 Enable/disable individual peripheral clocks. More...
 
ADI_PWR_RESULT adi_pwr_EnableClockSource (const ADI_CLOCK_SOURCE_ID eClockSource, const bool bEnable)
 To Enable/disable clock sources. More...
 
ADI_PWR_RESULT adi_pwr_SetClockDivider (const ADI_CLOCK_ID eClockId, const uint16_t nDiv)
 Sets the clock divide factor for an individual clock group. More...
 
ADI_PWR_RESULT adi_pwr_GetClockStatus (const ADI_CLOCK_SOURCE_ID eClockSource, ADI_CLOCK_SOURCE_STATUS *peStatus)
 Return the status of a clock source. More...
 
ADI_PWR_RESULT adi_pwr_SetPll (uint8_t nDivFactor, const uint8_t nMulFactor, const bool bDiv2, const bool bMul2)
 Program PLL frequency. More...
 
ADI_PWR_RESULT adi_pwr_EnableClockInterrupt (const ADI_PWR_CLOCK_IRQ eIrq, const bool bEnable)
 Enable/Disable the clock interrupt to monitor status of LFXTAL, HFXTAL and PLL. More...
 
ADI_PWR_RESULT adi_pwr_EnableLFXTALBypass (const bool bEnable)
 Enable/disable LFXTAL bypass mode. More...
 
ADI_PWR_RESULT adi_pwr_EnablePMGInterrupt (const ADI_PWR_PMG_IRQ eIrq, const bool bEnable)
 Enable/Disable the power management interrupt. More...
 
ADI_PWR_RESULT adi_pwr_GetWakeUpStatus (ADI_PWR_WAKEUP_STATUS *peStatus)
 Function to retrieve the wakeup from shut down mode status. More...
 
ADI_PWR_RESULT adi_pwr_SetVoltageRange (const ADI_PWR_VOLTAGE_RANGE eRange)
 To Monitor voltage range of battery. More...
 
ADI_PWR_RESULT adi_pwr_EnterLowPowerMode (const ADI_PWR_POWER_MODE PowerMode, uint32_t volatile *pnInterruptOccurred, const uint8_t PriorityMask)
 Puts the processor into given low power mode. More...
 
ADI_PWR_RESULT adi_pwr_ExitLowPowerMode (uint32_t volatile *pnInterruptOccurred)
 
ADI_PWR_RESULT adi_pwr_EnableHPBuck (const bool bEnable)
 Enables or disables the HP Buck. More...
 
ADI_PWR_RESULT adi_pwr_RegisterCallback (const ADI_CALLBACK pfCallback, void *pcbParam)
 Registers or unregister the callback function. More...
 

Detailed Description

Power Management Driver.

Note
The application must include drivers/pwr/adi_pwr.h to use this driver
The API adi_pwr_EnableClockSource requires the GPIO driver if ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO is set to 1. In that case the application must include the GPIO driver sources to avoid link errors.

Enumeration Type Documentation

◆ ADI_CLOCK_ID

Enumeration of clock sources for various peripherals.

Enumerator
ADI_CLOCK_PCLK 

Source for all peripherals SPI, SPORT, SIP, CRC, AES, SIP interface, I2C, UART, optionally for timers.

ADI_CLOCK_HCLK 

Source for Core,Bus etc.

ADI_CLOCK_ACLK 

Source for the ADC.

Definition at line 74 of file adi_pwr.h.

◆ ADI_CLOCK_SOURCE_ID

Enumeration of input clock sources

Enumerator
ADI_CLOCK_SOURCE_HFXTAL 

Clock ID for 16 MHz or 26 MHz external crystal oscillator called HFXTAL.

ADI_CLOCK_SOURCE_LFXTAL 

Clock ID 32 kHz external crystal oscillator called LFXTAL.

ADI_CLOCK_SOURCE_HFOSC 

Clock ID for 26 MHz internal oscillator called HFOSC.

ADI_CLOCK_SOURCE_LFOSC 

Clock ID 32 kHz a 32 kHz internal oscillator called LFXTAL.

ADI_CLOCK_SOURCE_SPLL 

Clock ID for output clock for System PLL.

ADI_CLOCK_SOURCE_GPIO 

Clock ID for external clock from GPIO.

Definition at line 85 of file adi_pwr.h.

◆ ADI_CLOCK_MUX_ID

Enumeration of clock sources for each clock multiplexer. The processor has the following clock multiplexers.

  • SPLL Mux (System PLL).
  • Reference clock Mux.
  • Root Clock Mux.
Enumerator
ADI_CLOCK_MUX_SPLL_HFOSC 

Input clock for system PLL mux is HFOSC.

ADI_CLOCK_MUX_SPLL_HFXTAL 

Input clock for system PLL mux is HFXTAL.

ADI_CLOCK_MUX_LFCLK_LFOSC 

Input clock for low frequency clock mux is LFOSC.

ADI_CLOCK_MUX_LFCLK_LFXTAL 

Input clock for low frequency clock mux is LFXTAL.

ADI_CLOCK_MUX_REF_HFOSC_CLK 

Input clock to the multiplexer which provides reference clock for Flash and HPBUCK clock is HFOSC.

ADI_CLOCK_MUX_REF_RESERVED 

Reserved.

ADI_CLOCK_MUX_REF_HFXTAL_26MHZ_CLK 

Input clock to the multiplexer which provides reference clock for Flash and HPBUCK clock is 26 MHz HFXTAL.

ADI_CLOCK_MUX_REF_HFXTAL_16MHZ_CLK 

Input clock to the multiplexer which provides reference clock for Flash and HPBUCK clock is 16 MHz HFXTAL.

ADI_CLOCK_MUX_ROOT_HFOSC 

Input clock to root multiplexer is HFOSC.

ADI_CLOCK_MUX_ROOT_HFXTAL 

Input clock to root multiplexer is HFXTAL.

ADI_CLOCK_MUX_ROOT_SPLL 

Input clock to root multiplexer is SPLL.

ADI_CLOCK_MUX_ROOT_GPIO 

Input clock to root multiplexer is from GPIO.

Definition at line 108 of file adi_pwr.h.

◆ ADI_CLOCK_SOURCE_STATUS

Enumeration of clock source status.

Enumerator
ADI_CLOCK_SOURCE_DISABLED 

Specified clock source is disabled.

ADI_CLOCK_SOURCE_ENABLED_NOT_STABLE 

Specified clock source is not stable.

ADI_CLOCK_SOURCE_ENABLED_STABLE 

Specified clock source is enabled and stable.

ADI_CLOCK_SOURCE_ID_NOT_VALID 

Invalid clock ID.

Definition at line 152 of file adi_pwr.h.

◆ ADI_CLOCK_OUTPUT_ID

Clock output options through GPIO pin. The GPIO clock output pin can be driven through one of these clocks.

Enumerator
ADI_CLOCK_OUTPUT_ROOT_CLK 

Root Clock (ROOT_CLK).

ADI_CLOCK_OUTPUT_LF_CLK 

Low Frequency Clock (LF_CLK).

ADI_CLOCK_OUTPUT_ACLK 

ADC Clock (ACLK).

ADI_CLOCK_OUTPUT_HCLK_BUS 

HCLK_BUS.

ADI_CLOCK_OUTPUT_HCLK_CORE 

HCLK_CORE.

ADI_CLOCK_OUTPUT_PCLK 

Peripheral Clock (PCLK).

ADI_CLOCK_OUTPUT_RCLK 

Reference Clock for Flash controller timer (RCLK).

ADI_CLOCK_OUTPUT_RHP_CLK 

Mux of HFOSC, HFXTAL clock (RHP_CLK).

ADI_CLOCK_OUTPUT_GPT0_CLK 

GP Timer 0 clock (GPT0_CLK).

ADI_CLOCK_OUTPUT_GPT1_CLK 

GP Timer 1 clock (GPT1_CLK).

ADI_CLOCK_OUTPUT_HCLK_PERIPHERAL 

Peripherals operating at HCLK (HCLK_P).

ADI_CLOCK_OUTPUT_PLL_OUTPUT 

PLL Clock out.

ADI_CLOCK_OUTPUT_RTC0_CLK 

RTC0 Clock.

ADI_CLOCK_OUTPUT_HPBUCK_CLK 

HP Buck Clock (HPBUCK_CLK).

ADI_CLOCK_OUTPUT_HPBUCK_NO_OVERLAP_CLK 

HP Buck Non overlap clock.

ADI_CLOCK_OUTPUT_RTC1_CLK 

RTC1 generated clock.

Definition at line 167 of file adi_pwr.h.

◆ ADI_CLOCK_GATE

Enumeration of clock gates using which the clocks can be gated.

Enumerator
ADI_CLOCK_GATE_GPT0_CLK 

Clock Gate for the GP Timer-0.

ADI_CLOCK_GATE_GPT1_CLK 

Clock Gate for the GP Timer-1.

ADI_CLOCK_GATE_GPT2_CLK 

Clock Gate for the GP Timer-2.

ADI_CLOCK_GATE_I2C_CLK 

Clock Gate for the I2C.

ADI_CLOCK_GATE_GPIO_CLK 

Clock Gate for the GPIO.

ADI_CLOCK_GATE_PCLK 

Clock Gate for the PCLK.

Definition at line 221 of file adi_pwr.h.

◆ ADI_PWR_RESULT

Power driver API return codes

Enumerator
ADI_PWR_SUCCESS 

No error detected.

ADI_PWR_FAILURE 

Generic unknown error occurred.

ADI_PWR_NULL_POINTER 

If the given pointer is pointing to NULL.

ADI_PWR_INVALID_CLOCK_DIVIDER 

Requested divide value is out of range.

ADI_PWR_INVALID_CLOCK_ID 

Invalid ADI_CLOCK_ID specified.

ADI_PWR_INVALID_CLOCK_RATIO 

PDIV:HDIV ratio must be integral.

ADI_PWR_INVALID_POWER_MODE 

Invalid low-power mode requested.

ADI_PWR_INVALID_CLOCK_SPEED 

Invalid clock speed.

ADI_PWR_OPERATION_NOT_ALLOWED 

Specified operation is not allowed.

ADI_PWR_INVALID_PARAM 

Parameter is out of range.

ADI_PWR_SYSTEM_NOT_INITIALIZED 

System not initialized, call the API SystemInit.

Definition at line 268 of file adi_pwr.h.

◆ ADI_PWR_POWER_MODE

Enumeration of the power modes supported by the processor.

Enumerator
ADI_PWR_MODE_FLEXI 

Core Sleep power-down mode.

ADI_PWR_MODE_ACTIVE 

Fully Active. (piggy-back on bitmode value "1", normally reserved)

ADI_PWR_MODE_HIBERNATE 

Full Hibernate power-down mode.

ADI_PWR_MODE_SHUTDOWN 

System Sleep power-down mode.

Definition at line 298 of file adi_pwr.h.

◆ ADI_PWR_PMG_IRQ

Enumeration of power management interrupts.

Enumerator
ADI_PWR_LOW_BATTERY_VOLTAGE_IEN 

Interrupt when battery voltage drops below 1.8V.

ADI_PWR_UNDER_VOLATAGE_IEN 

Interrupt when VREG under-voltage: below 1V.

ADI_PWR_OVER_VOLATAGE_IEN 

Interrupt when VREG over-voltage: over- 1.32V.

ADI_PWR_BATTERY_VOLTAGE_RANGE_IEN 

Interrupt when battery voltage falls to the specified range.Please see adi_pwr_SetVoltageRange.

Definition at line 315 of file adi_pwr.h.

◆ ADI_PWR_CLOCK_IRQ

Enumeration of system clock module interrupts.

Enumerator
ADI_PWR_LFXTAL_CLOCK_MON_IEN 

Interrupt for LFXTAL clock monitor and Clock Fail.

ADI_PWR_LFXTAL_STATUS_IEN 

Interrupt when LFXTAL clock becomes stable/unstable.

ADI_PWR_HFXTAL_STATUS_IEN 

Interrupt when HFXTAL clock becomes stable/unstable.

ADI_PWR_PLL_STATUS_IEN 

Interrupt when PLL-LOCK/PLL-UNLOCK.

Definition at line 332 of file adi_pwr.h.

◆ ADI_PWR_EVENT

Enumeration of the power driver events notified through the callback.

Enumerator
ADI_PWR_EVENT_VREG_OVER_VOLTAGE 

Event for indicating Over voltage VREG > 1.32v.

ADI_PWR_EVENT_VREG_UNDER_VOLTAGE 

Event for indicating under voltage VREG < 1V.

ADI_PWR_EVENT_BATTERY_VOLTAGE_LOW 

Event for indicating battery voltage below 1.8V.

ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_OK 

Event to indicate HF crystal stable.

ADI_PWR_EVENT_OSC_HFXTAL_CLOCK_NO_OK 

Event to indicate HF crystal is not stable.

ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_OK 

Event to indicate LF crystal is stable.

ADI_PWR_EVENT_OSC_LFXTAL_CLOCK_NO_OK 

Event to indicate LF crystal is not stable.

ADI_PWR_EVENT_PLLC_LOCK 

Event for indicating PLL is locked.

ADI_PWR_EVENT_PLLC_UNLOCK 

Event for indicating PLL is unlocked.

Definition at line 361 of file adi_pwr.h.

◆ ADI_PWR_WAKEUP_STATUS

Enumeration of processor wake up status.

Enumerator
ADI_PWR_INT_EXT0 

Interrupt from External Interrupt 0.

ADI_PWR_INT_EXT1 

Interrupt from External Interrupt 1.

ADI_PWR_INT_EXT2 

Interrupt from External Interrupt 2.

ADI_PWR_INT_RTC 

Interrupt from RTC.

Definition at line 409 of file adi_pwr.h.

◆ ADI_PWR_VOLTAGE_RANGE

Enumeration of the battery voltage ranges for voltage monitoring interrupt generation.

Enumerator
ADI_PWR_BAT_VOLTAGE_RANGE_SAFE 

Voltage range is in safe region.

ADI_PWR_VOLTAGE_RANGE_2_2_TO_2_75 

Battery voltage is in the range of 2.2 to 2.75 V.

ADI_PWR_VOLTAGE_RANGE_1_6_TO_2_2 

Battery voltage is in the range of 1.6 to 2.2 V.

Definition at line 425 of file adi_pwr.h.

Function Documentation

◆ adi_pwr_Init()

ADI_PWR_RESULT adi_pwr_Init ( void  )

Initialize the clock configuration register with the default values.

Returns
Status

Definition at line 109 of file adi_pwr.c.

◆ adi_pwr_UpdateCoreClock()

ADI_PWR_RESULT adi_pwr_UpdateCoreClock ( void  )

Updates the internal SystemCoreClock variable with current core Clock retrieved from cpu registers.

Returns
Status

Updates the internal SystemCoreClock variable with current core Clock retrieved from cpu registers.

See also
adi_pwr_GetClockFrequency ()

Definition at line 179 of file adi_pwr.c.

◆ adi_pwr_SetExtClkFreq()

ADI_PWR_RESULT adi_pwr_SetExtClkFreq ( const uint32_t  ExtClkFreq)

Sets the system external clock frequency.

Parameters
[in]ExtClkFreqExternal clock frequency in Hz
Returns
Status
See also
adi_pwr_GetClockFrequency ()

Definition at line 228 of file adi_pwr.c.

◆ adi_pwr_SetRootClockMux()

ADI_PWR_RESULT adi_pwr_SetRootClockMux ( const ADI_CLOCK_MUX_ID  eClockID)

Sets the source for the root clock multiplexer.

Parameters
[in]eClockIDClock source to the root clock multiplexer.
Returns
Status
See also
adi_pwr_SetLFClockMux()
adi_pwr_SetPLLClockMux()

Definition at line 390 of file adi_pwr.c.

◆ adi_pwr_SetPLLClockMux()

ADI_PWR_RESULT adi_pwr_SetPLLClockMux ( const ADI_CLOCK_MUX_ID  eClockID)

Sets the input clock source for PLL multiplexer.

Parameters
[in]eClockIDClock source to the System PLL multiplexer.
Returns
Status
See also
adi_pwr_SetLFClockMux()

Definition at line 251 of file adi_pwr.c.

◆ adi_pwr_SetLFClockMux()

ADI_PWR_RESULT adi_pwr_SetLFClockMux ( const ADI_CLOCK_MUX_ID  eClockID)

Sets the input clock for low frequency clock multiplexer.

Parameters
[in]eClockIDClock source to the low frequency clock multiplexer.
Returns
Status
See also
adi_pwr_SetRootClockMux()
adi_pwr_SetPLLClockMux()

Definition at line 298 of file adi_pwr.c.

◆ adi_pwr_SetRefClockMux()

ADI_PWR_RESULT adi_pwr_SetRefClockMux ( const ADI_CLOCK_MUX_ID  eClockID)

Sets clock source for the Reference clock multiplexer.

Parameters
[in]eClockIDClock source to the reference clock multiplexer.
Returns
Status
See also
adi_pwr_SetLFClockMux()
adi_pwr_SetRootClockMux()
adi_pwr_SetPLLClockMux()

Definition at line 346 of file adi_pwr.c.

◆ adi_pwr_GetExtClkFreq()

ADI_PWR_RESULT adi_pwr_GetExtClkFreq ( uint32_t *  pExtClock)

Gets the system external clock frequency. Gets the clock frequency of the source connected to the external GPIO clock input source.

Parameters
[in]pExtClock: Pointer to write the external clock frequency.
Returns
Status

Definition at line 434 of file adi_pwr.c.

◆ adi_pwr_GetClockFrequency()

ADI_PWR_RESULT adi_pwr_GetClockFrequency ( const ADI_CLOCK_ID  eClockId,
uint32_t *  pClock 
)

Get the frequency of the given clock. Obtain individual peripheral clock frequencies.

Parameters
[in]eClockId: Clock identifier
[out]pClock: Pointer to a location to store the clock frequency.
Returns
Status
See also
adi_PWR_SetClockDivide
SystemSetClockDivider

Definition at line 467 of file adi_pwr.c.

Referenced by adi_adc_GetBatteryVoltage(), adi_adc_GetTemperature(), adi_adc_PowerUp(), adi_i2c_SetBitRate(), adi_spi_GetBitrate(), adi_spi_SetBitrate(), and adi_uart_FlushTxChannel().

◆ adi_pwr_EnableClock()

ADI_PWR_RESULT adi_pwr_EnableClock ( const ADI_CLOCK_GATE  eClockGate,
const bool  bEnable 
)

Enable/disable individual peripheral clocks.

Parameters
[in]eClockGateClock identifier
[in]bEnableFlag to indicate whether to enable/disable individual clock. true - to enable individual clock. false - to disable individual clock.
Returns
Status

Manage individual peripheral clock gates to enable or disable the clocks to the peripheral.

Definition at line 523 of file adi_pwr.c.

◆ adi_pwr_EnableClockSource()

ADI_PWR_RESULT adi_pwr_EnableClockSource ( const ADI_CLOCK_SOURCE_ID  eClockSource,
const bool  bEnable 
)

To Enable/disable clock sources.

Parameters
[in]eClockSource: Clock source identifier.
[in]bEnable: Enable (true) or disable (false) the clock source.
Returns
Status

Enables or disables clock sources without additional checks, by writing a "1" or "0" to the enable bit.

Definition at line 693 of file adi_pwr.c.

◆ adi_pwr_SetClockDivider()

ADI_PWR_RESULT adi_pwr_SetClockDivider ( const ADI_CLOCK_ID  eClockId,
const uint16_t  nDiv 
)

Sets the clock divide factor for an individual clock group.

Parameters
[in]eClockIdClock domain identifier.
[in]nDivClock divide value to be set (right-justified uint16_t).
Returns
Status

Manage individual peripheral clock dividers.

See also
SystemGetClockFrequency

Definition at line 565 of file adi_pwr.c.

◆ adi_pwr_GetClockStatus()

ADI_PWR_RESULT adi_pwr_GetClockStatus ( const ADI_CLOCK_SOURCE_ID  eClockSource,
ADI_CLOCK_SOURCE_STATUS peStatus 
)

Return the status of a clock source.

Parameters
[in]eClockSource: Clock source identifier.
[out]peStatus: Pointer to variable of type ADI_CLOCK_SOURCE_STATUS for storing clock source status.
Returns
Status

Return the status of a clock source.

Definition at line 794 of file adi_pwr.c.

◆ adi_pwr_SetPll()

ADI_PWR_RESULT adi_pwr_SetPll ( uint8_t  nDivFactor,
const uint8_t  nMulFactor,
const bool  bDiv2,
const bool  bMul2 
)

Program PLL frequency.

Parameters
[in]nDivFactorPLL divider(M).
[in]nMulFactorPLL Multiplier(N)
[in]bDiv2PLL DIV2 parameter.
[in]bMul2PLL DIV2 parameter.
Returns
Status

Program PLL frequency (parameters M, N, DIV2) forSystem PLL(SPLL).

         SPLL = input clock * ["(N *  (1+ bMul2 )" / "((1+bDiv2)*M)" ]
         where input clock can be HFOSC or HFXTAL.

Definition at line 973 of file adi_pwr.c.

◆ adi_pwr_EnableClockInterrupt()

ADI_PWR_RESULT adi_pwr_EnableClockInterrupt ( const ADI_PWR_CLOCK_IRQ  eIrq,
const bool  bEnable 
)

Enable/Disable the clock interrupt to monitor status of LFXTAL, HFXTAL and PLL.

Parameters
[in]eIrq: Specify which interrupt need to be enable/disabled.
[in]bEnable: Specifies to enable/disable the specified interrupt.
Returns
Status
See also
adi_pwr_SetVoltageRange()

Interrupt for LFXTAL clock monitor and Clock Fail

Interrupt when LFXTAL clock becomes stable/unstable

Interrupt when HFXTAL clock becomes stable/unstable

Interrupt when PLL-LOCK/PLL-UNLOCK

Definition at line 890 of file adi_pwr.c.

◆ adi_pwr_EnableLFXTALBypass()

ADI_PWR_RESULT adi_pwr_EnableLFXTALBypass ( const bool  bEnable)

Enable/disable LFXTAL bypass mode.

Parameters
[in]bEnable: Specifies to enable/disable the LFXTAL bypass mode
true: To enable LFXTAL bypass mode.
false: To disable LFXTAL bypass mode.
Returns
Status

Definition at line 1081 of file adi_pwr.c.

◆ adi_pwr_EnablePMGInterrupt()

ADI_PWR_RESULT adi_pwr_EnablePMGInterrupt ( const ADI_PWR_PMG_IRQ  eIrq,
const bool  bEnable 
)

Enable/Disable the power management interrupt.

Parameters
[in]eIrq: Specify which interrupt need to be enable/disabled.
[in]bEnable: Specifies to enable/disable the interrupt.
Returns
Status
  • ADI_PWR_SUCCESS Enabled the specified interrupt.
  • ADI_PWR_FAILURE [D] Enabling the battery monitoring interrupt when range is set to safe range (VBAT > 2.75 ).
Note
: User should configure the appropriate voltage range before enabling the interrupt for battery voltage range.
See also
adi_pwr_SetVoltageRange()

Definition at line 1043 of file adi_pwr.c.

◆ adi_pwr_GetWakeUpStatus()

ADI_PWR_RESULT adi_pwr_GetWakeUpStatus ( ADI_PWR_WAKEUP_STATUS peStatus)

Function to retrieve the wakeup from shut down mode status.

Parameters
[in]peStatus: Pointer to ADI_PWR_WAKEUP_STATUS for returning the wakeup status.
Returns
Status

Definition at line 1382 of file adi_pwr.c.

◆ adi_pwr_SetVoltageRange()

ADI_PWR_RESULT adi_pwr_SetVoltageRange ( const ADI_PWR_VOLTAGE_RANGE  eRange)

To Monitor voltage range of battery.

Parameters
[in]eRange: Specify the voltage range for the battery.
Returns
Status

Definition at line 1399 of file adi_pwr.c.

◆ adi_pwr_EnterLowPowerMode()

ADI_PWR_RESULT adi_pwr_EnterLowPowerMode ( const ADI_PWR_POWER_MODE  PowerMode,
uint32_t volatile *  pnInterruptOccurred,
const uint8_t  PriorityMask 
)

Puts the processor into given low power mode.

Parameters
[in]PowerModeOne of the ADI_PWR_POWER_MODE enum values, defining the specific low-power modes to use.
[in,out]pnInterruptOccurredControl parameter selection low-power operation. Either a NULL pointer for automatic hardware-based sleeping between interrupts, or a pointer to uint32_t for software looping sleep between interrupts.

If a pointer to uint32_t is passed in, the integer must be 0 on entry, and will be set to 0 on exit.

When a NULL is passed, it means the application wants the low-power implementation to use the automatic "sleep-on-exit" hardware sleep mode in which wakeup interrupts are dispatched and then automatically put the processor back to sleep on exit. All interrupts execute the same WFI instruction (no looping) under hardware control, which results in a faster re-sleep than the software mode.

When a non-NULL value is passed, it is interpreted as a pointer to a shared integer application control variable allowing the wake-up interrupts to control whether/when the control loop should re-sleep the processor as each interrupt exits. Any interrupt that sets the variable will cause the sleep loop to exit. Otherwise, exiting interrupts will cause the core to re-sleep until the variable is set. Each interrupt executes a different WFI instruction inside a software loop (slower re-sleep).

Parameters
[in]PriorityMaskA right-justified (un shifted) wakeup interrupt priority mask, corresponding to the programmable interrupt priority encoding scheme defined by the Cortex NVIC controller. The PriorityMask value blocks interrupts with an equal or lower priority than the specified level, such that only higher-priority interrupts (less in numerical value) than the priority mask awake the processor. A zero-valued PriorityMask disables interrupt masking.
Returns
Status

Puts the processor into a low-power mode with interrupt-based wakeup(s). Applications specify the low-power mode, a pointer to an application-defined interrupt variable, and an interrupt priority mask controlling the interrupt priority level that may awake the processor.

pnInterruptOccurred
When NULL, the processor is automatically put back to sleep as awaking interrupts exit. This mode employs the hardware "sleep-on-exit" system control register bit: SLEEPONEXIT_BIT in conjunction with the "wait-for- interrupt" (WFI) instruction to implement a persistent sleep mode.

When non-Null, a software strategy is used to control sleeping. As awakening interrupts are processed, they can increment the interrupt controlling variable and thereby cause the sleep mode to be exited. Note that all interrupts share a common variable and any interrupt that sets the variable will cause the sleep mode to be exited.

Use of the pnInterruptOccurred parameter provides a mechanism to resolve two potential hibernation trouble spots: 1) the inherent race between the intended wakeup interrupt and the execution of the Wait-For-Interrupt instruction (WFI) used to sleep the processor, and 2) unrelated interrupts (of sufficient priority) that may terminate the wait prematurely.

In the first case of the race condition, the race is avoided by testing the pnInterruptOccurred variable prior to the WFI within a common critical section. This allows the adi_pwr_EnterLowPowerMode() implementation to insure the intended wakeup interrupt has not occurred already and control whether to sleep the processor. This insures the intended wakeup interrupt has not already occurred prior to the wait, thereby eliminating the race condition otherwise present.

In the second case of an unrelated interrupt terminating the sleep prematurely, the problem is solved by requiring the interrupt handler(s) which is(are) intended to awake the sleeping processor to set the application-defined pnInterruptOccurred variable in their respective interrupt handler(s). This insures only those interrupts that explicitly set the variable will break the sleeping processor out of the sleep cycle. Other (incidental) interrupts put the processor back to sleep after the interrupt because the variable would not have been set. This is why there is a loop around the WFI instruction.

The pnInterruptOccurred variable must be initialized to zero before first use, and this should be done prior to enabling any interrupt which may set it (otherwise interrupts may be missed). If this variable is global or static then static initialization to zero or false will be sufficient.

The variable should only be set, from an interrupt handler, by calling adi_pwr_ExitLowPowerMode() and passing the variable by reference. The variable should not be assigned to directly, other than for initialization.

adi_pwr_EnterLowPowerMode() will always clear the variable again before returning, so it does not need to be cleared by user code on each use. Explicitly clearing the variable, outside of adi_pwr_EnterLowPowerMode() runs the risk of missing interrupts.

PriorityMask
A zero-valued PriorityMask disables interrupt masking, leaving all interrupts eligible to awake the sleeping processor. This means that zero-valued interrupts cannot be masked. A non-zero PriorityMask limits interrupts that may awake the sleeping processor to those with a higher priority level (lower numerically) than the specified PriorityMask value.

Each "programmable" peripheral interrupt has an associated priority-level register (which defaults to zero) within the Nested Vectored Interrupt Controller (NVIC). The number of interrupt priority encoding bits is defined by constant __NVIC_PRIO_BITS and is a fixed silicon attribute configured during chip design. The interrupt priority-level registers range in width from 3 to 8 bits.

This processor uses 3-bit priority encoding, allowing priority levels ranging between 0 (the highest, default programmable priority) and 7 (the lowest). For example, if the PriorityMask parameter is set to 3, only interrupts with assigned priority 0, 1, and 2 may awake the processor. Since default priority of all programmable interrupts is 0, setting up maskable interrupts requires that they be demoted in priority (raised numerically) relative to interrupts that are intended to awake the processor.

Note
The number of priority levels is uncorrelated with the actual number of interrupts or their position in the Interrupt Vector Table (IVT). Interrupt priorities may be programmed individually.

The priority levels are actually stored in the core as a left-justified value in an 8-bit field. The adi_pwr_EnterLowPowerMode() API takes care of aligning the passed PriorityMask value to the core register (BASEPRI).

The default priority level for all interrupts is zero, which implies it is impossible to mask interrupts with a default zero-level priority encoding. All interrupt priorities must be managed to create meaningful interrupt masks for low-power wakeups, as described above.

Warning
Do not modify the BASEPRI register (used for masking interrupt priority) during interrupts that take the core out of low-power mode momentarily. The BASEPRI register is saved/restored on low-power mode entry/exit to honor user priority requests. Interrupt-level changes to BASEPRI will be clobbered on low-power exit as the saved value is restored.

See also
adi_pwr_ExitLowPowerMode

Definition at line 1718 of file adi_pwr.c.

◆ adi_pwr_ExitLowPowerMode()

ADI_PWR_RESULT adi_pwr_ExitLowPowerMode ( uint32_t volatile *  pnInterruptOccurred)

Companion function to adi_pwr_EnterLowPowerMode() that allows interrupts to
break out of the "FLEXI" mode in which the processor stays in
sleep while peripherals are active.

Parameters
[in,out]pnInterruptOccurredControl parameter selection low-power operation. Either a NULL pointer
for hardware sleep-on-exit feature, or a pointer to uint32_t for software
looping sleep between interrupts.
Returns
Status
See also
adi_pwr_EnterLowPowerMode

Definition at line 1861 of file adi_pwr.c.

◆ adi_pwr_EnableHPBuck()

ADI_PWR_RESULT adi_pwr_EnableHPBuck ( const bool  bEnable)

Enables or disables the HP Buck.

Parameters
[in]bEnable: Flag which indicates whether to enable or disable HPBuck 'true' - To enable HPBuck. 'false' - To disable HPBuck.
Returns
Status

Definition at line 1360 of file adi_pwr.c.

◆ adi_pwr_RegisterCallback()

ADI_PWR_RESULT adi_pwr_RegisterCallback ( const ADI_CALLBACK  pfCallback,
void *  pcbParam 
)

Registers or unregister the callback function.

Application can register or unregister the callback function which will be called to notify the events from the driver.

Parameters
[in]pfCallback: Callback function pointer.
[in]pcbParam: Callback parameter.
Returns
Status
  • ADI_PWR_SUCCESS : Successfully installed the callback function.
  • ADI_PWR_NULL_POINTER [D] : Failed to install the callback function since the call back function pointer is NULL.

Definition at line 198 of file adi_pwr.c.