30 #ifndef SYSTEM_ADUCM3029_H 31 #define SYSTEM_ADUCM3029_H 36 #include <adi_processor.h> 48 #define __HFOSC 26000000u 51 #define __HFXTAL 26000000u 54 #define __LFCLK 32768u 57 #define HFMUX_INTERNAL_OSC_VAL (0u << BITP_CLKG_CLK_CTL0_CLKMUX) 60 #define HFMUX_EXTERNAL_XTAL_VAL (1u << BITP_CLKG_CLK_CTL0_CLKMUX) 63 #define HFMUX_SYSTEM_SPLL_VAL (2u << BITP_CLKG_CLK_CTL0_CLKMUX) 66 #define HFMUX_GPIO_VAL (3u << BITP_CLKG_CLK_CTL0_CLKMUX) 72 const uint32_t ReadProtectKeyHash[4];
73 const uint32_t CrcOfReadProtectKeyHash;
74 const uint32_t LastCRCPage;
75 const uint32_t InCircuitWriteProtectCode;
76 const uint32_t FlashBlockWriteProtect;
78 } ADI_ADUCM302X_SECURITY_OPTIONS;
83 #define CACHE_CONTROLLER_KEY 0xF123F456u 85 #define PWRKEY_VALUE_KEY 0x4859u 88 #define NVIC_INTS (65u) 96 #define ADI_SRAM_BANK_0 (1u << 0) 98 #define ADI_SRAM_BANK_1 (1u << 1) 100 #define ADI_SRAM_BANK_2 (1u << 2) 102 #define ADI_SRAM_BANK_3 (1u << 3) 104 #define ADI_SRAM_BANK_4 (1u << 4) 106 #define ADI_SRAM_BANK_5 (1u << 5) 108 #define ADI_SRAM_BANK_6 (1u << 6) 110 #define ADI_SRAM_BANK_7 (1u << 7) 119 #define KEEP_VAR(var) var __attribute__((used)) 120 #define SECTION_PLACE(def,sectionname) __attribute__ ((section(sectionname))) def 123 #ifdef __ARMCC_VERSION 124 #define KEEP_VAR(var) var __attribute__((used)) 125 #define SECTION_PLACE(def,sectionname) __attribute__ ((section(sectionname))) def 126 #endif // __ARMCC_VERSION 135 #pragma diag_suppress=Pm154 137 #define KEEP_VAR(var) __root var 138 #define SECTION_PLACE(def,sectionname) def @ sectionname 142 #if !defined(KEEP_VAR) || !defined(SECTION_PLACE) 143 #error "This compiler is not yet supported" 147 #if defined (__ICCARM__) 148 #pragma diag_default=Pm011 149 #pragma diag_default=Pm154 void SystemInit(void)
Sets up the microcontroller system. Initializes the System and updates the relocate vector table...
void SystemCoreClockUpdate(void)
Updates the variable SystemCoreClock and must be called whenever the core clock is changed during pro...
void adi_system_EnableCache(bool bEnable)
This enables or disables the cache.
uint32_t adi_system_EnableRetention(ADI_SRAM_BANK eBank, bool bEnable)
This enables/disable SRAM retention during the hibernation.