ADuCM302x Device Drivers API Reference Manual
Release 3.1.2.0
adi_pwr_config.h
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/*
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*****************************************************************************
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@file: adi_pwr_config.h
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@brief: Configuration options for PWR driver.
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This is specific to the PWR driver and will be included by the source file.
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It is not required for the application to include this header file.
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-----------------------------------------------------------------------------
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Copyright (c) 2016-2017 Analog Devices, Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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- Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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- Modified versions of the software must be conspicuously marked as such.
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- This software is licensed solely and exclusively for use with processors
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manufactured by or for Analog Devices, Inc.
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- This software may not be combined or merged with other code in any manner
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that would cause the software to become subject to terms and conditions
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which differ from those listed here.
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- Neither the name of Analog Devices, Inc. nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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- The use of this software may or may not infringe the patent rights of one
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or more patent holders. This license does not release you from the
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requirement that you obtain separate licenses from these patent holders
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to use this software.
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THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES, INC. AND CONTRIBUTORS "AS IS" AND ANY
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EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
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TITLE, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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NO EVENT SHALL ANALOG DEVICES, INC. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, PUNITIVE OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, DAMAGES ARISING OUT OF CLAIMS OF INTELLECTUAL
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PROPERTY RIGHTS INFRINGEMENT; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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#ifndef ADI_PWR_CONFIG_H
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#define ADI_PWR_CONFIG_H
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#include <adi_global_config.h>
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#ifdef __ICCARM__
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/* IAR MISRA C 2004 error suppressions.
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*
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* Pm009 (rule 5.1): identifiers shall not rely on significance of more than 31 characters.
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* The YODA-generated headers rely on more. The IAR compiler supports that.
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*/
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#pragma diag_suppress=Pm009
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#endif
/* __ICCARM__ */
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#define ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO 0
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/*-------------------------------------------------------------------------------
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Set of MACROs for configuring the clock
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--------------------------------------------------------------------------------*/
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/* Oscillator Control Register */
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#define ADI_PWR_LF_CLOCK_MUX 0
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#define ADI_PWR_HFOSC_CLOCK_ENABLE 1
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#define ADI_PWR_LFXTAL_CLOCK_ENABLE 0
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#define ADI_PWR_HFXTAL_CLOCK_ENABLE 0
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#define ADI_PWR_LFXTAL_CLOCK_MON_ENABLE 0
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#define ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE 0
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#define ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE 0
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#define ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE 0
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/********** Miscellaneous clock setting register CTL0 *************/
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#define ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX 0
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#define ADI_PWR_GPIO_CLOCK_OUT_SELECT 0
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#define ADI_PWR_INPUT_TO_RCLK_MUX 0
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#define ADI_PWR_INPUT_TO_SPLL_MUX 0
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#define ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE 0
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#define ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE 0
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/********** Clock divider register CTL1 ***************/
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#define ADI_PWR_HCLK_DIVIDE_COUNT 4
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#define ADI_PWR_PCLK_DIVIDE_COUNT 4
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#define ADI_PWR_ACLK_DIVIDE_COUNT 16
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/************* HF Oscillator divide clock select register CTL2 ***********/
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#define ADI_PWR_HFOSC_AUTO_DIV_BY_1 0
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#define ADI_PWR_HFOSC_DIVIDE_SELECT 0
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/****** System PLL Register CTL3 *****/
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#define ADI_PWR_SPLL_MUL_FACTOR 26
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#define ADI_PWR_SPLL_ENABLE_DIV2 0
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#define ADI_PWR_SPLL_ENABLE 0
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#define ADI_PWR_SPLL_INTERRUPT_ENABLE 0
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#define ADI_PWR_SPLL_DIV_FACTOR 13
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#define ADI_PWR_SPLL_ENABLE_MUL2 0
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/********** User Clock Gating Control CTL5 ********************/
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#define ADI_PWR_GPT0_CLOCK_ENABLE 1
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#define ADI_PWR_GPT1_CLOCK_ENABLE 1
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#define ADI_PWR_GPT2_CLOCK_ENABLE 1
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#define ADI_PWR_I2C_CLOCK_ENABLE 1
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#define ADI_PWR_GPIO_CLOCK_ENABLE 1
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#define ADI_PWR_PCLK_ENABLE 0
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#define ADI_PWR_TIMER_RGB_ENABLE 1
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/*-------------------------------------------------------------------------------
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Set of macros for configuring the power management module
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--------------------------------------------------------------------------------*/
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/********* Interrupt enable register IEN ********/
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#define ADI_PWR_ENABLE_VBAT_INTERRUPT 0
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#define ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT 0
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#define ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT 0
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#define ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT 0
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#define ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT 0
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/********* HP Buck control register CTL1 ********/
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#define ADI_PWR_HP_BUCK_ENABLE 0
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#define ADI_PWR_HP_BUCK_LOAD_MODE 0
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#define ADI_PWR_HP_BUCK_LOW_POWER_MODE 0
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/********* Power mode register ********/
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#define ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING 0
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/*******************************************************************************
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M A C R O V A L I D A T I O N
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*******************************************************************************/
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#if ( ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO > 1 )
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#error "Invalid configuration set for ADI_PWR_CFG_ENABLE_CLOCK_SOURCE_GPIO"
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#endif
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#if ( ADI_PWR_LF_CLOCK_MUX > 1 )
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#error "Invalid configuration set for ADI_PWR_LF_CLOCK_MUX"
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#endif
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#if ( ADI_PWR_HFOSC_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_HFOSC_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_LFXTAL_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_HFXTAL_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_HFXTAL_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_LFXTAL_CLOCK_MON_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_MON_ENABLE"
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#endif
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#if ( ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_FAIL_AUTO_SWITCH_ENABLE"
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#endif
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#if ( ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_ROBUST_MODE_ENABLE"
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#endif
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#if ( ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT > 3 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_ROBUST_LOAD_SELECT"
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#endif
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#if ( ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_ROOT_CLOCK_MON_INT_ENABLE"
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#endif
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#if ( ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_ROOT_CLOCK_FAIL_AUTOSWITCH_ENABLE"
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#endif
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#if ( ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX > 3 )
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#error "Invalid configuration set for ADI_PWR_INPUT_TO_ROOT_CLOCK_MUX"
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#endif
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#if ( ADI_PWR_GPIO_CLOCK_OUT_SELECT > 15 )
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#error "Invalid configuration set for ADI_PWR_GPIO_CLOCK_OUT_SELECT"
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#endif
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#if ( ADI_PWR_INPUT_TO_RCLK_MUX > 3 )
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#error "Invalid configuration set for ADI_PWR_INPUT_TO_RCLK_MUX"
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#endif
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#if ( ADI_PWR_INPUT_TO_SPLL_MUX > 3 )
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#error "Invalid configuration set for ADI_PWR_INPUT_TO_SPLL_MUX"
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#endif
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#if ( ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_LFXTAL_CLOCK_INTERRUPT_ENABLE"
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#endif
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#if ( ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_HFXTAL_CLOCK_INTERRUPT_ENABLE"
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#endif
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#if ( ADI_PWR_HCLK_DIVIDE_COUNT > 63 )
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#error "Invalid configuration set for ADI_PWR_HCLK_DIVIDE_COUNT"
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#endif
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#if ( ADI_PWR_PCLK_DIVIDE_COUNT > 63 )
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#error "Invalid configuration set for ADI_PWR_PCLK_DIVIDE_COUNT"
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#endif
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#if ( ADI_PWR_ACLK_DIVIDE_COUNT > 63 )
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#error "Invalid configuration set for ADI_PWR_ACLK_DIVIDE_COUNT"
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#endif
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#if ( ADI_PWR_HFOSC_AUTO_DIV_BY_1 > 1 )
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#error "Invalid configuration set for ADI_PWR_HFOSC_AUTO_DIV_BY_1"
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#endif
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#if ( ADI_PWR_HFOSC_DIVIDE_SELECT > 5 )
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#error "Invalid configuration set for ADI_PWR_HFOSC_DIVIDE_SELECT"
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#endif
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#if ( ADI_PWR_SPLL_MUL_FACTOR < 8 || ADI_PWR_SPLL_MUL_FACTOR > 31 )
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#error "Invalid configuration set for ADI_PWR_SPLL_MUL_FACTOR"
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#endif
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#if ( ADI_PWR_SPLL_ENABLE_DIV2 > 1 )
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#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE_DIV2"
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#endif
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#if ( ADI_PWR_SPLL_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE"
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#endif
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#if ( ADI_PWR_SPLL_INTERRUPT_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_SPLL_INTERRUPT_ENABLE"
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#endif
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#if ( ADI_PWR_SPLL_DIV_FACTOR < 2 || ADI_PWR_SPLL_DIV_FACTOR > 15 )
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#error "Invalid configuration set for ADI_PWR_SPLL_DIV_FACTOR"
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#endif
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#if ( ADI_PWR_SPLL_ENABLE_MUL2 > 1 )
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#error "Invalid configuration set for ADI_PWR_SPLL_ENABLE_MUL2"
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#endif
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#if ( ADI_PWR_GPT0_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_GPT0_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_GPT1_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_GPT1_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_GPT2_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_GPT2_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_I2C_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_I2C_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_GPIO_CLOCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_GPIO_CLOCK_ENABLE"
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#endif
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#if ( ADI_PWR_PCLK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_PCLK_ENABLE"
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#endif
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#if ( ADI_PWR_TIMER_RGB_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_TIMER_RGB_ENABLE"
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#endif
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#if ( ADI_PWR_ENABLE_VBAT_INTERRUPT > 1 )
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#error "Invalid configuration set for ADI_PWR_ENABLE_VBAT_INTERRUPT"
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#endif
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#if ( ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT > 1 )
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#error "Invalid configuration set for ADI_PWR_ENABLE_VREG_UNDER_VOLTAGE_INTERRUPT"
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#endif
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#if ( ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT > 1 )
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#error "Invalid configuration set for ADI_PWR_ENABLE_VREG_OVER_VOLTAGE_INTERRUPT"
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#endif
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#if ( ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT > 1 )
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#error "Invalid configuration set for ADI_PWR_ENABLE_BATTERY_VOLTAGE_RANGE_INTERRUPT"
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#endif
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#if ( ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT > 2 )
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#error "Invalid configuration set for ADI_PWR_BATTERY_VOLTAGE_RANGE_FOR_INTERRUPT"
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#endif
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#if ( ADI_PWR_HP_BUCK_ENABLE > 1 )
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#error "Invalid configuration set for ADI_PWR_HP_BUCK_ENABLE"
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#endif
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#if ( ADI_PWR_HP_BUCK_LOAD_MODE > 1 )
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#error "Invalid configuration set for ADI_PWR_HP_BUCK_LOAD_MODE"
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#endif
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#if ( ADI_PWR_HP_BUCK_LOW_POWER_MODE > 1 )
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#error "Invalid configuration set for ADI_PWR_HP_BUCK_LOW_POWER_MODE"
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#endif
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#if ( ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING > 1 )
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#error "Invalid configuration set for ADI_PWR_ENABLE_BATTERY_VOLTAGE_MONITORING"
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#endif
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#ifdef __ICCARM__
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#pragma diag_default=Pm009
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#endif
/* __ICCARM__ */
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#endif
/* ADI_PWR_CONFIG_H */
Include
config
adi_pwr_config.h
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