ADuCM302x Device Drivers API Reference Manual  Release 3.1.2.0
SPI Driver

Serial Peripheral Interface (SPI) Driver. More...

Modules

 Static Configuration
 

Data Structures

struct  ADI_SPI_TRANSCEIVER
 

Macros

#define ADI_SPI_MEMORY_SIZE   (40u + ADI_SEM_SIZE)
 

Typedefs

typedef struct __ADI_SPI_DEV_DATA_TYPE * ADI_SPI_HANDLE
 
typedef const struct __ADI_SPI_DEV_DATA_TYPE * ADI_SPI_CONST_HANDLE
 

Enumerations

enum  ADI_SPI_RESULT {
  ADI_SPI_SUCCESS,
  ADI_SPI_FAILURE,
  ADI_SPI_IN_USE,
  ADI_SPI_INVALID_HANDLE,
  ADI_SPI_INVALID_DEVICE_NUM,
  ADI_SPI_DMA_ERROR,
  ADI_SPI_INVALID_POINTER,
  ADI_SPI_INVALID_PARAM,
  ADI_SPI_UNSUPPORTED_MODE,
  ADI_SPI_SEMAPHORE_FAILED,
  ADI_SPI_INVALID_OPERATION,
  ADI_SPI_BUFFER_NOT_SUBMITTED,
  ADI_SPI_BAD_SYS_CLOCK,
  ADI_SPI_PEND_FAILED,
  ADI_SPI_DMA_REG_FAILED,
  ADI_SPI_HW_ERROR_OCCURRED
}
 
enum  ADI_SPI_HW_ERRORS {
  ADI_SPI_HW_ERROR_NONE = 0u,
  ADI_SPI_HW_ERROR_TX_UNDERFLOW = 1u,
  ADI_SPI_HW_ERROR_RX_OVERFLOW = 2u,
  ADI_SPI_HW_ERROR_RX_CHAN_DMA_BUS_FAULT = 4u,
  ADI_SPI_HW_ERROR_TX_CHAN_DMA_BUS_FAULT = 8u,
  ADI_SPI_HW_ERROR_RX_CHAN_DMA_INVALID_DESCR = 16u,
  ADI_SPI_HW_ERROR_TX_CHAN_DMA_INVALID_DESCR = 32u,
  ADI_SPI_HW_ERROR_RX_CHAN_DMA_UNKNOWN_ERROR = 64u,
  ADI_SPI_HW_ERROR_TX_CHAN_DMA_UNKNOWN_ERROR = 128u
}
 
enum  ADI_SPI_CHIP_SELECT {
  ADI_SPI_CS_NONE = 0,
  ADI_SPI_CS0 = 1,
  ADI_SPI_CS1 = 2,
  ADI_SPI_CS2 = 4,
  ADI_SPI_CS3 = 8
}
 

Functions

ADI_SPI_RESULT adi_spi_Open (uint32_t nDeviceNum, void *pDevMemory, uint32_t nMemorySize, ADI_SPI_HANDLE *const phDevice)
 Initialize and allocate an SPI device for use in Master Mode. More...
 
ADI_SPI_RESULT adi_spi_Close (ADI_SPI_HANDLE const hDevice)
 Uninitialize and deallocate an SPI device. More...
 
ADI_SPI_RESULT adi_spi_MasterReadWrite (ADI_SPI_HANDLE const hDevice, const ADI_SPI_TRANSCEIVER *const pXfr)
 Submit data buffers for SPI Master-Mode transaction in "Blocking mode".This function
returns only after the data transfer is complete. More...
 
ADI_SPI_RESULT adi_spi_SetMasterMode (ADI_SPI_CONST_HANDLE const hDevice, const bool bFlag)
 Set SPI Master-Mode operation. More...
 
ADI_SPI_RESULT adi_spi_SlaveReadWrite (ADI_SPI_HANDLE const hDevice, const ADI_SPI_TRANSCEIVER *const pXfr)
 Submit data buffers for SPI Slave-Mode transaction in "Blocking mode".This function
returns only after the data transfer is complete. More...
 
ADI_SPI_RESULT adi_spi_MasterSubmitBuffer (ADI_SPI_HANDLE const hDevice, const ADI_SPI_TRANSCEIVER *const pXfr)
 Submit data buffers for SPI Master-Mode transaction. More...
 
ADI_SPI_RESULT adi_spi_SlaveSubmitBuffer (ADI_SPI_HANDLE const hDevice, const ADI_SPI_TRANSCEIVER *const pXfr)
 Submit data buffers for SPI Slave-Mode transaction. More...
 
ADI_SPI_RESULT adi_spi_RegisterCallback (ADI_SPI_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void *const pCBParam)
 Register or unregister the callback. More...
 
ADI_SPI_RESULT adi_spi_GetBuffer (ADI_SPI_HANDLE const hDevice, uint32_t *const pHWErrors)
 Block until the SPI transaction is complete. More...
 
ADI_SPI_RESULT adi_spi_SetClockPhase (ADI_SPI_HANDLE const hDevice, const bool bFlag)
 Set the clock phase. More...
 
ADI_SPI_RESULT adi_spi_SetClockPolarity (ADI_SPI_HANDLE const hDevice, const bool bFlag)
 Set the clock polarity. More...
 
ADI_SPI_RESULT adi_spi_isBufferAvailable (ADI_SPI_CONST_HANDLE const hDevice, bool *const bComplete)
 Get the SPI transaction completion status. More...
 
ADI_SPI_RESULT adi_spi_SetContinuousMode (ADI_SPI_CONST_HANDLE const hDevice, const bool bFlag)
 Set the continuous transfer mode. More...
 
ADI_SPI_RESULT adi_spi_SetLoopback (ADI_SPI_CONST_HANDLE const hDevice, const bool bFlag)
 Set the internal loopback mode. More...
 
ADI_SPI_RESULT adi_spi_SetIrqmode (ADI_SPI_CONST_HANDLE const hDevice, const uint8_t nMode)
 Set the IRQ mode. More...
 
ADI_SPI_RESULT adi_spi_SetReceiveOverflow (ADI_SPI_CONST_HANDLE const hDevice, const bool bFlag)
 Set the SPI receive FIFO overflow mode. More...
 
ADI_SPI_RESULT adi_spi_SetTransmitUnderflow (ADI_SPI_CONST_HANDLE const hDevice, const bool bFlag)
 Set the SPI transmit FIFO underflow mode. More...
 
ADI_SPI_RESULT adi_spi_SetBitrate (ADI_SPI_CONST_HANDLE const hDevice, const uint32_t Hertz)
 Set the SPI serial clock frequency. More...
 
ADI_SPI_RESULT adi_spi_SetChipSelect (ADI_SPI_HANDLE const hDevice, const ADI_SPI_CHIP_SELECT eChipSelect)
 Set the chip select. More...
 
ADI_SPI_RESULT adi_spi_GetBitrate (ADI_SPI_CONST_HANDLE const hDevice, uint32_t *const pnBitrate)
 Get the SPI serial clock frequency. More...
 

Detailed Description

Serial Peripheral Interface (SPI) Driver.

The SPI driver manages all instances of the SPI peripheral.

Note
The application must include drivers/spi/adi_spi.h to use this driver.
This driver requires the DMA driver.The application must include the DMA driver sources to avoid link errors.
This documentation presented here is API documentation only. The device drive user's guide, located in the Documents folder, explains how to use these APIs in an application.
The SPI will be configured by default to operate in Master mode.
To configure the driver to operate in slave mode the static configuration file adi_spi_config.h must be modified.
Specifically, the macro ADI_SPIx_MASTER_MODE must be set to '0' to indicate that slave mode functionality is needed.
Since there are three SPI devices there are three macros, ADI_SPI0_MASTER_MODE, ADI_SPI1_MASTER_MODE and ADI_SPI2_MASTER_MODE to control the functionality of each SPI controller.
Each instance of the SPI operates independently from all other instances.
When operating the SPI at high bit rates the application may need to modify the IRQ interrupt mode. The API adi_spi_SetIrqmode() can be used for this.
At higher bit rates the ISR could mask a TX/RX interrupt. Specifically, it is possible that while servicing a TX/RX event another TX/RX event could occur. It is
possible, therefore, that when the ISR clears the interrupt status it will not only be clearing the current TX event but the next TX/RX event as well. The result
could that a final TX/RX event will not be processed. One way to work around this would be to set IRQMODE such that TX/RX events will occur only after N bytes
are in the FIFO. This will only work for short bursts less than the size of the FIFO. For larger transfer DMA mode, which will not have any of these issues, should be used.
Finally, if interrupt mode is required at hight bit rates note that the SPI ISR has been designed with minimal cycle count as the highest priority.
The ISR could certainly be modified to re-examine the FIFO before existing at the cost of additional cycles.

Macro Definition Documentation

◆ ADI_SPI_MEMORY_SIZE

#define ADI_SPI_MEMORY_SIZE   (40u + ADI_SEM_SIZE)

Amount of memory(In bytes) required by the SPI device driver for managing the operation of a SPI controller. The memory is passed to the driver when the driver is opened. The memory is completely owned by the driver till the the driver is closed.

Definition at line 72 of file adi_spi.h.

Typedef Documentation

◆ ADI_SPI_HANDLE

typedef struct __ADI_SPI_DEV_DATA_TYPE* ADI_SPI_HANDLE

SPI Device instance private data handle typedef.

Definition at line 181 of file adi_spi.h.

◆ ADI_SPI_CONST_HANDLE

typedef const struct __ADI_SPI_DEV_DATA_TYPE* ADI_SPI_CONST_HANDLE

SPI Device instance private data handle typedef. 'const' version

Definition at line 183 of file adi_spi.h.

Enumeration Type Documentation

◆ ADI_SPI_RESULT

SPI Device Error Codes. ADI_SPI_SUCCESS is always zero The return value of all SPI APIs returning ADI_SPI_RESULT should always be tested at the application level for success or failure.

Enumerator
ADI_SPI_SUCCESS 

Generic success.

ADI_SPI_FAILURE 

Generic Failure.

ADI_SPI_IN_USE 

SPI device is already initialized.

ADI_SPI_INVALID_HANDLE 

Invalid device handle.

ADI_SPI_INVALID_DEVICE_NUM 

Invalid device ID.

ADI_SPI_DMA_ERROR 

DMA configuration failure.

ADI_SPI_INVALID_POINTER 

NULL data pointer not allowed.

ADI_SPI_INVALID_PARAM 

Parameter is out of range.

ADI_SPI_UNSUPPORTED_MODE 

Unsupported mode of operation.

ADI_SPI_SEMAPHORE_FAILED 

Semaphore in error .

ADI_SPI_INVALID_OPERATION 

Invalid operation

ADI_SPI_BUFFER_NOT_SUBMITTED 

Buffer Not submitted

ADI_SPI_BAD_SYS_CLOCK 

Could not obtain the system clock

ADI_SPI_PEND_FAILED 

Blocking PEND failed

ADI_SPI_DMA_REG_FAILED 

DMA callback register failed

ADI_SPI_HW_ERROR_OCCURRED 

Hardware error occurred

Definition at line 84 of file adi_spi.h.

◆ ADI_SPI_HW_ERRORS

Enumeration of events notified in the application provided callback. More than one event can be recorded at a time so the enumerator symbols have to be assigned values of 2^N

Enumerator
ADI_SPI_HW_ERROR_NONE 

The given buffer is processed. Application can use this event to submit the next buffer to be transmitted.

ADI_SPI_HW_ERROR_TX_UNDERFLOW 

Tx-underflow interrupt enable

ADI_SPI_HW_ERROR_RX_OVERFLOW 

Rx-overflow interrupt enable

ADI_SPI_HW_ERROR_RX_CHAN_DMA_BUS_FAULT 

Rx DMA channel bus fault detected

ADI_SPI_HW_ERROR_TX_CHAN_DMA_BUS_FAULT 

Tx DMA channel bus fault detected

ADI_SPI_HW_ERROR_RX_CHAN_DMA_INVALID_DESCR 

Rx DMA channel bus fault detected

ADI_SPI_HW_ERROR_TX_CHAN_DMA_INVALID_DESCR 

Tx DMA channel bus fault detected

ADI_SPI_HW_ERROR_RX_CHAN_DMA_UNKNOWN_ERROR 

Rx DMA channel unkown error detected

ADI_SPI_HW_ERROR_TX_CHAN_DMA_UNKNOWN_ERROR 

Tx DMA channel unkown error detected

Definition at line 128 of file adi_spi.h.

◆ ADI_SPI_CHIP_SELECT

SPI Device Chip Select Enumeration. Allows designation of an external SPI slave device chip select pin to be driven by the SPI controller. Multiple external slave SPI devices may be present on a shared SPI bus, and the chip select pin allows each of them to be assigned dedicated selects. Use the adi_spi_SetChipSelect() API to configure the active chip select. Note that SPI0 is an internal channel dedicated to the UHF controller and hence, has a dedicated SPI0 chip select pin that is not available externally.

Enumerator
ADI_SPI_CS_NONE 

No Slave Chip Select for SPI.

ADI_SPI_CS0 

CS0 Slave Chip Select for SPI.

ADI_SPI_CS1 

CS1 Slave Chip Select for SPI.

ADI_SPI_CS2 

CS2 Slave Chip Select for SPI.

ADI_SPI_CS3 

CS3 Slave Chip Select for SPI.

Definition at line 165 of file adi_spi.h.

Function Documentation

◆ adi_spi_Open()

ADI_SPI_RESULT adi_spi_Open ( uint32_t  nDeviceNum,
void *  pDevMemory,
uint32_t  nMemorySize,
ADI_SPI_HANDLE *const  phDevice 
)

Initialize and allocate an SPI device for use in Master Mode.

Parameters
[in]nDeviceNumZero-based device index designating which device to initialize.
[in]pDevMemoryPointer to a buffer of size ADI_SPI_MEMORY_SIZE
required by the driver for the operation of specified SPI device.
[in]nMemorySizeSize of the buffer to which "pMemory" points.
[out]phDeviceThe caller's device handle pointer for storing the initialized device instance data pointer.
Returns
Status
Note
: No other SPI APIs may be called until the device open function is called.
Initialize an SPI device using internal default configuration settings and allocate the
device for use.The returned device handle is required to be passed to all subsequent
calls to convey which device instance to operate on.
The contents of phDevice will be set to NULL upon failure. Device is opened in Master mode.
See also
adi_spi_SetMasterMode()
adi_spi_Close().

Definition at line 184 of file adi_spi.c.

◆ adi_spi_Close()

ADI_SPI_RESULT adi_spi_Close ( ADI_SPI_HANDLE const  hDevice)

Uninitialize and deallocate an SPI device.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
Returns
Status

Uninitialize and release an allocated SPI device,and memory associated with it for other use.

See also
adi_spi_Open().

Definition at line 280 of file adi_spi.c.

◆ adi_spi_MasterReadWrite()

ADI_SPI_RESULT adi_spi_MasterReadWrite ( ADI_SPI_HANDLE const  hDevice,
const ADI_SPI_TRANSCEIVER *const  pXfr 
)

Submit data buffers for SPI Master-Mode transaction in "Blocking mode".This function
returns only after the data transfer is complete.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]pXfrPointer to transfer data struct ADI_SPI_TRANSCEIVER.
Returns
Status



Request a blocking mode transmit and receive of multiple data bytes
over the SPI serial channel.
Buffer allocations are made by the calling code (the application).

The transmit buffer is sent and the receive buffer is written according
to the size and increment information contained by the pXft transfer
data structure parameter.

See also
adi_spi_MasterSubmitBuffer().
ADI_SPI_TRANSCEIVER

Definition at line 834 of file adi_spi.c.

◆ adi_spi_SetMasterMode()

ADI_SPI_RESULT adi_spi_SetMasterMode ( ADI_SPI_CONST_HANDLE const  hDevice,
const bool  bFlag 
)

Set SPI Master-Mode operation.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to select either Master-Mode or Slave-Mode operation.
- true Enable Master-Mode. Default.
- false Enable Slave-Mode.
Returns
Status

Controls SPI Master/Slave mode of operation, set for Master-Mode, clear for Slave-Mode.

Definition at line 476 of file adi_spi.c.

◆ adi_spi_SlaveReadWrite()

ADI_SPI_RESULT adi_spi_SlaveReadWrite ( ADI_SPI_HANDLE const  hDevice,
const ADI_SPI_TRANSCEIVER *const  pXfr 
)

Submit data buffers for SPI Slave-Mode transaction in "Blocking mode".This function
returns only after the data transfer is complete.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]pXfrPointer to transfer data struct ADI_SPI_TRANSCEIVER.
Returns
Status



Request a blocking mode transmit and receive of multiple data bytes
over the SPI serial channel.
Buffer allocations are made by the calling code (the application).

The transmit buffer is sent and the receive buffer is written according
to the size and increment information contained by the pXft transfer
data structure parameter.

See also
adi_spi_SlaveSubmitBuffer().
ADI_SPI_TRANSCEIVER

Definition at line 1567 of file adi_spi.c.

◆ adi_spi_MasterSubmitBuffer()

ADI_SPI_RESULT adi_spi_MasterSubmitBuffer ( ADI_SPI_HANDLE const  hDevice,
const ADI_SPI_TRANSCEIVER *const  pXfr 
)

Submit data buffers for SPI Master-Mode transaction.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]pXfrPointer to transfer data struct.
Returns
Status


Request a non-blocking mode transmit and receive of multiple data bytes
over the SPI serial channel.
Buffer allocations are made by the calling code (the application).

The transmit buffer is sent and the receive buffer is written according
to the size and increment information contained by the pXft transfer
data structure parameter.

See also
adi_spi_MasterReadWrite().
adi_spi_isBufferAvailable()
ADI_SPI_TRANSCEIVER

Definition at line 874 of file adi_spi.c.

Referenced by adi_spi_MasterReadWrite().

◆ adi_spi_SlaveSubmitBuffer()

ADI_SPI_RESULT adi_spi_SlaveSubmitBuffer ( ADI_SPI_HANDLE const  hDevice,
const ADI_SPI_TRANSCEIVER *const  pXfr 
)

Submit data buffers for SPI Slave-Mode transaction.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]pXfrPointer to transfer data struct.
Returns
Status


Request a non-blocking transmit and receive of multiple data bytes
over the SPI serial channel. Honours current blocking and DMA modes.
Buffer allocations are made by the calling code (the application).

The transmit buffer is sent and the receive buffer is written according
to the size and increment information contained by the pXft transfer
data structure parameter.

The application must make a call to adi_spi_GetBuffer() to retrieve the buffer

Note
:
See also
adi_spi_MasterReadWrite().
adi_spi_EnableDmaMode().
adi_spi_isBufferAvailable().
adi_spi_GetBuffer().

Definition at line 1322 of file adi_spi.c.

Referenced by adi_spi_SlaveReadWrite().

◆ adi_spi_RegisterCallback()

ADI_SPI_RESULT adi_spi_RegisterCallback ( ADI_SPI_HANDLE const  hDevice,
ADI_CALLBACK const  pfCallback,
void *const  pCBParam 
)

Register or unregister the callback.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]pfCallbackPointer to the callback function. Can be passed as NULL to unregister the
previously registered callback.
[in]pCBParamCallback parameter which will be passed back to the application when the
callback is called.
Returns
Status

Definition at line 319 of file adi_spi.c.

◆ adi_spi_GetBuffer()

ADI_SPI_RESULT adi_spi_GetBuffer ( ADI_SPI_HANDLE const  hDevice,
uint32_t *const  pHWErrors 
)

Block until the SPI transaction is complete.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[out]pHWErrorsPointer to hardware error return variable.
Returns
Status
See also
adi_spi_MasterSubmitBuffer().
adi_spi_SlaveSubmitBuffer().

Definition at line 1244 of file adi_spi.c.

◆ adi_spi_SetClockPhase()

ADI_SPI_RESULT adi_spi_SetClockPhase ( ADI_SPI_HANDLE const  hDevice,
const bool  bFlag 
)

Set the clock phase.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to manage the phase of the serial data clock.
- true Sample data on trailing-edge of each serial bit.
- false Sample data on leading-edge of each serial bit.
Returns
Status


Sets the SPI clock polarity phase bit (CPHA). Used in conjunction with clock polarity (CPOL) to program
the exact timing of serial data capture and transmit. Both clock phase and polarity must be considered in
selecting the data transfer mode best suited to the Master/Slave device pair, typically dependant on the
manufacturer and timing requirements of the external SPI device.


Both Master and Slave devices must use the same settings for clock phase and polarity.


If the phase of the clock is zero (CPHA=0), receive data are latched on the rising-clock-edge with
CPOL=0 (idle-low) polarity, and on the falling-clock-edge with CPOL=1 (idle high) ploarity.


If CPHA=1, the effective clock edges are reversed; CPOL=0 latches receive data on the falling-clock-edge
and CPOL=1 latches receive data on the rising-clock-edge.


Data are transmitted on the opposite clock edge as the receive, i.e., receive and transmit are out of phase.

See also
adi_spi_SetClockPolarity().

Definition at line 789 of file adi_spi.c.

◆ adi_spi_SetClockPolarity()

ADI_SPI_RESULT adi_spi_SetClockPolarity ( ADI_SPI_HANDLE const  hDevice,
const bool  bFlag 
)

Set the clock polarity.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open()
[in]bFlagFlag to manage the idle state of the serial data clock between samples.
- true Clock is idled high.
- false Clock is idled low.
Returns
Status

Sets the SPI clock polarity control bit (CPOL). Used in conjunction with clock phase (CPHA) to program
the exact timing of serial data capture and transmit. Both clock phase and polarity must be considered in
selecting the data transfer mode best suited to the Master/Slave device pair, typically dependant on the
manufacturer and timing requirements of the external SPI device.


Both Master and Slave devices must use the same settings for clock phase and polarity.


If the phase of the clock is zero (CPHA=0), receive data are latched on the rising-clock-edge with
CPOL=0 (idle-low) polarity, and on the falling-clock-edge with CPOL=1 (idle high) ploarity.


If CPHA=1, the effective clock edges are reversed; CPOL=0 latches receive data on the falling-clock-edge
and CPOL=1 latches receive data on the rising-clock-edge.


Data are transmitted on the opposite clock edge as the receive, i.e., receive and transmit are out of phase.

See also
adi_spi_SetClockPhase().

Definition at line 710 of file adi_spi.c.

◆ adi_spi_isBufferAvailable()

ADI_SPI_RESULT adi_spi_isBufferAvailable ( ADI_SPI_CONST_HANDLE const  hDevice,
bool *const  bComplete 
)

Get the SPI transaction completion status.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[out]bCompletePointer to boolean variable that indicates
- true DMA transmit sequence is complete.
- false DMA transmit sequence is incomplete.
Returns
Status
See also
adi_spi_MasterSubmitBuffer().
adi_spi_SlaveSubmitBuffer().

Definition at line 1279 of file adi_spi.c.

◆ adi_spi_SetContinuousMode()

ADI_SPI_RESULT adi_spi_SetContinuousMode ( ADI_SPI_CONST_HANDLE const  hDevice,
const bool  bFlag 
)

Set the continuous transfer mode.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to manage SPI continuous transfer mode.
  • true Set continuous transfer mode.
  • false Clear continuous transfer mode.
Returns
Status

Setting this mode causes the SPI controller to drive the Chip Select signal continuously until the transaction is complete. Clearing it causes Chip Select to cycle between bytes.

Definition at line 407 of file adi_spi.c.

◆ adi_spi_SetLoopback()

ADI_SPI_RESULT adi_spi_SetLoopback ( ADI_SPI_CONST_HANDLE const  hDevice,
const bool  bFlag 
)

Set the internal loopback mode.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to manage internal SPI loopback mode.
  • true Set internal loopback mode.
  • false Clear internal loopback mode.
Returns
Status

Set or clear the internal SPI loopback mode. Primarily used for testing.

Definition at line 441 of file adi_spi.c.

◆ adi_spi_SetIrqmode()

ADI_SPI_RESULT adi_spi_SetIrqmode ( ADI_SPI_CONST_HANDLE const  hDevice,
const uint8_t  nMode 
)

Set the IRQ mode.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]nModeIRQ mode value to set. Valid values are 0 - 7 Tx interrupt occurs when (nMode+1) byte has been transferred. Rx interrupt occurs when (nMode+1) or more bytes have been received into the FIFO.
Returns
Status

These bits configure when the Tx/Rx interrupts occur in a transfer. For DMA Rxtransfer, these bits should be 0. Valid values are 0-7 Tx interrupt occurs when (nMode+1) byte(s) has been transferred. Rx interrupt occurs when (nMode+1) or more bytes have been received into the FIFO.

Note
The application will have to carefully manage IRQMODE relative to a transaction's buffer size.
Specifically, the application must ensure that the last byte causes an interrupt else the
transaction will not terminate. As explained in the SPI driver overview, this functionality
is typically needed when operating in interrupt mode with a high SPI bit rate (typically issues
are seen at SPI clock rates of 4MHz or greater). The max clock rate will vary depending on the application.
The max clock rate is a function of the SPI ISR cycle count plus any other delay that might be caused
by other parts of the system. Finally, please note that while sustaining interrupt mode SPI transaction
at high bit rates will work buffers that are the size of the SPI FIFO or less, transactions that are
larger that the size of the FIFO may run into issues associated with masked/lost interrupts. If this
does prove to be an issue for an applicatoon then the SPI ISR could be modified to examine the FIFO
status on a continuous basis in the ISR (as opposed to examining the FIFO status just once at the start
of the ISR). However, adding this functionality to the ISR will increase the ISR cycle count and footprint.

Definition at line 367 of file adi_spi.c.

◆ adi_spi_SetReceiveOverflow()

ADI_SPI_RESULT adi_spi_SetReceiveOverflow ( ADI_SPI_CONST_HANDLE const  hDevice,
const bool  bFlag 
)

Set the SPI receive FIFO overflow mode.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to manage receive FIFO overflow behaviour.
- true Discard old data on receive FIFO overflow.
- false Discard new data on receive FIFO overflow.
Returns
Status

Controls what to do with excess incoming data when the receive FIFO becomes full. Either the new data or the old data is discarded. Set the receive FIFO overflow mode to replace data in the RX register (top of receive FIFO) with the incoming new data. Clear it to discard incoming new data and preserve old unread data.

Definition at line 519 of file adi_spi.c.

◆ adi_spi_SetTransmitUnderflow()

ADI_SPI_RESULT adi_spi_SetTransmitUnderflow ( ADI_SPI_CONST_HANDLE const  hDevice,
const bool  bFlag 
)

Set the SPI transmit FIFO underflow mode.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]bFlagFlag to manage transmit FIFO underflow behaviour.
- true Send zeroes on transmit FIFO underflow.
- false Resend last data on transmit FIFO underflow.
Returns
Status


Controls what to transmit when lacking valid data because the transmit FIFO is empty.
Either zeros or the last valid data are transmitted. Set transmit FIFO underflow mode to send zeros.
Clear it to resend the last transmitted data.

Definition at line 557 of file adi_spi.c.

◆ adi_spi_SetBitrate()

ADI_SPI_RESULT adi_spi_SetBitrate ( ADI_SPI_CONST_HANDLE const  hDevice,
const uint32_t  Hertz 
)

Set the SPI serial clock frequency.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open()
[in]HertzTarget frequency (in Hz) for SPI bitrate.
Returns
Status

Compute and set the internal SPI clock rate divider register to produce
the desired serial clock frequency. Resulting frequency is subject to arithmetic rounding errors.
Use adi_spi_GetBitrate() to obtain the exact frequency produced, including rounding errors.

See also
adi_spi_GetBitrate().

Definition at line 599 of file adi_spi.c.

◆ adi_spi_SetChipSelect()

ADI_SPI_RESULT adi_spi_SetChipSelect ( ADI_SPI_HANDLE const  hDevice,
const ADI_SPI_CHIP_SELECT  eChipSelect 
)

Set the chip select.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open().
[in]eChipSelectAn enum value representing the requested Chip Select.
Returns
Status

Sets the desired chip select to use for activating an external slave device.

Note
Chip select ADI_SPI0_CSn is reserved for SPI device 0 (SPI0) internal chip select line dedicated for communications with the UHF device.

Definition at line 745 of file adi_spi.c.

◆ adi_spi_GetBitrate()

ADI_SPI_RESULT adi_spi_GetBitrate ( ADI_SPI_CONST_HANDLE const  hDevice,
uint32_t *const  pnBitrate 
)

Get the SPI serial clock frequency.

Parameters
[in]hDeviceDevice handle obtained from adi_spi_Open()
[out]pnBitratePointer to the location where Bitrate need to be written.
Returns

Get the current serial clock frequency. The returned value is exact but
may not exactly match the value set with adi_spi_SetBitrate() due to
computational round-off errors resulting from fixed register size and
finite-precision arithmetic.

See also
adi_spi_SetBitrate().

Definition at line 656 of file adi_spi.c.