92 #include <adi_processor.h> 97 #include <drivers/flash/adi_flash.h> 124 #pragma diag_suppress=Pm123,Pm073,Pm143,Pm050,Pm088,Pm140,Pm026 128 #include "adi_flash_data.c" 135 #define ASSERT(X) assert(X) 141 #define CLR_BITS(REG, BITS) ((REG) &= ~(BITS)) 142 #define SET_BITS(REG, BITS) ((REG) |= (BITS)) 149 if ( (fee_device_info[0].hDevice == (hDevice)) && ((hDevice)->pDevInfo->hDevice != NULL) ) {
158 static void BusyWait (
ADI_FEE_HANDLE const hDevice, uint32_t
const status);
159 static void BusyWait (
ADI_FEE_HANDLE const hDevice, uint32_t
const status)
161 while ((hDevice->pDev->STAT & status) != 0u) {}
165 static void dmaCallback(
void *pCBParam, uint32_t Event,
void *pArg);
166 static void dmaCallback(
void *pCBParam, uint32_t Event,
void *pArg) {
188 if (0u != hDevice->pfCallback) {
189 hDevice->pfCallback (hDevice->pCBParam, (uint32_t)hDevice->dmaError, (
void*)NULL);
237 if (nDeviceNum >= ADI_FEE_NUM_INSTANCES) {
242 if (fee_device_info[nDeviceNum].hDevice != NULL) {
246 if ((pMemory == NULL) || (phDevice == NULL)) {
264 fee_device_info[nDeviceNum].hDevice = (ADI_FEE_DEV_DATA_TYPE *)pMemory;
270 memset(pMemory, 0, nMemorySize);
274 hDevice->pDevInfo = &fee_device_info[nDeviceNum];
281 hDevice->pDev = fee_device_info[nDeviceNum].pDev;
284 hDevice->pDevInfo->pConfig = (ADI_FEE_CONFIG*)&gConfigInfo[nDeviceNum];
290 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
293 hDevice->pDev->IEN = hDevice->pDevInfo->pConfig->eccIrqEnables;
294 hDevice->pDev->TIME_PARAM0 = hDevice->pDevInfo->pConfig->param0;
295 hDevice->pDev->TIME_PARAM1 = hDevice->pDevInfo->pConfig->param1;
296 hDevice->pDev->ABORT_EN_LO = hDevice->pDevInfo->pConfig->abortEnableLo;
297 hDevice->pDev->ABORT_EN_HI = hDevice->pDevInfo->pConfig->abortEnableHi;
298 hDevice->pDev->ECC_CFG = hDevice->pDevInfo->pConfig->eccConfig;
301 CLR_BITS (hDevice->pDev->UCFG, (BITM_FLCC_UCFG_AUTOINCEN | BITM_FLCC_UCFG_KHDMAEN));
304 hDevice->pDev->KEY = 0u;
319 NVIC_EnableIRQ(hDevice->pDevInfo->pioIrqNum);
320 NVIC_EnableIRQ(hDevice->pDevInfo->dmaIrqNum);
349 if (
true != IsDeviceHandle(hDevice)) {
358 for (dev = 0u; dev < ADI_FEE_NUM_INSTANCES; dev++)
360 if (fee_device_info[dev].hDevice == hDevice)
362 fee_device_info[dev].hDevice = NULL;
368 NVIC_DisableIRQ(hDevice->pDevInfo->pioIrqNum);
369 NVIC_DisableIRQ(hDevice->pDevInfo->dmaIrqNum);
374 #if defined (__ADUCM4x50__) 388 if (
true != IsDeviceHandle(hDevice)) {
393 *pREG_FLCC0_KEY = ENUM_FLCC_KEY_USERKEY;
396 *pREG_FLCC0_TIME_PARAM1 |= ((((uint32_t)numWaitStates) << BITP_FLCC_TIME_PARAM1_WAITSTATES) & BITM_FLCC_TIME_PARAM1_WAITSTATES);
399 while (((*pREG_FLCC0_TIME_PARAM1 & BITM_FLCC_TIME_PARAM1_CURWAITSTATES) != (1u << BITP_FLCC_TIME_PARAM1_CURWAITSTATES))){}
443 if (
true != IsDeviceHandle(hDevice)) {
448 if (
true == hDevice->bTransferInProgress) {
454 hDevice->pfCallback = pfCallback;
455 hDevice->pCBParam = pCBParam;
500 if (
true != IsDeviceHandle(hDevice)) {
505 if (
true == hDevice->bTransferInProgress) {
509 uint32_t nRelAddrStart = (nPageNumStart << FEE_PAGE_SHIFT);
510 uint32_t nRelAddrStop = (nPageNumEnd << FEE_PAGE_SHIFT);
512 if ( (nPageNumStart > nPageNumEnd)
513 || (nRelAddrStart >= FEE_FLASH_SIZE)
514 || (nRelAddrStop >= FEE_FLASH_SIZE))
520 for (page = nPageNumStart; page <= nPageNumEnd; page++)
523 BusyWait(hDevice, (BITM_FLCC_STAT_CMDBUSY | BITM_FLCC_STAT_WRCLOSE));
526 hDevice->pDev->PAGE_ADDR0 = (page << FEE_PAGE_SHIFT);
529 result = SendCommand (hDevice, ENUM_FLCC_CMD_ERASEPAGE);
540 *pHwErrors = hDevice->feeError;
541 if (0u != hDevice->feeError) {
578 if (
true != IsDeviceHandle(hDevice)) {
583 if (
true == hDevice->bTransferInProgress) {
589 result = SendCommand (hDevice, ENUM_FLCC_CMD_MASSERASE);
595 *pHwErrors = hDevice->feeError;
596 if (0u != hDevice->feeError) {
644 if (
true != IsDeviceHandle(hDevice)) {
649 if (
true == hDevice->bTransferInProgress) {
654 if ( (((uint32_t)pTransaction->
pWriteAddr & 0x7u) != 0u) || ((((uint32_t)pTransaction->
pWriteData) & 0x3u) != 0u) )
660 if ((pTransaction->
nSize & 0x7u) != 0u) {
664 if (
true == pTransaction->
bUseDma) {
666 if (DMA_TRANSFER_LIMIT < (pTransaction->
nSize /
sizeof(uint32_t))) {
673 hDevice->bSubmitCalled =
false;
676 hDevice->pNextWriteAddress = pTransaction->
pWriteAddr;
677 hDevice->pNextReadAddress = pTransaction->
pWriteData;
678 hDevice->nRemainingBytes = pTransaction->
nSize;
679 hDevice->bUseDma = pTransaction->
bUseDma;
682 result = InitiateTransfer (hDevice);
688 if (0u != hDevice->dmaError) {
689 return hDevice->dmaError;
693 *pHwErrors = hDevice->feeError;
694 if (0u != hDevice->feeError) {
700 if (hDevice->nRemainingBytes != 0u) {
743 if (
true != IsDeviceHandle(hDevice)) {
748 if (
true == hDevice->bTransferInProgress) {
753 if ( (((uint32_t)pTransaction->
pWriteAddr & 0x7u) != 0u) || ((((uint32_t)pTransaction->
pWriteData) & 0x3u) != 0u) )
759 if ((pTransaction->
nSize & 0x7u) != 0u) {
763 if (
true == pTransaction->
bUseDma) {
765 if (DMA_TRANSFER_LIMIT < (pTransaction->
nSize /
sizeof(uint32_t))) {
772 hDevice->bSubmitCalled =
true;
775 hDevice->pNextWriteAddress = pTransaction->
pWriteAddr;
776 hDevice->pNextReadAddress = pTransaction->
pWriteData;
777 hDevice->nRemainingBytes = pTransaction->
nSize;
778 hDevice->bUseDma = pTransaction->
bUseDma;
781 result = InitiateTransfer (hDevice);
810 if (
true != IsDeviceHandle(hDevice)) {
814 if (pbCompletionState == NULL) {
820 if (
false == hDevice->bSubmitCalled) {
824 if (
true == hDevice->bTransferInProgress) {
825 *pbCompletionState =
false;
827 *pbCompletionState =
true;
865 if (
true != IsDeviceHandle(hDevice)) {
871 if (
false == hDevice->bSubmitCalled) {
879 if (0u != hDevice->dmaError) {
880 return hDevice->dmaError;
884 *pHwErrors = hDevice->feeError;
885 if (0u != hDevice->feeError) {
891 if ((0u != hDevice->nRemainingBytes) || (
true == hDevice->bTransferInProgress)) {
924 if (
true != IsDeviceHandle(hDevice)) {
928 if ( (pnPageNum == NULL)
929 || (nAddress >= FEE_FLASH_SIZE))
936 *pnPageNum = (nAddress >> FEE_PAGE_SHIFT);
964 if (
true != IsDeviceHandle(hDevice)) {
968 if ( (pnBlockNum == NULL)
969 || (nAddress >= FEE_FLASH_SIZE))
976 *pnBlockNum = (nAddress >> FEE_BLOCK_SHIFT);
1018 if (
true != IsDeviceHandle(hDevice)) {
1023 if (
true == hDevice->bTransferInProgress) {
1027 if ( (pSigResult == NULL)
1028 || (nStartPage > nEndPage)
1029 || (nStartPage >= FEE_MAX_NUM_PAGES)
1030 || (nEndPage >= FEE_MAX_NUM_PAGES)
1038 BusyWait (hDevice, (BITM_FLCC_STAT_CMDBUSY | BITM_FLCC_STAT_WRCLOSE));
1041 hDevice->pDev->PAGE_ADDR0 = nStartPage << FEE_PAGE_SHIFT;
1042 hDevice->pDev->PAGE_ADDR1 = nEndPage << FEE_PAGE_SHIFT;
1045 result = SendCommand(hDevice, ENUM_FLCC_CMD_SIGN);
1052 *pSigResult = hDevice->pDev->SIGNATURE;
1058 *pHwErrors = hDevice->feeError;
1059 if (0u != hDevice->feeError) {
1101 if (
true != IsDeviceHandle(hDevice)) {
1106 if (
true == hDevice->bTransferInProgress) {
1110 if (nBlockNum > FEE_MAX_NUM_BLOCKS) {
1116 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1117 CLR_BITS (hDevice->pDev->WRPROT, 1u << nBlockNum);
1118 hDevice->pDev->KEY = 0u;
1147 if (
true != IsDeviceHandle(hDevice)) {
1152 if (
true == hDevice->bTransferInProgress) {
1158 if (
true == bSleep) {
1159 result = SendCommand (hDevice, ENUM_FLCC_CMD_SLEEP);
1161 result = SendCommand (hDevice, ENUM_FLCC_CMD_IDLE);
1191 if (
true != IsDeviceHandle(hDevice)) {
1197 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1198 hDevice->pDev->CMD = ENUM_FLCC_CMD_ABORT;
1199 hDevice->pDev->KEY = 0u;
1227 if (
true != IsDeviceHandle(hDevice)) {
1231 if (pnAddress == NULL) {
1239 *pnAddress = hDevice->pDev->WR_ABORT_ADDR;
1273 uint32_t nRelAddress = nStartPage << FEE_PAGE_SHIFT;
1276 if (
true != IsDeviceHandle(hDevice)) {
1281 if (
true == hDevice->bTransferInProgress) {
1285 if (nStartPage >= FEE_MAX_NUM_PAGES) {
1291 CLR_BITS (hDevice->pDev->ECC_CFG, (BITM_FLCC_ECC_CFG_PTR | BITM_FLCC_ECC_CFG_INFOEN));
1294 hDevice->pDev->ECC_CFG |= (nRelAddress & BITM_FLCC_ECC_CFG_PTR);
1297 if (
true == bInfoECCEnable) {
1298 SET_BITS (hDevice->pDev->ECC_CFG, BITM_FLCC_ECC_CFG_INFOEN);
1332 if (
true != IsDeviceHandle(hDevice)) {
1337 if (
true == hDevice->bTransferInProgress) {
1343 if (
true == bEnable) {
1344 SET_BITS(hDevice->pDev->ECC_CFG, BITM_FLCC_ECC_CFG_EN);
1346 CLR_BITS(hDevice->pDev->ECC_CFG, BITM_FLCC_ECC_CFG_EN);
1386 if (
true != IsDeviceHandle(hDevice)) {
1391 if (
true == hDevice->bTransferInProgress) {
1410 nBitMask = BITM_FLCC_IEN_ECC_ERROR;
1411 nBitPos = BITP_FLCC_IEN_ECC_ERROR;
1413 #if defined (__ADUCM4x50__) 1415 nBitMask = BITM_FLCC_IEN_ECC_CORRECT;
1416 nBitPos = BITP_FLCC_IEN_ECC_CORRECT;
1421 CLR_BITS (hDevice->pDev->IEN, nBitMask);
1424 SET_BITS (hDevice->pDev->IEN, ((uint32_t)eResponse) << nBitPos);
1453 if (
true != IsDeviceHandle(hDevice)) {
1457 if (pnAddress == NULL) {
1463 *pnAddress = hDevice->pDev->ECC_ADDR;
1491 if (
true != IsDeviceHandle(hDevice)) {
1495 if (pnNumCorrections == NULL) {
1501 *pnNumCorrections = (hDevice->pDev->STAT & BITM_FLCC_STAT_ECCERRCNT) >> BITP_FLCC_STAT_ECCERRCNT;
1515 BusyWait (hDevice, (BITM_FLCC_STAT_CMDBUSY | BITM_FLCC_STAT_WRCLOSE));
1520 hDevice->pDev->STAT = BITM_FLCC_STAT_CMDCOMP;
1523 SET_BITS(hDevice->pDev->IEN, (BITM_FLCC_IEN_CMDCMPLT | BITM_FLCC_IEN_CMDFAIL));
1526 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1527 hDevice->pDev->CMD = cmd;
1528 hDevice->pDev->KEY = 0u;
1543 if (0u != hDevice->nRemainingBytes) {
1546 SET_BITS (hDevice->pDev->IEN, (BITM_FLCC_IEN_WRALCMPLT | BITM_FLCC_IEN_CMDCMPLT | BITM_FLCC_IEN_CMDFAIL));
1549 hDevice->pDev->KH_ADDR = (uint32_t)hDevice->pNextWriteAddress;
1550 hDevice->pNextWriteAddress += 2;
1553 hDevice->pDev->KH_DATA0 = *hDevice->pNextReadAddress;
1554 hDevice->pNextReadAddress++;
1555 hDevice->pDev->KH_DATA1 = *hDevice->pNextReadAddress;
1556 hDevice->pNextReadAddress++;
1557 hDevice->nRemainingBytes -=
sizeof(uint64_t);
1560 hDevice->pDev->CMD = ENUM_FLCC_CMD_WRITE;
1575 if (0u != hDevice->nRemainingBytes) {
1578 uint16_t chan = hDevice->pDevInfo->dmaChanNum;
1581 pADI_DMA0->SRCADDR_CLR = 1u << chan;
1582 pADI_DMA0->DSTADDR_CLR = 1u << chan;
1585 pADI_DMA0->EN_SET = 1u << chan;
1588 pADI_DMA0->RMSK_CLR = 1u << chan;
1591 pADI_DMA0->ALT_CLR = 1u << chan;
1600 pCCD->
DMASRCEND = (uint32_t)hDevice->pNextReadAddress + hDevice->nRemainingBytes -
sizeof(uint32_t);
1603 pCCD->
DMADSTEND = (uint32_t)&hDevice->pDev->KH_DATA1;
1606 hDevice->pDev->KH_ADDR = (uint32_t)hDevice->pNextWriteAddress;
1614 | (uint32_t)((hDevice->nRemainingBytes/
sizeof(uint32_t) - 1u) << DMA_BITP_CTL_N_MINUS_1)
1615 | ((uint32_t)DMA_ENUM_CTL_CYCLE_CTL_BASIC << DMA_BITP_CTL_CYCLE_CTL) );
1618 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1619 SET_BITS (hDevice->pDev->UCFG, (BITM_FLCC_UCFG_AUTOINCEN | BITM_FLCC_UCFG_KHDMAEN));
1620 hDevice->pDev->KEY = 0u;
1638 if (
true == hDevice->bTransferInProgress)
1644 BusyWait (hDevice, BITM_FLCC_STAT_CMDBUSY);
1647 hDevice->feeError = 0u;
1651 hDevice->bTransferInProgress =
true;
1654 CLR_BITS(hDevice->pDev->IEN, (BITM_FLCC_IEN_WRALCMPLT | BITM_FLCC_IEN_CMDCMPLT | BITM_FLCC_IEN_CMDFAIL));
1657 hDevice->pDev->STAT = BITM_FLCC_STAT_WRALCOMP | BITM_FLCC_STAT_CMDCOMP | BITM_FLCC_STAT_CMDFAIL;
1660 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1661 CLR_BITS (hDevice->pDev->UCFG, (BITM_FLCC_UCFG_AUTOINCEN | BITM_FLCC_UCFG_KHDMAEN));
1662 hDevice->pDev->KEY = 0u;
1665 if (
true == hDevice->bUseDma) {
1666 result = InitiateDmaTransfer(hDevice);
1668 result = InitiatePioTransfer(hDevice);
1679 void Flash0_Int_Handler(
void)
1685 bool bError =
false;
1692 if (hDevice == NULL) {
1698 hDevice->FlashStatusCopy = hDevice->pDev->STAT;
1699 hDevice->pDev->STAT = hDevice->FlashStatusCopy;
1702 hDevice->feeError = (ADI_FEE_STATUS_ERROR_MASK & hDevice->FlashStatusCopy);
1703 if (0u != hDevice->feeError) {
1708 if (
false == bError) {
1710 if (0u != (BITM_FLCC_STAT_WRALCOMP & hDevice->FlashStatusCopy)) {
1715 if (0u != hDevice->nRemainingBytes) {
1718 hDevice->pDev->KH_ADDR = (uint32_t)hDevice->pNextWriteAddress;
1719 hDevice->pNextWriteAddress += 2;
1722 hDevice->pDev->KH_DATA0 = *hDevice->pNextReadAddress;
1723 hDevice->pNextReadAddress++;
1724 hDevice->pDev->KH_DATA1 = *hDevice->pNextReadAddress;
1725 hDevice->pNextReadAddress++;
1726 hDevice->nRemainingBytes -=
sizeof(uint64_t);
1729 hDevice->pDev->CMD = ENUM_FLCC_CMD_WRITE;
1735 BusyWait (hDevice, BITM_FLCC_STAT_CMDBUSY);
1741 }
else if (0u != (BITM_FLCC_STAT_CMDCOMP & hDevice->FlashStatusCopy)) {
1759 if (
true == bPost) {
1762 CLR_BITS(hDevice->pDev->IEN, (BITM_FLCC_IEN_WRALCMPLT | BITM_FLCC_IEN_CMDCMPLT | BITM_FLCC_IEN_CMDFAIL));
1765 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1766 CLR_BITS (hDevice->pDev->UCFG, (BITM_FLCC_UCFG_AUTOINCEN | BITM_FLCC_UCFG_KHDMAEN));
1767 hDevice->pDev->KEY = 0u;
1770 hDevice->bTransferInProgress =
false;
1773 if (0u != hDevice->pfCallback) {
1774 if (
false == bError) {
1792 void DMA_FLASH0_Int_Handler (
void)
1802 hDevice->FlashStatusCopy = hDevice->pDev->STAT;
1803 hDevice->pDev->STAT = hDevice->FlashStatusCopy;
1806 hDevice->feeError = (ADI_FEE_STATUS_ERROR_MASK & hDevice->FlashStatusCopy);
1809 hDevice->pDev->KEY = ENUM_FLCC_KEY_USERKEY;
1810 CLR_BITS (hDevice->pDev->UCFG, (BITM_FLCC_UCFG_AUTOINCEN | BITM_FLCC_UCFG_KHDMAEN));
1811 hDevice->pDev->KEY = 0u;
1814 hDevice->nRemainingBytes = 0u;
1817 hDevice->bTransferInProgress =
false;
1820 if (0u != hDevice->pfCallback) {
1823 if ((0u == hDevice->feeError) && (0u == hDevice->dmaError)) {
1827 }
else if (0u == hDevice->feeError) {
1831 }
else if (0u == hDevice->dmaError) {
1833 hDevice->pfCallback (hDevice->pCBParam, (uint32_t)hDevice->dmaError, NULL);
ADI_FEE_RESULT adi_fee_GetBuffer(ADI_FEE_HANDLE const hDevice, uint32_t *const pHwErrors)
Blocking mode call to await transaction completion.
ADI_FEE_RESULT adi_fee_IsBufferAvailable(ADI_FEE_HANDLE const hDevice, bool *const pbCompletionState)
Non-blocking check if a write transaction complete.
ADI_DMA_RESULT adi_dma_RegisterCallback(DMA_CHANn_TypeDef const eChannelID, ADI_CALLBACK const pfCallback, void *const pCBParam)
Register a call-back function for a DMA channel.
ADI_FEE_RESULT adi_fee_GetECCCorrections(ADI_FEE_HANDLE const hDevice, uint32_t *const pnNumCorrections)
Get the number of 1-bit error corrections.
ADI_FEE_RESULT adi_fee_MassErase(ADI_FEE_HANDLE const hDevice, uint32_t *const pHwErrors)
Erase the entire flash user space memory. This is a blocking call.
ADI_FEE_RESULT adi_fee_GetBlockNumber(ADI_FEE_HANDLE const hDevice, uint32_t const nAddress, uint32_t *const pnBlockNum)
Get the zero-based (16kB) block number within which a flash address resides.
ADI_FEE_RESULT adi_fee_GetECCErrAddr(ADI_FEE_HANDLE const hDevice, uint32_t *const pnAddress)
Get the address for which the ECC event is detected.
#define ADI_FEE_MEMORY_SIZE
ADI_FEE_RESULT adi_fee_GetAbortAddr(ADI_FEE_HANDLE const hDevice, uint32_t *const pnAddress)
Get the address of recently aborted write command.
ADI_FEE_RESULT adi_fee_Sleep(ADI_FEE_HANDLE const hDevice, bool const bSleep)
Sleep or awake the flash controller. This is a blocking call.
ADI_FEE_RESULT adi_fee_ConfigECC(ADI_FEE_HANDLE const hDevice, uint32_t const nStartPage, bool const bInfoECCEnable)
Configure ECC start page and enablement.
struct __ADI_FEE_DEV_DATA_TYPE * ADI_FEE_HANDLE
ADI_FEE_RESULT adi_fee_Open(uint32_t const nDeviceNum, void *const pMemory, uint32_t const nMemorySize, ADI_FEE_HANDLE *const phDevice)
Open the flash controller.
ADI_FEE_RESULT adi_fee_ConfigECCEvents(ADI_FEE_HANDLE const hDevice, ADI_FEE_ECC_EVENT_TYPE const eEvent, ADI_FEE_ECC_RESPONSE const eResponse)
Confifure ECC event response.
ADI_FEE_RESULT adi_fee_WriteProtectBlock(ADI_FEE_HANDLE const hDevice, uint32_t const nBlockNum)
Set write protection on an (16kB) block.
ADI_FEE_RESULT adi_fee_Write(ADI_FEE_HANDLE const hDevice, ADI_FEE_TRANSACTION *const pTransaction, uint32_t *const pHwErrors)
Perform a blocking flash data write operation.
ADI_FEE_RESULT adi_fee_EnableECC(ADI_FEE_HANDLE const hDevice, bool const bEnable)
Enable/Disable user space ECC for the device.
ADI_FEE_RESULT adi_fee_RegisterCallback(ADI_FEE_HANDLE const hDevice, ADI_CALLBACK const pfCallback, void *const pCBParam)
Register an application-defined callback function.
ADI_FEE_RESULT adi_fee_SubmitBuffer(ADI_FEE_HANDLE const hDevice, ADI_FEE_TRANSACTION *const pTransaction)
Submit a non-blocking flash data write operation for background processing.
void adi_dma_Init(void)
Initialize the DMA peripheral.
ADI_FEE_RESULT adi_fee_GetPageNumber(ADI_FEE_HANDLE const hDevice, uint32_t const nAddress, uint32_t *const pnPageNum)
Get the zero-based (2kB) page number within which a flash address resides.
ADI_FEE_RESULT adi_fee_Abort(ADI_FEE_HANDLE const hDevice)
Forcefully ABORT an ongoing flash operation. This is a blocking call.
ADI_FEE_RESULT adi_fee_VerifySignature(ADI_FEE_HANDLE const hDevice, uint32_t const nStartPage, uint32_t const nEndPage, uint32_t *const pSigResult, uint32_t *const pHwErrors)
Generate the CRC signature for a range of flash data page(s). This is a blocking call.
ADI_FEE_RESULT adi_fee_PageErase(ADI_FEE_HANDLE const hDevice, uint32_t const nPageNumStart, uint32_t const nPageNumEnd, uint32_t *const pHwErrors)
Erase the given range of (2kB) page(s) within the flash user space memory. This is a blocking call...
ADI_FEE_RESULT adi_fee_Close(ADI_FEE_HANDLE const hDevice)
Close the flash controller.