ADuCM302x Device Drivers API Reference Manual  Release 3.1.2.0
adi_dma.h
1 
53 #ifndef ADI_DMA__H__
54 #define ADI_DMA__H__
55 
56 #include <adi_callback.h>
57 
58 
59 #ifdef __cplusplus
60 extern "C" {
61 #endif /* __cplusplus */
62 
63 /*============= D E F I N E S =============*/
68 /*============= D A T A T Y P E S =============*/
69 
70 
74 typedef enum
75 {
86 
90 typedef enum
91 {
96 
97 
101 typedef enum
102 {
107 
108 
112 typedef enum
113 {
126 
127 
131 typedef enum
132 {
138 } ADI_DMA_MODE;
139 
140 
144 typedef enum
145 {
149 
150 
154 typedef enum {
159 
165 typedef enum
166 {
167  SPI2_TX_CHANn = 0,
168  SPI2_RX_CHANn = 1,
169  SPORT0A_CHANn = 2,
170  SPORT0B_CHANn = 3,
171  SPI0_TX_CHANn = 4,
172  SPI0_RX_CHANn = 5,
173  SPI1_TX_CHANn = 6,
174  SPI1_RX_CHANn = 7,
175  UART0_TX_CHANn = 8,
176  UART0_RX_CHANn = 9,
177  I2CS_TX_CHANn = 10,
178  I2CS_RX_CHANn = 11,
179  I2CM_CHANn = 12,
180  AES0_IN_CHANn = 13,
181  AES0_OUT_CHANn = 14,
182  FLASH_CHANn = 15,
183  SIP0_CHANn = 16,
184  SIP1_CHANn = 17,
185  SIP2_CHANn = 18,
186  SIP3_CHANn = 19,
187  SIP4_CHANn = 20,
188  SIP5_CHANn = 21,
189  SIP6_CHANn = 22,
190  SIP7_CHANn = 23,
191  ADC0_CHANn = 24,
192 #if defined(__ADUCM4x50__)
193  UART1_TX_CHANn = 25,
194  UART1_RX_CHANn = 26,
195 #endif /* __ADUCM4x50__ */
196  NUM_DMA_CHANNELSn = 27
197 } DMA_CHANn_TypeDef;
204 typedef struct
205 {
206  __IO uint32_t DMASRCEND;
207  __IO uint32_t DMADSTEND;
208  __IO uint32_t DMACDC;
209  uint32_t RESERVED;
211 
212 
214 /* Bit Position for DMA Descriptor Control */
215 #define DMA_BITP_CTL_DST_INC (30u)
216 #define DMA_BITP_CTL_SRC_INC (26u)
217 #define DMA_BITP_CTL_SRC_SIZE (24u)
218 #define DMA_BITP_CTL_R_POWER (14u)
219 #define DMA_BITP_CTL_N_MINUS_1 (4u)
220 #define DMA_BITP_CTL_CYCLE_CTL (0u)
221 
222 /* Bit Mask for DMA Descriptor Control */
223 #define DMA_BITM_CTL_DST_INC ((0x00000003u) << DMA_BITP_CTL_DST_INC)
224 #define DMA_BITM_CTL_SRC_INC ((0x00000003u) << DMA_BITP_CTL_SRC_INC)
225 #define DMA_BITM_CTL_SRC_SIZE ((0x00000003u) << DMA_BITP_CTL_SRC_SIZE)
226 #define DMA_BITM_CTL_R_POWER ((0x0000000Fu) << DMA_BITP_CTL_R_POWER)
227 #define DMA_BITM_CTL_N_MINUS_1 ((0x000003FFu) << DMA_BITP_CTL_N_MINUS_1)
228 #define DMA_BITM_CTL_CYCLE_CTL ((0x00000007u) << DMA_BITP_CTL_CYCLE_CTL)
229 
230 /* Enum for the DMA Descriptor Cycle Control */
231 #define DMA_ENUM_CTL_CYCLE_CTL_INVALID (0u)
232 #define DMA_ENUM_CTL_CYCLE_CTL_BASIC (1u)
233 #define DMA_ENUM_CTL_CYCLE_CTL_AUTO_REQ (2u)
234 #define DMA_ENUM_CTL_CYCLE_CTL_PING_PONG (3u)
235 #define DMA_ENUM_CTL_CYCLE_CTL_MSG_PRI (4u)
236 #define DMA_ENUM_CTL_CYCLE_CTL_MSG_ALT (5u)
237 #define DMA_ENUM_CTL_CYCLE_CTL_PSG_PRI (6u)
238 #define DMA_ENUM_CTL_CYCLE_CTL_PSG_ALT (7u)
239 
240 
241 #define DMA_BITM_INCR_TYPE_DECR (0x10u)
242 
243 #define DMA_BITM_OCTL_SRC_DECR (0x01u)
244 #define DMA_BITM_OCTL_DST_DECR (0x02u)
245 
246 #define DMA_BITM_OCTL_SRC_INCR (0x04u)
247 #define DMA_BITM_OCTL_DST_INCR (0x08u)
248 
249 #define DMA_TRANSFER_LIMIT (1024u)
251 /* pointer to the primary CCD array */
252 extern ADI_DCC_TypeDef* const pPrimaryCCD;
253 /* pointer to the alternate CCD array */
254 extern ADI_DCC_TypeDef* const pAlternateCCD;
256 /*========== DMA API DECLARATIONS ==========*/
257 
258 extern void adi_dma_Init(void);
259 
260 extern ADI_DMA_RESULT adi_dma_RegisterCallback (
261  DMA_CHANn_TypeDef const eChannelID,
262  ADI_CALLBACK const pfCallback,
263  void* const pCBParam
264  );
265 
266 #ifdef __cplusplus
267 }
268 #endif
269 
270 #endif /* include guard */
271 
272 /*
273 ** EOF
274 */
275 
ADI_DMA_RESULT adi_dma_RegisterCallback(DMA_CHANn_TypeDef const eChannelID, ADI_CALLBACK const pfCallback, void *const pCBParam)
Register a call-back function for a DMA channel.
Definition: adi_dma.c:223
__IO uint32_t DMASRCEND
Definition: adi_dma.h:206
ADI_DMA_PRIORITY
Definition: adi_dma.h:144
ADI_DMA_RPOWER
Definition: adi_dma.h:112
ADI_DMA_MODE
Definition: adi_dma.h:131
ADI_DMA_EVENT
Definition: adi_dma.h:90
ADI_DMA_WIDTH_TYPE
Definition: adi_dma.h:101
ADI_DMA_INCR_TYPE
Definition: adi_dma.h:74
__IO uint32_t DMADSTEND
Definition: adi_dma.h:207
__IO uint32_t DMACDC
Definition: adi_dma.h:208
void adi_dma_Init(void)
Initialize the DMA peripheral.
Definition: adi_dma.c:175
ADI_DMA_RESULT
Definition: adi_dma.h:154