ADuCM302x Device Drivers API Reference Manual  Release 3.1.2.0
System Interfaces

Macros

#define CACHE_CONTROLLER_KEY   0xF123F456u
 
#define PWRKEY_VALUE_KEY   0x4859u
 
#define NVIC_INTS   (65u)
 
#define ADI_SRAM_BANK_0   (1u << 0)
 
#define ADI_SRAM_BANK_1   (1u << 1)
 
#define ADI_SRAM_BANK_2   (1u << 2)
 
#define ADI_SRAM_BANK_3   (1u << 3)
 
#define ADI_SRAM_BANK_4   (1u << 4)
 
#define ADI_SRAM_BANK_5   (1u << 5)
 
#define ADI_SRAM_BANK_6   (1u << 6)
 
#define ADI_SRAM_BANK_7   (1u << 7)
 

Typedefs

typedef uint32_t ADI_SRAM_BANK
 

Functions

void SystemInit (void)
 Sets up the microcontroller system. Initializes the System and updates the relocate vector table. More...
 
void SystemCoreClockUpdate (void)
 Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution. More...
 
void adi_system_EnableCache (bool bEnable)
 This enables or disables the cache. More...
 
uint32_t adi_system_EnableRetention (ADI_SRAM_BANK eBank, bool bEnable)
 This enables/disable SRAM retention during the hibernation. More...
 
void adi_system_SetGlobalIrqPriority (void)
 This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined). More...
 

Variables

uint32_t SystemCoreClock = 0u
 
uint32_t SystemCoreClock = 0u
 

Detailed Description

add result types to doxygen

Macro Definition Documentation

◆ CACHE_CONTROLLER_KEY

#define CACHE_CONTROLLER_KEY   0xF123F456u

Cache controller key

Definition at line 83 of file system_ADuCM3029.h.

Referenced by adi_system_EnableCache().

◆ PWRKEY_VALUE_KEY

#define PWRKEY_VALUE_KEY   0x4859u

Power key

Definition at line 85 of file system_ADuCM3029.h.

Referenced by adi_system_EnableRetention().

◆ NVIC_INTS

#define NVIC_INTS   (65u)

Used NVIC IRQ range for this part

Definition at line 88 of file system_ADuCM3029.h.

Referenced by adi_system_SetGlobalIrqPriority().

◆ ADI_SRAM_BANK_0

#define ADI_SRAM_BANK_0   (1u << 0)

SRAM_BANK_0

Definition at line 96 of file system_ADuCM3029.h.

◆ ADI_SRAM_BANK_1

#define ADI_SRAM_BANK_1   (1u << 1)

SRAM_BANK_1

Definition at line 98 of file system_ADuCM3029.h.

Referenced by adi_system_EnableRetention(), and SystemInit().

◆ ADI_SRAM_BANK_2

#define ADI_SRAM_BANK_2   (1u << 2)

SRAM_BANK_2

Definition at line 100 of file system_ADuCM3029.h.

Referenced by adi_system_EnableRetention(), and SystemInit().

◆ ADI_SRAM_BANK_3

#define ADI_SRAM_BANK_3   (1u << 3)

SRAM_BANK_3

Definition at line 102 of file system_ADuCM3029.h.

◆ ADI_SRAM_BANK_4

#define ADI_SRAM_BANK_4   (1u << 4)

SRAM_BANK_4

Definition at line 104 of file system_ADuCM3029.h.

◆ ADI_SRAM_BANK_5

#define ADI_SRAM_BANK_5   (1u << 5)

SRAM_BANK_5

Definition at line 106 of file system_ADuCM3029.h.

◆ ADI_SRAM_BANK_6

#define ADI_SRAM_BANK_6   (1u << 6)

SRAM_BANK_6

Definition at line 108 of file system_ADuCM3029.h.

◆ ADI_SRAM_BANK_7

#define ADI_SRAM_BANK_7   (1u << 7)

SRAM_BANK_7

Definition at line 110 of file system_ADuCM3029.h.

Typedef Documentation

◆ ADI_SRAM_BANK

typedef uint32_t ADI_SRAM_BANK

SRAM banks

Definition at line 93 of file system_ADuCM3029.h.

Function Documentation

◆ SystemInit()

void SystemInit ( void  )

Sets up the microcontroller system. Initializes the System and updates the relocate vector table.

Returns
none
Note
This function is called by the start-up code and does not need to be called directly by applications

Definition at line 238 of file system_ADuCM3027.c.

◆ SystemCoreClockUpdate()

void SystemCoreClockUpdate ( void  )

Updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution.

Update the clock.

Returns
none

Definition at line 139 of file system_ADuCM3027.c.

Referenced by adi_pwr_GetClockFrequency(), adi_pwr_Init(), adi_pwr_SetClockDivider(), and adi_pwr_UpdateCoreClock().

◆ adi_system_EnableCache()

void adi_system_EnableCache ( bool  bEnable)

This enables or disables the cache.

Parameters
bEnable: To specify whether to enable/disable cache.
true : To enable cache.

false : To disable cache.
Returns
none

Definition at line 299 of file system_ADuCM3027.c.

Referenced by SystemInit().

◆ adi_system_EnableRetention()

uint32_t adi_system_EnableRetention ( ADI_SRAM_BANK  eBank,
bool  bEnable 
)

This enables/disable SRAM retention during the hibernation.

Enable/disable SRAM retention during hibernation for SRAM bank1 and/or bank2.

Parameters
eBankSpecify which SRAM bank. Only BANK1 and BANK2 are valid.
bEnableTo enable/disable the retention for specified SRAM bank.
true : To enable retention during the hibernation.

false : To disable retention during the hibernation.
Returns
: 0u : Configured successfully. 1u : For invalid bank.
Note
: Please note that respective linker file need to support the configuration. Only BANK-1 and BANK-2 of SRAM is valid.
Parameters
eBankSRAM bank(s) to be retained/not retained when the processor enters hibernation mode. The only valid arguments are ADI_SRAM_BANK_1, ADI_SRAM_BANK_2 or a combination of both.
bEnableEnable/disable the retention for specified SRAM bank.
  • true: Enable retention during hibernation.
  • false: Disable retention during hibernation.
Returns
0u : SRAM configured successfully.
1u : Incorrect bank passed as an argument
Note
The linker file in the application needs to support the requested configuration. Only BANK1 and BANK2 of SRAM are valid.

Definition at line 327 of file system_ADuCM3027.c.

Referenced by SystemInit().

◆ adi_system_SetGlobalIrqPriority()

void adi_system_SetGlobalIrqPriority ( void  )

This function sets the priority for all IRQ interrupts to the value defined by ADI_MAX_IRQ_PRIORITY (if defined).

At reset the hardware default priority 0, which is the highest. For any applications that use BASEPRI to mask interrupts, such as any application using FreeRTOS, then any interrupts using default priority will never be masked. Defining ADI_MAX_IRQ_PRIORITY to a value will enable this function call at startup and set all IRQ interrupts to that priority value.

Returns
none

Definition at line 368 of file system_ADuCM3029.c.

Variable Documentation

◆ SystemCoreClock [1/2]

uint32_t SystemCoreClock = 0u

Variable to hold the system core clock value.

Definition at line 125 of file system_ADuCM3027.c.

◆ SystemCoreClock [2/2]

uint32_t SystemCoreClock = 0u

Variable to hold the system core clock value.

Definition at line 125 of file system_ADuCM3029.c.