ADuCM302x Device Drivers API Reference Manual  Release 3.1.2.0
adi_uart_config.h
1 
48 #ifndef ADI_UART_CONFIG_H
49 #define ADI_UART_CONFIG_H
50 
57 #include <adi_global_config.h>
58 
59 /************** Common UART Driver configurations ************** */
64 #define ADI_UART_CFG_ENABLE_AUTOBAUD 1
65 
66 
72 /************** UART Driver configurations FOR UART 0 ************** */
80 #define ADI_UART0_CFG_WORD_LENGTH 3
81 
82 
90 #define ADI_UART0_CFG_STOP_BIT 1
91 
92 
98 #define ADI_UART0_CFG_ENABLE_PARITY 0
99 
100 
106 #define ADI_UART0_CFG_PARITY_SELECTION 0
107 
108 
117 #define ADI_UART0_CFG_ENABLE_STICKY_PARITY 0
118 
119 
120 /*
121  Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
122  Baud Rate OSR COMDIV DIVM DIVN
123  9600 3 24 3 1078
124  19200 3 12 3 1078
125  38400 3 8 2 1321
126  57600 3 4 3 1078
127  115200 3 4 1 1563
128  230400 3 2 1 1563
129  460800 3 1 1 1563
130  921,600 2 1 1 1563
131  1,000,000 2 1 1 1280
132  1,500,000 2 1 1 171
133 
134 These are calculated with the UarDivCalculator tool.
135 */
136 
141 #define ADI_UART0_CFG_DIVN 1078
142 
143 
148 #define ADI_UART0_CFG_DIVM 3
149 
150 
155 #define ADI_UART0_CFG_DIVC 24
156 
157 
167 #define ADI_UART0_CFG_OSR 3
168 
169 
174 #define ADI_UART0_CFG_ENABLE_FIFO 1
175 
176 
185 #define ADI_UART0_CFG_TRIG_LEVEL 0
186 
187 
192 #define ADI_UART0_CFG_HOLD_TX 0
193 
194 
201 #define ADI_UART0_CFG_DISABLE_RX 0
202 
203 
210 #define ADI_UART0_CFG_DEASSERTION 0
211 
212 
219 #define ADI_UART0_CFG_SOUT_POLARITY 0
220 
225 #define ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT 1
226 
227 
232 #define ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
233 
237 /*************** UART Driver configurations FOR UART 1 **************/
238 
251 #define ADI_UART1_CFG_WORD_LENGTH 3
252 
253 
261 #define ADI_UART1_CFG_STOP_BIT 1
262 
263 
269 #define ADI_UART1_CFG_ENABLE_PARITY 0
270 
271 
277 #define ADI_UART1_CFG_PARITY_SELECTION 0
278 
279 
288 #define ADI_UART1_CFG_ENABLE_STICKY_PARITY 0
289 
290 
291 /*
292  Table 21-2: Baud Rate Examples Based on 26 MHz PCLK
293  Baud Rate OSR COMDIV DIVM DIVN
294  9600 3 24 3 1078
295  19200 3 12 3 1078
296  38400 3 8 2 1321
297  57600 3 4 3 1078
298  115200 3 4 1 1563
299  230400 3 2 1 1563
300  460800 3 1 1 1563
301  921,600 2 1 1 1563
302  1,000,000 2 1 1 1280
303  1,500,000 2 1 1 171
304 
305 These are calculated with the UarDivCalculator tool.
306 */
307 
312 #define ADI_UART1_CFG_DIVN 1563
313 
314 
319 #define ADI_UART1_CFG_DIVM 1
320 
321 
326 #define ADI_UART1_CFG_DIVC 1
327 
328 
338 #define ADI_UART1_CFG_OSR 3
339 
340 
345 #define ADI_UART1_CFG_ENABLE_FIFO 1
346 
347 
356 #define ADI_UART1_CFG_TRIG_LEVEL 0
357 
358 
363 #define ADI_UART1_CFG_HOLD_TX 0
364 
365 
372 #define ADI_UART1_CFG_DISABLE_RX 0
373 
374 
381 #define ADI_UART1_CFG_DEASSERTION 0
382 
383 
390 #define ADI_UART1_CFG_SOUT_POLARITY 0
391 
396 #define ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT 1
397 
398 
403 #define ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT 0
404 
409 /*************** UART Driver Debug Checks ************** */
410 
411 /* Check word length */
412 #if (((ADI_UART0_CFG_WORD_LENGTH < 0) || (ADI_UART0_CFG_WORD_LENGTH > 3)) || ((ADI_UART1_CFG_WORD_LENGTH < 0) || (ADI_UART1_CFG_WORD_LENGTH > 3)))
413 #error "Word length needs to be between 0 and 3"
414 #endif
415 
416 /* Check stop bit */
417 #if (((ADI_UART0_CFG_STOP_BIT < 0) || (ADI_UART0_CFG_STOP_BIT > 1)) || ((ADI_UART1_CFG_STOP_BIT < 0) || (ADI_UART1_CFG_STOP_BIT > 1)))
418 #error "Stop bit selection needs to be 0 or 1"
419 #endif
420 
421 /* Check parity enable */
422 #if (((ADI_UART0_CFG_ENABLE_PARITY < 0) || (ADI_UART0_CFG_ENABLE_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_PARITY < 0) || (ADI_UART1_CFG_ENABLE_PARITY > 1)))
423 #error "Parity Enable bit needs to be 0 or 1"
424 #endif
425 
426 /* Check parity select */
427 #if (((ADI_UART0_CFG_PARITY_SELECTION < 0) || (ADI_UART0_CFG_PARITY_SELECTION > 1)) || ((ADI_UART1_CFG_PARITY_SELECTION < 0) || (ADI_UART1_CFG_PARITY_SELECTION > 1)))
428 #error "Parity bit selection needs to be 0 or 1"
429 #endif
430 
431 /* Check enable sticky parity */
432 #if (((ADI_UART0_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART0_CFG_ENABLE_STICKY_PARITY > 1)) || ((ADI_UART1_CFG_ENABLE_STICKY_PARITY < 0) || (ADI_UART1_CFG_ENABLE_STICKY_PARITY > 1)))
433 #error "Sticky parity enable needs to be 0 or 1"
434 #endif
435 
436 /* Check fractional baudrate N divider value */
437 #if (((ADI_UART0_CFG_DIVN < 0) || (ADI_UART0_CFG_DIVN > 2047)) || ((ADI_UART1_CFG_DIVN < 0) || (ADI_UART1_CFG_DIVN > 2047)))
438 #error "Fractional baudrate N divider value needs to be between 0 and 2047"
439 #endif
440 
441 /* Check fractional baudrate M divider value */
442 #if (((ADI_UART0_CFG_DIVM < 1) || (ADI_UART0_CFG_DIVM > 3)) || ((ADI_UART1_CFG_DIVM < 1) || (ADI_UART1_CFG_DIVM > 3)))
443 #error "Fractional baudrate M divider value needs to be between 1 and 3"
444 #endif
445 
446 /* Check fractional baudrate C divider value */
447 #if (((ADI_UART0_CFG_DIVC < 1) || (ADI_UART0_CFG_DIVC > 65535)) || ((ADI_UART1_CFG_DIVC < 1) || (ADI_UART1_CFG_DIVC > 65535)))
448 #error "Fractional baudrate C divider value needs to be between 1 and 65535"
449 #endif
450 
451 /* Check over same rate value */
452 #if (((ADI_UART0_CFG_OSR < 0) || (ADI_UART0_CFG_OSR > 3)) || ((ADI_UART1_CFG_OSR < 0) || (ADI_UART1_CFG_OSR > 3)))
453 #error "over sample rate value needs to be between 0 and 3"
454 #endif
455 
456 /* Check enable internal FIFO */
457 #if (((ADI_UART0_CFG_ENABLE_FIFO < 0) || (ADI_UART0_CFG_ENABLE_FIFO > 1)) || ((ADI_UART1_CFG_ENABLE_FIFO < 0) || (ADI_UART1_CFG_ENABLE_FIFO > 1)))
458 #error "Enable internal FIFO needs to be 0 or 1"
459 #endif
460 
461 /* Check UART trig level */
462 #if (((ADI_UART0_CFG_TRIG_LEVEL < 0) || (ADI_UART0_CFG_TRIG_LEVEL > 3)) || ((ADI_UART1_CFG_TRIG_LEVEL < 0) || (ADI_UART1_CFG_TRIG_LEVEL > 3)))
463 #error "Trig level for the UART device needs to be 0 or 1"
464 #endif
465 
466 /* Check value for holding tx while rx is active */
467 #if (((ADI_UART0_CFG_HOLD_TX < 0) || (ADI_UART0_CFG_HOLD_TX > 1)) || ((ADI_UART1_CFG_HOLD_TX < 0) || (ADI_UART1_CFG_HOLD_TX > 1)))
468 #error "Value for holding Tx while Rx is active needs to be 0 or 1"
469 #endif
470 
471 /* Check value de-assertion */
472 #if (((ADI_UART0_CFG_DEASSERTION < 0) || (ADI_UART0_CFG_DEASSERTION > 1)) || ((ADI_UART1_CFG_DEASSERTION < 0) || (ADI_UART1_CFG_DEASSERTION > 1)))
473 #error "Value for de-assertion needs to be 0 or 1"
474 #endif
475 
476 /* Check value for SOUT polarity */
477 #if (((ADI_UART0_CFG_SOUT_POLARITY < 0) || (ADI_UART0_CFG_SOUT_POLARITY > 1)) || ((ADI_UART1_CFG_SOUT_POLARITY < 0) || (ADI_UART1_CFG_SOUT_POLARITY > 1)))
478 #error "Value for SOUT polarity needs to be 0 or 1"
479 #endif
480 
481 /* Check value to enable autobaud detection */
482 #if ((ADI_UART_CFG_ENABLE_AUTOBAUD < 0) || (ADI_UART_CFG_ENABLE_AUTOBAUD > 1))
483 #error "Value for autobaud enable needs to be 0 or 1"
484 #endif
485 
486 /* Check value to enable Rx status interrupt */
487 #if (((ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_RX_STATUS_INTERRUPT > 1)))
488 #error "Value to enable Rx status interrupt needs to be 0 or 1"
489 #endif
490 
491 /* Check value to enable modem status interrupt */
492 #if (((ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART0_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)) || ((ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT < 0) || (ADI_UART1_CFG_ENABLE_MODEM_STATUS_INTERRUPT > 1)))
493 #error "Value to enable modem status interrupt needs to be 0 or 1"
494 #endif
495 
496 #endif /* ADI_UART_CONFIG_H */