A31R71x F/W Packages  1.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31R71x_hal_uartn.h
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1 /***************************************************************************//****************************************************************************/
34 
35 #ifndef _UARTn_H_
36 #define _UARTn_H_
37 
38 #include "A31R71x.h"
39 #include "A31R71x_hal_aa_types.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 //******************************************************************************
46 // Constant
47 //******************************************************************************
48 
49 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
53 #define UARTn_BLOCKING_TIMEOUT 0xffffuL // (0xFFFFFFFFuL)
54 
55 //--------------------------------------
56 // Macro defines for UARTn interrupt enable register
57 //--------------------------------------
58 #define UARTn_IER_RBRINT_EN ((uint8_t)(1 << 0))
59 #define UARTn_IER_THREINT_EN ((uint8_t)(1 << 1))
60 #define UARTn_IER_RLSINT_EN ((uint8_t)(1 << 2))
61 #define UARTn_IER_TXE_EN ((uint8_t)(1 << 3))
62 #define UARTn_IER_BITMASK ((uint8_t)(0x0F))
64 //--------------------------------------
65 // Macro defines for UARTn interrupt identification register
66 //--------------------------------------
67 #define UARTn_IIR_INTSTAT_PEND ((uint8_t)(1 << 0))
68 #define UARTn_IIR_INTID_RLS ((uint8_t)(3 << 1))
69 #define UARTn_IIR_INTID_RDA ((uint8_t)(2 << 1))
70 #define UARTn_IIR_INTID_THRE ((uint8_t)(1 << 1))
71 #define UARTn_IIR_INTID_TXE ((uint8_t)(1 << 4))
72 #define UARTn_IIR_INTID_MASK ((uint8_t)(7 << 1))
73 #define UARTn_IIR_BITMASK ((uint8_t)(0x1F))
75 //--------------------------------------
76 // Macro defines for UARTn line control register
77 //--------------------------------------
78 #define UARTn_LCR_WLEN5 ((uint8_t)(0))
79 #define UARTn_LCR_WLEN6 ((uint8_t)(1 << 0))
80 #define UARTn_LCR_WLEN7 ((uint8_t)(2 << 0))
81 #define UARTn_LCR_WLEN8 ((uint8_t)(3 << 0))
82 #define UARTn_LCR_STOPBIT_SEL ((uint8_t)(1 << 2))
83 #define UARTn_LCR_PARITY_EN ((uint8_t)(1 << 3))
84 #define UARTn_LCR_PARITY_ODD ((uint8_t)(0 << 4))
85 #define UARTn_LCR_PARITY_EVEN ((uint8_t)(1 << 4))
86 #define UARTn_LCR_PARITY_F_1 ((uint8_t)(2 << 4))
87 #define UARTn_LCR_PARITY_F_0 ((uint8_t)(3 << 4))
88 #define UARTn_LCR_BREAK_EN ((uint8_t)(1 << 6))
89 #define UARTn_LCR_BITMASK ((uint8_t)(0x7F))
91 //--------------------------------------
92 // Macro defines for UARTn data control register
93 //--------------------------------------
94 #define UARTn_DCR_TXINV ((uint8_t)(1 << 2))
95 #define UARTn_DCR_RXINV ((uint8_t)(1 << 3))
96 #define UARTn_DCR_LBON ((uint8_t)(1 << 4))
97 #define UARTn_DCR_BITMASK ((uint8_t)(0x7 << 2))
99 //--------------------------------------
100 // Macro defines for UARTn line status register
101 //--------------------------------------
102 #define UARTn_LSR_RDR ((uint8_t)(1 << 0))
103 #define UARTn_LSR_OE ((uint8_t)(1 << 1))
104 #define UARTn_LSR_PE ((uint8_t)(1 << 2))
105 #define UARTn_LSR_FE ((uint8_t)(1 << 3))
106 #define UARTn_LSR_BI ((uint8_t)(1 << 4))
107 #define UARTn_LSR_THRE ((uint8_t)(1 << 5))
108 #define UARTn_LSR_TEMT ((uint8_t)(1 << 6))
109 #define UARTn_LSR_BITMASK ((uint8_t)(0x7F))
111 //******************************************************************************
112 // Type
113 //******************************************************************************
114 
115 //==============================================================================
116 // Enumeration
117 //==============================================================================
118 
120 typedef enum
121 {
127 
129 typedef enum
130 {
134 
136 typedef enum
137 {
144 
146 typedef enum
147 {
153 
155 typedef enum
156 {
162 
163 //==============================================================================
164 // Structure
165 //==============================================================================
166 
168 typedef struct
169 {
170  uint32_t Baudrate;
189 
190 //******************************************************************************
191 // Variable
192 //******************************************************************************
193 
194 extern char InData[80];
195 extern int InFlag;
196 extern int InCount;
197 
198 //******************************************************************************
199 // Function
200 //******************************************************************************
201 
202 HAL_Status_Type HAL_UART_Init( UARTn_Type* UARTx, UARTn_CFG_Type* UARTn_Config );
203 HAL_Status_Type HAL_UART_DeInit( UARTn_Type* UARTx );
204 
206 HAL_Status_Type HAL_UART_ConfigInterrupt( UARTn_Type* UARTx, UARTn_INT_Type UARTn_IntCfg, FunctionalState NewState );
208 HAL_Status_Type HAL_UART_IFDelayConfig( UARTn_Type* UARTx, uint8_t waitval );
209 HAL_Status_Type HAL_UART_ForceBreak( UARTn_Type* UARTx );
210 uint8_t HAL_UART_GetLineStatus( UARTn_Type* UARTx );
211 FlagStatus HAL_UART_CheckBusy( UARTn_Type* UARTx );
212 
213 HAL_Status_Type HAL_UART_TransmitByte( UARTn_Type* UARTx, uint8_t Data );
214 uint8_t HAL_UART_ReceiveByte( UARTn_Type* UARTx );
215 uint32_t HAL_UART_Transmit( UARTn_Type* UARTx, uint8_t* txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag );
216 uint32_t HAL_UART_Receive( UARTn_Type* UARTx, uint8_t* rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag );
217 
218 #ifdef __cplusplus
219 }
220 #endif
221 
222 #endif /* _UARTn_H_ */
223 
HAL_Status_Type
int InFlag
HAL_Status_Type HAL_UART_ConfigInterrupt(UARTn_Type *UARTx, UARTn_INT_Type UARTn_IntCfg, FunctionalState NewState)
Configure the peripheral interrupt.
char InData[80]
FunctionalState
UARTn_DATA_BIT_Type
uint32_t HAL_UART_Transmit(UARTn_Type *UARTx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via UART peripheral.
UARTn_INT_Type
UARTn_DATA_BIT_Type Databits
HAL_Status_Type HAL_UART_TransmitByte(UARTn_Type *UARTx, uint8_t Data)
Transmit a single data through UART peripheral.
HAL_Status_Type HAL_UART_IFDelayConfig(UARTn_Type *UARTx, uint8_t waitval)
Configure inter-frame delay time for UART peripheral.
HAL_Status_Type HAL_UART_DataControlConfig(UARTn_Type *UARTx, UARTn_DATA_CONTROL_Type Mode, FunctionalState NewState)
Configure Data Control mode for UART peripheral.
UARTn_PARITY_BIT_Type Parity
HAL_Status_Type HAL_UART_ConfigStructInit(UARTn_CFG_Type *UARTn_Config)
Fills each UARTn_Config member with its default value:
HAL_Status_Type HAL_UART_ForceBreak(UARTn_Type *UARTx)
Force BREAK character on UART line, output pin UARTn TXD is forced to logic 0.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
int InCount
FlagStatus HAL_UART_CheckBusy(UARTn_Type *UARTx)
Check whether if UART is busy or not.
HAL_Status_Type HAL_UART_Init(UARTn_Type *UARTx, UARTn_CFG_Type *UARTn_Config)
Initialize the UARTn peripheral with the specified parameters.
uint8_t HAL_UART_GetLineStatus(UARTn_Type *UARTx)
This function returns the current value of Line Status Register.
UARTn_STOP_BIT_Type Stopbits
UARTn_PARITY_BIT_Type
UARTn_DATA_CONTROL_Type
TRANSFER_BLOCK_Type
uint32_t HAL_UART_Receive(UARTn_Type *UARTx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via UART peripheral.
HAL_Status_Type HAL_UART_DeInit(UARTn_Type *UARTx)
Deinitialize the UARTn peripheral registers to their default reset values.
UARTn_STOP_BIT_Type
uint8_t HAL_UART_ReceiveByte(UARTn_Type *UARTx)
Receive a single data from UART peripheral.