60 if( WDT_Config == NULL )
73 reg_val &= ~( 0x3f << WDT_CR_RSTEN_Pos );
77 reg_val |= ( 0x25 << WDT_CR_RSTEN_Pos );
79 WDT->CR = ( 0x5A69 << WDT_CR_WTIDKY_Pos ) | ( 0x1a << WDT_CR_CNTEN_Pos ) | reg_val;
93 | ( 0x5A69 << WDT_CR_WTIDKY_Pos )
94 | ( 0x25 << WDT_CR_RSTEN_Pos )
95 | ( 0x1A << WDT_CR_CNTEN_Pos )
115 #if 0 // before bug fix 116 uint32_t reg_val = 0;
119 reg_val = ( WDT->CR & 0xFFFF );
127 tmp = WDT_CR_WINMIEN;
133 reg_val |= ( tmp & WDT_INTERRUPT_BITMASK );
137 reg_val &= ( ( ~tmp ) & WDT_INTERRUPT_BITMASK );
140 WDT->CR = ( 0x5A69 << WDT_CR_WTIDKY_Pos ) | reg_val;
141 #else // after bug fix 142 uint32_t reg_val = 0;
148 mask = WDT_CR_UNFIEN_Msk;
151 mask = WDT_CR_WINMIEN_Msk;
156 & ~( WDT_CR_WTIDKY_Msk )
157 | ( ( uint32_t )WDT_CR_WTIDKY_Value << WDT_CR_WTIDKY_Pos )
197 tmp_reg = WDT->CR & 0xFFFF;
198 tmp_reg |= ( 0x1a << WDT_CR_CNTEN_Pos );
202 tmp_reg &= ~( 0x3f << WDT_CR_CNTEN_Pos );
205 WDT->CR = ( 0x5A69 << WDT_CR_WTIDKY_Pos ) | tmp_reg;
HAL_Status_Type HAL_WDT_ClearStatus(uint32_t clrbit)
Clear the timer status register of WDT.
uint32_t HAL_WDT_GetCurrentCount(void)
Get the current value of WDT.
uint32_t HAL_WDT_GetStatus(void)
Get the timer status register of WDT.
HAL_Status_Type HAL_WDT_Init(WDT_CFG_Type *WDT_Config)
Initialize the WDT peripheral with the specified parameters.
HAL_Status_Type HAL_WDT_Start(FunctionalState ctrl)
Enable WDT activity.
Contains all macro definitions and function prototypes support for scu firmware library on A31R71x.
Contains all macro definitions and function prototypes support for wdt firmware library on A31R71x.
HAL_Status_Type HAL_WDT_DeInit(void)
Deinitialize WDT.
void HAL_SCU_Peripheral_EnableClock2(uint32_t u32PeriClk2, uint32_t u32Ind)
Set Each Peripheral Clock.
HAL_Status_Type HAL_WDT_ReloadTimeCounter(void)
Reload WDT counter.
HAL_Status_Type HAL_WDT_ConfigInterrupt(WDT_INT_Type WDT_IntCfg, FunctionalState NewState)
Configure the peripheral interrupt.