A31R71x F/W Packages  1.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31R71x_hal_pcu.c
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1 /***************************************************************************//****************************************************************************/
34 
35 /* Includes ----------------------------------------------------------------- */
36 //******************************************************************************
37 // Include
38 //******************************************************************************
39 
40 #include "A31R71x_hal_pcu.h"
41 
42 /* Public Functions --------------------------------------------------------- */
43 //******************************************************************************
44 // Function
45 //******************************************************************************
46 
47 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
66 void HAL_GPIO_Init( Pn_Type* Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32Afsr2, uint32_t u32PuPd )
67 {
68  Px->MOD = u32Mode; // 00/01/10/11: Input/Output/"Alternative Function"/Reserved Mode
69  Px->TYP = u32Type; // 0/1: Push-pull/Open-drain Output
70  Px->AFSR1 = u32Afsr1; // 0 to 4: Alternative Function 0 to 4
71  Px->AFSR2 = u32Afsr2; // 0 to 4: Alternative Function 0 to 4
72  Px->PUPD = u32PuPd; // 00/01/10/11: "Disable Pull-up/down"/"Enable Pull-up"/"Enable Pull-down"/Reserved Resistor
73 }
74 
75 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
90 void HAL_GPIO_ConfigFunction( Pn_Type* Px, uint8_t pin_no, uint32_t func )
91 {
92  uint8_t pin_offset;
93  uint32_t reg_val;
94 
95  if( pin_no < 8 ) // 0~7
96  {
97  //--------------------------------------
98  // pin_offset = pin_no * 4
99  //--------------------------------------
100  pin_offset = ( pin_no * 4 );
101 
102  //--------------------------------------
103  // MR
104  //--------------------------------------
105  reg_val = Px->AFSR1;
106  reg_val &= ~( AFSRx_Msk << pin_offset );
107  reg_val |= ( func << pin_offset );
108 
109  Px->AFSR1 = reg_val;
110  }
111  else
112  {
113  pin_no -= 8;
114  //--------------------------------------
115  // pin_offset = pin_no * 4
116  //--------------------------------------
117  pin_offset = ( pin_no * 4 );
118 
119  //--------------------------------------
120  // MR
121  //--------------------------------------
122  reg_val = Px->AFSR2;
123  reg_val &= ~( AFSRx_Msk << pin_offset );
124  reg_val |= ( func << pin_offset );
125 
126  Px->AFSR2 = reg_val;
127  }
128 }
129 
130 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
147 void HAL_GPIO_ConfigOutput( Pn_Type* Px, uint8_t pin_no, PCU_PORT_MODE dir_type )
148 {
149  uint8_t pin_offset;
150  uint32_t reg_val;
151  uint32_t dir_type_temp;
152 
153  dir_type_temp = dir_type;
154  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
155  {
156  dir_type = PUSH_PULL_OUTPUT;
157  }
158  //--------------------------------------
159  // pin_offset = pin_no * 2
160  //--------------------------------------
161  pin_offset = ( pin_no << 1 );
162 
163  //--------------------------------------
164  // Pn_MOD
165  //--------------------------------------
166  reg_val = Px->MOD;
167  reg_val &= ~( MODEx_Msk << pin_offset );
168  reg_val |= ( dir_type << pin_offset );
169  Px->MOD = reg_val;
170 
171  //--------------------------------------
172  // Pn_TYP
173  //--------------------------------------
174  if( ( dir_type_temp == PUSH_PULL_OUTPUT ) || ( dir_type_temp == OPEN_DRAIN_OUTPUT ) )
175  {
176  reg_val = Px->TYP;
177  reg_val &= ~( 1 << pin_no );
178  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
179  {
180  reg_val |= ( 1 << pin_no );
181  }
182  Px->TYP = reg_val;
183  }
184 }
185 
186 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
201 void HAL_GPIO_ConfigOutDataMask( Pn_Type* Px, uint8_t pin_no, FunctionalState maskctrl )
202 {
203  uint32_t reg_val;
204 
205  reg_val = Px->OUTDMSK;
206  reg_val &= ~( 1 << pin_no );
207  reg_val |= ( maskctrl << pin_no );
208  Px->OUTDMSK = reg_val;
209 }
210 
211 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
227 void HAL_GPIO_ConfigPullup( Pn_Type* Px, uint8_t pin_no, uint8_t pullupdown )
228 {
229  uint32_t reg_val;
230  uint8_t pin_offset;
231 
232  pin_offset = ( pin_no << 1 );
233 
234  reg_val = Px->PUPD;
235  reg_val &= ~( 3 << pin_offset );
236  reg_val |= ( pullupdown << pin_offset );
237  Px->PUPD = reg_val;
238 }
239 
240 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
262 void HAL_GPIO_SetDebouncePin( Pn_Type* Px, uint32_t u32Pins, uint32_t u32Debnc )
263 {
264 #if 0 // before bug fix
265  uint32_t reg_val;
266 
267  reg_val = ( 0x07ff & Px->DBCR );
268  reg_val |= ( 0x01 << u32Pins );
269  reg_val |= u32Debnc;
270  Px->DBCR = reg_val;
271 #else // after bug fix
272  Px->DBCR = Px->DBCR
273  & ~Pn_DBCR_DBCLK_Msk
274  | ( 1 << u32Pins )
275  | u32Debnc
276  ;
277 #endif
278 }
279 
280 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
292 void HAL_GPIO_SetPin( Pn_Type* Px, uint16_t bitValue )
293 {
294  Px->BSR = bitValue;
295 }
296 
297 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
309 void HAL_GPIO_ClearPin( Pn_Type* Px, uint16_t bitValue )
310 {
311  Px->BCR = bitValue;
312 }
313 
314 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
324 void HAL_GPIO_WritePin( Pn_Type* Px, uint16_t Value )
325 {
326  Px->OUTDR = Value;
327 }
328 
329 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
339 uint16_t HAL_GPIO_ReadPin( Pn_Type* Px )
340 {
341  return Px->INDR;
342 }
343 
Contains all macro definitions and function prototypes support for pcu firmware library on A31R71x.
FunctionalState
void HAL_GPIO_SetDebouncePin(Pn_Type *Px, uint32_t u32Pins, uint32_t u32Debnc)
Set PCU Debounce.
void HAL_GPIO_ConfigOutput(Pn_Type *Px, uint8_t pin_no, PCU_PORT_MODE dir_type)
Configure pin mode.
void HAL_GPIO_WritePin(Pn_Type *Px, uint16_t Value)
Write Value on port that have output direction of GPIO.
void HAL_GPIO_SetPin(Pn_Type *Px, uint16_t bitValue)
Set Value for bits that have output direction on GPIO port.
void HAL_GPIO_ClearPin(Pn_Type *Px, uint16_t bitValue)
Clear Value for bits that have output direction on GPIO port.
uint16_t HAL_GPIO_ReadPin(Pn_Type *Px)
Read Current state on port pin that have input direction of GPIO.
void HAL_GPIO_ConfigPullup(Pn_Type *Px, uint8_t pin_no, uint8_t pullupdown)
Configure Pin Pull-Up & Pull-Down.
void HAL_GPIO_ConfigFunction(Pn_Type *Px, uint8_t pin_no, uint32_t func)
Configure pin function.
void HAL_GPIO_ConfigOutDataMask(Pn_Type *Px, uint8_t pin_no, FunctionalState maskctrl)
Configure out data Mask.
void HAL_GPIO_Init(Pn_Type *Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32Afsr2, uint32_t u32PuPd)
Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers.
PCU_PORT_MODE