A31R71x F/W Packages  1.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
Enumerations | Functions
A31R71x_hal_pcu.h File Reference

Contains all macro definitions and function prototypes support for pcu firmware library on A31R71x. More...

Go to the source code of this file.

Enumerations

enum  PCU_PORT_MODE { INPUT = 0, PUSH_PULL_OUTPUT, ALTERN_FUNC, OPEN_DRAIN_OUTPUT }
 

Functions

void HAL_GPIO_Init (Pn_Type *Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32Afsr2, uint32_t u32PuPd)
 Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers. More...
 
void HAL_GPIO_ConfigFunction (Pn_Type *Px, uint8_t pin_no, uint32_t func)
 Configure pin function. More...
 
void HAL_GPIO_ConfigOutput (Pn_Type *Px, uint8_t pin_no, PCU_PORT_MODE dir_type)
 Configure pin mode. More...
 
void HAL_GPIO_ConfigOutDataMask (Pn_Type *Px, uint8_t pin_no, FunctionalState maskctrl)
 Configure out data Mask. More...
 
void HAL_GPIO_ConfigPullup (Pn_Type *Px, uint8_t pin_no, uint8_t pullupdown)
 Configure Pin Pull-Up & Pull-Down. More...
 
void HAL_GPIO_SetDebouncePin (Pn_Type *Px, uint32_t u32Pins, uint32_t u32Debnc)
 Set PCU Debounce. More...
 
void HAL_GPIO_SetPin (Pn_Type *Px, uint16_t bitValue)
 Set Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_ClearPin (Pn_Type *Px, uint16_t bitValue)
 Clear Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_WritePin (Pn_Type *Px, uint16_t Value)
 Write Value on port that have output direction of GPIO. More...
 
uint16_t HAL_GPIO_ReadPin (Pn_Type *Px)
 Read Current state on port pin that have input direction of GPIO. More...
 

Detailed Description

Contains all macro definitions and function prototypes support for pcu firmware library on A31R71x.

Version
1.00
Date
2020-05-29
Author
ABOV Application Team

Copyright(C) 2019, ABOV Semiconductor All rights reserved.

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Definition in file A31R71x_hal_pcu.h.

Enumeration Type Documentation

◆ PCU_PORT_MODE

Pin Mode and Pin Type Selection Control

Enumerator
INPUT 
PUSH_PULL_OUTPUT 
ALTERN_FUNC 
OPEN_DRAIN_OUTPUT 

Definition at line 116 of file A31R71x_hal_pcu.h.

Function Documentation

◆ HAL_GPIO_ClearPin()

void HAL_GPIO_ClearPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Clear Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to clear.
  • 0x0000 ~ 0xffff
  • Example: Use the value of 0x0003 to clear bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 309 of file A31R71x_hal_pcu.c.

310 {
311  Px->BCR = bitValue;
312 }

◆ HAL_GPIO_ConfigFunction()

void HAL_GPIO_ConfigFunction ( Pn_Type *  Px,
uint8_t  pin_no,
uint32_t  func 
)

Configure pin function.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 15
[in]funcAlternative Function Number
  • AFSRx_AF0 ~ AFSRx_AF4
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]
Note
This device has no T13OUT and T14OUT pins.

Definition at line 90 of file A31R71x_hal_pcu.c.

91 {
92  uint8_t pin_offset;
93  uint32_t reg_val;
94 
95  if( pin_no < 8 ) // 0~7
96  {
97  //--------------------------------------
98  // pin_offset = pin_no * 4
99  //--------------------------------------
100  pin_offset = ( pin_no * 4 );
101 
102  //--------------------------------------
103  // MR
104  //--------------------------------------
105  reg_val = Px->AFSR1;
106  reg_val &= ~( AFSRx_Msk << pin_offset );
107  reg_val |= ( func << pin_offset );
108 
109  Px->AFSR1 = reg_val;
110  }
111  else
112  {
113  pin_no -= 8;
114  //--------------------------------------
115  // pin_offset = pin_no * 4
116  //--------------------------------------
117  pin_offset = ( pin_no * 4 );
118 
119  //--------------------------------------
120  // MR
121  //--------------------------------------
122  reg_val = Px->AFSR2;
123  reg_val &= ~( AFSRx_Msk << pin_offset );
124  reg_val |= ( func << pin_offset );
125 
126  Px->AFSR2 = reg_val;
127  }
128 }

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigOutDataMask()

void HAL_GPIO_ConfigOutDataMask ( Pn_Type *  Px,
uint8_t  pin_no,
FunctionalState  maskctrl 
)

Configure out data Mask.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 15
[in]maskctrlstate
  • OUTDMSKx_Unmask // The corresponding OUTDRx bit can be changed.
  • OUTDMSKx_Mask // The corresponding OUTDRx bit is protected.
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 201 of file A31R71x_hal_pcu.c.

202 {
203  uint32_t reg_val;
204 
205  reg_val = Px->OUTDMSK;
206  reg_val &= ~( 1 << pin_no );
207  reg_val |= ( maskctrl << pin_no );
208  Px->OUTDMSK = reg_val;
209 }

◆ HAL_GPIO_ConfigOutput()

void HAL_GPIO_ConfigOutput ( Pn_Type *  Px,
uint8_t  pin_no,
PCU_PORT_MODE  dir_type 
)

Configure pin mode.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 15
[in]dir_typePin Mode
  • INPUT: 0
  • PUSH_PULL_OUTPUT: 1
  • ALTERN_FUNC: 2
  • OPEN_DRAIN_OUTPUT: 3
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 147 of file A31R71x_hal_pcu.c.

148 {
149  uint8_t pin_offset;
150  uint32_t reg_val;
151  uint32_t dir_type_temp;
152 
153  dir_type_temp = dir_type;
154  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
155  {
156  dir_type = PUSH_PULL_OUTPUT;
157  }
158  //--------------------------------------
159  // pin_offset = pin_no * 2
160  //--------------------------------------
161  pin_offset = ( pin_no << 1 );
162 
163  //--------------------------------------
164  // Pn_MOD
165  //--------------------------------------
166  reg_val = Px->MOD;
167  reg_val &= ~( MODEx_Msk << pin_offset );
168  reg_val |= ( dir_type << pin_offset );
169  Px->MOD = reg_val;
170 
171  //--------------------------------------
172  // Pn_TYP
173  //--------------------------------------
174  if( ( dir_type_temp == PUSH_PULL_OUTPUT ) || ( dir_type_temp == OPEN_DRAIN_OUTPUT ) )
175  {
176  reg_val = Px->TYP;
177  reg_val &= ~( 1 << pin_no );
178  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
179  {
180  reg_val |= ( 1 << pin_no );
181  }
182  Px->TYP = reg_val;
183  }
184 }

References OPEN_DRAIN_OUTPUT, and PUSH_PULL_OUTPUT.

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigPullup()

void HAL_GPIO_ConfigPullup ( Pn_Type *  Px,
uint8_t  pin_no,
uint8_t  pullupdown 
)

Configure Pin Pull-Up & Pull-Down.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 15
[in]pullupdownTarget Configuration
  • PUPDx_Disable
  • PUPDx_EnablePU
  • PUPDx_EnablePD
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 227 of file A31R71x_hal_pcu.c.

228 {
229  uint32_t reg_val;
230  uint8_t pin_offset;
231 
232  pin_offset = ( pin_no << 1 );
233 
234  reg_val = Px->PUPD;
235  reg_val &= ~( 3 << pin_offset );
236  reg_val |= ( pullupdown << pin_offset );
237  Px->PUPD = reg_val;
238 }

◆ HAL_GPIO_Init()

void HAL_GPIO_Init ( Pn_Type *  Px,
uint32_t  u32Mode,
uint32_t  u32Type,
uint32_t  u32Afsr1,
uint32_t  u32Afsr2,
uint32_t  u32PuPd 
)

Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]u32ModeValues for In/Out/Alternative mode
[in]u32TypeValues for Push-pull and Open-drain
[in]u32Afsr1Values for Alternative Function
[in]u32Afsr2Values for Alternative Function
[in]u32PuPdValues for Pull-up/down resistor
Returns
None

This function sets the mode, type, alternative function, and pull-up/down resistor of port.

Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 66 of file A31R71x_hal_pcu.c.

67 {
68  Px->MOD = u32Mode; // 00/01/10/11: Input/Output/"Alternative Function"/Reserved Mode
69  Px->TYP = u32Type; // 0/1: Push-pull/Open-drain Output
70  Px->AFSR1 = u32Afsr1; // 0 to 4: Alternative Function 0 to 4
71  Px->AFSR2 = u32Afsr2; // 0 to 4: Alternative Function 0 to 4
72  Px->PUPD = u32PuPd; // 00/01/10/11: "Disable Pull-up/down"/"Enable Pull-up"/"Enable Pull-down"/Reserved Resistor
73 }

◆ HAL_GPIO_ReadPin()

uint16_t HAL_GPIO_ReadPin ( Pn_Type *  Px)

Read Current state on port pin that have input direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
Returns
Current value of GPIO port.
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]
Note
Return value contain state of each port pin (bit) on that GPIO regardless its direction is input or output.

Definition at line 339 of file A31R71x_hal_pcu.c.

340 {
341  return Px->INDR;
342 }

◆ HAL_GPIO_SetDebouncePin()

void HAL_GPIO_SetDebouncePin ( Pn_Type *  Px,
uint32_t  u32Pins,
uint32_t  u32Debnc 
)

Set PCU Debounce.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PB, PE
[in]u32PinsPin Number
  • 0 ~ 15
[in]u32DebncSampling Clock Selection
  • DBCLK_HCLK1, DBCLK_HCLK4, DBCLK_HCLK16, DBCLK_HCLK64, DBCLK_HCLK256, DBCLK_HCLK1024
Returns
None

This function enables the debounce filter for the pin specified by u32Pins and selects the debounce filter sampling clock.

Remarks
Available EINT Pin: PA[7:0], PB[7:0], PE[15:8]
[Example]
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PA, 0, DBCLK_HCLK1024 );
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PA, 1, DBCLK_HCLK1024 );

Definition at line 262 of file A31R71x_hal_pcu.c.

263 {
264 #if 0 // before bug fix
265  uint32_t reg_val;
266 
267  reg_val = ( 0x07ff & Px->DBCR );
268  reg_val |= ( 0x01 << u32Pins );
269  reg_val |= u32Debnc;
270  Px->DBCR = reg_val;
271 #else // after bug fix
272  Px->DBCR = Px->DBCR
273  & ~Pn_DBCR_DBCLK_Msk
274  | ( 1 << u32Pins )
275  | u32Debnc
276  ;
277 #endif
278 }

◆ HAL_GPIO_SetPin()

void HAL_GPIO_SetPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Set Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to set.
  • 0x0000 ~ 0xffff
  • Example: Use the value of 0x0003 to set bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 292 of file A31R71x_hal_pcu.c.

293 {
294  Px->BSR = bitValue;
295 }

◆ HAL_GPIO_WritePin()

void HAL_GPIO_WritePin ( Pn_Type *  Px,
uint16_t  Value 
)

Write Value on port that have output direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]ValueValue to write
Returns
None
Remarks
Available GPIO Pin: PA[11:0], PB[15:0], PC[11:0], PD[7:0], PE[15:0], PF[8:0]

Definition at line 324 of file A31R71x_hal_pcu.c.

325 {
326  Px->OUTDR = Value;
327 }