A31L12x F/W Packages  1.4.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
Functions
A31L12x_hal_pcu.c File Reference

Contains all functions support for pcu firmware library on A31L12x. More...

Go to the source code of this file.

Functions

void HAL_GPIO_Init (Pn_Type *Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32Afsr2, uint32_t u32PuPd)
 Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers. More...
 
void HAL_GPIO_ConfigFunction (Pn_Type *Px, uint8_t pin_no, uint32_t func)
 Configure pin function. More...
 
void HAL_GPIO_ConfigOutput (Pn_Type *Px, uint8_t pin_no, PCU_PORT_MODE dir_type)
 Configure pin mode. More...
 
void HAL_GPIO_ConfigOutDataMask (Pn_Type *Px, uint8_t pin_no, FunctionalState maskctrl)
 Configure out data Mask. More...
 
void HAL_GPIO_ConfigPullup (Pn_Type *Px, uint8_t pin_no, uint8_t pullupdown)
 Configure Pin Pull-Up & Pull-Down. More...
 
void HAL_GPIO_SetDebouncePin (Pn_Type *Px, uint32_t u32Pins, uint32_t u32Debnc)
 Set PCU Debounce. More...
 
void HAL_GPIO_SetPin (Pn_Type *Px, uint16_t bitValue)
 Set Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_ClearPin (Pn_Type *Px, uint16_t bitValue)
 Clear Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_WritePin (Pn_Type *Px, uint16_t Value)
 Write Value on port that have output direction of GPIO. More...
 
uint16_t HAL_GPIO_ReadPin (Pn_Type *Px)
 Read Current state on port pin that have input direction of GPIO. More...
 

Detailed Description

Contains all functions support for pcu firmware library on A31L12x.

Version
1.00
Date
2020-05-29
Author
ABOV Application Team

Copyright(C) 2019, ABOV Semiconductor All rights reserved.

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Definition in file A31L12x_hal_pcu.c.

Function Documentation

◆ HAL_GPIO_ClearPin()

void HAL_GPIO_ClearPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Clear Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to clear.
  • 0x0000 ~ 0xffff
  • Example: Use the value of 0x0003 to clear bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 308 of file A31L12x_hal_pcu.c.

309 {
310  Px->BCR = bitValue;
311 }

◆ HAL_GPIO_ConfigFunction()

void HAL_GPIO_ConfigFunction ( Pn_Type *  Px,
uint8_t  pin_no,
uint32_t  func 
)

Configure pin function.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 12
[in]funcAlternative Function Number
  • AFSRx_AF0 ~ AFSRx_AF7
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 89 of file A31L12x_hal_pcu.c.

90 {
91  uint8_t pin_offset;
92  uint32_t reg_val;
93 
94  if( pin_no < 8 ) // 0~7
95  {
96  //--------------------------------------
97  // pin_offset = pin_no * 4
98  //--------------------------------------
99  pin_offset = ( pin_no * 4 );
100 
101  //--------------------------------------
102  // MR
103  //--------------------------------------
104  reg_val = Px->AFSR1;
105  reg_val &= ~( AFSRx_Msk << pin_offset );
106  reg_val |= ( func << pin_offset );
107 
108  Px->AFSR1 = reg_val;
109  }
110  else
111  {
112  pin_no -= 8;
113  //--------------------------------------
114  // pin_offset = pin_no * 4
115  //--------------------------------------
116  pin_offset = ( pin_no * 4 );
117 
118  //--------------------------------------
119  // MR
120  //--------------------------------------
121  reg_val = Px->AFSR2;
122  reg_val &= ~( AFSRx_Msk << pin_offset );
123  reg_val |= ( func << pin_offset );
124 
125  Px->AFSR2 = reg_val;
126  }
127 }

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigOutDataMask()

void HAL_GPIO_ConfigOutDataMask ( Pn_Type *  Px,
uint8_t  pin_no,
FunctionalState  maskctrl 
)

Configure out data Mask.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 12
[in]maskctrlstate
  • OUTDMSKx_Unmask // The corresponding OUTDRx bit can be changed.
  • OUTDMSKx_Mask // The corresponding OUTDRx bit is protected.
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 200 of file A31L12x_hal_pcu.c.

201 {
202  uint32_t reg_val;
203 
204  reg_val = Px->OUTDMSK;
205  reg_val &= ~( 1 << pin_no );
206  reg_val |= ( maskctrl << pin_no );
207  Px->OUTDMSK = reg_val;
208 }

◆ HAL_GPIO_ConfigOutput()

void HAL_GPIO_ConfigOutput ( Pn_Type *  Px,
uint8_t  pin_no,
PCU_PORT_MODE  dir_type 
)

Configure pin mode.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 12
[in]dir_typePin Mode
  • INPUT: 0
  • PUSH_PULL_OUTPUT: 1
  • ALTERN_FUNC: 2
  • OPEN_DRAIN_OUTPUT: 3
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 146 of file A31L12x_hal_pcu.c.

147 {
148  uint8_t pin_offset;
149  uint32_t reg_val;
150  uint32_t dir_type_temp;
151 
152  dir_type_temp = dir_type;
153  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
154  {
155  dir_type = PUSH_PULL_OUTPUT;
156  }
157  //--------------------------------------
158  // pin_offset = pin_no * 2
159  //--------------------------------------
160  pin_offset = ( pin_no << 1 );
161 
162  //--------------------------------------
163  // Pn_MOD
164  //--------------------------------------
165  reg_val = Px->MOD;
166  reg_val &= ~( MODEx_Msk << pin_offset );
167  reg_val |= ( dir_type << pin_offset );
168  Px->MOD = reg_val;
169 
170  //--------------------------------------
171  // Pn_TYP
172  //--------------------------------------
173  if( ( dir_type_temp == PUSH_PULL_OUTPUT ) || ( dir_type_temp == OPEN_DRAIN_OUTPUT ) )
174  {
175  reg_val = Px->TYP;
176  reg_val &= ~( 1 << pin_no );
177  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
178  {
179  reg_val |= ( 1 << pin_no );
180  }
181  Px->TYP = reg_val;
182  }
183 }

References OPEN_DRAIN_OUTPUT, and PUSH_PULL_OUTPUT.

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigPullup()

void HAL_GPIO_ConfigPullup ( Pn_Type *  Px,
uint8_t  pin_no,
uint8_t  pullupdown 
)

Configure Pin Pull-Up & Pull-Down.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 12
[in]pullupdownTarget Configuration
  • PUPDx_Disable
  • PUPDx_EnablePU
  • PUPDx_EnablePD
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 226 of file A31L12x_hal_pcu.c.

227 {
228  uint32_t reg_val;
229  uint8_t pin_offset;
230 
231  pin_offset = ( pin_no << 1 );
232 
233  reg_val = Px->PUPD;
234  reg_val &= ~( 3 << pin_offset );
235  reg_val |= ( pullupdown << pin_offset );
236  Px->PUPD = reg_val;
237 }

◆ HAL_GPIO_Init()

void HAL_GPIO_Init ( Pn_Type *  Px,
uint32_t  u32Mode,
uint32_t  u32Type,
uint32_t  u32Afsr1,
uint32_t  u32Afsr2,
uint32_t  u32PuPd 
)

Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]u32ModeValues for In/Out/Alternative mode
[in]u32TypeValues for Push-pull and Open-drain
[in]u32Afsr1Values for Alternative Function
[in]u32Afsr2Values for Alternative Function
[in]u32PuPdValues for Pull-up/down resistor
Returns
None

This function sets the mode, type, alternative function, and pull-up/down resistor of port.

Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 66 of file A31L12x_hal_pcu.c.

67 {
68  Px->MOD = u32Mode; // 00/01/10/11: Input/Output/"Alternative Function"/Reserved Mode
69  Px->TYP = u32Type; // 0/1: Push-pull/Open-drain Output
70  Px->AFSR1 = u32Afsr1; // 0 to 4: Alternative Function 0 to 4
71  Px->AFSR2 = u32Afsr2; // 0 to 4: Alternative Function 0 to 4
72  Px->PUPD = u32PuPd; // 00/01/10/11: "Disable Pull-up/down"/"Enable Pull-up"/"Enable Pull-down"/Reserved Resistor
73 }

◆ HAL_GPIO_ReadPin()

uint16_t HAL_GPIO_ReadPin ( Pn_Type *  Px)

Read Current state on port pin that have input direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
Returns
Current value of GPIO port.
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]
Note
Return value contain state of each port pin (bit) on that GPIO regardless its direction is input or output.

Definition at line 338 of file A31L12x_hal_pcu.c.

339 {
340  return Px->INDR;
341 }

◆ HAL_GPIO_SetDebouncePin()

void HAL_GPIO_SetDebouncePin ( Pn_Type *  Px,
uint32_t  u32Pins,
uint32_t  u32Debnc 
)

Set PCU Debounce.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]u32PinsPin Number
  • 0 ~ 12
[in]u32DebncSampling Clock Selection
  • DBCLK_HCLK1, DBCLK_HCLK4, DBCLK_HCLK16, DBCLK_HCLK64, DBCLK_HCLK256, DBCLK_HCLK1024
Returns
None

This function enables the debounce filter for the pin specified by u32Pins and selects the debounce filter sampling clock.

Remarks
Available EINT Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]
[Example]
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PA, 0, DBCLK_HCLK1024 );
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PA, 1, DBCLK_HCLK1024 );

Definition at line 261 of file A31L12x_hal_pcu.c.

262 {
263 #if 0 // before bug fix
264  uint32_t reg_val;
265 
266  reg_val = ( 0x07ff & Px->DBCR );
267  reg_val |= ( 0x01 << u32Pins );
268  reg_val |= u32Debnc;
269  Px->DBCR = reg_val;
270 #else // after bug fix
271  Px->DBCR = Px->DBCR
272  & ~Pn_DBCR_DBCLK_Msk
273  | ( 1 << u32Pins )
274  | u32Debnc
275  ;
276 #endif
277 }

◆ HAL_GPIO_SetPin()

void HAL_GPIO_SetPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Set Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to set.
  • 0x0000 ~ 0xffff
  • Example: Use the value of 0x0003 to set bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 291 of file A31L12x_hal_pcu.c.

292 {
293  Px->BSR = bitValue;
294 }

◆ HAL_GPIO_WritePin()

void HAL_GPIO_WritePin ( Pn_Type *  Px,
uint16_t  Value 
)

Write Value on port that have output direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]ValueValue to write
Returns
None
Remarks
Available GPIO Pin: PA[9:0], PB[12:0], PC[11:0], PD[7:0], PE[4:0], PF[3:0]

Definition at line 323 of file A31L12x_hal_pcu.c.

324 {
325  Px->OUTDR = Value;
326 }