68 static void sc_set_divisors( SCn_Type* SCx, uint32_t mode, uint32_t value, uint32_t baudrate, uint32_t ovrsamp )
95 denominator = baudrate;
97 bdr = numerator / n / denominator - 1;
99 SCx->BDR = bdr & 0x0000ffff;
123 if( SCx == ( SCn_Type* )SC0 )
132 if( SCx == ( SCn_Type* )SC1 )
145 | ( ( SCx_ConfigStruct->
Mode & 0x1 ) << SCn_CR1_SCnMD_Pos )
146 | ( ( SCx_ConfigStruct->
ParityEnDis & 0x1 ) << SCn_CR1_PENn_Pos )
147 | ( ( SCx_ConfigStruct->
Parity & 0x1 ) << SCn_CR1_PSELn_Pos )
148 | ( ( SCx_ConfigStruct->
Databits & 0x3 ) << SCn_CR1_DLENn_Pos )
149 | ( ( SCx_ConfigStruct->
Stopbits & 0x1 ) << SCn_CR1_STOPBn_Pos )
150 | ( ( SCx_ConfigStruct->
Oversampling & 0x1 ) << SCn_CR1_OVRSn_Pos )
151 | ( 1 << SCn_CR1_TXEn_Pos )
152 | ( 1 << SCn_CR1_RXEn_Pos )
157 | ( ( SCx_ConfigStruct->
SCI_clock_gen & SCn_CR2_SCnCLKG_Msk ) << SCn_CR2_SCnCLKG_Pos )
189 if( SCx == ( SCn_Type* )SC0 )
198 if( SCx == ( SCn_Type* )SC1 )
232 if( SCn_Config == NULL )
237 SCn_Config->
Mode = mode;
294 tmp = ( 1 << SCn_IntCfg );
339 tmp = SCn_CR1_SCInEN_Msk;
342 tmp = SCn_CR1_RTOENn_Msk;
345 tmp = SCn_CR1_RXEn_Msk;
348 tmp = SCn_CR1_TXEn_Msk;
351 tmp = SCn_CR1_PENn_Msk;
361 SCx->CR1 &= ~( tmp & SCn_CR1_CONTROL_BITMASK );
386 SCx->CR1 |= ( 1 << SCn_CR1_SCInEN_Pos );
390 SCx->CR1 &= ~( 1 << SCn_CR1_SCInEN_Pos );
411 SCx->CR2_b.ACTENn =
ENABLE;
431 SCx->CR2_b.WRENn =
ENABLE;
451 SCx->CR2_b.DACTENn =
ENABLE;
474 SCx->RTODR = RxTimeOutD;
497 SCx->EGTR = TxExGuardTime;
523 SCx->T3DR = SCnT3data;
524 SCx->T4DR = SCnT4data;
560 tmp = SCn_CR2_SCnCLKEN_Msk;
563 tmp = SCn_CR2_SCnCLKLV_Msk;
566 tmp = SCn_CR2_SCnDATALV_Msk;
569 tmp = SCn_CR2_SCnRSTLV_Msk;
572 tmp = SCn_CR2_SCnPWRLV_Msk;
576 if( SetLevel ==
SET )
582 SCx->CR2 &= ~( tmp & SCn_CR2_CONTROL_BITMASK );
603 SCx->CR3_b.ACONDETn =
ENABLE;
627 SCx->CR3_b.CONSELn = conv_sel;
653 SCx->CR3_b.RETRYn = retry_num;
654 SCx->CR3_b.DLYRETRYn = retry_dly;
678 SCx->CR3_b.RETRYENn = retry_en;
705 SCx->CR3_b.SCnINPOL = In_pol;
730 SCx->CR3_b.RXCNTENn = RxCnt_en;
752 SCx->CR3_b.RXBLENn = blk_len;
779 SCx->IFSR = ( 1 <<
Status );
794 return ( SCx->IFSR );
807 return SCx->IFSR_b.RXBUSYn;
819 return SCx->CR2_b.SCnINST;
831 if( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk )
894 uint32_t bToSend, bSent, timeOut;
895 uint8_t* pChar = txbuf;
913 timeOut = SCn_BLOCKING_TIMEOUT;
914 while( !( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk ) )
941 if( !( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk ) )
979 uint32_t bToRecv, bRecv, timeOut;
980 uint8_t* pChar = rxbuf;
992 timeOut = SCn_BLOCKING_TIMEOUT;
993 while( !( SCx->IFSR & SCn_IFSR_RXCIFLAGn_Msk ) )
1023 if( !( SCx->IFSR & SCn_IFSR_RXCIFLAGn_Msk ) )
uint32_t HAL_SC_Transmit(SCn_Type *SCx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via SCn peripheral.
uint8_t HAL_SC_ReceiveByte(SCn_Type *SCx)
Receive a single data from SCn peripheral.
SCn_DATA_BIT_Type Databits
void HAL_SCU_Peripheral_EnableClock2(uint32_t u32PeriClk2, uint32_t u32Ind)
Set Each Peripheral Clock.
HAL_Status_Type HAL_SC_ClearStatus(SCn_Type *SCx, SCn_STATUS_Type Status)
Clear Status register in SCn peripheral.
HAL_Status_Type HAL_SC_Init(SCn_Type *SCx, SCn_CFG_Type *SCx_ConfigStruct)
Initialize the SCn peripheral with the specified parameters.
SCn_OVR_SAMP_Type Oversampling
uint32_t Extra_guard_time
HAL_Status_Type HAL_SC_ConfigStructInit(SCn_CFG_Type *SCn_Config, SCn_OPMODE_Type mode, uint32_t Baudrate)
Fills each SCn_Config member with its default value:
HAL_Status_Type HAL_SC_TransmitByte(SCn_Type *SCx, uint8_t Data)
Transmit a single data through SCn peripheral.
uint32_t HAL_SC_GetStatus(SCn_Type *SCx)
Get current value of Status register in SCn peripheral.
HAL_Status_Type HAL_SC_RxCntEnable(SCn_Type *SCx, SCn_RXCNT_EN_DISABLE RxCnt_en)
SCn Receive Byte Count Enable.
HAL_Status_Type HAL_SC_Enable(SCn_Type *SCx, FunctionalState state)
SCn enable control.
Contains all macro definitions and function prototypes support for scn firmware library on A31L12x.
HAL_Status_Type HAL_SC_DeInit(SCn_Type *SCx)
Deinitialize the SCn peripheral registers to their default reset values.
HAL_Status_Type HAL_SC_ConfigInterrupt(SCn_Type *SCx, SCn_INT_Type SCn_IntCfg, FunctionalState NewState)
Configure the interrupt source of selected SCn peripheral.
FlagStatus HAL_SC_CheckBusy(SCn_Type *SCx)
Check whether if SCn is busy or not.
uint32_t HAL_SC_Receive(SCn_Type *SCx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via SCn peripheral.
uint32_t Baud_rate_Compensation
HAL_Status_Type HAL_SC_AutoConvDet(SCn_Type *SCx)
SCn Auto Convention Detection.
HAL_Status_Type HAL_SC_ControlConfig(SCn_Type *SCx, SCn_CR1_CONTROL_Type Mode, FunctionalState NewState)
Configure Control mode for SCn peripheral.
HAL_Status_Type HAL_SC_AutoWarmRst(SCn_Type *SCx)
SCn Auto Warm Reset.
HAL_Status_Type HAL_SC_SetRxBlkLen(SCn_Type *SCx, uint8_t blk_len)
SCn Rx block length set with the specified parameters.
HAL_Status_Type HAL_SC_SetConv(SCn_Type *SCx, SCn_CONV_Type conv_sel)
SCn Convention Selection.
uint8_t HAL_SC_GetSCnINST(SCn_Type *SCx)
Get the SCnIN Pin Status.
SCn_STOP_BIT_Type Stopbits
HAL_Status_Type HAL_SC_SetRxTimeOutData(SCn_Type *SCx, uint32_t RxTimeOutD)
SCn Receive Time Out Data Register Set.
HAL_Status_Type HAL_SC_SetT34DR(SCn_Type *SCx, uint32_t SCnT3data, uint32_t SCnT4data)
SCn T3DR and T4DR Registers Set.
HAL_Status_Type HAL_SC_SetInPol(SCn_Type *SCx, SCn_INPUT_POLARITY_Type In_pol)
SCn Input Pin Polarity Set.
HAL_Status_Type HAL_SC_SetLevel(SCn_Type *SCx, SCn_CR2_LEVEL_POS SelectPin, SetState SetLevel)
Set Level for SCn peripheral when Smartcard Interface Mode.
HAL_Status_Type HAL_SC_ConfigRetry(SCn_Type *SCx, uint8_t retry_num, SCn_DTIME_Type retry_dly)
SCn Retry Configuration with the specified parameters.
SCn_PARITY_BIT_Type Parity
void HAL_SCU_Peripheral_SetReset2(uint32_t u32EachPeri2)
Set/Reset Each Peripheral Block Reset of PPRST2 Register.
HAL_Status_Type HAL_SC_RetryEnable(SCn_Type *SCx, SCn_RETRY_EN_DISABLE retry_en)
SCn Retry Enable.
HAL_Status_Type HAL_SC_AutoAct(SCn_Type *SCx)
SCn Auto Activation and Cold Reset.
HAL_Status_Type HAL_SC_AutoDeAct(SCn_Type *SCx)
SCn Auto Deactivation.
SCn_PARITY_EN_DISABLE ParityEnDis
static void sc_set_divisors(SCn_Type *SCx, uint32_t mode, uint32_t value, uint32_t baudrate, uint32_t ovrsamp)
Determines best dividers to get a target clock rate.
Contains all macro definitions and function prototypes support for scu firmware library on A31L12x.
uint8_t HAL_SC_GetRxLineBusy(SCn_Type *SCx)
Get the Rx Line Busy bit.
HAL_Status_Type HAL_SC_SetExGuardTime(SCn_Type *SCx, uint32_t TxExGuardTime)
SCn Transmit Extra Guard Time Register Set.