A31L12x F/W Packages  1.4.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31L12x_hal_cmpn.h
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1 /***************************************************************************//****************************************************************************/
34 
35 #ifndef _CMPn_H_
36 #define _CMPn_H_
37 
38 #include "A31L12x.h"
39 #include "A31L12x_hal_aa_types.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 //******************************************************************************
46 // Constant
47 //******************************************************************************
48 
49 // CMPn_CR_CMPnEN
50 #define CMPnEN_Disable CMPn_CR_CMPnEN_Disable
51 #define CMPnEN_Enable CMPn_CR_CMPnEN_Enable
52 
53 // CMPn_CR_CMPnNEG
54 #define CMPnNEG_CPnN0 CMPn_CR_CMPnNEG_CPnN0
55 #define CMPnNEG_CPnN1 CMPn_CR_CMPnNEG_CPnN1
56 #define CMPnNEG_CPnN2 CMPn_CR_CMPnNEG_CPnN2
57 #define CMPnNEG_CPnN3 CMPn_CR_CMPnNEG_CPnN3
58 #define CMPnNEG_IntRef CMPn_CR_CMPnNEG_IntRef
59 
60 // CMPn_CR_CMPnPOS
61 #define CMPnPOS_CPnP0 CMPn_CR_CMPnPOS_CPnP0
62 #define CMPnPOS_CPnP1 CMPn_CR_CMPnPOS_CPnP1
63 #define CMPnPOS_CPnP2 CMPn_CR_CMPnPOS_CPnP2
64 #define CMPnPOS_CPnP3 CMPn_CR_CMPnPOS_CPnP3
65 #define CMPnPOS_CPnP4 CMPn_CR_CMPnPOS_CPnP4
66 #define CMPnPOS_CPnP5 CMPn_CR_CMPnPOS_CPnP5
67 
68 // CMPn_CR_HYSnEN
69 #define HYSnEN_Disable CMPn_CR_HYSnEN_Disable
70 #define HYSnEN_Enable CMPn_CR_HYSnEN_Enable
71 
72 // CMPn_CR_CMPnSPD
73 #define CMPnSPD_Slow CMPn_CR_CMPnSPD_Slow
74 #define CMPnSPD_Fast CMPn_CR_CMPnSPD_Fast
75 
76 // CMPn_CR_CMPnPOL
77 #define CMPnPOL_NoInterrupt CMPn_CR_CMPnPOL_NoInterrupt
78 #define CMPnPOL_FallingEdge CMPn_CR_CMPnPOL_FallingEdge
79 #define CMPnPOL_RisingEdge CMPn_CR_CMPnPOL_RisingEdge
80 #define CMPnPOL_BothEdge CMPn_CR_CMPnPOL_BothEdge
81 
82 // CMPn_CR_NFCKn
83 #define NFCKn_PCLK1 CMPn_CR_NFCKn_PCLK1
84 #define NFCKn_PCLK2 CMPn_CR_NFCKn_PCLK2
85 #define NFCKn_PCLK4 CMPn_CR_NFCKn_PCLK4
86 #define NFCKn_PCLK8 CMPn_CR_NFCKn_PCLK8
87 #define NFCKn_PCLK16 CMPn_CR_NFCKn_PCLK16
88 #define NFCKn_PCLK32 CMPn_CR_NFCKn_PCLK32
89 #define NFCKn_PCLK64 CMPn_CR_NFCKn_PCLK64
90 
91 // CMPn_SR_CMPnIFLAG
92 #define CMPnIFLAG_NoRequest CMPn_SR_CMPnIFLAG_NoRequest
93 #define CMPnIFLAG_Request CMPn_SR_CMPnIFLAG_Request
94 
95 // CMPn_SR_CMPnST
96 #define CMPnST_Low CMPn_SR_CMPnST_Low
97 #define CMPnST_High CMPn_SR_CMPnST_High
98 
99 // CMPn_RCR_REFnEN
100 #define REFnEN_Disable CMPn_RCR_REFnEN_Disable
101 #define REFnEN_Enable CMPn_RCR_REFnEN_Enable
102 
103 // CMPn_RCR_CMPnREF
104 #define CMPnREF_2over11VDD CMPn_RCR_CMPnREF_2over11VDD
105 #define CMPnREF_3over11VDD CMPn_RCR_CMPnREF_3over11VDD
106 #define CMPnREF_4over11VDD CMPn_RCR_CMPnREF_4over11VDD
107 #define CMPnREF_5over11VDD CMPn_RCR_CMPnREF_5over11VDD
108 #define CMPnREF_6over11VDD CMPn_RCR_CMPnREF_6over11VDD
109 #define CMPnREF_7over11VDD CMPn_RCR_CMPnREF_7over11VDD
110 #define CMPnREF_8over11VDD CMPn_RCR_CMPnREF_8over11VDD
111 #define CMPnREF_9over11VDD CMPn_RCR_CMPnREF_9over11VDD
112 
113 //******************************************************************************
114 // Function
115 //******************************************************************************
116 
117 HAL_Status_Type HAL_COMP_Init( CMPn_Type* CMPx );
118 HAL_Status_Type HAL_COMP_Deinit( CMPn_Type* CMPx );
119 
120 HAL_Status_Type HAL_COMP_ConfigPositiveInput( CMPn_Type* CMPx, CMPn_CR_CMPnPOS_Enum PositiveInputPin );
121 HAL_Status_Type HAL_COMP_ConfigNegativeInput( CMPn_Type* CMPx, CMPn_CR_CMPnNEG_Enum NegativeInputPin );
122 HAL_Status_Type HAL_COMP_ConfigHysteresis( CMPn_Type* CMPx, CMPn_CR_HYSnEN_Enum ControlValue );
123 HAL_Status_Type HAL_COMP_ConfigSpeed( CMPn_Type* CMPx, CMPn_CR_CMPnSPD_Enum Speed );
124 HAL_Status_Type HAL_COMP_ConfigNoiseFilter( CMPn_Type* CMPx, CMPn_CR_NFCKn_Enum SamplingClock );
125 HAL_Status_Type HAL_COMP_ConfigInterruptPolarity( CMPn_Type* CMPx, CMPn_CR_CMPnPOL_Enum Polarity );
126 HAL_Status_Type HAL_COMP_ConfigIntRef( CMPn_Type* CMPx, CMPn_RCR_REFnEN_Enum ControlValue, CMPn_RCR_CMPnREF_Enum RefVoltage );
127 HAL_Status_Type HAL_COMP_Enable( CMPn_Type* CMPx );
128 HAL_Status_Type HAL_COMP_Disable( CMPn_Type* CMPx );
129 HAL_Status_Type HAL_COMP_ClearStatus( CMPn_Type* CMPx, uint32_t mask );
130 uint32_t HAL_COMP_GetStatus( CMPn_Type* CMPx );
131 
132 #ifdef __cplusplus
133 }
134 #endif
135 
136 #endif /* _CMPn_H_ */
137 
HAL_Status_Type HAL_COMP_ConfigPositiveInput(CMPn_Type *CMPx, CMPn_CR_CMPnPOS_Enum PositiveInputPin)
Select the positive input pin of a comparator.
HAL_Status_Type HAL_COMP_ConfigIntRef(CMPn_Type *CMPx, CMPn_RCR_REFnEN_Enum ControlValue, CMPn_RCR_CMPnREF_Enum RefVoltage)
Control the reference voltage generator and select the reference voltage.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
HAL_Status_Type HAL_COMP_ConfigHysteresis(CMPn_Type *CMPx, CMPn_CR_HYSnEN_Enum ControlValue)
Control the hysteresis function.
HAL_Status_Type
HAL_Status_Type HAL_COMP_ConfigInterruptPolarity(CMPn_Type *CMPx, CMPn_CR_CMPnPOL_Enum Polarity)
Select the interrupt trigger polarity.
HAL_Status_Type HAL_COMP_ConfigNegativeInput(CMPn_Type *CMPx, CMPn_CR_CMPnNEG_Enum NegativeInputPin)
Select the negative input pin of a comparator.
HAL_Status_Type HAL_COMP_ConfigNoiseFilter(CMPn_Type *CMPx, CMPn_CR_NFCKn_Enum SamplingClock)
Select the sampling clock of a noise filter.
HAL_Status_Type HAL_COMP_Init(CMPn_Type *CMPx)
Initialize the target peripheral.
uint32_t HAL_COMP_GetStatus(CMPn_Type *CMPx)
Get the Status Register.
HAL_Status_Type HAL_COMP_Deinit(CMPn_Type *CMPx)
Deinitialize the target peripheral.
HAL_Status_Type HAL_COMP_ConfigSpeed(CMPn_Type *CMPx, CMPn_CR_CMPnSPD_Enum Speed)
Select the speed of a comparator.
HAL_Status_Type HAL_COMP_ClearStatus(CMPn_Type *CMPx, uint32_t mask)
Clear the Status Register.
HAL_Status_Type HAL_COMP_Enable(CMPn_Type *CMPx)
Enable the comparator function.
HAL_Status_Type HAL_COMP_Disable(CMPn_Type *CMPx)
Disable the comparator function.