A31L12x F/W Packages  1.4.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31L12x_hal_spin.h
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1 /***************************************************************************//****************************************************************************/
34 
35 #ifndef _SPIn_H_
36 #define _SPIn_H_
37 
38 #include "A31L12x.h"
39 #include "A31L12x_hal_aa_types.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 //******************************************************************************
46 // Constant
47 //******************************************************************************
48 
49 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
53 #define SPIn_BLOCKING_TIMEOUT 0xffffuL // (0xFFFFFFFFuL)
54 
55 // SPIn Operation Control
56 #define SPInEN_Disable (SPIn_CR_SPInEN_Disable << SPIn_CR_SPInEN_Pos)
57 #define SPInEN_Enable (SPIn_CR_SPInEN_Enable << SPIn_CR_SPInEN_Pos)
58 
59 // Data Transmission sequence selection Control
60 #define FLSBn_msbFirst (SPIn_CR_FLSBn_msbFirst << SPIn_CR_FLSBn_Pos)
61 #define FLSBn_lsbFirst (SPIn_CR_FLSBn_lsbFirst << SPIn_CR_FLSBn_Pos)
62 
63 // Master/Slave Selection Control
64 #define SPInMS_Slave (SPIn_CR_SPInMS_Slave << SPIn_CR_SPInMS_Pos)
65 #define SPInMS_Master (SPIn_CR_SPInMS_Master << SPIn_CR_SPInMS_Pos)
66 
67 // Clock Polarity Selection Control
68 #define CPOLn_IdleLow (SPIn_CR_CPOLn_IdleLow << SPIn_CR_CPOLn_Pos)
69 #define CPOLn_IdleHigh (SPIn_CR_CPOLn_IdleHigh << SPIn_CR_CPOLn_Pos)
70 
71 // Clock Phase Selection Control
72 #define CPHAn_StartIdle (SPIn_CR_CPHAn_StartIdle << SPIn_CR_CPHAn_Pos)
73 #define CPHAn_StartInverted (SPIn_CR_CPHAn_StartInverted << SPIn_CR_CPHAn_Pos)
74 
75 //******************************************************************************
76 // Type
77 //******************************************************************************
78 
79 //==============================================================================
80 // Enumeration
81 //==============================================================================
82 
83 typedef enum
84 {
88 
89 typedef enum
90 {
94 
95 typedef enum
96 {
100 
101 typedef enum
102 {
107 
108 typedef enum
109 {
112 
113 typedef enum
114 {
116 } SPIn_INT_Type;
117 
118 //==============================================================================
119 // Structure
120 //==============================================================================
121 
122 typedef struct
123 {
124  uint32_t Baudrate;
126  SPIn_ACK_Type ACK; // CPOLn
128 } SPIn_CFG_Type;
129 
130 //******************************************************************************
131 // Function
132 //******************************************************************************
133 
134 HAL_Status_Type HAL_SPIn_Init( SPIn_Type* SPIx, SPIn_CFG_Type* SPIn_Config );
135 HAL_Status_Type SPIn_DeInit( SPIn_Type* SPIx );
136 
138 HAL_Status_Type SPIn_ConfigInterrupt( SPIn_Type* SPIx, SPIn_INT_Type SPIn_IntCfg, FunctionalState NewState );
140 HAL_Status_Type SPIn_Enable( SPIn_Type* SPIx, FunctionalState state );
142 uint8_t SPIn_GetStatus( SPIn_Type* SPIx );
143 
144 HAL_Status_Type SPIn_SendByte( SPIn_Type* SPIx, uint8_t Data );
145 uint8_t SPIn_ReceiveByte( SPIn_Type* SPIx );
146 uint32_t SPIn_Send( SPIn_Type* SPIx, uint8_t* txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag );
147 uint32_t SPIn_Receive( SPIn_Type* SPIx, uint8_t* rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag );
148 
149 #ifdef __cplusplus
150 }
151 #endif
152 
153 #endif /* _SPIn_H_ */
154 
HAL_Status_Type SPIn_ClearStatus(SPIn_Type *SPIx, SPIn_STATUS_Type Status)
This function clears the flag bit of Status Register.
SPIn_INT_Type
HAL_Status_Type SPIn_ConfigInterrupt(SPIn_Type *SPIx, SPIn_INT_Type SPIn_IntCfg, FunctionalState NewState)
Configure the interrupt source of selected SPIn peripheral.
SPIn_ACK_Type
uint8_t SPIn_GetStatus(SPIn_Type *SPIx)
This function returns the current value of Status Register.
SPIn_STATUS_Type
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
uint8_t SPIn_ReceiveByte(SPIn_Type *SPIx)
Receive a single data from SPIn peripheral.
HAL_Status_Type SPIn_Enable(SPIn_Type *SPIx, FunctionalState state)
SPIn enable control.
HAL_Status_Type SPIn_ConfigStructInit(SPIn_CFG_Type *SPIn_Config)
Fills each SPIn_CFG_Type structure member with its default value:
SPIn_SPI_ORDER_Type
HAL_Status_Type
SPIn_CONTROL_Type
uint32_t SPIn_Receive(SPIn_Type *SPIx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via SPIn peripheral.
HAL_Status_Type SPIn_DataControlConfig(SPIn_Type *SPIx, SPIn_CONTROL_Type Mode, FunctionalState NewState)
Configure Data Control mode for SPIn peripheral.
SPIn_ACK_Type ACK
FunctionalState
TRANSFER_BLOCK_Type
SPIn_EDGE_Type
HAL_Status_Type SPIn_SendByte(SPIn_Type *SPIx, uint8_t Data)
Transmit a single data through SPIn peripheral.
uint32_t SPIn_Send(SPIn_Type *SPIx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via SPIn peripheral.
HAL_Status_Type HAL_SPIn_Init(SPIn_Type *SPIx, SPIn_CFG_Type *SPIn_Config)
Initialize the SPIn peripheral with the specified parameters.
SPIn_EDGE_Type Edge
SPIn_SPI_ORDER_Type Order
HAL_Status_Type SPIn_DeInit(SPIn_Type *SPIx)
Deinitialize the SPIn peripheral registers to their default reset values.