A31L12x F/W Packages  1.4.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
Data Structures | Enumerations | Functions
A31L12x_hal_lpuart.h File Reference

Contains all macro definitions and function prototypes support for lpuart firmware library on A31L12x. More...

Go to the source code of this file.

Data Structures

struct  LPUART_CFG_Type
 

Enumerations

enum  LPUART_OVER_SAMPLING_Type { LPUART_OVRS_16 = 0, LPUART_OVRS_8, LPUART_OVRS_1 }
 
enum  LPUART_DATA_BIT_Type { LPUART_DATA_BIT_5 = 0, LPUART_DATA_BIT_6, LPUART_DATA_BIT_7, LPUART_DATA_BIT_8 }
 
enum  LPUART_PARITY_BIT_Type {
  LPUART_PARITY_BIT_NONE = 0, LPUART_PARITY_BIT_ODD = 4, LPUART_PARITY_BIT_EVEN, LPUART_PARITY_BIT_SP0 = 6,
  LPUART_PARITY_BIT_SP1
}
 
enum  LPUART_STOP_BIT_Type { LPUART_STOP_BIT_1 = 0, LPUART_STOP_BIT_2 }
 
enum  LPUART_CONTROL_Type {
  LPUART_CONTROL_PEN = 0, LPUART_CONTROL_STKPEN, LPUART_CONTROL_PSEL, LPUART_CONTROL_STOPB,
  LPUART_CONTROL_HDCOM, LPUART_CONTROL_TXE, LPUART_CONTROL_RXE, LPUART_CONTROL_WAKEN,
  LPUART_CONTROL_LPUEN, LPUART_CONTROL_DEPOL, LPUART_CONTROL_DEPEN, LPUART_CONTROL_RCDEN,
  LPUART_CONTROL_RTOEN
}
 
enum  LPUART_INT_Type {
  LPUART_INTCFG_RXCIEN = 0, LPUART_INTCFG_TXCIEN, LPUART_INTCFG_SBDIEN, LPUART_INTCFG_RTOIEN,
  LPUART_INTCFG_RCDIEN
}
 
enum  LPUART_STATUS_Type {
  LPUART_STATUS_RXCIFLAG = 0, LPUART_STATUS_TXCIFLAG, LPUART_STATUS_SBDIFLAG, LPUART_STATUS_RTOIFLAG,
  LPUART_STATUS_RCDIFLAG, LPUART_STATUS_RXBUSY, LPUART_STATUS_PE, LPUART_STATUS_FE,
  LPUART_STATUS_DOR
}
 

Functions

HAL_Status_Type HAL_LPUART_Init (LPUART_CFG_Type *LPUART_Config)
 Initialize the LPUART peripheral with the specified parameters. More...
 
HAL_Status_Type HAL_LPUART_DeInit (void)
 Deinitialize the LPUART peripheral registers to their default reset values. More...
 
HAL_Status_Type HAL_LPUART_ConfigStructInit (LPUART_CFG_Type *LPUART_Config)
 Fills each LPUART_Config member with its default value: More...
 
HAL_Status_Type HAL_LPUART_ConfigInterrupt (LPUART_INT_Type LPUART_IntCfg, FunctionalState NewState)
 Configure the interrupt source of selected LPUART peripheral. More...
 
HAL_Status_Type HAL_LPUART_DataControlConfig (LPUART_CONTROL_Type Mode, FunctionalState NewState)
 Configure Data Control mode for LPUART peripheral. More...
 
HAL_Status_Type HAL_LPUART_Enable (FunctionalState state)
 LPUART enable control. More...
 
HAL_Status_Type HAL_LPUART_ClearStatus (LPUART_STATUS_Type Status)
 This function clears Interrupt Flag and Status Register. More...
 
uint8_t HAL_LPUART_GetStatus (void)
 This function returns the current value of Interrupt Flag and Status Register. More...
 
HAL_Status_Type HAL_LPUART_TransmitByte (uint8_t Data)
 Transmit a single data through USART peripheral. More...
 
uint8_t HAL_LPUART_ReceiveByte (void)
 Receive a single data from USART peripheral. More...
 
uint32_t HAL_LPUART_Transmit (uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
 Send a block of data via LPUART peripheral. More...
 
uint32_t HAL_LPUART_Receive (uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
 Receive a block of data via LPUART peripheral. More...
 

Detailed Description

Contains all macro definitions and function prototypes support for lpuart firmware library on A31L12x.

Version
1.00
Date
2020-05-29
Author
ABOV Application Team

Copyright(C) 2019, ABOV Semiconductor All rights reserved.

ABOV Disclaimer

IMPORTANT NOTICE ? PLEASE READ CAREFULLY ABOV Semiconductor ("ABOV") reserves the right to make changes, corrections, enhancements, modifications, and improvements to ABOV products and/or to this document at any time without notice. ABOV does not give warranties as to the accuracy or completeness of the information included herein. Purchasers should obtain the latest relevant information of ABOV products before placing orders. Purchasers are entirely responsible for the choice, selection, and use of ABOV products and ABOV assumes no liability for application assistance or the design of purchasers' products. No license, express or implied, to any intellectual property rights is granted by ABOV herein. ABOV disclaims all express and implied warranties and shall not be responsible or liable for any injuries or damages related to use of ABOV products in such unauthorized applications. ABOV and the ABOV logo are trademarks of ABOV. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces the information previously supplied in any former versions of this document. 2020 ABOV Semiconductor All rights reserved

Definition in file A31L12x_hal_lpuart.h.

Enumeration Type Documentation

◆ LPUART_CONTROL_Type

Enumerator
LPUART_CONTROL_PEN 
LPUART_CONTROL_STKPEN 
LPUART_CONTROL_PSEL 
LPUART_CONTROL_STOPB 
LPUART_CONTROL_HDCOM 
LPUART_CONTROL_TXE 
LPUART_CONTROL_RXE 
LPUART_CONTROL_WAKEN 
LPUART_CONTROL_LPUEN 
LPUART_CONTROL_DEPOL 
LPUART_CONTROL_DEPEN 
LPUART_CONTROL_RCDEN 
LPUART_CONTROL_RTOEN 

Definition at line 93 of file A31L12x_hal_lpuart.h.

◆ LPUART_DATA_BIT_Type

Enumerator
LPUART_DATA_BIT_5 
LPUART_DATA_BIT_6 
LPUART_DATA_BIT_7 
LPUART_DATA_BIT_8 

Definition at line 70 of file A31L12x_hal_lpuart.h.

◆ LPUART_INT_Type

Enumerator
LPUART_INTCFG_RXCIEN 
LPUART_INTCFG_TXCIEN 
LPUART_INTCFG_SBDIEN 
LPUART_INTCFG_RTOIEN 
LPUART_INTCFG_RCDIEN 

Definition at line 113 of file A31L12x_hal_lpuart.h.

◆ LPUART_OVER_SAMPLING_Type

Enumerator
LPUART_OVRS_16 
LPUART_OVRS_8 
LPUART_OVRS_1 

Definition at line 63 of file A31L12x_hal_lpuart.h.

◆ LPUART_PARITY_BIT_Type

Enumerator
LPUART_PARITY_BIT_NONE 
LPUART_PARITY_BIT_ODD 
LPUART_PARITY_BIT_EVEN 
LPUART_PARITY_BIT_SP0 
LPUART_PARITY_BIT_SP1 

Definition at line 78 of file A31L12x_hal_lpuart.h.

79 {
80  LPUART_PARITY_BIT_NONE = 0, // [PEN:STKPEN:PSEL] = [0:0:0]
81  LPUART_PARITY_BIT_ODD = 4, // [PEN:STKPEN:PSEL] = [1:0:0]
82  LPUART_PARITY_BIT_EVEN, // [PEN:STKPEN:PSEL] = [1:0:1]
83  LPUART_PARITY_BIT_SP0 = 6, // [PEN:STKPEN:PSEL] = [1:1:0]
84  LPUART_PARITY_BIT_SP1 // [PEN:STKPEN:PSEL] = [1:1:1]
LPUART_PARITY_BIT_Type

◆ LPUART_STATUS_Type

Enumerator
LPUART_STATUS_RXCIFLAG 
LPUART_STATUS_TXCIFLAG 
LPUART_STATUS_SBDIFLAG 
LPUART_STATUS_RTOIFLAG 
LPUART_STATUS_RCDIFLAG 
LPUART_STATUS_RXBUSY 
LPUART_STATUS_PE 
LPUART_STATUS_FE 
LPUART_STATUS_DOR 

Definition at line 122 of file A31L12x_hal_lpuart.h.

◆ LPUART_STOP_BIT_Type

Enumerator
LPUART_STOP_BIT_1 
LPUART_STOP_BIT_2 

Definition at line 87 of file A31L12x_hal_lpuart.h.

Function Documentation

◆ HAL_LPUART_ClearStatus()

HAL_Status_Type HAL_LPUART_ClearStatus ( LPUART_STATUS_Type  Status)

This function clears Interrupt Flag and Status Register.

Parameters
[in]Status
  • LPUART_STATUS_RXCIFLAG
  • LPUART_STATUS_TXCIFLAG
  • LPUART_STATUS_SBDIFLAG
  • LPUART_STATUS_RTOIFLAG
  • LPUART_STATUS_RCDIFLAG
  • LPUART_STATUS_RXBUSY
  • LPUART_STATUS_PE
  • LPUART_STATUS_FE
  • LPUART_STATUS_DOR
Returns
HAL_Status_Type

Definition at line 361 of file A31L12x_hal_lpuart.c.

362 {
363  uint32_t reg;
364 
365  reg = LPUART->IFSR;
366 
367  switch( Status )
368  {
370  reg |= LPUART_IFSR_RXCIFLAG_Msk;
371  break;
373  reg |= LPUART_IFSR_TXCIFLAG_Msk;
374  break;
376  reg |= LPUART_IFSR_SBDIFLAG_Msk;
377  break;
379  reg |= LPUART_IFSR_RTOIFLAG_Msk;
380  break;
382  reg |= LPUART_IFSR_RCDIFLAG_Msk;
383  break;
385  reg |= LPUART_IFSR_RXBUSY_Msk;
386  break;
387  case LPUART_STATUS_PE:
388  reg |= LPUART_IFSR_PE_Msk;
389  break;
390  case LPUART_STATUS_FE:
391  reg |= LPUART_IFSR_FE_Msk;
392  break;
393  case LPUART_STATUS_DOR:
394  reg |= LPUART_IFSR_DOR_Msk;
395  break;
396  default:
397  return HAL_ERROR;
398  }
399 
400  LPUART->IFSR = reg;
401 
402  return HAL_OK;
403 }

References HAL_ERROR, HAL_OK, LPUART_STATUS_DOR, LPUART_STATUS_FE, LPUART_STATUS_PE, LPUART_STATUS_RCDIFLAG, LPUART_STATUS_RTOIFLAG, LPUART_STATUS_RXBUSY, LPUART_STATUS_RXCIFLAG, LPUART_STATUS_SBDIFLAG, and LPUART_STATUS_TXCIFLAG.

Referenced by HAL_LPUART_Transmit().

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◆ HAL_LPUART_ConfigInterrupt()

HAL_Status_Type HAL_LPUART_ConfigInterrupt ( LPUART_INT_Type  LPUART_IntCfg,
FunctionalState  NewState 
)

Configure the interrupt source of selected LPUART peripheral.

Parameters
[in]LPUART_IntCfgSpecifies the interrupt source
  • LPUART_INTCFG_RXCIEN
  • LPUART_INTCFG_TXCIEN
  • LPUART_INTCFG_SBDIEN
  • LPUART_INTCFG_RTOIEN
  • LPUART_INTCFG_RCDIEN
[in]NewStateNext State of Interrupt Operation
  • ENABLE, DISABLE
Returns
HAL_Status_Type

Definition at line 182 of file A31L12x_hal_lpuart.c.

183 {
184  uint32_t mask;
185 
186  // get mask
187  switch( LPUART_IntCfg )
188  {
190  mask = LPUART_IER_RXCIEN_Msk;
191  break;
193  mask = LPUART_IER_TXCIEN_Msk;
194  break;
196  mask = LPUART_IER_SBDIEN_Msk;
197  break;
199  mask = LPUART_IER_RTOIEN_Msk;
200  break;
202  mask = LPUART_IER_RCDIEN_Msk;
203  break;
204 
205  default:
206  return HAL_ERROR;
207  }
208 
209  // enable/disable
210  if( NewState == ENABLE )
211  {
212  LPUART->IER |= mask;
213  }
214  else
215  {
216  LPUART->IER &= ~mask;
217  }
218 
219  return HAL_OK;
220 }

References ENABLE, HAL_ERROR, HAL_OK, LPUART_INTCFG_RCDIEN, LPUART_INTCFG_RTOIEN, LPUART_INTCFG_RXCIEN, LPUART_INTCFG_SBDIEN, and LPUART_INTCFG_TXCIEN.

◆ HAL_LPUART_ConfigStructInit()

HAL_Status_Type HAL_LPUART_ConfigStructInit ( LPUART_CFG_Type LPUART_Config)

Fills each LPUART_Config member with its default value:

  • 38400 bps
  • 8 Data Bit
  • No Parity Bit
  • 1 Stop Bit
    Parameters
    [out]LPUART_ConfigPointer to a LPUART_CFG_Type structure which will be initialized.
    Returns
    HAL_Status_Type

Definition at line 148 of file A31L12x_hal_lpuart.c.

149 {
150  /* Check LPUART_Config */
151  if( LPUART_Config == NULL )
152  {
153  return HAL_ERROR;
154  }
155 
156  LPUART_Config->BaseClock = SystemPeriClock;
157  LPUART_Config->Baudrate = 38400;
158 
159  LPUART_Config->OverSampling = LPUART_OVRS_16;
160 
161  LPUART_Config->DataBit = LPUART_DATA_BIT_8;
162  LPUART_Config->ParityBit = LPUART_PARITY_BIT_NONE;
163  LPUART_Config->StopBit = LPUART_STOP_BIT_1;
164 
165  return HAL_OK;
166 }
LPUART_OVER_SAMPLING_Type OverSampling
LPUART_STOP_BIT_Type StopBit
LPUART_PARITY_BIT_Type ParityBit
LPUART_DATA_BIT_Type DataBit

References LPUART_CFG_Type::BaseClock, LPUART_CFG_Type::Baudrate, LPUART_CFG_Type::DataBit, HAL_ERROR, HAL_OK, LPUART_DATA_BIT_8, LPUART_OVRS_16, LPUART_PARITY_BIT_NONE, LPUART_STOP_BIT_1, LPUART_CFG_Type::OverSampling, LPUART_CFG_Type::ParityBit, and LPUART_CFG_Type::StopBit.

◆ HAL_LPUART_DataControlConfig()

HAL_Status_Type HAL_LPUART_DataControlConfig ( LPUART_CONTROL_Type  Mode,
FunctionalState  NewState 
)

Configure Data Control mode for LPUART peripheral.

Parameters
[in]ModeData Control Mode
  • LPUART_CONTROL_PEN
  • LPUART_CONTROL_STKPEN
  • LPUART_CONTROL_PSEL
  • LPUART_CONTROL_STOPB
  • LPUART_CONTROL_HDCOM
  • LPUART_CONTROL_TXE
  • LPUART_CONTROL_RXE
  • LPUART_CONTROL_WAKEN
  • LPUART_CONTROL_LPUEN
  • LPUART_CONTROL_DEPOL
  • LPUART_CONTROL_DEPEN
  • LPUART_CONTROL_RCDEN
  • LPUART_CONTROL_RTOEN
[in]NewStateNext State of Functional Operation
  • ENABLE, DISABLE
Returns
HAL_Status_Type

Definition at line 244 of file A31L12x_hal_lpuart.c.

245 {
246  uint32_t mask;
247 
248  // CR1
249  if( Mode <= LPUART_CONTROL_LPUEN )
250  {
251  // get mask
252  switch( Mode )
253  {
254  case LPUART_CONTROL_PEN:
255  mask = LPUART_CR1_PEN_Msk;
256  break;
258  mask = LPUART_CR1_STKPEN_Msk;
259  break;
260  case LPUART_CONTROL_PSEL:
261  mask = LPUART_CR1_PSEL_Msk;
262  break;
264  mask = LPUART_CR1_STOPB_Msk;
265  break;
267  mask = LPUART_CR1_HDCOM_Msk;
268  break;
269  case LPUART_CONTROL_TXE:
270  mask = LPUART_CR1_TXE_Msk;
271  break;
272  case LPUART_CONTROL_RXE:
273  mask = LPUART_CR1_RXE_Msk;
274  break;
276  mask = LPUART_CR1_WAKEN_Msk;
277  break;
279  mask = LPUART_CR1_LPUEN_Msk;
280  break;
281 
282  default:
283  return HAL_ERROR;
284  }
285 
286  // enable/disable
287  if( NewState == ENABLE )
288  {
289  LPUART->CR1 |= mask;
290  }
291  else
292  {
293  LPUART->CR1 &= ~mask;
294  }
295  }
296 
297  // CR2
298  if( Mode >= LPUART_CONTROL_DEPOL )
299  {
300  // get mask
301  switch( Mode )
302  {
304  mask = LPUART_CR2_DEPOL_Msk;
305  break;
307  mask = LPUART_CR2_DEPEN_Msk;
308  break;
310  mask = LPUART_CR2_RCDEN_Msk;
311  break;
313  mask = LPUART_CR2_RTOEN_Msk;
314  break;
315 
316  default:
317  return HAL_ERROR;
318  }
319 
320  // enable/disable
321  if( NewState == ENABLE )
322  {
323  LPUART->CR2 |= mask;
324  }
325  else
326  {
327  LPUART->CR2 &= ~mask;
328  }
329  }
330 
331  return HAL_OK;
332 }

References ENABLE, HAL_ERROR, HAL_OK, LPUART_CONTROL_DEPEN, LPUART_CONTROL_DEPOL, LPUART_CONTROL_HDCOM, LPUART_CONTROL_LPUEN, LPUART_CONTROL_PEN, LPUART_CONTROL_PSEL, LPUART_CONTROL_RCDEN, LPUART_CONTROL_RTOEN, LPUART_CONTROL_RXE, LPUART_CONTROL_STKPEN, LPUART_CONTROL_STOPB, LPUART_CONTROL_TXE, and LPUART_CONTROL_WAKEN.

◆ HAL_LPUART_DeInit()

HAL_Status_Type HAL_LPUART_DeInit ( void  )

Deinitialize the LPUART peripheral registers to their default reset values.

Returns
HAL_Status_Type

Definition at line 129 of file A31L12x_hal_lpuart.c.

130 {
131  // reset peripheral and disable peripheral clock
132  HAL_SCU_Peripheral_SetReset2( PPRST2_LPUTRST );
133  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_LPUTCLKE, PPxCLKE_Disable );
134 
135  return HAL_OK;
136 }
void HAL_SCU_Peripheral_EnableClock2(uint32_t u32PeriClk2, uint32_t u32Ind)
Set Each Peripheral Clock.
void HAL_SCU_Peripheral_SetReset2(uint32_t u32EachPeri2)
Set/Reset Each Peripheral Block Reset of PPRST2 Register.

References HAL_OK, HAL_SCU_Peripheral_EnableClock2(), and HAL_SCU_Peripheral_SetReset2().

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◆ HAL_LPUART_Enable()

HAL_Status_Type HAL_LPUART_Enable ( FunctionalState  state)

LPUART enable control.

Parameters
[in]state
  • ENABLE, DISABLE
Returns
HAL_Status_Type

Definition at line 340 of file A31L12x_hal_lpuart.c.

341 {
342  LPUART->CR1_b.LPUEN = state;
343 
344  return HAL_OK;
345 }

References HAL_OK.

◆ HAL_LPUART_GetStatus()

uint8_t HAL_LPUART_GetStatus ( void  )

This function returns the current value of Interrupt Flag and Status Register.

Returns
Current value of Status register in LPUART peripheral.

Definition at line 409 of file A31L12x_hal_lpuart.c.

410 {
411  return LPUART->IFSR;
412 }

◆ HAL_LPUART_Init()

HAL_Status_Type HAL_LPUART_Init ( LPUART_CFG_Type LPUART_Config)

Initialize the LPUART peripheral with the specified parameters.

Parameters
[in]LPUART_ConfigPointer to a LPUART_CFG_Type structure that contains the configuration information for the specified peripheral.
Returns
HAL_Status_Type

Definition at line 94 of file A31L12x_hal_lpuart.c.

95 {
96  /* Check LPUART_Config */
97  if( LPUART_Config == NULL )
98  {
99  return HAL_ERROR;
100  }
101 
102  // enable peripheral clock and reset peripheral
103  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_LPUTCLKE, PPxCLKE_Enable );
104  HAL_SCU_Peripheral_SetReset2( PPRST2_LPUTRST );
105 
106  lpuart_set_divisors( LPUART_Config );
107 
108  LPUART->CR1 = 0
109  | ( LPUART_Config->OverSampling << LPUART_CR1_OVRS_Pos )
110  | ( LPUART_Config->DataBit << LPUART_CR1_DLEN_Pos )
111  | ( LPUART_Config->ParityBit << LPUART_CR1_PSEL_Pos )
112  | ( LPUART_Config->StopBit << LPUART_CR1_STOPB_Pos )
113  | ( 1 << LPUART_CR1_TXE_Pos )
114  | ( 1 << LPUART_CR1_RXE_Pos )
115  ;
116 
117  // dummy read
120 
121  return HAL_OK;
122 }
LPUART_OVER_SAMPLING_Type OverSampling
uint8_t HAL_LPUART_ReceiveByte(void)
Receive a single data from USART peripheral.
void HAL_SCU_Peripheral_EnableClock2(uint32_t u32PeriClk2, uint32_t u32Ind)
Set Each Peripheral Clock.
LPUART_STOP_BIT_Type StopBit
LPUART_PARITY_BIT_Type ParityBit
static void lpuart_set_divisors(LPUART_CFG_Type *LPUART_Config)
Determines best dividers to get a target clock rate.
void HAL_SCU_Peripheral_SetReset2(uint32_t u32EachPeri2)
Set/Reset Each Peripheral Block Reset of PPRST2 Register.
LPUART_DATA_BIT_Type DataBit

References LPUART_CFG_Type::DataBit, HAL_ERROR, HAL_LPUART_ReceiveByte(), HAL_OK, HAL_SCU_Peripheral_EnableClock2(), HAL_SCU_Peripheral_SetReset2(), lpuart_set_divisors(), LPUART_CFG_Type::OverSampling, LPUART_CFG_Type::ParityBit, and LPUART_CFG_Type::StopBit.

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◆ HAL_LPUART_Receive()

uint32_t HAL_LPUART_Receive ( uint8_t *  rxbuf,
uint32_t  buflen,
TRANSFER_BLOCK_Type  flag 
)

Receive a block of data via LPUART peripheral.

Parameters
[out]rxbufPointer to Received buffer
[in]buflenLength of Received buffer
[in]flagFlag mode
  • NONE_BLOCKING
  • BLOCKING
Returns
Number of bytes received
Note
when using LPUART in BLOCKING mode, a time-out condition is used via defined symbol LPUART_BLOCKING_TIMEOUT.

Definition at line 531 of file A31L12x_hal_lpuart.c.

532 {
533  uint32_t bToRecv, bRecv, timeOut;
534  uint8_t* pChar = rxbuf;
535 
536  // init counter
537  bToRecv = buflen;
538  bRecv = 0;
539 
540  // Blocking Mode
541  if( flag == BLOCKING )
542  {
543  while( bToRecv )
544  {
545  // wait until data are received with timeout
546  timeOut = LPUART_BLOCKING_TIMEOUT;
547  while( !( LPUART->IFSR & LPUART_IFSR_RXCIFLAG_Msk ) )
548  {
549  if( timeOut == 0 )
550  {
551  break;
552  }
553  timeOut--;
554  }
555 
556  // if timeout
557  if( timeOut == 0 )
558  {
559  break;
560  }
561 
562  // receive byte
563  ( *pChar++ ) = HAL_LPUART_ReceiveByte();
564 
565  // update counter
566  bToRecv--;
567  bRecv++;
568  }
569  }
570 
571  // Non-Blocking Mode
572  else
573  {
574  while( bToRecv )
575  {
576  // if no data were received
577  if( !( LPUART->IFSR & LPUART_IFSR_RXCIFLAG_Msk ) )
578  {
579  break;
580  }
581 
582  // receive byte
583  ( *pChar++ ) = HAL_LPUART_ReceiveByte();
584 
585  // update counter
586  bRecv++;
587  bToRecv--;
588  }
589  }
590 
591  // return
592  return bRecv;
593 }
uint8_t HAL_LPUART_ReceiveByte(void)
Receive a single data from USART peripheral.

References BLOCKING, and HAL_LPUART_ReceiveByte().

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◆ HAL_LPUART_ReceiveByte()

uint8_t HAL_LPUART_ReceiveByte ( void  )

Receive a single data from USART peripheral.

Returns
Data received

Definition at line 431 of file A31L12x_hal_lpuart.c.

432 {
433  return LPUART->RDR;
434 }

Referenced by HAL_LPUART_Init(), and HAL_LPUART_Receive().

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◆ HAL_LPUART_Transmit()

uint32_t HAL_LPUART_Transmit ( uint8_t *  txbuf,
uint32_t  buflen,
TRANSFER_BLOCK_Type  flag 
)

Send a block of data via LPUART peripheral.

Parameters
[in]txbufPointer to Transmit buffer
[in]buflenLength of Transmit buffer
[in]flagFlag used in LPUART transfer
  • NONE_BLOCKING
  • BLOCKING
Returns
Number of bytes sent.
Note
when using LPUART in BLOCKING mode, a time-out condition is used via defined symbol LPUART_BLOCKING_TIMEOUT.

Definition at line 450 of file A31L12x_hal_lpuart.c.

451 {
452  uint32_t bToSend, bSent, timeOut;
453  uint8_t* pChar = txbuf;
454 
455  // init counter
456  bToSend = buflen;
457  bSent = 0;
458 
459  // Blocking Mode
460  if( flag == BLOCKING )
461  {
462  while( bToSend )
463  {
464  // send byte
465  HAL_LPUART_TransmitByte( *pChar++ );
466 
467  // wait until tx data register is empty with timeout
468  timeOut = LPUART_BLOCKING_TIMEOUT;
469  while( !( LPUART->IFSR & LPUART_IFSR_TXCIFLAG_Msk ) )
470  {
471  if( timeOut == 0 )
472  {
473  break;
474  }
475  timeOut--;
476  }
477 
478  // if timeout
479  if( timeOut == 0 )
480  {
481  break;
482  }
483 
484  // clear flag
486 
487  // update counter
488  bToSend--;
489  bSent++;
490  }
491  }
492 
493  // Non-Blocking Mode
494  else
495  {
496  while( bToSend )
497  {
498  // if tx data register is not empty
499  if( !( LPUART->IFSR & LPUART_IFSR_TXCIFLAG_Msk ) )
500  {
501  break;
502  }
503 
504  // send byte
505  HAL_LPUART_TransmitByte( *pChar++ );
506 
507  // update counter
508  bToSend--;
509  bSent++;
510  }
511  }
512 
513  // return
514  return bSent;
515 }
HAL_Status_Type HAL_LPUART_ClearStatus(LPUART_STATUS_Type Status)
This function clears Interrupt Flag and Status Register.
HAL_Status_Type HAL_LPUART_TransmitByte(uint8_t Data)
Transmit a single data through USART peripheral.

References BLOCKING, HAL_LPUART_ClearStatus(), HAL_LPUART_TransmitByte(), and LPUART_STATUS_TXCIFLAG.

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◆ HAL_LPUART_TransmitByte()

HAL_Status_Type HAL_LPUART_TransmitByte ( uint8_t  Data)

Transmit a single data through USART peripheral.

Parameters
[in]DataData to transmit (must be 8-bit long)
Returns
HAL_Status_Type

Definition at line 420 of file A31L12x_hal_lpuart.c.

421 {
422  LPUART->TDR = Data;
423 
424  return HAL_OK;
425 }

References HAL_OK.

Referenced by HAL_LPUART_Transmit().

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