A31L12x F/W Packages  1.4.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31L12x_hal_scn.c
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1 /***************************************************************************//****************************************************************************/
34 
35 /* Includes ----------------------------------------------------------------- */
36 //******************************************************************************
37 // Include
38 //******************************************************************************
39 
40 #include "A31L12x_hal_scn.h"
41 #include "A31L12x_hal_scu.h"
42 
43 //******************************************************************************
44 // Variable
45 //******************************************************************************
46 
47 uint32_t SCn_BaseClock;
48 
49 /* Public Functions --------------------------------------------------------- */
50 //******************************************************************************
51 // Function
52 //******************************************************************************
53 
54 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
68 static void sc_set_divisors( SCn_Type* SCx, uint32_t mode, uint32_t value, uint32_t baudrate, uint32_t ovrsamp )
69 {
70  uint32_t numerator;
71  uint32_t denominator;
72  uint32_t n;
73  uint32_t bdr;
74 
75  if( ( mode == SCn_SCI_MODE ) && ( value != 0 ) )
76  {
77  n = value * 2 * 16; // bdr = (PCLK / (value * 2 * 16 * baudrate)) - 1
78  }
79  else
80  {
81  n = 16; // bdr = (PCLK / (16 * baudrate)) - 1
82  }
83 
84  if( ovrsamp == SCn_OVR_SAMP_8 )
85  {
86  n >>= 1;
87  }
88 
89  //--------------------------------------
90  // numerator & denominator
91  //
92  // bdr = SCn_BaseClock / n / baudrate - 1
93  //--------------------------------------
94  numerator = SCn_BaseClock;
95  denominator = baudrate;
96 
97  bdr = numerator / n / denominator - 1;
98 
99  SCx->BDR = bdr & 0x0000ffff;
100 }
101 
102 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
112 HAL_Status_Type HAL_SC_Init( SCn_Type* SCx, SCn_CFG_Type* SCx_ConfigStruct )
113 {
114  uint32_t tmp;
115 
116  /* Check SC handle */
117  if( SCx == NULL )
118  {
119  return HAL_ERROR;
120  }
121 
122 #if 1 // supported
123  if( SCx == ( SCn_Type* )SC0 )
124  {
125  // Set up peripheral clock for SC0 module
126  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_SC0CLKE, PPxCLKE_Enable );
127  HAL_SCU_Peripheral_SetReset2( PPRST2_SC0RST );
128  }
129 #endif
130 
131 #if 1 // supported
132  if( SCx == ( SCn_Type* )SC1 )
133  {
134  // Set up peripheral clock for SC1 module
135  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_SC1CLKE, PPxCLKE_Enable );
136  HAL_SCU_Peripheral_SetReset2( PPRST2_SC1RST );
137  }
138 #endif
139 
140  SCn_BaseClock = SystemPeriClock;
141 
142  sc_set_divisors( SCx, SCx_ConfigStruct->Mode, SCx_ConfigStruct->SCI_clock_gen, SCx_ConfigStruct->Baudrate, SCx_ConfigStruct->Oversampling );
143 
144  tmp = 0
145  | ( ( SCx_ConfigStruct->Mode & 0x1 ) << SCn_CR1_SCnMD_Pos )
146  | ( ( SCx_ConfigStruct->ParityEnDis & 0x1 ) << SCn_CR1_PENn_Pos )
147  | ( ( SCx_ConfigStruct->Parity & 0x1 ) << SCn_CR1_PSELn_Pos )
148  | ( ( SCx_ConfigStruct->Databits & 0x3 ) << SCn_CR1_DLENn_Pos )
149  | ( ( SCx_ConfigStruct->Stopbits & 0x1 ) << SCn_CR1_STOPBn_Pos )
150  | ( ( SCx_ConfigStruct->Oversampling & 0x1 ) << SCn_CR1_OVRSn_Pos )
151  | ( 1 << SCn_CR1_TXEn_Pos ) // Tx Enable
152  | ( 1 << SCn_CR1_RXEn_Pos ) // Rx Enable
153  ;
154 
155  SCx->CR1 = tmp;
156  SCx->CR2 = 0
157  | ( ( SCx_ConfigStruct->SCI_clock_gen & SCn_CR2_SCnCLKG_Msk ) << SCn_CR2_SCnCLKG_Pos )
158  ;
159  SCx->BCMP = SCx_ConfigStruct->Baud_rate_Compensation;
160  SCx->EGTR = SCx_ConfigStruct->Extra_guard_time;
161  SCx->T3DR = SCx_ConfigStruct->T3_dur_time;
162  SCx->T4DR = SCx_ConfigStruct->T4_dur_time;
163 
165 
166  //Dummy Read
167  tmp = HAL_SC_ReceiveByte( SCx );
168 
169  return HAL_OK;
170 }
171 
172 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
181 {
182  /* Check SC handle */
183  if( SCx == NULL )
184  {
185  return HAL_ERROR;
186  }
187 
188 #if 1 // supported
189  if( SCx == ( SCn_Type* )SC0 )
190  {
191  // Set up peripheral clock for SC0 module
192  HAL_SCU_Peripheral_SetReset2( PPRST2_SC0RST );
193  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_SC0CLKE, PPxCLKE_Disable );
194  }
195 #endif
196 
197 #if 1 // supported
198  if( SCx == ( SCn_Type* )SC1 )
199  {
200  // Set up peripheral clock for SC1 module
201  HAL_SCU_Peripheral_SetReset2( PPRST2_SC1RST );
202  HAL_SCU_Peripheral_EnableClock2( PPCLKEN2_SC1CLKE, PPxCLKE_Disable );
203  }
204 #endif
205 
206  return HAL_OK;
207 }
208 
209 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
230 {
231  /* Check SCn_Config */
232  if( SCn_Config == NULL )
233  {
234  return HAL_ERROR;
235  }
236 
237  SCn_Config->Mode = mode;
238  if( mode == SCn_UART_MODE )
239  {
240  SCn_Config->ParityEnDis = SCn_PARITY_DISABLE;
241  }
242  else
243  {
244  SCn_Config->ParityEnDis = SCn_PARITY_ENABLE;
245  }
246  SCn_Config->Parity = SCn_PARITY_BIT_EVEN;
247  SCn_Config->Databits = SCn_DATA_BIT_8;
248  SCn_Config->Stopbits = SCn_STOP_BIT_1;
249  SCn_Config->Oversampling = SCn_OVR_SAMP_16;
250  SCn_Config->Baudrate = Baudrate;
251  SCn_Config->SCI_clock_gen = 8; // SCI clock: To be 2MHz @System clock 32MHz
252  SCn_Config->Baud_rate_Compensation = 0x00000010; // Plus compensation @System clock 32MHz
253  SCn_Config->Extra_guard_time = 0; // No extra guard time
254  SCn_Config->T3_dur_time = 10000 - 1; // Initial Reset Assertion Time when SCI mode
255  SCn_Config->T4_dur_time = 40000 - 1; // Initial ATR Receive Time when SCI mode
256 
257  return HAL_OK;
258 }
259 
260 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
284 {
285  uint32_t tmp = 0;
286 
287  /* Check SC handle */
288  if( SCx == NULL )
289  {
290  return HAL_ERROR;
291  }
292 
293  // get mask
294  tmp = ( 1 << SCn_IntCfg );
295 
296  // enable/disable
297  if( NewState == ENABLE )
298  {
299  SCx->IER |= tmp;
300  }
301  else
302  {
303  SCx->IER &= ~tmp;
304  }
305 
306  return HAL_OK;
307 }
308 
309 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
327 {
328  uint32_t tmp;
329 
330  /* Check SC handle */
331  if( SCx == NULL )
332  {
333  return HAL_ERROR;
334  }
335 
336  switch( Mode )
337  {
338  case SCn_CR1_SCIEN:
339  tmp = SCn_CR1_SCInEN_Msk;
340  break;
341  case SCn_CR1_RTOEN:
342  tmp = SCn_CR1_RTOENn_Msk;
343  break;
344  case SCn_CR1_RXE:
345  tmp = SCn_CR1_RXEn_Msk;
346  break;
347  case SCn_CR1_TXE:
348  tmp = SCn_CR1_TXEn_Msk;
349  break;
350  case SCn_CR1_PEN:
351  tmp = SCn_CR1_PENn_Msk;
352  break;
353  }
354 
355  if( NewState == ENABLE )
356  {
357  SCx->CR1 |= tmp;
358  }
359  else
360  {
361  SCx->CR1 &= ~( tmp & SCn_CR1_CONTROL_BITMASK );
362  }
363 
364  return HAL_OK;
365 }
366 
367 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
377 {
378  /* Check SC handle */
379  if( SCx == NULL )
380  {
381  return HAL_ERROR;
382  }
383 
384  if( state == ENABLE )
385  {
386  SCx->CR1 |= ( 1 << SCn_CR1_SCInEN_Pos ); // SCInEN
387  }
388  else
389  {
390  SCx->CR1 &= ~( 1 << SCn_CR1_SCInEN_Pos ); // SCInEN
391  }
392 
393  return HAL_OK;
394 }
395 
396 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
404 {
405  /* Check SC handle */
406  if( SCx == NULL )
407  {
408  return HAL_ERROR;
409  }
410 
411  SCx->CR2_b.ACTENn = ENABLE;
412 
413  return HAL_OK;
414 }
415 
416 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
424 {
425  /* Check SC handle */
426  if( SCx == NULL )
427  {
428  return HAL_ERROR;
429  }
430 
431  SCx->CR2_b.WRENn = ENABLE;
432 
433  return HAL_OK;
434 }
435 
436 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
444 {
445  /* Check SC handle */
446  if( SCx == NULL )
447  {
448  return HAL_ERROR;
449  }
450 
451  SCx->CR2_b.DACTENn = ENABLE;
452 
453  return HAL_OK;
454 }
455 
456 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
466 HAL_Status_Type HAL_SC_SetRxTimeOutData( SCn_Type* SCx, uint32_t RxTimeOutD )
467 {
468  /* Check SC handle */
469  if( SCx == NULL )
470  {
471  return HAL_ERROR;
472  }
473 
474  SCx->RTODR = RxTimeOutD;
475 
476  return HAL_OK;
477 }
478 
479 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
489 HAL_Status_Type HAL_SC_SetExGuardTime( SCn_Type* SCx, uint32_t TxExGuardTime )
490 {
491  /* Check SC handle */
492  if( SCx == NULL )
493  {
494  return HAL_ERROR;
495  }
496 
497  SCx->EGTR = TxExGuardTime;
498 
499  return HAL_OK;
500 }
501 
502 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
515 HAL_Status_Type HAL_SC_SetT34DR( SCn_Type* SCx, uint32_t SCnT3data, uint32_t SCnT4data )
516 {
517  /* Check SC handle */
518  if( SCx == NULL )
519  {
520  return HAL_ERROR;
521  }
522 
523  SCx->T3DR = SCnT3data;
524  SCx->T4DR = SCnT4data;
525 
526  return HAL_OK;
527 }
528 
529 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
547 HAL_Status_Type HAL_SC_SetLevel( SCn_Type* SCx, SCn_CR2_LEVEL_POS SelectPin, SetState SetLevel )
548 {
549  uint32_t tmp;
550 
551  /* Check SC handle */
552  if( SCx == NULL )
553  {
554  return HAL_ERROR;
555  }
556 
557  switch( SelectPin )
558  {
559  case SCn_CR2_CLKEN:
560  tmp = SCn_CR2_SCnCLKEN_Msk;
561  break;
562  case SCn_CR2_CLKLV:
563  tmp = SCn_CR2_SCnCLKLV_Msk;
564  break;
565  case SCn_CR2_DATALV:
566  tmp = SCn_CR2_SCnDATALV_Msk;
567  break;
568  case SCn_CR2_RSTLV:
569  tmp = SCn_CR2_SCnRSTLV_Msk;
570  break;
571  case SCn_CR2_PWRLV:
572  tmp = SCn_CR2_SCnPWRLV_Msk;
573  break;
574  }
575 
576  if( SetLevel == SET )
577  {
578  SCx->CR2 |= tmp;
579  }
580  else
581  {
582  SCx->CR2 &= ~( tmp & SCn_CR2_CONTROL_BITMASK );
583  }
584 
585  return HAL_OK;
586 }
587 
588 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
596 {
597  /* Check SC handle */
598  if( SCx == NULL )
599  {
600  return HAL_ERROR;
601  }
602 
603  SCx->CR3_b.ACONDETn = ENABLE;
604 
605  return HAL_OK;
606 }
607 
608 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
619 HAL_Status_Type HAL_SC_SetConv( SCn_Type* SCx, SCn_CONV_Type conv_sel )
620 {
621  /* Check SC handle */
622  if( SCx == NULL )
623  {
624  return HAL_ERROR;
625  }
626 
627  SCx->CR3_b.CONSELn = conv_sel;
628 
629  return HAL_OK;
630 }
631 
632 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
645 HAL_Status_Type HAL_SC_ConfigRetry( SCn_Type* SCx, uint8_t retry_num, SCn_DTIME_Type retry_dly )
646 {
647  /* Check SC handle */
648  if( SCx == NULL )
649  {
650  return HAL_ERROR;
651  }
652 
653  SCx->CR3_b.RETRYn = retry_num;
654  SCx->CR3_b.DLYRETRYn = retry_dly;
655 
656  return HAL_OK;
657 }
658 
659 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
671 {
672  /* Check SC handle */
673  if( SCx == NULL )
674  {
675  return HAL_ERROR;
676  }
677 
678  SCx->CR3_b.RETRYENn = retry_en;
679 
680  return HAL_OK;
681 }
682 
683 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
696 {
697  /* Check SC handle */
698  if( SCx == NULL )
699  {
700  return HAL_ERROR;
701  }
702 
703  if( In_pol <= SCn_INPUT_POLARITY_BOTH )
704  {
705  SCx->CR3_b.SCnINPOL = In_pol;
706  }
707 
708  return HAL_OK;
709 }
710 
711 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
723 {
724  /* Check SC handle */
725  if( SCx == NULL )
726  {
727  return HAL_ERROR;
728  }
729 
730  SCx->CR3_b.RXCNTENn = RxCnt_en;
731 
732  return HAL_OK;
733 }
734 
735 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
744 HAL_Status_Type HAL_SC_SetRxBlkLen( SCn_Type* SCx, uint8_t blk_len )
745 {
746  /* Check SC handle */
747  if( SCx == NULL )
748  {
749  return HAL_ERROR;
750  }
751 
752  SCx->CR3_b.RXBLENn = blk_len;
753 
754  return HAL_OK;
755 }
756 
757 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
766 {
767  /* Check SC handle */
768  if( SCx == NULL )
769  {
770  return HAL_ERROR;
771  }
772 
774  {
775  SCx->IFSR = SCn_STATUS_ALL_EXCEPT_TXC;
776  }
777  else
778  {
779  SCx->IFSR = ( 1 << Status );
780  }
781 
782  return HAL_OK;
783 }
784 
785 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
792 uint32_t HAL_SC_GetStatus( SCn_Type* SCx )
793 {
794  return ( SCx->IFSR );
795 }
796 
797 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
805 uint8_t HAL_SC_GetRxLineBusy( SCn_Type* SCx )
806 {
807  return SCx->IFSR_b.RXBUSYn;
808 }
809 
810 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
817 uint8_t HAL_SC_GetSCnINST( SCn_Type* SCx )
818 {
819  return SCx->CR2_b.SCnINST;
820 }
821 
822 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
829 FlagStatus HAL_SC_CheckBusy( SCn_Type* SCx )
830 {
831  if( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk )
832  {
833  return RESET;
834  }
835  else
836  {
837  return SET;
838  }
839 }
840 
841 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
850 HAL_Status_Type HAL_SC_TransmitByte( SCn_Type* SCx, uint8_t Data )
851 {
852  /* Check SC handle */
853  if( SCx == NULL )
854  {
855  return HAL_ERROR;
856  }
857 
858  SCx->TDR = Data;
859 
860  return HAL_OK;
861 }
862 
863 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
870 uint8_t HAL_SC_ReceiveByte( SCn_Type* SCx )
871 {
872  return SCx->RDR;
873 }
874 
875 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
892 uint32_t HAL_SC_Transmit( SCn_Type* SCx, uint8_t* txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag )
893 {
894  uint32_t bToSend, bSent, timeOut;
895  uint8_t* pChar = txbuf;
896 
897  // init counter
898  bToSend = buflen;
899  bSent = 0;
900 
901  // Blocking Mode
902  if( flag == BLOCKING )
903  {
904  while( bToSend )
905  {
906  // clear flag
908 
909  // send byte
910  HAL_SC_TransmitByte( SCx, ( *pChar++ ) );
911 
912  // wait until tx is shifted out completely with timeout
913  timeOut = SCn_BLOCKING_TIMEOUT;
914  while( !( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk ) )
915  {
916  if( timeOut == 0 )
917  {
918  break;
919  }
920  timeOut--;
921  }
922 
923  // if timeout
924  if( timeOut == 0 )
925  {
926  break;
927  }
928 
929  // update counter
930  bToSend--;
931  bSent++;
932  }
933  }
934 
935  // Non-Blocking Mode
936  else
937  {
938  while( bToSend )
939  {
940  // if tx is not shifted out completely
941  if( !( SCx->IFSR & SCn_IFSR_TXCIFLAGn_Msk ) )
942  {
943  break;
944  }
945 
946  // send byte
947  HAL_SC_TransmitByte( SCx, ( *pChar++ ) );
949 
950  // update counter
951  bToSend--;
952  bSent++;
953  }
954  }
955 
956  // return
957  return bSent;
958 }
959 
960 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
977 uint32_t HAL_SC_Receive( SCn_Type* SCx, uint8_t* rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag )
978 {
979  uint32_t bToRecv, bRecv, timeOut;
980  uint8_t* pChar = rxbuf;
981 
982  // init counter
983  bToRecv = buflen;
984  bRecv = 0;
985 
986  // Blocking Mode
987  if( flag == BLOCKING )
988  {
989  while( bToRecv )
990  {
991  // wait until data are received with timeout
992  timeOut = SCn_BLOCKING_TIMEOUT;
993  while( !( SCx->IFSR & SCn_IFSR_RXCIFLAGn_Msk ) )
994  {
995  if( timeOut == 0 )
996  {
997  break;
998  }
999  timeOut--;
1000  }
1001 
1002  // if timeout
1003  if( timeOut == 0 )
1004  {
1005  break;
1006  }
1007 
1008  // receive byte
1009  ( *pChar++ ) = HAL_SC_ReceiveByte( SCx );
1010 
1011  // update counter
1012  bToRecv--;
1013  bRecv++;
1014  }
1015  }
1016 
1017  // Non-Blocking Mode
1018  else
1019  {
1020  while( bToRecv )
1021  {
1022  // if no data were received
1023  if( !( SCx->IFSR & SCn_IFSR_RXCIFLAGn_Msk ) )
1024  {
1025  break;
1026  }
1027 
1028  // receive byte
1029  ( *pChar++ ) = HAL_SC_ReceiveByte( SCx );
1030 
1031  // update counter
1032  bRecv++;
1033  bToRecv--;
1034  }
1035  }
1036 
1037  // return
1038  return bRecv;
1039 }
1040 
SCn_OPMODE_Type Mode
uint32_t HAL_SC_Transmit(SCn_Type *SCx, uint8_t *txbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Send a block of data via SCn peripheral.
uint8_t HAL_SC_ReceiveByte(SCn_Type *SCx)
Receive a single data from SCn peripheral.
enum FlagStatus SetState
SCn_DATA_BIT_Type Databits
uint32_t T4_dur_time
uint32_t Baudrate
void HAL_SCU_Peripheral_EnableClock2(uint32_t u32PeriClk2, uint32_t u32Ind)
Set Each Peripheral Clock.
HAL_Status_Type HAL_SC_ClearStatus(SCn_Type *SCx, SCn_STATUS_Type Status)
Clear Status register in SCn peripheral.
HAL_Status_Type HAL_SC_Init(SCn_Type *SCx, SCn_CFG_Type *SCx_ConfigStruct)
Initialize the SCn peripheral with the specified parameters.
SCn_OVR_SAMP_Type Oversampling
SCn_STATUS_Type
HAL_Status_Type
uint32_t Extra_guard_time
HAL_Status_Type HAL_SC_ConfigStructInit(SCn_CFG_Type *SCn_Config, SCn_OPMODE_Type mode, uint32_t Baudrate)
Fills each SCn_Config member with its default value:
HAL_Status_Type HAL_SC_TransmitByte(SCn_Type *SCx, uint8_t Data)
Transmit a single data through SCn peripheral.
uint32_t SCI_clock_gen
uint32_t HAL_SC_GetStatus(SCn_Type *SCx)
Get current value of Status register in SCn peripheral.
HAL_Status_Type HAL_SC_RxCntEnable(SCn_Type *SCx, SCn_RXCNT_EN_DISABLE RxCnt_en)
SCn Receive Byte Count Enable.
SCn_CONV_Type
HAL_Status_Type HAL_SC_Enable(SCn_Type *SCx, FunctionalState state)
SCn enable control.
SCn_INPUT_POLARITY_Type
Contains all macro definitions and function prototypes support for scn firmware library on A31L12x.
SCn_DTIME_Type
HAL_Status_Type HAL_SC_DeInit(SCn_Type *SCx)
Deinitialize the SCn peripheral registers to their default reset values.
SCn_RXCNT_EN_DISABLE
HAL_Status_Type HAL_SC_ConfigInterrupt(SCn_Type *SCx, SCn_INT_Type SCn_IntCfg, FunctionalState NewState)
Configure the interrupt source of selected SCn peripheral.
uint32_t T3_dur_time
FlagStatus HAL_SC_CheckBusy(SCn_Type *SCx)
Check whether if SCn is busy or not.
uint32_t HAL_SC_Receive(SCn_Type *SCx, uint8_t *rxbuf, uint32_t buflen, TRANSFER_BLOCK_Type flag)
Receive a block of data via SCn peripheral.
uint32_t Baud_rate_Compensation
HAL_Status_Type HAL_SC_AutoConvDet(SCn_Type *SCx)
SCn Auto Convention Detection.
SCn_RETRY_EN_DISABLE
SCn_CR1_CONTROL_Type
uint32_t SCn_BaseClock
SCn_INT_Type
SCn_OPMODE_Type
HAL_Status_Type HAL_SC_ControlConfig(SCn_Type *SCx, SCn_CR1_CONTROL_Type Mode, FunctionalState NewState)
Configure Control mode for SCn peripheral.
HAL_Status_Type HAL_SC_AutoWarmRst(SCn_Type *SCx)
SCn Auto Warm Reset.
HAL_Status_Type HAL_SC_SetRxBlkLen(SCn_Type *SCx, uint8_t blk_len)
SCn Rx block length set with the specified parameters.
HAL_Status_Type HAL_SC_SetConv(SCn_Type *SCx, SCn_CONV_Type conv_sel)
SCn Convention Selection.
uint8_t HAL_SC_GetSCnINST(SCn_Type *SCx)
Get the SCnIN Pin Status.
SCn_STOP_BIT_Type Stopbits
HAL_Status_Type HAL_SC_SetRxTimeOutData(SCn_Type *SCx, uint32_t RxTimeOutD)
SCn Receive Time Out Data Register Set.
FunctionalState
TRANSFER_BLOCK_Type
HAL_Status_Type HAL_SC_SetT34DR(SCn_Type *SCx, uint32_t SCnT3data, uint32_t SCnT4data)
SCn T3DR and T4DR Registers Set.
HAL_Status_Type HAL_SC_SetInPol(SCn_Type *SCx, SCn_INPUT_POLARITY_Type In_pol)
SCn Input Pin Polarity Set.
HAL_Status_Type HAL_SC_SetLevel(SCn_Type *SCx, SCn_CR2_LEVEL_POS SelectPin, SetState SetLevel)
Set Level for SCn peripheral when Smartcard Interface Mode.
SCn_CR2_LEVEL_POS
HAL_Status_Type HAL_SC_ConfigRetry(SCn_Type *SCx, uint8_t retry_num, SCn_DTIME_Type retry_dly)
SCn Retry Configuration with the specified parameters.
SCn_PARITY_BIT_Type Parity
void HAL_SCU_Peripheral_SetReset2(uint32_t u32EachPeri2)
Set/Reset Each Peripheral Block Reset of PPRST2 Register.
HAL_Status_Type HAL_SC_RetryEnable(SCn_Type *SCx, SCn_RETRY_EN_DISABLE retry_en)
SCn Retry Enable.
HAL_Status_Type HAL_SC_AutoAct(SCn_Type *SCx)
SCn Auto Activation and Cold Reset.
HAL_Status_Type HAL_SC_AutoDeAct(SCn_Type *SCx)
SCn Auto Deactivation.
SCn_PARITY_EN_DISABLE ParityEnDis
static void sc_set_divisors(SCn_Type *SCx, uint32_t mode, uint32_t value, uint32_t baudrate, uint32_t ovrsamp)
Determines best dividers to get a target clock rate.
Contains all macro definitions and function prototypes support for scu firmware library on A31L12x.
uint8_t HAL_SC_GetRxLineBusy(SCn_Type *SCx)
Get the Rx Line Busy bit.
HAL_Status_Type HAL_SC_SetExGuardTime(SCn_Type *SCx, uint32_t TxExGuardTime)
SCn Transmit Extra Guard Time Register Set.