56 #define IRSEL_RLCD3 (LCD_CR_IRSEL_RLCD3 << LCD_CR_IRSEL_Pos) // RLCD3 : 105/105/80[kohm] @(1/2)/(1/3)/(1/4) bias 57 #define IRSEL_RLCD1 (LCD_CR_IRSEL_RLCD1 << LCD_CR_IRSEL_Pos) // RLCD1 : 10/10/10[kohm] @(1/2)/(1/3)/(1/4) bias 58 #define IRSEL_RLCD2 (LCD_CR_IRSEL_RLCD2 << LCD_CR_IRSEL_Pos) // RLCD2 : 66/66/50[kohm] @(1/2)/(1/3)/(1/4) bias 59 #define IRSEL_RLCD4 (LCD_CR_IRSEL_RLCD4 << LCD_CR_IRSEL_Pos) // RLCD4 : 320/320/240[kohm] @(1/2)/(1/3)/(1/4) bias 70 #define DBS_8D4B (LCD_CR_DBS_8D4B << LCD_CR_DBS_Pos) // 8D4B : 1/8 duty, 1/4 bias 71 #define DBS_6D4B (LCD_CR_DBS_6D4B << LCD_CR_DBS_Pos) // 6D4B : 1/6 duty, 1/4 bias 72 #define DBS_5D3B (LCD_CR_DBS_5D3B << LCD_CR_DBS_Pos) // 5D3B : 1/5 duty, 1/3 bias 73 #define DBS_4D3B (LCD_CR_DBS_4D3B << LCD_CR_DBS_Pos) // 4D3B : 1/4 duty, 1/3 bias 74 #define DBS_3D3B (LCD_CR_DBS_3D3B << LCD_CR_DBS_Pos) // 3D3B : 1/3 duty, 1/3 bias 75 #define DBS_3D2B (LCD_CR_DBS_3D2B << LCD_CR_DBS_Pos) // 3D2B : 1/3 duty, 1/2 bias 84 #define LCLK_128Hz (LCD_CR_LCLK_128Hz << LCD_CR_LCLK_Pos) // 128Hz : 32.768kHz(fLCD) / 256 85 #define LCLK_256Hz (LCD_CR_LCLK_256Hz << LCD_CR_LCLK_Pos) // 256Hz : 32.768kHz(fLCD) / 128 86 #define LCLK_512Hz (LCD_CR_LCLK_512Hz << LCD_CR_LCLK_Pos) // 512Hz : 32.768kHz(fLCD) / 64 87 #define LCLK_1024Hz (LCD_CR_LCLK_1024Hz << LCD_CR_LCLK_Pos) // 1024Hz : 32.768kHz(fLCD) / 32 94 #define LCDABC_Off (LCD_BCCR_LCDABC_Off << LCD_BCCR_LCDABC_Pos) 95 #define LCDABC_On (LCD_BCCR_LCDABC_On << LCD_BCCR_LCDABC_Pos) 108 #define BMSEL_BMA1Clk (LCD_BCCR_BMSEL_BMA1Clk << LCD_BCCR_BMSEL_Pos) // BMA1Clk : 'Bias Mode A' for 1-clock of fLCD 109 #define BMSEL_BMA2Clk (LCD_BCCR_BMSEL_BMA2Clk << LCD_BCCR_BMSEL_Pos) // BMA2Clk : 'Bias Mode A' for 2-clock of fLCD 110 #define BMSEL_BMA3Clk (LCD_BCCR_BMSEL_BMA3Clk << LCD_BCCR_BMSEL_Pos) // BMA3Clk : 'Bias Mode A' for 3-clock of fLCD 111 #define BMSEL_BMA4Clk (LCD_BCCR_BMSEL_BMA4Clk << LCD_BCCR_BMSEL_Pos) // BMA4Clk : 'Bias Mode A' for 4-clock of fLCD 112 #define BMSEL_BMA5Clk (LCD_BCCR_BMSEL_BMA5Clk << LCD_BCCR_BMSEL_Pos) // BMA5Clk : 'Bias Mode A' for 5-clock of fLCD 113 #define BMSEL_BMA6Clk (LCD_BCCR_BMSEL_BMA6Clk << LCD_BCCR_BMSEL_Pos) // BMA6Clk : 'Bias Mode A' for 6-clock of fLCD 114 #define BMSEL_BMA7Clk (LCD_BCCR_BMSEL_BMA7Clk << LCD_BCCR_BMSEL_Pos) // BMA7Clk : 'Bias Mode A' for 7-clock of fLCD 115 #define BMSEL_BMA8Clk (LCD_BCCR_BMSEL_BMA8Clk << LCD_BCCR_BMSEL_Pos) // BMA8Clk : 'Bias Mode A' for 8-clock of fLCD 122 #define LCTEN_Disable (LCD_BCCR_LCTEN_Disable << LCD_BCCR_LCTEN_Pos) 123 #define LCTEN_Enable (LCD_BCCR_LCTEN_Enable << LCD_BCCR_LCTEN_Pos) 144 #define VLCD_Step0 (LCD_BCCR_VLCD_Step0 << LCD_BCCR_VLCD_Pos) // Step0 : VDD x 32/47 Step 145 #define VLCD_Step1 (LCD_BCCR_VLCD_Step1 << LCD_BCCR_VLCD_Pos) // Step1 : VDD x 32/46 Step 146 #define VLCD_Step2 (LCD_BCCR_VLCD_Step2 << LCD_BCCR_VLCD_Pos) // Step2 : VDD x 32/45 Step 147 #define VLCD_Step3 (LCD_BCCR_VLCD_Step3 << LCD_BCCR_VLCD_Pos) // Step3 : VDD x 32/44 Step 148 #define VLCD_Step4 (LCD_BCCR_VLCD_Step4 << LCD_BCCR_VLCD_Pos) // Step4 : VDD x 32/43 Step 149 #define VLCD_Step5 (LCD_BCCR_VLCD_Step5 << LCD_BCCR_VLCD_Pos) // Step5 : VDD x 32/42 Step 150 #define VLCD_Step6 (LCD_BCCR_VLCD_Step6 << LCD_BCCR_VLCD_Pos) // Step6 : VDD x 32/41 Step 151 #define VLCD_Step7 (LCD_BCCR_VLCD_Step7 << LCD_BCCR_VLCD_Pos) // Step7 : VDD x 32/40 Step 152 #define VLCD_Step8 (LCD_BCCR_VLCD_Step8 << LCD_BCCR_VLCD_Pos) // Step8 : VDD x 32/39 Step 153 #define VLCD_Step9 (LCD_BCCR_VLCD_Step9 << LCD_BCCR_VLCD_Pos) // Step9 : VDD x 32/38 Step 154 #define VLCD_Step10 (LCD_BCCR_VLCD_Step10 << LCD_BCCR_VLCD_Pos) // Step10 : VDD x 32/37 Step 155 #define VLCD_Step11 (LCD_BCCR_VLCD_Step11 << LCD_BCCR_VLCD_Pos) // Step11 : VDD x 32/36 Step 156 #define VLCD_Step12 (LCD_BCCR_VLCD_Step12 << LCD_BCCR_VLCD_Pos) // Step12 : VDD x 32/35 Step 157 #define VLCD_Step13 (LCD_BCCR_VLCD_Step13 << LCD_BCCR_VLCD_Pos) // Step13 : VDD x 32/34 Step 158 #define VLCD_Step14 (LCD_BCCR_VLCD_Step14 << LCD_BCCR_VLCD_Pos) // Step14 : VDD x 32/33 Step 159 #define VLCD_Step15 (LCD_BCCR_VLCD_Step15 << LCD_BCCR_VLCD_Pos) // Step15 : VDD x 32/32 Step 162 #define LCDBufSize 33 194 #define LCDON() (LCD->CR_b.DISP = 1) 200 #define LCDOFF() (LCD->CR_b.DISP = 0)
HAL_Status_Type HAL_LCD_Init(LCD_CFG_Type *LCD_Config)
Initialize the LCD peripheral with the specified parameters.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
HAL_Status_Type HAL_LCD_WriteDspRam(uint8_t *write_buf, uint32_t u32Index, uint32_t size)
Write LCD Buffer.
HAL_Status_Type HAL_LCD_ClearDspRam(void)
Clear LCD Buffer.
HAL_Status_Type HAL_LCD_SetRegister(uint32_t u32LCD_CR, uint32_t u32LCD_BCCR)
Set LCD LCD_CR/LCD_BCCR Registers.