50 #define ADC_AN0 (0x0001uL << ADC_CHSELR_AN0_Pos) // AN0 51 #define ADC_AN1 (0x0001uL << ADC_CHSELR_AN1_Pos) // AN1 52 #define ADC_AN2 (0x0001uL << ADC_CHSELR_AN2_Pos) // AN2 53 #define ADC_AN3 (0x0001uL << ADC_CHSELR_AN3_Pos) // AN3 54 #define ADC_AN4 (0x0001uL << ADC_CHSELR_AN4_Pos) // AN4 55 #define ADC_AN5 (0x0001uL << ADC_CHSELR_AN5_Pos) // AN5 56 #define ADC_AN6 (0x0001uL << ADC_CHSELR_AN6_Pos) // AN6 57 #define ADC_AN7 (0x0001uL << ADC_CHSELR_AN7_Pos) // AN7 58 #define ADC_AN8 (0x0001uL << ADC_CHSELR_AN8_Pos) // AN8 59 #define ADC_AN9 (0x0001uL << ADC_CHSELR_AN9_Pos) // AN9 60 #define ADC_AN10 (0x0001uL << ADC_CHSELR_AN10_Pos) // AN10 61 #define ADC_AN11 (0x0001uL << ADC_CHSELR_AN11_Pos) // AN11 62 #define ADC_AN12 (0x0001uL << ADC_CHSELR_AN12_Pos) // AN12 63 #define ADC_AN13 (0x0001uL << ADC_CHSELR_AN13_Pos) // AN13 64 #define ADC_AN14 (0x0001uL << ADC_CHSELR_AN14_Pos) // AN14 65 #define ADC_AN15 (0x0001uL << ADC_CHSELR_AN15_Pos) // AN15 66 #define ADC_AVSS (0x0001uL << ADC_CHSELR_AN16_Pos) // AVSS 67 #define ADC_AVDD (0x0001uL << ADC_CHSELR_AN18_Pos) // AVDD 68 #define ADC_BGR (0x0001uL << ADC_CHSELR_AN19_Pos) // BGR 71 #define ADC_INT_STATUS_MSK 0xfffffff0uL 136 #define ADCEN() (ADC->CR_b.ADCEN = ADC_CR_ADCEN_Enable) 142 #define ADCDIS() (ADC->CR_b.ADCEN = ADC_CR_ADCEN_Disable) 148 #define ADCRDY_Stop() (ADC->CR_b.ADRDY = ADC_CR_ADRDY_Stop) 154 #define ADCRDY_Conv() (ADC->CR_b.ADRDY = ADC_CR_ADRDY_Ready) 160 #define ADCADST_Set() (ADC->CR_b.ADST = ADC_CR_ADST_Start) 166 #define ADC_OVSMPEN() (ADC->OVSCR_b.OVSMPEN = ADC_OVSCR_OVSMPEN_Enable) 172 #define ADC_OVSMPDIS() (ADC->OVSCR_b.OVSMPEN = ADC_OVSCR_OVSMPEN_Disable) 178 #define ADC_SetOvSmpR(adc_ovsmplr) (ADC->OVSCR_b.OVSMPR = adc_ovsmplr) 184 #define ADC_SetOvSht(adc_ovsht) (ADC->OVSCR_b.OVSHT = adc_ovsht) 190 #define ADC_GetLastCh() (ADC->IESR_b.LASTCH) 196 #define ADCInt_GetStbFg() (ADC->IESR_b.STBIFLAG) 202 #define ADCInt_ClrStbFg() (ADC->IESR = ((ADC->IESR&0xfffffff0)|(0x01ul<<ADC_IESR_STBIFLAG_Pos))) 208 #define ADCInt_GetOvRunFg() (ADC->IESR_b.OVRUNIFLAG) 214 #define ADCInt_ClrOvRunFg() (ADC->IESR = ((ADC->IESR&0xfffffff0)|(0x01ul<<ADC_IESR_OVRUNIFLAG_Pos))) 220 #define ADCInt_GetEOCFg() (ADC->IESR_b.EOCIFLAG) 226 #define ADCInt_ClrEOCFg() (ADC->IESR = ((ADC->IESR&0xfffffff0)|(0x01ul<<ADC_IESR_EOCIFLAG_Pos))) 232 #define ADCInt_GetEOSFg() (ADC->IESR_b.EOSIFLAG) 238 #define ADCInt_ClrEOSFg() (ADC->IESR = ((ADC->IESR&0xfffffff0)|(0x01ul<<ADC_IESR_EOSIFLAG_Pos))) 244 #define ADCData_Get() (ADC->DR) 250 #define ADC_DR_RESULT( n ) ((n) & ADC_DR_ADDATA_Msk) 256 #define ADC_SetPreData(adc_pred) (ADC->PREDR = adc_pred) 262 #define ADC_SetSamR(adc_samck) (ADC->SAMR = adc_samck) HAL_Status_Type HAL_ADC_OvSamplingConfig(ADC_Type *ADCx, ADC_OV_SAMPLING_RATIO OvSampRatio, ADC_OVSCR_OVSHT_Enum DataShiftRight)
ADC oversampling configuration.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
HAL_Status_Type HAL_ADC_Init(ADC_Type *ADCx, ADC_CFG_Type *ADC_Config)
Initialize the ADC peripheral with the specified parameters.
HAL_Status_Type HAL_ADC_ChannelSel(ADC_Type *ADCx, uint32_t Channels)
Select ADC Channels to conversion (Ex: ADC_AN0 | ADC_AN5 | ADC_AN14 | ADC_AVDD)
uint16_t HAL_ADC_GetData(ADC_Type *ADCx)
Get Result conversion from A/D data register.
uint8_t HAL_ADC_GetStatus(ADC_Type *ADCx)
Get ADC interrupt status.
HAL_Status_Type HAL_ADC_ConfigInterrupt(ADC_Type *ADCx, ADC_INT_Type ADCIntCfg, FunctionalState NewState)
ADC interrupt configuration.
HAL_Status_Type HAL_ADC_Start(ADC_Type *ADCx)
Start A/D conversion.
HAL_Status_Type HAL_ADC_RdyCmd(ADC_Type *ADCx)
Ready procedure for ADC conversion.
HAL_Status_Type HAL_ADC_DeInit(ADC_Type *ADCx)
Close ADC.
HAL_Status_Type HAL_ADC_ClearStatus(ADC_Type *ADCx, ADC_INT_STATUS_Type ADCInt_status)
Clear ADC interrupt status.