57 // External Interrupt Number 74 #define ITRIGx_Edge INTC_PBTRIG_ITRIG12_Edge 75 #define ITRIGx_Level INTC_PBTRIG_ITRIG12_Level 86 #define INTCTLx_Disable INTC_PBCR_INTCTL12_Disable 87 #define INTCTLx_LowLevel INTC_PBCR_INTCTL12_FallingEdgeLowLevel 88 #define INTCTLx_HighLevel INTC_PBCR_INTCTL12_RisingEdgeHighLevel 89 #define INTCTLx_FallingEdge INTC_PBCR_INTCTL12_FallingEdgeLowLevel 90 #define INTCTLx_RisingEdge INTC_PBCR_INTCTL12_RisingEdgeHighLevel 91 #define INTCTLx_BothEdge INTC_PBCR_INTCTL12_BothEdgeNoLevel 107 #define PnFLAG_FLAG12 (0x1uL << INTC_PBFLAG_FLAG12_Pos) 108 #define PnFLAG_FLAG11 (0x1uL << INTC_PBFLAG_FLAG11_Pos) 109 #define PnFLAG_FLAG10 (0x1uL << INTC_PBFLAG_FLAG10_Pos) 110 #define PnFLAG_FLAG9 (0x1uL << INTC_PBFLAG_FLAG9_Pos) 111 #define PnFLAG_FLAG8 (0x1uL << INTC_PBFLAG_FLAG8_Pos) 112 #define PnFLAG_FLAG7 (0x1uL << INTC_PBFLAG_FLAG7_Pos) 113 #define PnFLAG_FLAG6 (0x1uL << INTC_PBFLAG_FLAG6_Pos) 114 #define PnFLAG_FLAG5 (0x1uL << INTC_PBFLAG_FLAG5_Pos) 115 #define PnFLAG_FLAG4 (0x1uL << INTC_PBFLAG_FLAG4_Pos) 116 #define PnFLAG_FLAG3 (0x1uL << INTC_PBFLAG_FLAG3_Pos) 117 #define PnFLAG_FLAG2 (0x1uL << INTC_PBFLAG_FLAG2_Pos) 118 #define PnFLAG_FLAG1 (0x1uL << INTC_PBFLAG_FLAG1_Pos) 119 #define PnFLAG_FLAG0 (0x1uL << INTC_PBFLAG_FLAG0_Pos) 123 #define CONFx_PA INTC_EINT0CONF1_CONF0_PA 126 #define CONFx_PB INTC_EINT0CONF1_CONF0_PB 129 #define CONFx_PC INTC_EINT0CONF1_CONF0_PC 132 #define CONFx_PD INTC_EINT0CONF1_CONF0_PD 135 #define CONFx_PE INTC_EINT0CONF1_CONF0_PE 138 #define CONFx_PF INTC_EINT0CONF1_CONF0_PF 174 #define MSK_DMAC4 (0x1uL << INTC_MSK_IMSK31_DMAC4_Pos) 175 #define MSK_DMAC3 (0x1uL << INTC_MSK_IMSK30_DMAC3_Pos) 176 #define MSK_DMAC2 (0x1uL << INTC_MSK_IMSK29_DMAC2_Pos) 177 #define MSK_RTCC (0x1uL << INTC_MSK_IMSK28_RTCC_Pos) 178 #define MSK_IMSK27 (0x1uL << INTC_MSK_IMSK27_NULL_Pos) 179 #define MSK_IMSK26 (0x1uL << INTC_MSK_IMSK26_NULL_Pos) 180 #define MSK_LPUART (0x1uL << INTC_MSK_IMSK25_LPUART_Pos) 181 #define MSK_DMAC1 (0x1uL << INTC_MSK_IMSK24_DMAC1_Pos) 182 #define MSK_DMAC0 (0x1uL << INTC_MSK_IMSK23_DMAC0_Pos) 183 #define MSK_CMPn (0x1uL << INTC_MSK_IMSK22_CMPn_Pos) 184 #define MSK_TIMER43 (0x1uL << INTC_MSK_IMSK21_TIMER43_Pos) 185 #define MSK_UART1 (0x1uL << INTC_MSK_IMSK20_UART1_Pos) 186 #define MSK_UART0 (0x1uL << INTC_MSK_IMSK19_UART0_Pos) 187 #define MSK_ADC (0x1uL << INTC_MSK_IMSK18_ADC_Pos) 188 #define MSK_SC1 (0x1uL << INTC_MSK_IMSK17_SC1_Pos) 189 #define MSK_SC0 (0x1uL << INTC_MSK_IMSK16_SC0_Pos) 190 #define MSK_TIMER50 (0x1uL << INTC_MSK_IMSK15_TIMER50_Pos) 191 #define MSK_I2C1 (0x1uL << INTC_MSK_IMSK14_I2C1_Pos) 192 #define MSK_SPI1 (0x1uL << INTC_MSK_IMSK13_SPI1_Pos) 193 #define MSK_SPI0 (0x1uL << INTC_MSK_IMSK12_SPI0_Pos) 194 #define MSK_USART10 (0x1uL << INTC_MSK_IMSK11_USART10_Pos) 195 #define MSK_I2C0 (0x1uL << INTC_MSK_IMSK10_I2C0_Pos) 196 #define MSK_TIMER42 (0x1uL << INTC_MSK_IMSK9_TIMER42_Pos) 197 #define MSK_TIMER41 (0x1uL << INTC_MSK_IMSK8_TIMER41_Pos) 198 #define MSK_TIMER40 (0x1uL << INTC_MSK_IMSK7_TIMER40_Pos) 199 #define MSK_EINT3 (0x1uL << INTC_MSK_IMSK6_EINT3_Pos) 200 #define MSK_EINT2 (0x1uL << INTC_MSK_IMSK5_EINT2_Pos) 201 #define MSK_EINT1 (0x1uL << INTC_MSK_IMSK4_EINT1_Pos) 202 #define MSK_EINT0 (0x1uL << INTC_MSK_IMSK3_EINT0_Pos) 203 #define MSK_WDT (0x1uL << INTC_MSK_IMSK2_WDT_Pos) 204 #define MSK_WUT (0x1uL << INTC_MSK_IMSK1_WUT_Pos) 205 #define MSK_LVI (0x1uL << INTC_MSK_IMSK0_LVI_Pos) 217 #define EIntPA_GetFg() (INTC->PAFLAG) 226 #define EIntPB_GetFg() (INTC->PBFLAG) 235 #define EIntPC_GetFg() (INTC->PCFLAG) 244 #define EIntPD_GetFg() (INTC->PDFLAG) 253 #define EIntPE_GetFg() (INTC->PEFLAG) 262 #define EIntPF_GetFg() (INTC->PFFLAG) 274 #define EIntPA_ClrFgBits( u32Bit ) (INTC->PAFLAG = u32Bit) 286 #define EIntPB_ClrFgBits( u32Bit ) (INTC->PBFLAG = u32Bit) 298 #define EIntPC_ClrFgBits(u32Bit) (INTC->PCFLAG = u32Bit) 310 #define EIntPD_ClrFgBits( u32Bit ) (INTC->PDFLAG = u32Bit) 322 #define EIntPE_ClrFgBits( u32Bit ) (INTC->PEFLAG = u32Bit) 334 #define EIntPF_ClrFgBits( u32Bit ) (INTC->PFFLAG = u32Bit) 345 #define Int_Mask( u32Msk ) (INTC->MSK = (INTC->MSK) & ~u32Msk) 355 #define Int_UnMask( u32UnMsk ) (INTC->MSK = (INTC->MSK) | u32UnMsk) 362 void HAL_INT_EIntCfg( uint32_t u32TarIntNum, uint32_t u32SrcPort, uint32_t u32SrcPin );
uint32_t HAL_INT_EIntPA_GetIntStatus(void)
Get PA Interrupt Flag.
uint32_t HAL_INT_EIntPD_GetIntStatus(void)
Get PD Interrupt Flag.
void HAL_INT_EIntPB_ClearIntStatus(uint32_t u32Value)
Clear PB Interrupt Flag.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
uint32_t HAL_INT_EIntPF_GetIntStatus(void)
Get PF Interrupt Flag.
void HAL_INT_EIntPD_ClearIntStatus(uint32_t u32Value)
Clear PD Interrupt Flag.
void HAL_INT_EInt_MaskDisable(uint32_t u32Src)
Disable Interrupt Source Mask.
void HAL_INT_EIntPE_ClearIntStatus(uint32_t u32Value)
Clear PE Interrupt Flag.
void HAL_INT_EInt_MaskEnable(uint32_t u32Src)
Enable Interrupt Source Mask.
void HAL_INT_EIntCfg(uint32_t u32TarIntNum, uint32_t u32SrcPort, uint32_t u32SrcPin)
Configure External Interrupt Group.
void HAL_INT_EIntPx_SetReg(uint32_t u32Px, uint32_t u32pin, uint32_t u32Trig, uint32_t u32Con)
Configure External Interrupt Trigger.
void HAL_INT_EIntPA_ClearIntStatus(uint32_t u32Value)
Clear PA Interrupt Flag.
uint32_t HAL_INT_EIntPE_GetIntStatus(void)
Get PE Interrupt Flag.
void HAL_INT_EIntPC_ClearIntStatus(uint32_t u32Value)
Clear PC Interrupt Flag.
uint32_t HAL_INT_EIntPB_GetIntStatus(void)
Get PB Interrupt Flag.
void HAL_INT_EIntPF_ClearIntStatus(uint32_t u32Value)
Clear PF Interrupt Flag.
uint32_t HAL_INT_EIntPC_GetIntStatus(void)
Get PC Interrupt Flag.