A31G12x F/W Packages  2.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
Functions
A31G12x_hal_intc.c File Reference

Contains all functions support for intc firmware library on A31G12x. More...

Go to the source code of this file.

Functions

void HAL_INT_EIntPx_SetReg (uint32_t u32Px, uint32_t u32pin, uint32_t u32Trig, uint32_t u32Con)
 Configure External Interrupt Trigger. More...
 
void HAL_INT_EIntCfg (uint32_t u32TarIntNum, uint32_t u32SrcPort, uint32_t u32SrcPin)
 Configure External Interrupt Group. More...
 
void HAL_INT_EInt_MaskEnable (uint32_t u32Src)
 Enable Interrupt Source Mask. More...
 
void HAL_INT_EInt_MaskDisable (uint32_t u32Src)
 Disable Interrupt Source Mask. More...
 
void HAL_INT_EIntPA_ClearIntStatus (uint32_t u32Value)
 Clear PA Interrupt Flag. More...
 
void HAL_INT_EIntPB_ClearIntStatus (uint32_t u32Value)
 Clear PB Interrupt Flag. More...
 
void HAL_INT_EIntPC_ClearIntStatus (uint32_t u32Value)
 Clear PC Interrupt Flag. More...
 
void HAL_INT_EIntPD_ClearIntStatus (uint32_t u32Value)
 Clear PD Interrupt Flag. More...
 
void HAL_INT_EIntPE_ClearIntStatus (uint32_t u32Value)
 Clear PE Interrupt Flag. More...
 
void HAL_INT_EIntPF_ClearIntStatus (uint32_t u32Value)
 Clear PF Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPA_GetIntStatus (void)
 Get PA Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPB_GetIntStatus (void)
 Get PB Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPC_GetIntStatus (void)
 Get PC Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPD_GetIntStatus (void)
 Get PD Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPE_GetIntStatus (void)
 Get PE Interrupt Flag. More...
 
uint32_t HAL_INT_EIntPF_GetIntStatus (void)
 Get PF Interrupt Flag. More...
 

Detailed Description

Contains all functions support for intc firmware library on A31G12x.

Version
1.00
Date
2020-05-29
Author
ABOV Application Team

Copyright(C) 2019, ABOV Semiconductor All rights reserved.

ABOV Disclaimer

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Definition in file A31G12x_hal_intc.c.

Function Documentation

◆ HAL_INT_EInt_MaskDisable()

void HAL_INT_EInt_MaskDisable ( uint32_t  u32Src)

Disable Interrupt Source Mask.

Parameters
[in]u32SrcInterrupt Source Mask
  • MSK_LVI | MSK_WUT | MSK_WDT | MSK_EINT0 | ...
Returns
None
[Example]
// unmask LVI, WUT, WDT interrupt
HAL_INT_EInt_MaskDisable( MSK_LVI | MSK_WUT | MSK_WDT );

Definition at line 295 of file A31G12x_hal_intc.c.

296 {
297  INTC->MSK |= u32Src;
298 }

◆ HAL_INT_EInt_MaskEnable()

void HAL_INT_EInt_MaskEnable ( uint32_t  u32Src)

Enable Interrupt Source Mask.

Parameters
[in]u32SrcInterrupt Source Mask
  • MSK_LVI | MSK_WUT | MSK_WDT | MSK_EINT0 | ...
Returns
None
[Example]
// mask LVI, WUT, WDT interrupt
HAL_INT_EInt_MaskEnable( MSK_LVI | MSK_WUT | MSK_WDT );

Definition at line 277 of file A31G12x_hal_intc.c.

278 {
279  INTC->MSK &= ~u32Src;
280 }

◆ HAL_INT_EIntCfg()

void HAL_INT_EIntCfg ( uint32_t  u32TarIntNum,
uint32_t  u32SrcPort,
uint32_t  u32SrcPin 
)

Configure External Interrupt Group.

Parameters
[in]u32TarIntNumExternal Interrupt Number
  • EINT0 ~ EINT3
[in]u32SrcPortPort Number
  • CONFx_PB ~ CONFx_PC, CONFx_PE
[in]u32SrcPinPin Number
  • 0 ~ 11
Returns
None

This function configures the external interrupt group 0 to 3

  • If EINT0CONF1 == 0x01214211, The group 0 interrupts are [None:PB6:None:PB4:PE3:PC2:PB1:PB0]
    Remarks
    Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 193 of file A31G12x_hal_intc.c.

194 {
195  uint32_t temp_reg;
196 
197  if( u32SrcPin < 8 )
198  {
199  if( u32TarIntNum == EINT0 )
200  {
201  temp_reg = INTC->EINT0CONF1;
202  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
203  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
204  INTC->EINT0CONF1 = temp_reg;
205  }
206  else if( u32TarIntNum == EINT1 )
207  {
208  temp_reg = INTC->EINT1CONF1;
209  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
210  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
211  INTC->EINT1CONF1 = temp_reg;
212  }
213  else if( u32TarIntNum == EINT2 )
214  {
215  temp_reg = INTC->EINT2CONF1;
216  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
217  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
218  INTC->EINT2CONF1 = temp_reg;
219  }
220  else if( u32TarIntNum == EINT3 )
221  {
222  temp_reg = INTC->EINT3CONF1;
223  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
224  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
225  INTC->EINT3CONF1 = temp_reg;
226  }
227  }
228 #if 1
229  else
230  {
231  u32SrcPin -= 8;
232  if( u32TarIntNum == EINT0 )
233  {
234  temp_reg = INTC->EINT0CONF2;
235  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
236  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
237  INTC->EINT0CONF2 = temp_reg;
238  }
239  else if( u32TarIntNum == EINT1 )
240  {
241  temp_reg = INTC->EINT1CONF2;
242  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
243  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
244  INTC->EINT1CONF2 = temp_reg;
245  }
246  else if( u32TarIntNum == EINT2 )
247  {
248  temp_reg = INTC->EINT2CONF2;
249  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
250  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
251  INTC->EINT2CONF2 = temp_reg;
252  }
253  else if( u32TarIntNum == EINT3 )
254  {
255  temp_reg = INTC->EINT3CONF2;
256  temp_reg &= ~( 0x0F << ( u32SrcPin * 4 ) );
257  temp_reg |= ( u32SrcPort << ( u32SrcPin * 4 ) );
258  INTC->EINT3CONF2 = temp_reg;
259  }
260  }
261 #endif
262 }

◆ HAL_INT_EIntPA_ClearIntStatus()

void HAL_INT_EIntPA_ClearIntStatus ( uint32_t  u32Value)

Clear PA Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG0
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 309 of file A31G12x_hal_intc.c.

310 {
311  INTC->PAFLAG = u32Value;
312 }

◆ HAL_INT_EIntPA_GetIntStatus()

uint32_t HAL_INT_EIntPA_GetIntStatus ( void  )

Get PA Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 396 of file A31G12x_hal_intc.c.

397 {
398  return INTC->PAFLAG;
399 }

◆ HAL_INT_EIntPB_ClearIntStatus()

void HAL_INT_EIntPB_ClearIntStatus ( uint32_t  u32Value)

Clear PB Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG11
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 324 of file A31G12x_hal_intc.c.

325 {
326  INTC->PBFLAG = u32Value;
327 }

◆ HAL_INT_EIntPB_GetIntStatus()

uint32_t HAL_INT_EIntPB_GetIntStatus ( void  )

Get PB Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 408 of file A31G12x_hal_intc.c.

409 {
410  return INTC->PBFLAG;
411 }

◆ HAL_INT_EIntPC_ClearIntStatus()

void HAL_INT_EIntPC_ClearIntStatus ( uint32_t  u32Value)

Clear PC Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG3
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 339 of file A31G12x_hal_intc.c.

340 {
341  INTC->PCFLAG = u32Value;
342 }

◆ HAL_INT_EIntPC_GetIntStatus()

uint32_t HAL_INT_EIntPC_GetIntStatus ( void  )

Get PC Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 420 of file A31G12x_hal_intc.c.

421 {
422  return INTC->PCFLAG;
423 }

◆ HAL_INT_EIntPD_ClearIntStatus()

void HAL_INT_EIntPD_ClearIntStatus ( uint32_t  u32Value)

Clear PD Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG0
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 354 of file A31G12x_hal_intc.c.

355 {
356  INTC->PDFLAG = u32Value;
357 }

◆ HAL_INT_EIntPD_GetIntStatus()

uint32_t HAL_INT_EIntPD_GetIntStatus ( void  )

Get PD Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 432 of file A31G12x_hal_intc.c.

433 {
434  return INTC->PDFLAG;
435 }

◆ HAL_INT_EIntPE_ClearIntStatus()

void HAL_INT_EIntPE_ClearIntStatus ( uint32_t  u32Value)

Clear PE Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG3
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 369 of file A31G12x_hal_intc.c.

370 {
371  INTC->PEFLAG = u32Value;
372 }

◆ HAL_INT_EIntPE_GetIntStatus()

uint32_t HAL_INT_EIntPE_GetIntStatus ( void  )

Get PE Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 444 of file A31G12x_hal_intc.c.

445 {
446  return INTC->PEFLAG;
447 }

◆ HAL_INT_EIntPF_ClearIntStatus()

void HAL_INT_EIntPF_ClearIntStatus ( uint32_t  u32Value)

Clear PF Interrupt Flag.

Parameters
[in]u32ValuePn Interrupt Flag Mask
  • PnFLAG_FLAG0 ~ PnFLAG_FLAG0
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 384 of file A31G12x_hal_intc.c.

385 {
386  INTC->PFFLAG = u32Value;
387 }

◆ HAL_INT_EIntPF_GetIntStatus()

uint32_t HAL_INT_EIntPF_GetIntStatus ( void  )

Get PF Interrupt Flag.

Returns
Pn Interrput Flag
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]

Definition at line 456 of file A31G12x_hal_intc.c.

457 {
458  return INTC->PFFLAG;
459 }

◆ HAL_INT_EIntPx_SetReg()

void HAL_INT_EIntPx_SetReg ( uint32_t  u32Px,
uint32_t  u32pin,
uint32_t  u32Trig,
uint32_t  u32Con 
)

Configure External Interrupt Trigger.

Parameters
[in]u32PxPort Number
  • PORTB ~ PORTC, PORTE
[in]u32pinPin Number
  • 0 ~ 11
[in]u32TrigTrigger Mode
  • ITRIGx_Edge, ITRIGx_Level
[in]u32ConInterrupt Mode
  • when Trigger Mode is ITRIGx_Edge
    • INTCTLx_Disable, INTCTLx_FallingEdge, INTCTLx_RisingEdge, INTCTLx_BothEdge
  • when Trigger Mode is ITRIGx_Level
    • INTCTLx_Disable, INTCTLx_LowLevel, INTCTLx_HighLevel
Returns
None
Remarks
Available EINT Pin: PB[11:0], PC[3:0], PE[3:0]
[Example]
// configure PB0 as a Falling Edge Trigger
HAL_INT_EIntPx_SetReg( PORTB, 0, ITRIGx_Edge, INTCTLx_FallingEdge );
// configure PB1 as a Falling Edge Trigger
HAL_INT_EIntPx_SetReg( PORTB, 1, ITRIGx_Edge, INTCTLx_RisingEdge );
// configure PB2 as a Falling Edge Trigger
HAL_INT_EIntPx_SetReg( PORTB, 2, ITRIGx_Edge, INTCTLx_BothEdge );
// configure PB3 as a Falling Edge Trigger
HAL_INT_EIntPx_SetReg( PORTB, 3, ITRIGx_Level, INTCTLx_LowLevel );

Definition at line 82 of file A31G12x_hal_intc.c.

83 {
84  uint32_t temp_reg;
85 
86 #ifdef PORTA
87  if( u32Px == PORTA )
88  {
89  temp_reg = INTC->PATRIG;
90  temp_reg &= ~( 1 << u32pin );
91  temp_reg |= ( u32Trig << u32pin );
92  INTC->PATRIG = temp_reg;
93 
94  temp_reg = INTC->PACR;
95  temp_reg &= ~( 3 << ( u32pin << 1 ) );
96  temp_reg |= ( u32Con << ( u32pin << 1 ) );
97  INTC->PACR = temp_reg;
98  }
99 #endif
100 
101 #ifdef PORTB
102  if( u32Px == PORTB )
103  {
104  temp_reg = INTC->PBTRIG;
105  temp_reg &= ~( 1 << u32pin );
106  temp_reg |= ( u32Trig << u32pin );
107  INTC->PBTRIG = temp_reg;
108 
109  temp_reg = INTC->PBCR;
110  temp_reg &= ~( 3 << ( u32pin << 1 ) );
111  temp_reg |= ( u32Con << ( u32pin << 1 ) );
112  INTC->PBCR = temp_reg;
113  }
114 #endif
115 
116 #ifdef PORTC
117  if( u32Px == PORTC )
118  {
119  temp_reg = INTC->PCTRIG;
120  temp_reg &= ~( 1 << u32pin );
121  temp_reg |= ( u32Trig << u32pin );
122  INTC->PCTRIG = temp_reg;
123 
124  temp_reg = INTC->PCCR;
125  temp_reg &= ~( 3 << ( u32pin << 1 ) );
126  temp_reg |= ( u32Con << ( u32pin << 1 ) );
127  INTC->PCCR = temp_reg;
128  }
129 #endif
130 
131 #ifdef PORTD
132  if( u32Px == PORTD )
133  {
134  temp_reg = INTC->PDTRIG;
135  temp_reg &= ~( 1 << u32pin );
136  temp_reg |= ( u32Trig << u32pin );
137  INTC->PDTRIG = temp_reg;
138 
139  temp_reg = INTC->PDCR;
140  temp_reg &= ~( 3 << ( u32pin << 1 ) );
141  temp_reg |= ( u32Con << ( u32pin << 1 ) );
142  INTC->PDCR = temp_reg;
143  }
144 #endif
145 
146 #ifdef PORTE
147  if( u32Px == PORTE )
148  {
149  temp_reg = INTC->PETRIG;
150  temp_reg &= ~( 1 << u32pin );
151  temp_reg |= ( u32Trig << u32pin );
152  INTC->PETRIG = temp_reg;
153 
154  temp_reg = INTC->PECR;
155  temp_reg &= ~( 3 << ( u32pin << 1 ) );
156  temp_reg |= ( u32Con << ( u32pin << 1 ) );
157  INTC->PECR = temp_reg;
158  }
159 #endif
160 
161 #ifdef PORTF
162  if( u32Px == PORTF )
163  {
164  temp_reg = INTC->PFTRIG;
165  temp_reg &= ~( 1 << u32pin );
166  temp_reg |= ( u32Trig << u32pin );
167  INTC->PFTRIG = temp_reg;
168 
169  temp_reg = INTC->PFCR;
170  temp_reg &= ~( 3 << ( u32pin << 1 ) );
171  temp_reg |= ( u32Con << ( u32pin << 1 ) );
172  INTC->PFCR = temp_reg;
173  }
174 #endif
175 }