A31G11x F/W Packages  2.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
Enumerations | Functions
A31G11x_hal_pcu.h File Reference

Contains all macro definitions and function prototypes support for pcu firmware library on A31G11x. More...

Go to the source code of this file.

Enumerations

enum  PCU_PORT_MODE { INPUT = 0, PUSH_PULL_OUTPUT, ALTERN_FUNC, OPEN_DRAIN_OUTPUT }
 

Functions

void HAL_GPIO_Init (Pn_Type *Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32PuPd)
 Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers. More...
 
void HAL_GPIO_ConfigFunction (Pn_Type *Px, uint8_t pin_no, uint32_t func)
 Configure pin function. More...
 
void HAL_GPIO_ConfigOutput (Pn_Type *Px, uint8_t pin_no, PCU_PORT_MODE dir_type)
 Configure pin mode. More...
 
void HAL_GPIO_ConfigOutDataMask (Pn_Type *Px, uint8_t pin_no, FunctionalState maskctrl)
 Configure out data Mask. More...
 
void HAL_GPIO_ConfigPullup (Pn_Type *Px, uint8_t pin_no, uint8_t pullupdown)
 Configure Pin Pull-Up & Pull-Down. More...
 
void HAL_GPIO_SetDebouncePin (Pn_Type *Px, uint32_t u32Pins, uint32_t u32Debnc)
 Set PCU Debounce. More...
 
void HAL_GPIO_SetPin (Pn_Type *Px, uint16_t bitValue)
 Set Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_ClearPin (Pn_Type *Px, uint16_t bitValue)
 Clear Value for bits that have output direction on GPIO port. More...
 
void HAL_GPIO_WritePin (Pn_Type *Px, uint16_t Value)
 Write Value on port that have output direction of GPIO. More...
 
uint16_t HAL_GPIO_ReadPin (Pn_Type *Px)
 Read Current state on port pin that have input direction of GPIO. More...
 

Detailed Description

Contains all macro definitions and function prototypes support for pcu firmware library on A31G11x.

Version
1.00
Date
2020-05-29
Author
ABOV Application Team

Copyright(C) 2019, ABOV Semiconductor All rights reserved.

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Definition in file A31G11x_hal_pcu.h.

Enumeration Type Documentation

◆ PCU_PORT_MODE

Pin Mode and Pin Type Selection Control

Enumerator
INPUT 
PUSH_PULL_OUTPUT 
ALTERN_FUNC 
OPEN_DRAIN_OUTPUT 

Definition at line 116 of file A31G11x_hal_pcu.h.

Function Documentation

◆ HAL_GPIO_ClearPin()

void HAL_GPIO_ClearPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Clear Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to clear.
  • 0x00 ~ 0xff
  • Example: Use the value of 0x03 to clear bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 288 of file A31G11x_hal_pcu.c.

289 {
290  Px->BCR = bitValue;
291 }

◆ HAL_GPIO_ConfigFunction()

void HAL_GPIO_ConfigFunction ( Pn_Type *  Px,
uint8_t  pin_no,
uint32_t  func 
)

Configure pin function.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 7
[in]funcAlternative Function Number
  • AFSRx_AF0 ~ AFSRx_AF4
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 86 of file A31G11x_hal_pcu.c.

87 {
88  uint8_t pin_offset;
89  uint32_t reg_val;
90 
91  if( pin_no < 8 ) // 0~7
92  {
93  //--------------------------------------
94  // pin_offset = pin_no * 4
95  //--------------------------------------
96  pin_offset = ( pin_no * 4 );
97 
98  //--------------------------------------
99  // MR
100  //--------------------------------------
101  reg_val = Px->AFSR1;
102  reg_val &= ~( AFSRx_Msk << pin_offset );
103  reg_val |= ( func << pin_offset );
104 
105  Px->AFSR1 = reg_val;
106  }
107 }

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigOutDataMask()

void HAL_GPIO_ConfigOutDataMask ( Pn_Type *  Px,
uint8_t  pin_no,
FunctionalState  maskctrl 
)

Configure out data Mask.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 7
[in]maskctrlstate
  • OUTDMSKx_Unmask // The corresponding OUTDRx bit can be changed.
  • OUTDMSKx_Mask // The corresponding OUTDRx bit is protected.
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 180 of file A31G11x_hal_pcu.c.

181 {
182  uint32_t reg_val;
183 
184  reg_val = Px->OUTDMSK;
185  reg_val &= ~( 1 << pin_no );
186  reg_val |= ( maskctrl << pin_no );
187  Px->OUTDMSK = reg_val;
188 }

◆ HAL_GPIO_ConfigOutput()

void HAL_GPIO_ConfigOutput ( Pn_Type *  Px,
uint8_t  pin_no,
PCU_PORT_MODE  dir_type 
)

Configure pin mode.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 7
[in]dir_typePin Mode
  • INPUT: 0
  • PUSH_PULL_OUTPUT: 1
  • ALTERN_FUNC: 2
  • OPEN_DRAIN_OUTPUT: 3
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 126 of file A31G11x_hal_pcu.c.

127 {
128  uint8_t pin_offset;
129  uint32_t reg_val;
130  uint32_t dir_type_temp;
131 
132  dir_type_temp = dir_type;
133  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
134  {
135  dir_type = PUSH_PULL_OUTPUT;
136  }
137  //--------------------------------------
138  // pin_offset = pin_no * 2
139  //--------------------------------------
140  pin_offset = ( pin_no << 1 );
141 
142  //--------------------------------------
143  // Pn_MOD
144  //--------------------------------------
145  reg_val = Px->MOD;
146  reg_val &= ~( MODEx_Msk << pin_offset );
147  reg_val |= ( dir_type << pin_offset );
148  Px->MOD = reg_val;
149 
150  //--------------------------------------
151  // Pn_TYP
152  //--------------------------------------
153  if( ( dir_type_temp == PUSH_PULL_OUTPUT ) || ( dir_type_temp == OPEN_DRAIN_OUTPUT ) )
154  {
155  reg_val = Px->TYP;
156  reg_val &= ~( 1 << pin_no );
157  if( dir_type_temp == OPEN_DRAIN_OUTPUT )
158  {
159  reg_val |= ( 1 << pin_no );
160  }
161  Px->TYP = reg_val;
162  }
163 }

References OPEN_DRAIN_OUTPUT, and PUSH_PULL_OUTPUT.

Referenced by debug_frmwrk_init().

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◆ HAL_GPIO_ConfigPullup()

void HAL_GPIO_ConfigPullup ( Pn_Type *  Px,
uint8_t  pin_no,
uint8_t  pullupdown 
)

Configure Pin Pull-Up & Pull-Down.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]pin_noPin Number
  • 0 ~ 7
[in]pullupdownTarget Configuration
  • PUPDx_Disable
  • PUPDx_EnablePU
  • PUPDx_EnablePD
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 206 of file A31G11x_hal_pcu.c.

207 {
208  uint32_t reg_val;
209  uint8_t pin_offset;
210 
211  pin_offset = ( pin_no << 1 );
212 
213  reg_val = Px->PUPD;
214  reg_val &= ~( 3 << pin_offset );
215  reg_val |= ( pullupdown << pin_offset );
216  Px->PUPD = reg_val;
217 }

◆ HAL_GPIO_Init()

void HAL_GPIO_Init ( Pn_Type *  Px,
uint32_t  u32Mode,
uint32_t  u32Type,
uint32_t  u32Afsr1,
uint32_t  u32PuPd 
)

Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]u32ModeValues for In/Out/Alternative mode
[in]u32TypeValues for Push-pull and Open-drain
[in]u32Afsr1Values for Alternative Function
[in]u32PuPdValues for Pull-up/down resistor
Returns
None

This function sets the mode, type, alternative function, and pull-up/down resistor of port.

Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 64 of file A31G11x_hal_pcu.c.

65 {
66  Px->MOD = u32Mode; // 00/01/10/11: Input/Output/"Alternative Function"/Reserved Mode
67  Px->TYP = u32Type; // 0/1: Push-pull/Open-drain Output
68  Px->AFSR1 = u32Afsr1; // 0 to 4: Alternative Function 0 to 4
69  Px->PUPD = u32PuPd; // 00/01/10/11: "Disable Pull-up/down"/"Enable Pull-up"/"Enable Pull-down"/Reserved Resistor
70 }

◆ HAL_GPIO_ReadPin()

uint16_t HAL_GPIO_ReadPin ( Pn_Type *  Px)

Read Current state on port pin that have input direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
Returns
Current value of GPIO port.
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]
Note
Return value contain state of each port pin (bit) on that GPIO regardless its direction is input or output.

Definition at line 318 of file A31G11x_hal_pcu.c.

319 {
320  return Px->INDR;
321 }

◆ HAL_GPIO_SetDebouncePin()

void HAL_GPIO_SetDebouncePin ( Pn_Type *  Px,
uint32_t  u32Pins,
uint32_t  u32Debnc 
)

Set PCU Debounce.

Parameters
[in]PxPointer to the target PORT
  • PB ~ PC, PE
[in]u32PinsPin Number
  • 0 ~ 7
[in]u32DebncSampling Clock Selection
  • DBCLK_HCLK1, DBCLK_HCLK4, DBCLK_HCLK16, DBCLK_HCLK64, DBCLK_HCLK256, DBCLK_HCLK1024
Returns
None

This function enables the debounce filter for the pin specified by u32Pins and selects the debounce filter sampling clock.

Remarks
Available EINT Pin: PB[7:0], PC[3:0], PE[3:0]
[Example]
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PB, 0, DBCLK_HCLK1024 );
HAL_GPIO_SetDebouncePin( ( Pn_Type* )PB, 1, DBCLK_HCLK1024 );

Definition at line 241 of file A31G11x_hal_pcu.c.

242 {
243 #if 0 // before bug fix
244  uint32_t reg_val;
245 
246  reg_val = ( 0x00ff & Px->DBCR );
247  reg_val |= ( 0x01 << u32Pins );
248  reg_val |= u32Debnc;
249  Px->DBCR = reg_val;
250 #else // after bug fix
251  Px->DBCR = Px->DBCR
252  & ~Pn_DBCR_DBCLK_Msk
253  | ( 1 << u32Pins )
254  | u32Debnc
255  ;
256 #endif
257 }

◆ HAL_GPIO_SetPin()

void HAL_GPIO_SetPin ( Pn_Type *  Px,
uint16_t  bitValue 
)

Set Value for bits that have output direction on GPIO port.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]bitValueValue that contains all bits on GPIO to set.
  • 0x00 ~ 0xff
  • Example: Use the value of 0x03 to set bit 0 and bit 1.
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 271 of file A31G11x_hal_pcu.c.

272 {
273  Px->BSR = bitValue;
274 }

◆ HAL_GPIO_WritePin()

void HAL_GPIO_WritePin ( Pn_Type *  Px,
uint16_t  Value 
)

Write Value on port that have output direction of GPIO.

Parameters
[in]PxPointer to the target PORT
  • PA ~ PF
[in]ValueValue to write
Returns
None
Remarks
Available GPIO Pin: PA[7:0], PB[7:0], PC[4:0], PD[7:0], PE[7:0], PF[7:0]

Definition at line 303 of file A31G11x_hal_pcu.c.

304 {
305  Px->OUTDR = Value;
306 }