A31G11x F/W Packages  2.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
A31G11x_hal_pcu.h
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1 /***************************************************************************//****************************************************************************/
34 
35 #ifndef _PCU_H_
36 #define _PCU_H_
37 
38 #include "A31G11x.h"
39 #include "A31G11x_hal_aa_types.h"
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 //******************************************************************************
46 // Constant
47 //******************************************************************************
48 
49 // Pin Mode & Pin Alternative Function Mask
50 /*
51 #define PCU_FUNC_Msk (0x0FuL)
52 #define PCU_MODE_Msk (0x03uL)
53 */
54 #define MODEx_Msk Pn_MOD_MODE0_Msk
55 #define AFSRx_Msk Pn_AFSR1_AFSR0_Msk
56 
57 // Pin Alternative Function Selection Control
58 /*
59 #define FUNC0 0x0 // Alternative Function 0
60 #define FUNC1 0x1 // Alternative Function 1
61 #define FUNC2 0x2 // Alternative Function 2
62 #define FUNC3 0x3 // Alternative Function 3
63 #define FUNC4 0x4 // Alternative Function 4
64 // #define FUNC5 0x5 // Alternative Function 5
65 // #define FUNC6 0x6 // Alternative Function 6
66 // #define FUNC7 0x7 // Alternative Function 7
67 */
68 #define AFSRx_AF0 Pn_AFSR1_AFSR0_AF0
69 #define AFSRx_AF1 Pn_AFSR1_AFSR0_AF1
70 #define AFSRx_AF2 Pn_AFSR1_AFSR0_AF2
71 #define AFSRx_AF3 Pn_AFSR1_AFSR0_AF3
72 #define AFSRx_AF4 Pn_AFSR1_AFSR0_AF4
73 // #define AFSRx_AF5 Pn_AFSR1_AFSR0_AF5
74 // #define AFSRx_AF6 Pn_AFSR1_AFSR0_AF6
75 // #define AFSRx_AF7 Pn_AFSR1_AFSR0_AF7
76 
77 // Pin Pull Up / Pull Down Resistor Enable Control
78 /*
79 #define DISPUPD 0x0 // disable pu_pd
80 #define ENPU 0x1 // enable pull up
81 #define ENPD 0x2 // enable pull down
82 */
83 #define PUPDx_Disable Pn_PUPD_PUPD0_Disable
84 #define PUPDx_EnablePU Pn_PUPD_PUPD0_EnablePU
85 #define PUPDx_EnablePD Pn_PUPD_PUPD0_EnablePD
86 
87 // Debounce Filter Sampling Clock Selection Control
88 /*
89 #define HCLK_1 (0x0uL << 16)
90 #define HCLK_4 (0x1uL << 16)
91 #define HCLK_16 (0x2uL << 16)
92 #define HCLK_64 (0x3uL << 16)
93 #define HCLK_256 (0x4uL << 16)
94 #define HCLK_1024 (0x5uL << 16)
95 */
96 #define DBCLK_HCLK1 (Pn_DBCR_DBCLK_HCLK1 << Pn_DBCR_DBCLK_Pos) // HCLK/1
97 #define DBCLK_HCLK4 (Pn_DBCR_DBCLK_HCLK4 << Pn_DBCR_DBCLK_Pos) // HCLK/4
98 #define DBCLK_HCLK16 (Pn_DBCR_DBCLK_HCLK16 << Pn_DBCR_DBCLK_Pos) // HCLK/16
99 #define DBCLK_HCLK64 (Pn_DBCR_DBCLK_HCLK64 << Pn_DBCR_DBCLK_Pos) // HCLK/64
100 #define DBCLK_HCLK256 (Pn_DBCR_DBCLK_HCLK256 << Pn_DBCR_DBCLK_Pos) // HCLK/256
101 #define DBCLK_HCLK1024 (Pn_DBCR_DBCLK_HCLK1024 << Pn_DBCR_DBCLK_Pos) // HCLK/1024
102 
103 // Output Data Mask Control
104 #define OUTDMSKx_Unmask Pn_OUTDMSK_OUTDMSK0_Unmask
105 #define OUTDMSKx_Mask Pn_OUTDMSK_OUTDMSK0_Mask
106 
107 //******************************************************************************
108 // Type
109 //******************************************************************************
110 
111 //==============================================================================
112 // Enumeration
113 //==============================================================================
114 
116 typedef enum
117 {
118  INPUT = 0,
122 } PCU_PORT_MODE;
123 
124 //******************************************************************************
125 // Macro
126 //******************************************************************************
127 
128 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
137 #define GPIO_GetInData( Px ) (Px->INDR)
138 
139 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
148 #define GPIO_GetBit0( Px ) (Px->INDR_b.INDR0)
149 #define GPIO_GetBit1( Px ) (Px->INDR_b.INDR1)
150 #define GPIO_GetBit2( Px ) (Px->INDR_b.INDR2)
151 #define GPIO_GetBit3( Px ) (Px->INDR_b.INDR3)
152 #define GPIO_GetBit4( Px ) (Px->INDR_b.INDR4)
153 #define GPIO_GetBit5( Px ) (Px->INDR_b.INDR5)
154 #define GPIO_GetBit6( Px ) (Px->INDR_b.INDR6)
155 #define GPIO_GetBit7( Px ) (Px->INDR_b.INDR7)
156 // #define GPIO_GetBit8( Px ) (Px->INDR_b.INDR8)
157 // #define GPIO_GetBit9( Px ) (Px->INDR_b.INDR9)
158 // #define GPIO_GetBit10( Px ) (Px->INDR_b.INDR10)
159 // #define GPIO_GetBit11( Px ) (Px->INDR_b.INDR11)
160 // #define GPIO_GetBit12( Px ) (Px->INDR_b.INDR12)
161 // #define GPIO_GetBit13( Px ) (Px->INDR_b.INDR13)
162 // #define GPIO_GetBit14( Px ) (Px->INDR_b.INDR14)
163 // #define GPIO_GetBit15( Px ) (Px->INDR_b.INDR15)
164 
165 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
176 #define GPIO_SetOutData( Px, u32OutData ) (Px->OUTDR = u32OutData)
177 
178 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
187 #define GPIO_SetBit0( Px ) (Px->BSR_b.BSR0 = 1)
188 #define GPIO_SetBit1( Px ) (Px->BSR_b.BSR1 = 1)
189 #define GPIO_SetBit2( Px ) (Px->BSR_b.BSR2 = 1)
190 #define GPIO_SetBit3( Px ) (Px->BSR_b.BSR3 = 1)
191 #define GPIO_SetBit4( Px ) (Px->BSR_b.BSR4 = 1)
192 #define GPIO_SetBit5( Px ) (Px->BSR_b.BSR5 = 1)
193 #define GPIO_SetBit6( Px ) (Px->BSR_b.BSR6 = 1)
194 #define GPIO_SetBit7( Px ) (Px->BSR_b.BSR7 = 1)
195 // #define GPIO_SetBit8( Px ) (Px->BSR_b.BSR8 = 1)
196 // #define GPIO_SetBit9( Px ) (Px->BSR_b.BSR9 = 1)
197 // #define GPIO_SetBit10( Px ) (Px->BSR_b.BSR10 = 1)
198 // #define GPIO_SetBit11( Px ) (Px->BSR_b.BSR11 = 1)
199 // #define GPIO_SetBit12( Px ) (Px->BSR_b.BSR12 = 1)
200 // #define GPIO_SetBit13( Px ) (Px->BSR_b.BSR13 = 1)
201 // #define GPIO_SetBit14( Px ) (Px->BSR_b.BSR14 = 1)
202 // #define GPIO_SetBit15( Px ) (Px->BSR_b.BSR15 = 1)
203 
204 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
213 #define GPIO_ClrBit0( Px ) (Px->BCR_b.BCR0 = 1)
214 #define GPIO_ClrBit1( Px ) (Px->BCR_b.BCR1 = 1)
215 #define GPIO_ClrBit2( Px ) (Px->BCR_b.BCR2 = 1)
216 #define GPIO_ClrBit3( Px ) (Px->BCR_b.BCR3 = 1)
217 #define GPIO_ClrBit4( Px ) (Px->BCR_b.BCR4 = 1)
218 #define GPIO_ClrBit5( Px ) (Px->BCR_b.BCR5 = 1)
219 #define GPIO_ClrBit6( Px ) (Px->BCR_b.BCR6 = 1)
220 #define GPIO_ClrBit7( Px ) (Px->BCR_b.BCR7 = 1)
221 // #define GPIO_ClrBit8( Px ) (Px->BCR_b.BCR8 = 1)
222 // #define GPIO_ClrBit9( Px ) (Px->BCR_b.BCR9 = 1)
223 // #define GPIO_ClrBit10( Px ) (Px->BCR_b.BCR10 = 1)
224 // #define GPIO_ClrBit11( Px ) (Px->BCR_b.BCR11 = 1)
225 // #define GPIO_ClrBit12( Px ) (Px->BCR_b.BCR12 = 1)
226 // #define GPIO_ClrBit13( Px ) (Px->BCR_b.BCR13 = 1)
227 // #define GPIO_ClrBit14( Px ) (Px->BCR_b.BCR14 = 1)
228 // #define GPIO_ClrBit15( Px ) (Px->BCR_b.BCR15 = 1)
229 
230 /*-------------------------------------------------------------------------*//*-------------------------------------------------------------------------*/
242 #define GPIO_OutMsk( Px, u32Msk ) (Px->OUTDMSK = u32Msk)
243 
244 //******************************************************************************
245 // Function
246 //******************************************************************************
247 
248 void HAL_GPIO_Init( Pn_Type* Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32PuPd );
249 
250 void HAL_GPIO_ConfigFunction( Pn_Type* Px, uint8_t pin_no, uint32_t func );
251 void HAL_GPIO_ConfigOutput( Pn_Type* Px, uint8_t pin_no, PCU_PORT_MODE dir_type );
252 void HAL_GPIO_ConfigOutDataMask( Pn_Type* Px, uint8_t pin_no, FunctionalState maskctrl );
253 void HAL_GPIO_ConfigPullup( Pn_Type* Px, uint8_t pin_no, uint8_t pullupdown );
254 void HAL_GPIO_SetDebouncePin( Pn_Type* Px, uint32_t u32Pins, uint32_t u32Debnc );
255 
256 void HAL_GPIO_SetPin( Pn_Type* Px, uint16_t bitValue );
257 void HAL_GPIO_ClearPin( Pn_Type* Px, uint16_t bitValue );
258 void HAL_GPIO_WritePin( Pn_Type* Px, uint16_t Value );
259 uint16_t HAL_GPIO_ReadPin( Pn_Type* Px );
260 
261 #ifdef __cplusplus
262 }
263 #endif
264 
265 #endif /* _PCU_H_ */
266 
uint16_t HAL_GPIO_ReadPin(Pn_Type *Px)
Read Current state on port pin that have input direction of GPIO.
Contains the ABOV typedefs for C standard types. It is intended to be used in ISO C conforming develo...
void HAL_GPIO_ConfigOutput(Pn_Type *Px, uint8_t pin_no, PCU_PORT_MODE dir_type)
Configure pin mode.
void HAL_GPIO_SetDebouncePin(Pn_Type *Px, uint32_t u32Pins, uint32_t u32Debnc)
Set PCU Debounce.
void HAL_GPIO_ConfigOutDataMask(Pn_Type *Px, uint8_t pin_no, FunctionalState maskctrl)
Configure out data Mask.
void HAL_GPIO_ConfigFunction(Pn_Type *Px, uint8_t pin_no, uint32_t func)
Configure pin function.
void HAL_GPIO_WritePin(Pn_Type *Px, uint16_t Value)
Write Value on port that have output direction of GPIO.
FunctionalState
void HAL_GPIO_SetPin(Pn_Type *Px, uint16_t bitValue)
Set Value for bits that have output direction on GPIO port.
PCU_PORT_MODE
void HAL_GPIO_Init(Pn_Type *Px, uint32_t u32Mode, uint32_t u32Type, uint32_t u32Afsr1, uint32_t u32PuPd)
Set PCU Pn_MOD/Pn_TYP/Pn_AFSR1/Pn_PUPD Registers.
void HAL_GPIO_ConfigPullup(Pn_Type *Px, uint8_t pin_no, uint8_t pullupdown)
Configure Pin Pull-Up & Pull-Down.
void HAL_GPIO_ClearPin(Pn_Type *Px, uint16_t bitValue)
Clear Value for bits that have output direction on GPIO port.