A31G12x F/W Packages
2.5.0
ABOV Cortex-M0+ Core based MCUs Integrated Driver
- a -
ALTERN_FUNC :
A31G12x_hal_pcu.h
- b -
BLOCKING :
A31G12x_hal_aa_types.h
- d -
DISABLE :
A31G12x_hal_aa_types.h
- e -
ENABLE :
A31G12x_hal_aa_types.h
ERROR :
A31G12x_hal_aa_types.h
- f -
FALSE :
A31G12x_hal_aa_types.h
- h -
HAL_BUSY :
A31G12x_hal_aa_types.h
HAL_ERROR :
A31G12x_hal_aa_types.h
HAL_OK :
A31G12x_hal_aa_types.h
HAL_TIMEOUT :
A31G12x_hal_aa_types.h
- i -
I2Cn_TRANSFER_INTERRUPT :
A31G12x_hal_i2cn.h
I2Cn_TRANSFER_POLLING :
A31G12x_hal_i2cn.h
INPUT :
A31G12x_hal_pcu.h
- n -
NONE_BLOCKING :
A31G12x_hal_aa_types.h
- o -
OPEN_DRAIN_OUTPUT :
A31G12x_hal_pcu.h
- p -
PUSH_PULL_OUTPUT :
A31G12x_hal_pcu.h
- r -
RESET :
A31G12x_hal_aa_types.h
- s -
SET :
A31G12x_hal_aa_types.h
SUCCESS :
A31G12x_hal_aa_types.h
- t -
TIMER1n_BOTH_EGDE :
A31G12x_hal_timer1n.h
TIMER1n_CAPTURE_MODE :
A31G12x_hal_timer1n.h
TIMER1n_ECn :
A31G12x_hal_timer1n.h
TIMER1n_FALLING_EGDE :
A31G12x_hal_timer1n.h
TIMER1n_INTCFG_CIE :
A31G12x_hal_timer1n.h
TIMER1n_INTCFG_MIE :
A31G12x_hal_timer1n.h
TIMER1n_NONE :
A31G12x_hal_timer1n.h
TIMER1n_ONESHOT_MODE :
A31G12x_hal_timer1n.h
TIMER1n_PCLK :
A31G12x_hal_timer1n.h
TIMER1n_PERIODIC_MODE :
A31G12x_hal_timer1n.h
TIMER1n_PWM_MODE :
A31G12x_hal_timer1n.h
TIMER1n_RISING_EGDE :
A31G12x_hal_timer1n.h
TIMER1n_START_HIGH :
A31G12x_hal_timer1n.h
TIMER1n_START_LOW :
A31G12x_hal_timer1n.h
TIMER2n_BOTH_EGDE :
A31G12x_hal_timer2n.h
TIMER2n_CAP_EXTERNAL_CLK :
A31G12x_hal_timer2n.h
TIMER2n_CAP_WDTRC_CLK :
A31G12x_hal_timer2n.h
TIMER2n_CAP_XSOSC_CLK :
A31G12x_hal_timer2n.h
TIMER2n_CAPTURE_MODE :
A31G12x_hal_timer2n.h
TIMER2n_CR_CAPTURE_INTR :
A31G12x_hal_timer2n.h
TIMER2n_CR_MATCH_INTR :
A31G12x_hal_timer2n.h
TIMER2n_EXTERNAL_CLK :
A31G12x_hal_timer2n.h
TIMER2n_FALLING_EGDE :
A31G12x_hal_timer2n.h
TIMER2n_INTERNAL_CLK :
A31G12x_hal_timer2n.h
TIMER2n_NONE :
A31G12x_hal_timer2n.h
TIMER2n_ONESHOT_MODE :
A31G12x_hal_timer2n.h
TIMER2n_PCLK_CLK :
A31G12x_hal_timer2n.h
TIMER2n_PERIODIC_MODE :
A31G12x_hal_timer2n.h
TIMER2n_PWM_MODE :
A31G12x_hal_timer2n.h
TIMER2n_RISING_EGDE :
A31G12x_hal_timer2n.h
TIMER2n_START_HIGH :
A31G12x_hal_timer2n.h
TIMER2n_START_LOW :
A31G12x_hal_timer2n.h
TIMER2n_XSOSC_CLK :
A31G12x_hal_timer2n.h
TRUE :
A31G12x_hal_aa_types.h
- u -
UARTn_DATA_BIT_5 :
A31G12x_hal_uartn.h
UARTn_DATA_BIT_6 :
A31G12x_hal_uartn.h
UARTn_DATA_BIT_7 :
A31G12x_hal_uartn.h
UARTn_DATA_BIT_8 :
A31G12x_hal_uartn.h
UARTn_DATA_CONTROL_LOOPBACK :
A31G12x_hal_uartn.h
UARTn_DATA_CONTROL_RTXINV :
A31G12x_hal_uartn.h
UARTn_DATA_CONTROL_RXINV :
A31G12x_hal_uartn.h
UARTn_DATA_CONTROL_TXINV :
A31G12x_hal_uartn.h
UARTn_INTCFG_RBR :
A31G12x_hal_uartn.h
UARTn_INTCFG_RLS :
A31G12x_hal_uartn.h
UARTn_INTCFG_THRE :
A31G12x_hal_uartn.h
UARTn_INTCFG_TXE :
A31G12x_hal_uartn.h
UARTn_PARITY_BIT_EVEN :
A31G12x_hal_uartn.h
UARTn_PARITY_BIT_NONE :
A31G12x_hal_uartn.h
UARTn_PARITY_BIT_ODD :
A31G12x_hal_uartn.h
UARTn_PARITY_BIT_SP_0 :
A31G12x_hal_uartn.h
UARTn_PARITY_BIT_SP_1 :
A31G12x_hal_uartn.h
UARTn_STOP_BIT_1 :
A31G12x_hal_uartn.h
UARTn_STOP_BIT_2 :
A31G12x_hal_uartn.h
USART1n_CONTROL_DBLS :
A31G12x_hal_usart1n.h
USART1n_CONTROL_DISSCK :
A31G12x_hal_usart1n.h
USART1n_CONTROL_FXCH :
A31G12x_hal_usart1n.h
USART1n_CONTROL_LOOPS :
A31G12x_hal_usart1n.h
USART1n_CONTROL_MASTER :
A31G12x_hal_usart1n.h
USART1n_CONTROL_USTEN :
A31G12x_hal_usart1n.h
USART1n_CONTROL_USTRX8 :
A31G12x_hal_usart1n.h
USART1n_CONTROL_USTSB :
A31G12x_hal_usart1n.h
USART1n_CONTROL_USTSSEN :
A31G12x_hal_usart1n.h
USART1n_CONTROL_USTTX8 :
A31G12x_hal_usart1n.h
USART1n_DATA_BIT_5 :
A31G12x_hal_usart1n.h
USART1n_DATA_BIT_6 :
A31G12x_hal_usart1n.h
USART1n_DATA_BIT_7 :
A31G12x_hal_usart1n.h
USART1n_DATA_BIT_8 :
A31G12x_hal_usart1n.h
USART1n_DATA_BIT_9 :
A31G12x_hal_usart1n.h
USART1n_INTCFG_DR :
A31G12x_hal_usart1n.h
USART1n_INTCFG_RXC :
A31G12x_hal_usart1n.h
USART1n_INTCFG_TXC :
A31G12x_hal_usart1n.h
USART1n_INTCFG_WAKE :
A31G12x_hal_usart1n.h
USART1n_PARITY_BIT_EVEN :
A31G12x_hal_usart1n.h
USART1n_PARITY_BIT_NONE :
A31G12x_hal_usart1n.h
USART1n_PARITY_BIT_ODD :
A31G12x_hal_usart1n.h
USART1n_SPI_LSB :
A31G12x_hal_usart1n.h
USART1n_SPI_MODE :
A31G12x_hal_usart1n.h
USART1n_SPI_MSB :
A31G12x_hal_usart1n.h
USART1n_SPI_TX_FALLING :
A31G12x_hal_usart1n.h
USART1n_SPI_TX_LEADEDGE_SAMPLE :
A31G12x_hal_usart1n.h
USART1n_SPI_TX_LEADEDGE_SETUP :
A31G12x_hal_usart1n.h
USART1n_SPI_TX_RISING :
A31G12x_hal_usart1n.h
USART1n_STATUS_DOR :
A31G12x_hal_usart1n.h
USART1n_STATUS_DRE :
A31G12x_hal_usart1n.h
USART1n_STATUS_FE :
A31G12x_hal_usart1n.h
USART1n_STATUS_PE :
A31G12x_hal_usart1n.h
USART1n_STATUS_RXC :
A31G12x_hal_usart1n.h
USART1n_STATUS_TXC :
A31G12x_hal_usart1n.h
USART1n_STATUS_WAKE :
A31G12x_hal_usart1n.h
USART1n_STOP_BIT_1 :
A31G12x_hal_usart1n.h
USART1n_STOP_BIT_2 :
A31G12x_hal_usart1n.h
USART1n_UART_MODE :
A31G12x_hal_usart1n.h
USART1n_USRT_MODE :
A31G12x_hal_usart1n.h
- w -
WDT_DIV_16 :
A31G12x_hal_wdt.h
WDT_DIV_256 :
A31G12x_hal_wdt.h
WDT_DIV_4 :
A31G12x_hal_wdt.h
WDT_DIV_64 :
A31G12x_hal_wdt.h
WDT_INTCFG_UNFIEN :
A31G12x_hal_wdt.h
WDT_INTCFG_WINMIEN :
A31G12x_hal_wdt.h
WT_DIV_2_13 :
A31G12x_hal_wt.h
WT_DIV_2_14 :
A31G12x_hal_wt.h
WT_DIV_2_14_MUL_DR :
A31G12x_hal_wt.h
WT_DIV_2_7 :
A31G12x_hal_wt.h
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